diff --git a/FW/src/zx_cartrige.v b/FW/src/zx_cartrige.v
index bcf05be..aaecdc7 100644
--- a/FW/src/zx_cartrige.v
+++ b/FW/src/zx_cartrige.v
@@ -23,7 +23,9 @@ module zx_cartrige #(
     // Cartrige ROM enable
     output  CR_ROM_oe_n,
     // Up part cartrige ROM adr bus (A13...A18)
-    output  [5:0] CR_ROM_A
+    output  [5:0] CR_ROM_A,
+	 output  [3:0] CR_ROM_CS
+	 
 );
     // CR_ROM 8kb bank counter
     reg [5:0] CR_ROM_bank_cnt = 6'b0;  
@@ -50,6 +52,11 @@ module zx_cartrige #(
 
     assign CR_ROM_oe_n = ~lower_rom | rd_n | mreq_n | self_lock ;
     assign ZX_ROM_blk = ~CR_ROM_oe_n;
+	 assign CR_ROM_CS[0] = CR_ROM_oe_n;
+	 assign CR_ROM_CS[1] = 1'b1;
+	 assign CR_ROM_CS[2] = 1'b1;
+	 assign CR_ROM_CS[3] = 1'b1;
+	 
     assign CR_ROM_A = CR_ROM_bank_cnt;
 
 endmodule
diff --git a/FW/zx_cartrige.qsf b/FW/zx_cartrige.qsf
index 4f57246..0c27fbc 100644
--- a/FW/zx_cartrige.qsf
+++ b/FW/zx_cartrige.qsf
@@ -67,4 +67,8 @@ set_location_assignment PIN_34 -to CR_ROM_oe_n
 set_location_assignment PIN_27 -to ZX_ROM_blk
 set_location_assignment PIN_24 -to iorq_n
 set_location_assignment PIN_25 -to mreq_n
-set_location_assignment PIN_26 -to rd_n
\ No newline at end of file
+set_location_assignment PIN_26 -to rd_n
+set_location_assignment PIN_8 -to CR_ROM_CS[3]
+set_location_assignment PIN_6 -to CR_ROM_CS[2]
+set_location_assignment PIN_5 -to CR_ROM_CS[1]
+set_location_assignment PIN_4 -to CR_ROM_CS[0]
\ No newline at end of file
diff --git a/HW/src/main.SchDoc b/HW/src/main.SchDoc
index 08e99c9..149512d 100644
Binary files a/HW/src/main.SchDoc and b/HW/src/main.SchDoc differ
diff --git a/HW/src/pcb.PcbDoc b/HW/src/pcb.PcbDoc
index 8f31670..dfdcf01 100644
Binary files a/HW/src/pcb.PcbDoc and b/HW/src/pcb.PcbDoc differ