mirror of
https://github.com/MikhaelKaa/zx_cartridge.git
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84 lines
3.8 KiB
Plaintext
84 lines
3.8 KiB
Plaintext
# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2013 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II 64-Bit
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# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
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# Date created = 14:32:59 February 06, 2026
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# d_fix_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY MAX7000S
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set_global_assignment -name DEVICE "EPM7064SLC44-10"
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set_global_assignment -name TOP_LEVEL_ENTITY zx_cartridge
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "14:32:59 FEBRUARY 06, 2026"
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set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name DEVICE_FILTER_PACKAGE PLCC
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set_global_assignment -name DEVICE_FILTER_PIN_COUNT 44
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set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 10
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name MAX7000_DEVICE_IO_STANDARD TTL
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set_global_assignment -name VERILOG_FILE src/zx_cartridge.v
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set_global_assignment -name CDF_FILE output_files/Chain1.cdf
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set_location_assignment PIN_1 -to reset_n
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set_location_assignment PIN_2 -to rd_n
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set_location_assignment PIN_4 -to wr_n
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set_location_assignment PIN_6 -to A14
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set_location_assignment PIN_8 -to A15
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set_location_assignment PIN_9 -to A13
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set_location_assignment PIN_11 -to CR_ROM_CS[0]
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set_location_assignment PIN_12 -to CR_ROM_CS[1]
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set_location_assignment PIN_16 -to CR_ROM_A[5]
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set_location_assignment PIN_18 -to CR_ROM_A[4]
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set_location_assignment PIN_19 -to CR_ROM_A[3]
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set_location_assignment PIN_20 -to CR_ROM_A[1]
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set_location_assignment PIN_21 -to CR_ROM_A[2]
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set_location_assignment PIN_24 -to A7
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set_location_assignment PIN_25 -to CR_ROM_A[0]
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set_location_assignment PIN_26 -to CR_ROM_oe_n
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set_location_assignment PIN_14 -to CR_ROM_CS[2]
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set_location_assignment PIN_28 -to D[0]
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set_location_assignment PIN_29 -to D[1]
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set_location_assignment PIN_31 -to D[7]
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set_location_assignment PIN_33 -to ZX_ROM_blk
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set_location_assignment PIN_34 -to D[2]
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set_location_assignment PIN_37 -to D[6]
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set_location_assignment PIN_39 -to D[4]
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set_location_assignment PIN_40 -to D[3]
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set_location_assignment PIN_41 -to D[5]
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set_location_assignment PIN_43 -to mreq_n
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set_location_assignment PIN_44 -to iorq_n
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set_location_assignment PIN_27 -to CR_ROM_CS[3] |