253 lines
9.8 KiB
Plaintext
253 lines
9.8 KiB
Plaintext
; **************************************************************************************************
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; **************************************************************************************************
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; THIS WILL NOT RUN ON REAL HARDWARE UNLESS YOU BURN THE NATIVE CODE AT THE BOTTOM
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; OF THIS FILE INTO THE GIGATRONS ROM AT THE CORRECT ADDRESS, EMULATION ONLY!
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; **************************************************************************************************
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; **************************************************************************************************
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; sprite test
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vram EQU 0x0800
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buff0 EQU 0x08A0
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buff1 EQU 0x08A4
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REENTER EQU 0x03CB
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frameCount EQU 0x0E
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sysFn EQU 0x22
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srcAddr EQU 0x30
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dstAddr EQU 0x32
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backBuffer EQU 0x34
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spriteData EQU 0x36
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vbase EQU 0x38
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pixels EQU 0x3A
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xyPos EQU 0x3C
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xyVel EQU 0x3E
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frame EQU 0x40
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rowBuffer0 EQU 0x50
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rowBuffer1 EQU 0x54
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rowBuffer2 EQU 0x58
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rowBuffer3 EQU 0x5C
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xExtent EQU 0x9C
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yExtent EQU 0x74
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_startAddress_ EQU 0x0200 ; entry point for the code, if this is missing defaults to 0x0200
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_callTable_ EQU 0x007E ; call addresses are automatically stored here by the assembler, it grows downwards
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; *NOTE* gt1 spec only allows for one zero page segment, .vasm files use this for the call table
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; do *NOT* make this address higher than 0x00BE, it will conflict with future ROM loading mechanisms
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; do *NOT* define constants, (DB or DW), between 0x30 -> 0x44 and 0xc0 -> 0xFF, these addresses are
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; used by the loader and the vCPU stack, you can create variables in these areas as long as you don't
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; corrupt your nested CALL return addresses on the stack
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_singleStepWatch_ EQU xyPos ; the single step debugger watches this variable location to decide when to step,
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; choose a variable that is updated often
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SYS_SpriteRow_118 EQU 0x2300 ; 16 pixel memory copy
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LDWI vram
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STW vbase ; vram base address
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STW pixels ; pixel address
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LDWI 0x0101
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STW xyPos
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LDWI 0x0101
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STW xyVel ; XY velocity
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LDWI buff0
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STW spriteData
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LDWI buff1
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STW backBuffer
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LDWI SYS_SpriteRow_118
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STW sysFn
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LDW vbase ; generate vram address
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ADDW xyPos
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STW pixels
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STW srcAddr
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LDW backBuffer
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STW dstAddr
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SYS 118
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LD frameCount
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STW frame
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xbounds LD xyPos ; x position bounds checking
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BEQ xflip
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SUBI xExtent
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BLT ybounds
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xflip LD xyVel
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XORI 0xFE ; flip x velocity
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ST xyVel
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ybounds LD xyPos+1 ; y position bounds checking
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BEQ yflip
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SUBI yExtent
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BLT velocity
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yflip LD xyVel+1
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XORI 0xFE ; flip y velocity
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ST xyVel+1
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velocity LD xyPos
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ADDW xyVel
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ST xyPos
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LD xyPos+1
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ADDW xyVel+1
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ST xyPos+1
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vblank LD frameCount
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SUBW frame
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BEQ vblank
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LD frameCount
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STW frame
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LDW backBuffer
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STW srcAddr
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LDW pixels
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STW dstAddr
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SYS 118
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LDW vbase ; generate vram address
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ADDW xyPos
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STW pixels
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STW srcAddr
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LDW backBuffer
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STW dstAddr
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SYS 118
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LDW srcAddr
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STW dstAddr
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LDW spriteData
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STW srcAddr
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SYS 118
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BRA xbounds
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; native code routines that are written into the emulator's fake ROM using either the DBR/DWR commands or the native instruction set
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; the native instruction assembler has access to the same functionality as the vasm assembler, (labels, equates, mutables, etc).
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; it's only caveats are:
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; 1: each instruction is prefaced with a period to clearly differentiate it from a vasm instruction
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; 2: you cannot mix and match vasm instructions with native instructions within the same segment, (in reality they are executed in
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; completely different parts of the memory map, i.e. native in fake ROM and vasm in RAM)
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; 3: you must follow the SYS calling conventions exactly
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SYS_SpriteRow_118 .LD [srcAddr],X ; src line 0
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.LD [srcAddr+1],Y
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.LD [Y,X]
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.ST [rowBuffer0+0]
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.ST [Y,X++] ; hack increment
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.LD [Y,X]
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.ST [rowBuffer0+1]
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.ST [Y,X++] ; hack increment
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.LD [Y,X]
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.ST [rowBuffer0+2]
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.ST [Y,X++] ; hack increment
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.LD [Y,X]
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.ST [rowBuffer0+3]
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.LD [srcAddr],X ; src line1
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.LD 0x01
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.ADDA [srcAddr+1],Y
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.LD [Y,X]
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.ST [rowBuffer1+0]
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.ST [Y,X++] ; hack increment
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.LD [Y,X]
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.ST [rowBuffer1+1]
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.ST [Y,X++] ; hack increment
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.LD [Y,X]
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.ST [rowBuffer1+2]
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.ST [Y,X++] ; hack increment
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.LD [Y,X]
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.ST [rowBuffer1+3]
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.LD [srcAddr],X ; src line2
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.LD 0x02
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.ADDA [srcAddr+1],Y
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.LD [Y,X]
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.ST [rowBuffer2+0]
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.ST [Y,X++] ; hack increment
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.LD [Y,X]
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.ST [rowBuffer2+1]
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.ST [Y,X++] ; hack increment
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.LD [Y,X]
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.ST [rowBuffer2+2]
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.ST [Y,X++] ; hack increment
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.LD [Y,X]
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.ST [rowBuffer2+3]
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.LD [srcAddr],X ; src line3
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.LD 0x03
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.ADDA [srcAddr+1],Y
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.LD [Y,X]
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.ST [rowBuffer3+0]
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.ST [Y,X++] ; hack increment
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.LD [Y,X]
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.ST [rowBuffer3+1]
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.ST [Y,X++] ; hack increment
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.LD [Y,X]
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.ST [rowBuffer3+2]
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.ST [Y,X++] ; hack increment
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.LD [Y,X]
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.ST [rowBuffer3+3]
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.LD [dstAddr],X ; dst line 0
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.LD [dstAddr+1],Y
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.LD [rowBuffer0+0]
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.ST [Y,X++]
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.LD [rowBuffer0+1]
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.ST [Y,X++]
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.LD [rowBuffer0+2]
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.ST [Y,X++]
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.LD [rowBuffer0+3]
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.ST [Y,X++]
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.LD [dstAddr],X ; dst line 1
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.LD 0x01
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.ADDA [dstAddr+1],Y
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.LD [rowBuffer1+0]
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.ST [Y,X++]
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.LD [rowBuffer1+1]
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.ST [Y,X++]
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.LD [rowBuffer1+2]
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.ST [Y,X++]
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.LD [rowBuffer1+3]
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.ST [Y,X++]
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.LD [dstAddr],X ; dst line 2
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.LD 0x02
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.ADDA [dstAddr+1],Y
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.LD [rowBuffer2+0]
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.ST [Y,X++]
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.LD [rowBuffer2+1]
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.ST [Y,X++]
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.LD [rowBuffer2+2]
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.ST [Y,X++]
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.LD [rowBuffer2+3]
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.ST [Y,X++]
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.LD [dstAddr],X ; dst line 3
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.LD 0x03
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.ADDA [dstAddr+1],Y
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.LD [rowBuffer3+0]
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.ST [Y,X++]
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.LD [rowBuffer3+1]
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.ST [Y,X++]
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.LD [rowBuffer3+2]
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.ST [Y,X++]
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.LD [rowBuffer3+3]
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.ST [Y,X++]
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.LD REENTER >>8,y
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.JMP y,REENTER
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.LD 0xC5 ; 0 - ((14 + number of instructions + 3) / 2), odd(14 + number of instructions) = true
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