819 lines
27 KiB
Python
819 lines
27 KiB
Python
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# SYNOPSIS: from asm import *
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#
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# This is not an assembler -in- Python. This about using Python -itself- as an
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# assembler! Specifically, asm.py is just the back end, while the Python
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# interpreter acts as the front end. By using Python in this way, we get
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# parsing and a powerful macro system for free. Assembly source files are
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# Python files and not traditional .asm files. We recognize them with the
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# .asm.py extension. During assembly we produce .lst files as a program
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# listing in a more conventional notation.
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import inspect
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import json
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from os.path import basename, splitext, relpath
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import re
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import sys
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# Python 2/3 compatibility
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_bytes = type(b'')
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_str = type(u'')
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#------------------------------------------------------------------------
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# Public interface
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#------------------------------------------------------------------------
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# These definitions allow the use of Python notation as an assembler.
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# The syntax is close to assembly, but by using Python we get a
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# powerful macro assembler for free.
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#
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# Some examples:
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# Python Equivalent assembly
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# ------ -------------------
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# nop() nop ;Does nothing
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# ld(nn) ld nn ;Loads nn to AC
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# ld([RAM]) ld [RAM] ;Loads content of RAM Addr to AC
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# ld([RAM], X) ld [RAM],x ;Loads content of RAM Addr 0x30 to X
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# ld(AC, Y) ld ac,y ;Loads AC to Y
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# ld([Y,Xpp], OUT) ld [y,x++],out ;loads content of RAM at [yyxx] and incremnts X
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# adda(nn) adda nn ;Adds nn to AC
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# xora([RAM]) xora [$30] ;AC = AC ^ [RAM]
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# anda(0x2a) anda $2a
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# st([0x30]) st [$30]
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# st([0x30], Y) st [$30],y
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# st([X]) st [x]
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# st([Y,1]) st [y,1]
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# st([Y,X]) st [y,x]
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# st([Y,Xpp]) st [y,x++]
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# st(0x2a, [Y,Xpp]) st $2a,[y,x++] ;Stores 0x2a to Ram at [yyxx] and increments X
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# label('loop') loop:
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# bne('loop') bne loop
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# bra(nn) bra nn ;unconditioned jump
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# jmp(nn) jmp nn ;unconditioned jump to Ynn
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# bgt(nn) bgt nn ;Jump if AC>0
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# blt(nn) blt nn ;Jump if AC<0
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# bne(nn) bne nn ;jump if AC<>0
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# beq(nn) beq nn ;Jump if AC=0
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# bge(nn) bge nn ;Jump if AC>=0
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# ble(nn) ble nn ;Jump if AC<=0
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# ctrl(0x30) ctrl $30
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# ctrl(X) ctrl x
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# ctrl(Y, 0x30) ctrl y,$30
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# ctrl(Y, X) ctrl y,x
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# ctrl(Y, Xpp) ctrl y,x++
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# ctrl($30, X) ctrl $30,x ; Also copies AC into X
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# ctrl($30, Y) ctrl $30,y ; Also copies AC into Y
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# User registers
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X = '__x__'
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Y = '__y__'
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Xpp = '__x++__'
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OUT = '__out__'
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IN = '__in__'
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AC = '__ac__'
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# Mnemonics for Gigatron native 8-bit instruction set
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def nop (dummy=None): _assemble(_opLD, AC)
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def ld (a, b=AC): _assemble(_opLD, a, b)
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def anda(a, b=AC): _assemble(_opAND, a, b)
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def ora (a, b=AC): _assemble(_opOR, a, b)
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def xora(a, b=AC): _assemble(_opXOR, a, b)
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def adda(a, b=AC): _assemble(_opADD, a, b)
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def suba(a, b=AC): _assemble(_opSUB, a, b)
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def _jmpy(a): _assemble(_opJ|_jL, a)
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def bgt (a): _assemble(_opJ|_jGT, a)
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def blt (a): _assemble(_opJ|_jLT, a)
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def bne (a): _assemble(_opJ|_jNE, a)
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def beq (a): _assemble(_opJ|_jEQ, a)
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def bge (a): _assemble(_opJ|_jGE, a)
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def ble (a): _assemble(_opJ|_jLE, a)
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def bra (a): _assemble(_opJ|_jS, a)
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def st (a, b=None, c=None):
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if isinstance(a, list): _assemble(_opST, AC, b, a)
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else: _assemble(_opST, a, c, b)
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def ctrl(a, b=None):
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if a in [X, Y] and b: _assemble(_opST|_busRAM, [a, b], None)
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else: _assemble(_opST|_busRAM, [a], b)
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def jmp(a, b):
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assert a is Y
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_jmpy(b)
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bpl = bge # Alias
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bmi = blt # Alias
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def label(name):
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"""Label the current address"""
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address = _romSize
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define(name, address)
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if address not in _labels:
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_labels[address] = [] # There can be more than one
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_labels[_romSize].append(name)
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def C(line, prefix=';'):
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"""Insert comment to print in disassembly"""
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if line:
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address = max(0, _romSize-1)
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if address not in _comments:
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_comments[address] = []
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_comments[address].append(prefix + line)
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return None
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def define(name, newValue):
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if name in _symbols:
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oldValue = _symbols[name]
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if newValue != oldValue:
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highlight('Warning: redefining %s (old %s new %s)' % (name, oldValue, newValue))
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_symbols[name] = newValue
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def symbol(name):
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"""Lookup a symbol, return None if not defined"""
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return _symbols[name] if name in _symbols else None
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def has(x):
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"""Useful primitive"""
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return x is not None
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def lo(name):
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if isinstance(name, int):
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return name & 255
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else:
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_refsL.append((name, _romSize))
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return 0 # placeholder
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def hi(name):
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if isinstance(name, int):
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return (name >> 8) & 255
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else:
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_refsH.append((name, _romSize))
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return 0 # placeholder
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def align(m=0x100, size=0x10000):
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"""Insert nops to align with chunk boundary"""
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global _maxRomSize
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#print("_romSize: %x, _maxRomSize: %x" % (pc(), _maxRomSize))
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n = (m - pc()) % m
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if not has(_listing): # Only comment when not listing
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comment = 'filler' if n==1 else '%d fillers' % n
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else:
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comment = None
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while pc() % m > 0:
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nop()
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comment = C(comment)
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_maxRomSize = min(0x10000, pc() + size)
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def wait(n):
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"""Insert delay sequence of n cycles. Might clobber AC"""
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if not has(_listing): # Only comment when not listing
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comment = 'Wait %s cycle%s' % (n, '' if n==1 else 's')
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else:
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comment = None
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assert n >= 0
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if n > 4:
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n -= 1
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ld(n//2 - 1)
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comment = C(comment)
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bne(_romSize & 255)
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suba(1)
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n = n % 2
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while n > 0:
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nop()
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n -= 1
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def pc():
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"""Current ROM address"""
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return _romSize
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def zpByte(len=1):
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"""Allocate one or more bytes from the zero-page"""
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global _zpSize
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s = _zpSize
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if s <= 0x80 and 0x80 < s + len:
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s = 0x81 # Keep 0x80 reserved
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_zpSize = s+len
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assert _zpSize <= 0x100
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return s
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def zpReset(startFrom=1):
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"""Reset zero-page allocation"""
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global _zpSize
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_zpSize = startFrom
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def fillers(until=256, instruction=nop):
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"""Insert fillers until given page offset"""
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n = until - (pc() & 255)
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if not has(_listing): # Only comment when not listing
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comment = 'filler' if n==1 else '%d fillers' % n
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else:
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comment = None
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for i in range(n):
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instruction(0)
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comment = C(comment)
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def trampoline():
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"""Read 1 byte from ROM page"""
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fillers(256-5)
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bra(AC) #13
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"""
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It is possible to make this section 2 bytes shorter
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and 1 cycle faster by entering directly wih "jmp y,ac"
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instead of "jmp y,251". However, this will cost two
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words at 'LUP' in vCPU and space is expensive there.
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"""
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C('+-----------------------------------+')
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bra(253) #14
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C('| |')
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ld(hi('lupReturn#19'), Y) #15
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C('| Trampoline for page $%04x lookups |' % (pc()&~255))
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jmp(Y,lo('lupReturn#19')) #17
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C('| |')
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st([lo('vAC')]) #18
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C('+-----------------------------------+')
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align(1, 0x100)
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def end():
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"""Resolve symbols and write output"""
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for name, where in _refsL:
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if name in _symbols:
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_rom1[where] += _symbols[name] # Addition allows some label tricks
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_rom1[where] &= 255
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else:
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highlight('Error: Undefined symbol %s' % repr(name))
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for name, where in _refsH:
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if name in _symbols:
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_rom1[where] += _symbols[name] >> 8
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else:
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highlight('Error: Undefined symbol %s' % repr(name))
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align(1)
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#------------------------------------------------------------------------
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# Behind the scenes
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#------------------------------------------------------------------------
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# Module variables because I don't feel like making a class
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_romSize, _maxRomSize, _zpSize = 0, 0, 1
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_symbols, _refsL, _refsH = {}, [], []
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_labels = {} # Inverse of _symbols, but only when made with label(). For disassembler
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_comments = {}
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_rom0, _rom1, _linenos = [], [], []
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_listing, _listingSource, _lineno = None, None, None
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# General instruction layout
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_maskOp = 0b11100000
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_maskMode = 0b00011100
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_maskCc = 0b00011100
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_maskBus = 0b00000011
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# Operations
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_opLD = 0 << 5
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_opAND = 1 << 5
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_opOR = 2 << 5
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_opXOR = 3 << 5
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_opADD = 4 << 5
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_opSUB = 5 << 5
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_opST = 6 << 5
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_opJ = 7 << 5
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# Bus access modes
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_busD = 0
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_busRAM = 1
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_busAC = 2
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_busIN = 3
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# Addressing modes
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#
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# How addresses into RAM are composed.
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# In a sufficiently large RAM system there must be both immediate
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# (absolute) addresses and computed addresses.
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#
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# A reasonable MAU could comprise of a 16-bit data pointer, DP, to which
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# an immediate 8-bit offset is optionally added, with the option to disable
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# the DP (so we have zero page addressing). Such a unit requires 4 TTL
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# adders + 6 TTL AND chips = 10 TTL chips.
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#
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# Our address unit is a "poor man's" MAU that supports some workable combinations.
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# There is no addition, so no linear address space, just selecting which
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# part go into which half. It uses 4 TTL chips. The data pointer DP is
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# replaced with 8-bit X and 8-bit Y.
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#
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# Register and addressing modes are compacted to 8 combinations
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#
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_ea0DregAC = 0 << 2
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_ea0XregAC = 1 << 2
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_eaYDregAC = 2 << 2
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_eaYXregAC = 3 << 2
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_ea0DregX = 4 << 2
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_ea0DregY = 5 << 2
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_ea0DregOUT = 6 << 2
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_eaYXregOUTIX = 7 << 2 # Post-increment of X
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# Jump conditions
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#
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# During jump, the ALU is wired to calculate "-AC".
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# Only the overflow flag is looked at. The negation result itself is not used and discarded.
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# Only in case of all zero bits, -AC overflows the ALU. So the overflow acts as a zero flag (Z).
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# If we look at bit 7 of AC, we know if AC is negative or positive.
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# What does the combination of two signals tell us:
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#
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# Z bit7
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# 0 0 | AC>0 | 0 1 0 1 0 1 0 1 Instruction bit 2
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# 0 1 | AC<0 | 0 0 1 1 0 0 1 1 Instruction bit 3
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# 1 0 | AC=0 | 0 0 0 0 1 1 1 1 Instruction bit 4
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# 1 1 | n/a -------------------------
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# F GT LT NE EQ GE LE T Condition code ("F" is repurposed for long jumps)
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_jL = 0 << 2
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_jGT = 1 << 2
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_jLT = 2 << 2
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_jNE = 3 << 2
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_jEQ = 4 << 2
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_jGE = 5 << 2
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_jLE = 6 << 2
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_jS = 7 << 2
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def _assemble(op, val, to=AC, addr=None):
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"""Assemble and emit one instruction"""
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d, mode, bus = 0, 0, 0 # [D] (default)
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# First operand can be optional
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if isinstance(val, list):
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val, addr = None, val
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# Only accept floats when representing a whole number
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if isinstance(val, float):
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if not val.is_integer():
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highlight('Error: Non-integer operand %s' % val)
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val = int(val)
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# Process list notation for addressing mode
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if isinstance(addr, list):
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if op != _opST: bus = _busRAM
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if addr[-1] not in [X, Xpp]:
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d = addr[-1]
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if addr[0] is Y:
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if addr[-1] is X: mode = _eaYXregAC # [Y,X]
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elif addr[-1] is Xpp: mode = _eaYXregOUTIX # [Y,X++]
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else: mode = _eaYDregAC # [Y,D]
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elif addr[-1] is X: mode = _ea0XregAC # [X]
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# Process target designation
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if to is X: mode = _ea0DregX
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if to is Y: mode = _ea0DregY
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if to is OUT and mode != _eaYXregOUTIX: mode = _ea0DregOUT
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# Check that addressing mode matches with any target designation
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assert to is None or to is [AC,AC,AC,AC,X,Y,OUT,OUT][mode>>2]
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# Process source designation
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if val is AC: bus = _busAC
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elif val is IN: bus = _busIN
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elif isinstance(val, (_bytes, _str)): d = lo(_str(val)) # Convenient for branch instructions
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elif isinstance(val, int): d = val
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_emit(op | mode | bus, d & 255)
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_mnemonics = [ 'ld', 'anda', 'ora', 'xora', 'adda', 'suba', 'st', 'j' ]
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def _hexString(val):
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return '$%02x' % val
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def disassemble(opcode, operand, address=None, lastOpcode=None):
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text = _mnemonics[opcode >> 5] # (74LS155)
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isStore = (opcode & _maskOp) == _opST
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# Decode addressing and register mode (74LS138)
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if text != 'j':
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if opcode & _maskMode == _ea0DregAC: _ea, reg = '[%s]' % _hexString(operand), 'ac'
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if opcode & _maskMode == _ea0XregAC: _ea, reg = '[x]', 'ac'
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if opcode & _maskMode == _eaYDregAC: _ea, reg = '[y,%s]' % _hexString(operand), 'ac'
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if opcode & _maskMode == _eaYXregAC: _ea, reg = '[y,x]', 'ac'
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if opcode & _maskMode == _ea0DregX: _ea, reg = '[%s]' % _hexString(operand), 'x'
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if opcode & _maskMode == _ea0DregY: _ea, reg = '[%s]' % _hexString(operand), 'y'
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if opcode & _maskMode == _ea0DregOUT: _ea, reg = '[%s]' % _hexString(operand), 'out'
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if opcode & _maskMode == _eaYXregOUTIX: _ea, reg = '[y,x++]', 'out'
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else:
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_ea = '[%s]' % _hexString(operand)
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# Decode bus mode (74LS139)
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if opcode & _maskBus == _busD: bus = _hexString(operand)
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if opcode & _maskBus == _busRAM: bus = None if isStore else _ea
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if opcode & _maskBus == _busAC: bus = 'ac'
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if opcode & _maskBus == _busIN: bus = 'in'
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if text == 'j':
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# Decode jumping mode (74LS153)
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if opcode & _maskCc == _jL: text = 'jmp y,'
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if opcode & _maskCc == _jS: text = 'bra '
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if opcode & _maskCc == _jEQ: text = 'beq '
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if opcode & _maskCc == _jNE: text = 'bne '
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if opcode & _maskCc == _jGT: text = 'bgt '
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if opcode & _maskCc == _jGE: text = 'bge '
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if opcode & _maskCc == _jLT: text = 'blt '
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if opcode & _maskCc == _jLE: text = 'ble '
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if address is not None and opcode & _maskCc != _jL and opcode & _maskBus == _busD:
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# We can calculate the destination address
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lo, hi = address & 255, address >> 8
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if lo == 255: # When branching from $xxFF, we still end up in the next page
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hi = (hi + 1) & 255
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destination = (hi << 8) + operand
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if lastOpcode & (_maskOp|_maskCc) == _opJ|_jL:
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bus = '$%02x' % operand
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elif destination in _labels:
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bus = _labels[destination][-1]
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else:
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bus = '$%04x' % destination
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text += bus
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else:
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# Compose string
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if isStore:
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if bus == 'ac':
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text = '%-4s %s' % (text, _ea)
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else:
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text = '%-4s %s,%s' % (text, bus, _ea)
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if bus is None: # Write/read combination means I/O control
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text = 'ctrl %s' % _ea[1:-1] # Strip the brackets
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if reg != 'ac' and reg != 'out': # X and Y are not muted
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text += ',' + reg
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else:
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if reg == 'ac':
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text = '%-4s %s' % (text, bus)
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else:
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text = '%-4s %s,%s' % (text, bus, reg)
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# Specials
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if opcode == _opLD | _busAC: text = 'nop'
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# Emit as text
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return text
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# Read a given file Python source file, using the correct encoding.
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# Taken from the Python3 reference Section 2.1.4
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_encodingRe = re.compile(rb'coding[=:]\s*([-\w.]+)')
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def _readSource(filename):
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encoding = 'utf-8'
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with open(filename, 'rb') as fp:
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for _ in range(2):
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line = fp.readline()
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match = _encodingRe.search(line)
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if match:
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encoding = match.group(1).decode('ascii')
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break
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with open(filename, 'r', encoding=encoding) as fp:
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return fp.readlines()
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# Start to include source lines in output listing
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|
def enableListing():
|
|
global _listing, _listingSource, _lineno
|
|
_listing = inspect.currentframe().f_back
|
|
info = inspect.getframeinfo(_listing)
|
|
_listingSource = _readSource(info.filename)
|
|
_lineno = inspect.getframeinfo(_listing).lineno
|
|
|
|
# Get source lines from last line number up to current
|
|
def _getSourceLines(upto):
|
|
global _listingSource, _lineno
|
|
lines = []
|
|
if has(upto):
|
|
for lineno in range(_lineno, upto+1):
|
|
source = _listingSource[lineno-1]
|
|
lines.append(('%-4d %s' % (lineno, source)).rstrip())
|
|
_lineno = max(_lineno, upto+1)
|
|
return lines
|
|
|
|
# Stop listing source lines (introspection is slow)
|
|
def disableListing():
|
|
global _listing, _lineno
|
|
info = inspect.getframeinfo(_listing)
|
|
for lineno in range(_linenos[-1], info.lineno+1):
|
|
source = '%-4d %s' % (lineno, _listingSource[lineno-1])
|
|
C(source.rstrip(), prefix='') # A bit tricky: stuff in *comments*
|
|
_linenos[-1] = None # Avoid double listing of this line
|
|
_listing = None
|
|
|
|
def _emit(opcode, operand):
|
|
global _romSize, _maxRomSize
|
|
lineno = inspect.getframeinfo(_listing).lineno if has(_listing) else None
|
|
if _romSize >= _maxRomSize:
|
|
disassembly = disassemble(opcode, operand)
|
|
print('%04x %02x%02x %s' % (_romSize, opcode, operand, disassembly))
|
|
highlight('Error: Program size limitm exceeded')
|
|
_maxRomSize = 0x10000 #0x9800 # Extend to full address space to prevent more of the same errors
|
|
_rom0.append(opcode)
|
|
_rom1.append(operand)
|
|
_linenos.append(lineno)
|
|
_romSize += 1
|
|
|
|
# Warning for conditional branches with a target address from RAM. The (unverified) danger is
|
|
# that the ALU is calculating `-A' (for the condition decoder) as L+R+1, with L=0 and R=~A. But B
|
|
# is also an input to R and comes from memory. The addressing mode is [D], which requires high
|
|
# EH and EL, and this is slower when the diodes are forward biased from the previous instruction.
|
|
# Therefore R might momentarily glitch while B changes value and the AND/OR layers in the 74153
|
|
# multiplexer resettles. Such a glitch then potentially ripples all the way through two 74283
|
|
# adders and the control unit's 74153. This all depends on the previous instruction's addressing
|
|
# mode and the values of AC and [D], which we can't know with static analysis.
|
|
# See also https://github.com/kervinck/gigatron-rom/issues/78
|
|
if opcode & _maskOp == _opJ and\
|
|
opcode & _maskBus == _busRAM and\
|
|
opcode & _maskCc in [ _jGT, _jLT, _jNE, _jEQ, _jGE, _jLE ]: # XXX Only check jGT, jLT, jNE?
|
|
disassembly = disassemble(opcode, operand)
|
|
print('%04x %02x%02x %s' % (_romSize, opcode, operand, disassembly))
|
|
highlight('Warning: large propagation delay (conditional branch with RAM on bus)')
|
|
|
|
def loadBindings(symfile):
|
|
# Load JSON file into symbol table
|
|
global _symbols
|
|
with open(symfile) as file:
|
|
for (name, value) in json.load(file).items():
|
|
if not isinstance(value, int):
|
|
value = int(value, base=0)
|
|
_symbols[_str(name)] = value
|
|
|
|
def getRom1():
|
|
return bytearray(_rom1)
|
|
|
|
# Write ROM files and listing
|
|
def writeRomFiles(sourceFile):
|
|
|
|
# Determine stem for file names
|
|
stem, _ = splitext(sourceFile) # Remove .py
|
|
stem, _ = splitext(stem) # Remove .asm
|
|
stem = basename(stem)
|
|
if stem == '': stem = 'out'
|
|
|
|
# Clarification header emitted once before first instruction
|
|
header = (' address\n'
|
|
' | encoding\n'
|
|
' | | instruction\n'
|
|
' | | | operands\n'
|
|
' | | | |\n'
|
|
' V V V V\n')
|
|
|
|
# Disassemble for readability
|
|
filename = stem + '.lst'
|
|
print('Create file', filename)
|
|
with open(filename, 'w', encoding='utf-8') as file:
|
|
address = 0
|
|
repeats, previous, line0 = 0, None, None
|
|
maxRepeat = 3
|
|
|
|
# List source filename
|
|
info = inspect.getframeinfo(inspect.currentframe().f_back)
|
|
file.write('* source: %s\n' % relpath(info.filename))
|
|
|
|
# Disassemble and list all ROM words
|
|
lastOpcode = None
|
|
for instruction in zip(_rom0, _rom1, _linenos):
|
|
opcode, operand, lineno = instruction
|
|
|
|
# All labels as list, if any
|
|
labels = _labels[address] if address in _labels else None
|
|
|
|
# First C('...') comment on line, if any
|
|
comment = _comments[address][0] if address in _comments else None
|
|
|
|
# Check for repeating output lines
|
|
if instruction != previous or labels or comment:
|
|
# No repetition
|
|
repeats, previous = 0, instruction
|
|
if has(line0):
|
|
file.write(line0 + '\n')
|
|
line0 = None
|
|
else:
|
|
# Repetition
|
|
repeats += 1
|
|
|
|
# Make connection to real source
|
|
sourceLines = _getSourceLines(upto=lineno)
|
|
for line in sourceLines[:-1]: # Backlog
|
|
file.write('%-41s %s\n' % ('', line))
|
|
|
|
# Write clarification header (once)
|
|
if has(header):
|
|
file.write(header)
|
|
header = None
|
|
|
|
# If multiple labels exist for this address, only the last can go
|
|
# in front of the instruction. Any others go on their own line.
|
|
if has(labels):
|
|
for extra in labels[:-1]:
|
|
file.write(extra + ':\n')
|
|
|
|
# Preformat
|
|
line1 = labels[-1] + ':' if has(labels) else ''
|
|
line2 = '%04x %02x%02x' % (address, opcode, operand)
|
|
line2 += ' ' + disassemble(opcode, operand, address, lastOpcode)
|
|
if has(comment):
|
|
line2 = '%-27s %s' % (line2, comment)
|
|
|
|
# Combine label with code if it fits in front
|
|
if len(line1) <= 13:
|
|
line2 = '%-13s %s' % (line1, line2)
|
|
line1 = ''
|
|
else:
|
|
line2 = '%-13s %s' % ('', line2)
|
|
|
|
# Combine source with code if it fits behind
|
|
if len(sourceLines):
|
|
if len(line2) <= 41:
|
|
line2 = '%-41s %s' % (line2, sourceLines[-1])
|
|
else:
|
|
line1 = '%-41s %s' % (line1, sourceLines[-1])
|
|
|
|
# Emit optional support line first
|
|
if line1:
|
|
file.write(line1 + '\n')
|
|
|
|
# Emit main line with special treatment for long repetitions
|
|
if repeats < maxRepeat:
|
|
# Regular scenario
|
|
file.write(line2 + '\n')
|
|
if has(comment):
|
|
# Write any extra comments on new lines
|
|
for extra in _comments[address][1:]:
|
|
file.write('%41s %s\n' % ('', extra))
|
|
if repeats == maxRepeat:
|
|
line0 = line2 # Hold line in case it is last in the repetition
|
|
if repeats > maxRepeat:
|
|
# Abbreviate with a simple count when too many repetitions
|
|
line0 = '%13s * %d times' % ('', 1+repeats)
|
|
|
|
# Next ROM byte
|
|
address += 1
|
|
lastOpcode = opcode
|
|
|
|
# Wrap up. Flush any pending line
|
|
if line0:
|
|
file.write(line0 + '\n')
|
|
# List end address or size
|
|
file.write(14*' '+'%04x\n' % address)
|
|
assert len(_rom0) == _romSize
|
|
assert len(_rom1) == _romSize
|
|
|
|
# # Write ROM files for breadboard with two EEPROMs
|
|
# filename = stem + '.lo.rom'
|
|
# print 'Create file', filename
|
|
# with open(filename, 'wb') as file:
|
|
# file.write(''.join([chr(byte) for byte in _rom0]))
|
|
|
|
# filename = stem + '.hi.rom'
|
|
# print 'Create file', filename
|
|
# with open(filename, 'wb') as file:
|
|
# file.write(''.join([chr(byte) for byte in _rom1]))
|
|
|
|
# 16-bit version for 27C1024, little endian
|
|
filename = stem + '.rom'
|
|
print('Create file', filename)
|
|
_rom2 = bytearray()
|
|
for x, y in zip(_rom0, _rom1):
|
|
_rom2.append(x)
|
|
_rom2.append(y)
|
|
# Padding
|
|
while len(_rom2) < 2*_maxRomSize:
|
|
_rom2.append(b'Gigatron!'[ (len(_rom2)-2*_maxRomSize) % 9 ])
|
|
# Write ROM file
|
|
with open(filename, 'wb') as file:
|
|
file.write(_rom2)
|
|
|
|
print('ROM bytes %d words %d' % (len(_rom2), len(_rom2)//2))
|
|
print('Words used %d unused %d' % (_romSize, _maxRomSize-_romSize))
|
|
print('Assembly OK')
|
|
|
|
# Write Gowin Embedded Flash file
|
|
def writeFlashFile(sourceFile):
|
|
|
|
# Determine stem for file names
|
|
stem, _ = splitext(sourceFile) # Remove .py
|
|
stem, _ = splitext(stem) # Remove .asm
|
|
stem = basename(stem)
|
|
if stem == '': stem = 'out'
|
|
nops = 0
|
|
|
|
# Clarification header emitted once before first instruction
|
|
header = ('//File Format: Hex'\
|
|
'\n//Device-package: GW1NR-9-QFN88P-6'\
|
|
'\n')
|
|
|
|
filename = stem + '.fi'
|
|
print('Create file', filename)
|
|
with open(filename, 'w', encoding='utf-8') as file:
|
|
# Write clarification header (once)
|
|
file.write(header)
|
|
address = 0
|
|
|
|
#for instruction in zip(_rom0, _rom1):
|
|
for i in range(0, len(_rom0), 2):
|
|
instruction_hi = list(zip(_rom0,_rom1))[i]
|
|
|
|
#Append NOP, if uneven number of instructions
|
|
if len(_rom0) > i+1:
|
|
instruction_lo = list(zip(_rom0,_rom1))[i+1]
|
|
else:
|
|
instruction_lo = (0x02,0)
|
|
#print(instruction_hi)
|
|
#print("opcode: %02x, operand: %02x" % (opcode, operand))
|
|
if instruction_hi == (0x02,0x00) and instruction_lo == (0x02,0x00):
|
|
nops = 1
|
|
else:
|
|
nops = 0
|
|
|
|
# Preformat
|
|
xadr = address >> 6
|
|
if xadr >= 0x130:
|
|
highlight('Error: Flash size exceeded. Try with less apps')
|
|
|
|
yadr = address & 0x3F
|
|
#print(line2)
|
|
#if nops == 0:
|
|
line = '[%x:%x] %02x%02x%02x%02x' % (xadr, yadr, instruction_hi[0], instruction_hi[1], instruction_lo[0], instruction_lo[1])
|
|
file.write(line + '\n')
|
|
|
|
# Next ROM byte
|
|
address += 1
|
|
|
|
# Wrap up. Flush any pending line
|
|
file.close()
|
|
assert len(_rom0) == _romSize
|
|
assert len(_rom1) == _romSize
|
|
print('Assembly OK')
|
|
# Write Gowin Embedded Flash file
|
|
|
|
# Write File for simulation
|
|
def writeSimFile(sourceFile):
|
|
|
|
# Determine stem for file names
|
|
stem, _ = splitext(sourceFile) # Remove .py
|
|
stem, _ = splitext(stem) # Remove .asm
|
|
stem = basename(stem)
|
|
if stem == '': stem = 'out'
|
|
filename = stem + '.sim'
|
|
print('Create file', filename)
|
|
with open(filename, 'w', encoding='utf-8') as file:
|
|
address = 0
|
|
col = 0
|
|
|
|
#lastOpcode = None
|
|
for i in range(0, len(_rom0), 2):
|
|
instruction_hi = list(zip(_rom0,_rom1))[i]
|
|
|
|
#Append NOP, if uneven number of instructions
|
|
if len(_rom0) > i+1:
|
|
instruction_lo = list(zip(_rom0,_rom1))[i+1]
|
|
else:
|
|
instruction_lo = (0x02,0)
|
|
#print(instruction_hi)
|
|
#print("opcode: %02x, operand: %02x" % (opcode, operand))
|
|
|
|
# Preformat
|
|
xadr = (address & 0xFFC0) >> 6
|
|
if xadr > 303:
|
|
highlight("ERROR: Flash size exceeded")
|
|
yadr = address & 0x3F
|
|
line2 = '%02x%02x%02x%02x ' % (instruction_hi[0], instruction_hi[1], instruction_lo[0], instruction_lo[1])
|
|
#print(line2)
|
|
file.write(line2)
|
|
|
|
# Next ROM byte
|
|
address += 2
|
|
|
|
# Wrap up. Flush any pending line
|
|
assert len(_rom0) == _romSize
|
|
assert len(_rom1) == _romSize
|
|
print('Assembly OK')
|
|
|
|
# print() wrapper to highlights message on terminal with ANSI escape codes
|
|
def highlight(*args):
|
|
line = ' '.join(args)
|
|
if sys.stdout.isatty():
|
|
ansiBold = '\033[1m'
|
|
ansiNormal = '\033[0m'
|
|
print(ansiBold + line + ansiNormal)
|
|
else:
|
|
print(line)
|
|
|
|
# Exit on first error
|
|
if line.upper().startswith('ERROR'):
|
|
print('Assembly failed')
|
|
sys.exit(1)
|
|
|
|
# Conditional compilation
|
|
# - command line arguments of the form -DSYMBOL[=VALUE]
|
|
# are removed from sys.argv and collected into a dict.
|
|
# - function defined('SYMBOL') returns VALUE or 1 if the
|
|
# symbol was defined, None if if wasn't.
|
|
_defined = {}
|
|
def defined(s, default=None):
|
|
if s in _defined:
|
|
return _defined[s]
|
|
return default
|
|
import ast
|
|
for i in reversed(range(len(sys.argv))):
|
|
arg = sys.argv[i]
|
|
if arg.startswith("-D"):
|
|
arg, val = arg[2:], 1
|
|
if '=' in arg:
|
|
arg, val = arg.split('=', 1)
|
|
val = ast.literal_eval(val)
|
|
_defined[arg]=val
|
|
del sys.argv[i]
|
|
|