362 lines
16 KiB
Tcl
362 lines
16 KiB
Tcl
## This file is a general .xdc for the Basys3 rev B board
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## To use it in a project:
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## - uncomment the lines corresponding to used pins
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## - rename the used ports (in each line, after get_ports) according to the top level signal names in the project
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# Clock signal
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#Bank = 34, Pin name = , Sch name = CLK100MHZ
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set_property PACKAGE_PIN W5 [get_ports sysclk]
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set_property IOSTANDARD LVCMOS33 [get_ports sysclk]
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create_clock -period 10.000 -name sys_clk_pin -waveform {0.000 5.000} -add [get_ports sysclk]
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# Switches
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#set_property PACKAGE_PIN V17 [get_ports {SW[0]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[0]}]
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#set_property PACKAGE_PIN V16 [get_ports {SW[1]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[1]}]
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#set_property PACKAGE_PIN W16 [get_ports {SW[2]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[2]}]
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#set_property PACKAGE_PIN W17 [get_ports {SW[3]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[3]}]
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#set_property PACKAGE_PIN W15 [get_ports {SW[4]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[4]}]
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#set_property PACKAGE_PIN V15 [get_ports {SW[5]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[5]}]
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#set_property PACKAGE_PIN W14 [get_ports {SW[6]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[6]}]
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#set_property PACKAGE_PIN W13 [get_ports {SW[7]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[7]}]
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#set_property PACKAGE_PIN V2 [get_ports {SW[8]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[8]}]
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#set_property PACKAGE_PIN T3 [get_ports {SW[9]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[9]}]
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#set_property PACKAGE_PIN T2 [get_ports {SW[10]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[10]}]
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#set_property PACKAGE_PIN R3 [get_ports {SW[11]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[11]}]
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#set_property PACKAGE_PIN W2 [get_ports {SW[12]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[12]}]
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#set_property PACKAGE_PIN U1 [get_ports {SW[13]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[13]}]
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#set_property PACKAGE_PIN T1 [get_ports {SW[14]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[14]}]
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#set_property PACKAGE_PIN R2 [get_ports {SW[15]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {SW[15]}]
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# LEDs
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set_property PACKAGE_PIN U16 [get_ports {LED[0]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[0]}]
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set_property PACKAGE_PIN E19 [get_ports {LED[1]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[1]}]
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set_property PACKAGE_PIN U19 [get_ports {LED[2]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[2]}]
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set_property PACKAGE_PIN V19 [get_ports {LED[3]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[3]}]
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set_property PACKAGE_PIN W18 [get_ports {LED[4]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[4]}]
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set_property PACKAGE_PIN U15 [get_ports {LED[5]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[5]}]
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set_property PACKAGE_PIN U14 [get_ports {LED[6]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[6]}]
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set_property PACKAGE_PIN V14 [get_ports {LED[7]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[7]}]
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set_property PACKAGE_PIN V13 [get_ports {LED[8]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[8]}]
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set_property PACKAGE_PIN V3 [get_ports {LED[9]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[9]}]
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set_property PACKAGE_PIN W3 [get_ports {LED[10]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[10]}]
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set_property PACKAGE_PIN U3 [get_ports {LED[11]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[11]}]
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set_property PACKAGE_PIN P3 [get_ports {LED[12]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[12]}]
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set_property PACKAGE_PIN N3 [get_ports {LED[13]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[13]}]
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set_property PACKAGE_PIN P1 [get_ports {LED[14]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[14]}]
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set_property PACKAGE_PIN L1 [get_ports {LED[15]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {LED[15]}]
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##7 segment display
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##Bank = 34, Pin name = , Sch name = CA
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#set_property PACKAGE_PIN W7 [get_ports {seg[0]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {seg[0]}]
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##Bank = 34, Pin name = , Sch name = CB
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#set_property PACKAGE_PIN W6 [get_ports {seg[1]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {seg[1]}]
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##Bank = 34, Pin name = , Sch name = CC
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#set_property PACKAGE_PIN U8 [get_ports {seg[2]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {seg[2]}]
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##Bank = 34, Pin name = , Sch name = CD
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#set_property PACKAGE_PIN V8 [get_ports {seg[3]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {seg[3]}]
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##Bank = 34, Pin name = , Sch name = CE
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#set_property PACKAGE_PIN U5 [get_ports {seg[4]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {seg[4]}]
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##Bank = 34, Pin name = , Sch name = CF
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#set_property PACKAGE_PIN V5 [get_ports {seg[5]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {seg[5]}]
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##Bank = 34, Pin name = , Sch name = CG
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#set_property PACKAGE_PIN U7 [get_ports {seg[6]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {seg[6]}]
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#Bank = 34, Pin name = , Sch name = DP
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#set_property PACKAGE_PIN V7 [get_ports {seg[7]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {seg[7]}]
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##Bank = 34, Pin name = , Sch name = AN0
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#set_property PACKAGE_PIN U2 [get_ports {an[0]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {an[0]}]
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##Bank = 34, Pin name = , Sch name = AN1
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#set_property PACKAGE_PIN U4 [get_ports {an[1]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {an[1]}]
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##Bank = 34, Pin name = , Sch name = AN2
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#set_property PACKAGE_PIN V4 [get_ports {an[2]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {an[2]}]
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##Bank = 34, Pin name = , Sch name = AN3
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#set_property PACKAGE_PIN W4 [get_ports {an[3]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {an[3]}]
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#Buttons
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#Bank = 14, Pin name = , Sch name = BTNC
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#set_property PACKAGE_PIN U18 [get_ports {BTN[4]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {BTN[4]}]
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##Bank = 14, Pin name = , Sch name = BTNU
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#set_property PACKAGE_PIN T18 [get_ports {BTN[0]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {BTN[0]}]
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##Bank = 14, Pin name = , Sch name = BTNL
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#set_property PACKAGE_PIN W19 [get_ports {BTN[1]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {BTN[1]}]
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##Bank = 14, Pin name = , Sch name = BTNR
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#set_property PACKAGE_PIN T17 [get_ports {BTN[2]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {BTN[2]}]
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##Bank = 14, Pin name = , Sch name = BTND
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#set_property PACKAGE_PIN U17 [get_ports {BTN[3]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {BTN[3]}]
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##Pmod Header JA
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##Bank = 15, Pin name = IO_L1N_T0_AD0N_15, Sch name = JA1
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#set_property PACKAGE_PIN B13 [get_ports {JA[0]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JA[0]}]
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##Bank = 15, Pin name = IO_L5N_T0_AD9N_15, Sch name = JA2
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#set_property PACKAGE_PIN F14 [get_ports {JA[1]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JA[1]}]
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##Bank = 15, Pin name = IO_L16N_T2_A27_15, Sch name = JA3
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#set_property PACKAGE_PIN D17 [get_ports {JA[2]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JA[2]}]
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##Bank = 15, Pin name = IO_L16P_T2_A28_15, Sch name = JA4
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#set_property PACKAGE_PIN E17 [get_ports {JA[3]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JA[3]}]
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##Bank = 15, Pin name = IO_0_15, Sch name = JA7
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#set_property PACKAGE_PIN G13 [get_ports {JA[4]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JA[4]}]
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##Bank = 15, Pin name = IO_L20N_T3_A19_15, Sch name = JA8
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#set_property PACKAGE_PIN C17 [get_ports {JA[5]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JA[5]}]
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##Bank = 15, Pin name = IO_L21N_T3_A17_15, Sch name = JA9
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#set_property PACKAGE_PIN D18 [get_ports {JA[6]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JA[6]}]
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##Bank = 15, Pin name = IO_L21P_T3_DQS_15, Sch name = JA10
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#set_property PACKAGE_PIN E18 [get_ports {JA[7]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JA[7]}]
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##Pmod Header JB
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##Bank = 15, Pin name = IO_L15N_T2_DQS_ADV_B_15, Sch name = JB1
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#set_property PACKAGE_PIN G14 [get_ports {JB[0]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JB[0]}]
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##Bank = 14, Pin name = IO_L13P_T2_MRCC_14, Sch name = JB2
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#set_property PACKAGE_PIN P15 [get_ports {JB[1]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JB[1]}]
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##Bank = 14, Pin name = IO_L21N_T3_DQS_A06_D22_14, Sch name = JB3
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#set_property PACKAGE_PIN V11 [get_ports {JB[2]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JB[2]}]
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##Bank = CONFIG, Pin name = IO_L16P_T2_CSI_B_14, Sch name = JB4
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#set_property PACKAGE_PIN V15 [get_ports {JB[3]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JB[3]}]
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##Bank = 15, Pin name = IO_25_15, Sch name = JB7
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#set_property PACKAGE_PIN K16 [get_ports {JB[4]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JB[4]}]
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##Bank = CONFIG, Pin name = IO_L15P_T2_DQS_RWR_B_14, Sch name = JB8
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#set_property PACKAGE_PIN R16 [get_ports {JB[5]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JB[5]}]
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##Bank = 14, Pin name = IO_L24P_T3_A01_D17_14, Sch name = JB9
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#set_property PACKAGE_PIN T9 [get_ports {JB[6]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JB[6]}]
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##Bank = 14, Pin name = IO_L19N_T3_A09_D25_VREF_14, Sch name = JB10
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#set_property PACKAGE_PIN U11 [get_ports {JB[7]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JB[7]}]
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##Pmod Header JC
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##Bank = 35, Pin name = IO_L23P_T3_35, Sch name = JC1
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#set_property PACKAGE_PIN K2 [get_ports {JC[0]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JC[0]}]
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##Bank = 35, Pin name = IO_L6P_T0_35, Sch name = JC2
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#set_property PACKAGE_PIN E7 [get_ports {JC[1]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JC[1]}]
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##Bank = 35, Pin name = IO_L22P_T3_35, Sch name = JC3
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#set_property PACKAGE_PIN J3 [get_ports {JC[2]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JC[2]}]
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##Bank = 35, Pin name = IO_L21P_T3_DQS_35, Sch name = JC4
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#set_property PACKAGE_PIN J4 [get_ports {JC[3]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JC[3]}]
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##Bank = 35, Pin name = IO_L23N_T3_35, Sch name = JC7
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#set_property PACKAGE_PIN K1 [get_ports {JC[4]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JC[4]}]
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##Bank = 35, Pin name = IO_L5P_T0_AD13P_35, Sch name = JC8
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#set_property PACKAGE_PIN E6 [get_ports {JC[5]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JC[5]}]
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##Bank = 35, Pin name = IO_L22N_T3_35, Sch name = JC9
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#set_property PACKAGE_PIN J2 [get_ports {JC[6]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JC[6]}]
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##Bank = 35, Pin name = IO_L19P_T3_35, Sch name = JC10
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#set_property PACKAGE_PIN G6 [get_ports {JC[7]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JC[7]}]
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##Pmod Header JXADC
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##Bank = 15, Pin name = IO_L9P_T1_DQS_AD3P_15, Sch name = XADC1_P -> XA1_P
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#set_property PACKAGE_PIN A13 [get_ports {JXADC[0]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[0]}]
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##Bank = 15, Pin name = IO_L8P_T1_AD10P_15, Sch name = XADC2_P -> XA2_P
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#set_property PACKAGE_PIN A15 [get_ports {JXADC[1]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[1]}]
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##Bank = 15, Pin name = IO_L7P_T1_AD2P_15, Sch name = XADC3_P -> XA3_P
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#set_property PACKAGE_PIN B16 [get_ports {JXADC[2]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[2]}]
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##Bank = 15, Pin name = IO_L10P_T1_AD11P_15, Sch name = XADC4_P -> XA4_P
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#set_property PACKAGE_PIN B18 [get_ports {JXADC[3]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[3]}]
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##Bank = 15, Pin name = IO_L9N_T1_DQS_AD3N_15, Sch name = XADC1_N -> XA1_N
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#set_property PACKAGE_PIN A14 [get_ports {JXADC[4]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[4]}]
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##Bank = 15, Pin name = IO_L8N_T1_AD10N_15, Sch name = XADC2_N -> XA2_N
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#set_property PACKAGE_PIN A16 [get_ports {JXADC[5]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[5]}]
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##Bank = 15, Pin name = IO_L7N_T1_AD2N_15, Sch name = XADC3_N -> XA3_N
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#set_property PACKAGE_PIN B17 [get_ports {JXADC[6]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[6]}]
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##Bank = 15, Pin name = IO_L10N_T1_AD11N_15, Sch name = XADC4_N -> XA4_N
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#set_property PACKAGE_PIN A18 [get_ports {JXADC[7]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[7]}]
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#VGA Connector
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#Bank = 14, Pin name = , Sch name = VGA_R0
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set_property PACKAGE_PIN G19 [get_ports {VGA_R[0]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {VGA_R[0]}]
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#Bank = 14, Pin name = , Sch name = VGA_R1
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set_property PACKAGE_PIN H19 [get_ports {VGA_R[1]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {VGA_R[1]}]
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#Bank = 14, Pin name = , Sch name = VGA_R2
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set_property PACKAGE_PIN J19 [get_ports {VGA_R[2]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {VGA_R[2]}]
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#Bank = 14, Pin name = , Sch name = VGA_R3
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set_property PACKAGE_PIN N19 [get_ports {VGA_R[3]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {VGA_R[3]}]
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#Bank = 14, Pin name = , Sch name = VGA_B0
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set_property PACKAGE_PIN N18 [get_ports {VGA_B[0]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {VGA_B[0]}]
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#Bank = 14, Pin name = , Sch name = VGA_B1
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set_property PACKAGE_PIN L18 [get_ports {VGA_B[1]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {VGA_B[1]}]
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#Bank = 14, Pin name = , Sch name = VGA_B2
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set_property PACKAGE_PIN K18 [get_ports {VGA_B[2]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {VGA_B[2]}]
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#Bank = 14, Pin name = , Sch name = VGA_B3
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set_property PACKAGE_PIN J18 [get_ports {VGA_B[3]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {VGA_B[3]}]
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#Bank = 14, Pin name = , Sch name = VGA_G0
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set_property PACKAGE_PIN J17 [get_ports {VGA_G[0]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {VGA_G[0]}]
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#Bank = 14, Pin name = , Sch name = VGA_G1
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set_property PACKAGE_PIN H17 [get_ports {VGA_G[1]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {VGA_G[1]}]
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#Bank = 14, Pin name = , Sch name = VGA_G2
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set_property PACKAGE_PIN G17 [get_ports {VGA_G[2]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {VGA_G[2]}]
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#Bank = 14, Pin name = , Sch name = VGA_G3
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set_property PACKAGE_PIN D17 [get_ports {VGA_G[3]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {VGA_G[3]}]
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#Bank = 14, Pin name = , Sch name = VGA_HS
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set_property PACKAGE_PIN P19 [get_ports VGA_HS]
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set_property IOSTANDARD LVCMOS33 [get_ports VGA_HS]
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#Bank = 14, Pin name = , Sch name = VGA_VS
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set_property PACKAGE_PIN R19 [get_ports VGA_VS]
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set_property IOSTANDARD LVCMOS33 [get_ports VGA_VS]
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##USB-RS232 Interface
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##Bank = 16, Pin name = , Sch name = UART_TXD_IN
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#set_property PACKAGE_PIN B18 [get_ports RsRx]
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#set_property IOSTANDARD LVCMOS33 [get_ports RsRx]
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#Bank = 16, Pin name = , Sch name = UART_RXD_OUT
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#set_property PACKAGE_PIN A18 [get_ports UART_TXD]
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#set_property IOSTANDARD LVCMOS33 [get_ports UART_TXD]
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#USB HID (PS/2)
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#Bank = 16, Pin name = , Sch name = PS2_CLK
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#set_property PACKAGE_PIN C17 [get_ports PS2_CLK]
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#set_property IOSTANDARD LVCMOS33 [get_ports PS2_CLK]
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#set_property PULLUP true [get_ports PS2_CLK]
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##Bank = 16, Pin name = , Sch name = PS2_DATA
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#set_property PACKAGE_PIN B17 [get_ports PS2_DATA]
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#set_property IOSTANDARD LVCMOS33 [get_ports PS2_DATA]
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#set_property PULLUP true [get_ports PS2_DATA]
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##Quad SPI Flash
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##Bank = CONFIG, Pin name = CCLK_0, Sch name = QSPI_SCK
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#set_property PACKAGE_PIN C11 [get_ports {QspiSCK}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {QspiSCK}]
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##Bank = CONFIG, Pin name = IO_L1P_T0_D00_MOSI_14, Sch name = QSPI_DQ0
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#set_property PACKAGE_PIN D18 [get_ports {QspiDB[0]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[0]}]
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##Bank = CONFIG, Pin name = IO_L1N_T0_D01_DIN_14, Sch name = QSPI_DQ1
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#set_property PACKAGE_PIN D19 [get_ports {QspiDB[1]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[1]}]
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##Bank = CONFIG, Pin name = IO_L20_T0_D02_14, Sch name = QSPI_DQ2
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#set_property PACKAGE_PIN G18 [get_ports {QspiDB[2]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[2]}]
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##Bank = CONFIG, Pin name = IO_L2P_T0_D03_14, Sch name = QSPI_DQ3
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#set_property PACKAGE_PIN F18 [get_ports {QspiDB[3]}]
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#set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[3]}]
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##Bank = CONFIG, Pin name = IO_L6P_T0_FCS_B_14, Sch name = QSPI_CS
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#set_property PACKAGE_PIN K19 [get_ports QspiCSn]
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#set_property IOSTANDARD LVCMOS33 [get_ports QspiCSn]
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set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
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set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
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set_property CONFIG_MODE SPIx4 [current_design]
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set_property BITSTREAM.CONFIG.CONFIGRATE 33 [current_design]
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set_property CONFIG_VOLTAGE 3.3 [current_design]
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set_property CFGBVS VCCO [current_design]
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