From 086c38f24b66634689fcf4684880c76c46c91b46 Mon Sep 17 00:00:00 2001 From: balika011 Date: Sat, 29 Mar 2025 03:43:19 +0100 Subject: [PATCH] add openocd gdb scripts --- scripts/openocd_gdb.cfg | 23 +++++++++++++++++++++++ scripts/openocd_load.cfg | 31 +++++++++++++++++++++++++++++++ scripts/run.sh | 22 ++++++++++++++++++++++ 3 files changed, 76 insertions(+) create mode 100644 scripts/openocd_gdb.cfg create mode 100644 scripts/openocd_load.cfg create mode 100644 scripts/run.sh diff --git a/scripts/openocd_gdb.cfg b/scripts/openocd_gdb.cfg new file mode 100644 index 0000000..621fdb9 --- /dev/null +++ b/scripts/openocd_gdb.cfg @@ -0,0 +1,23 @@ +tcl port disabled +telnet port disabled + +#source [find interface/jlink.cfg] +source [find interface/altera-usb-blaster.cfg] + +set _CHIPNAME EP4CE15E22C8 +transport select jtag +adapter speed 500 + +jtag newtap $_CHIPNAME tap -irlen 10 -ircapture 0x01 -irmask 0x3 -expected-id 0x020f20dd + +target create $_CHIPNAME.cpu riscv -chain-position $_CHIPNAME.tap + +riscv set_ir dtmcs 0x00c +riscv set_ir dmi 0x00e + +gdb report_data_abort enable +gdb report_register_access_error enable + +gdb target_description enable + +init diff --git a/scripts/openocd_load.cfg b/scripts/openocd_load.cfg new file mode 100644 index 0000000..da8d21e --- /dev/null +++ b/scripts/openocd_load.cfg @@ -0,0 +1,31 @@ +gdb port disabled +tcl port disabled +telnet port disabled + +#source [find interface/jlink.cfg] +source [find interface/altera-usb-blaster.cfg] + +set _CHIPNAME EP4CE15E22C8 +transport select jtag +adapter speed 5000 + +jtag newtap $_CHIPNAME tap -irlen 10 -ircapture 0x01 -irmask 0x3 -expected-id 0x020f20dd + +proc set_bscan_checkpos_on_setup {chipname} { + intel set_bscan $chipname.pld 1080 + intel set_check_pos $chipname.pld 409 +} + +pld create $_CHIPNAME.pld intel -chain-position $_CHIPNAME.tap -family cycloneiv +jtag configure $_CHIPNAME.tap -event setup "set_bscan_checkpos_on_setup $_CHIPNAME" +target create $_CHIPNAME.target testee -chain-position $_CHIPNAME.tap + +scan_chain + +init + +reset halt + +svf -tap $_CHIPNAME.tap output_files/ossc.svf + +shutdown diff --git a/scripts/run.sh b/scripts/run.sh new file mode 100644 index 0000000..682e8ad --- /dev/null +++ b/scripts/run.sh @@ -0,0 +1,22 @@ +export PATH=$PATH:~/intelFPGA_standard/24.1std/quartus/bin:~/intelFPGA_standard/24.1std/quartus/sopc_builder/bin/:/opt/riscv/bin + +set -e + +touch software/sys_controller_bsp/bsp_timestamp + +gcc tools/bin2hex.c -o tools/bin2hex + +cd software/sys_controller +make clean +make HAS_SH1107=y generate_hex +cd - + +quartus_cdb ossc -c ossc --update_mif +quartus_asm --read_settings_files=on --write_settings_files=off ossc -c ossc + +quartus_cpf --convert --frequency=2MHz --voltage=3.3V --operation=p output_files/ossc.sof output_files/ossc.svf +openocd -f scripts/openocd_load.cfg + +openocd -f scripts/openocd_gdb.cfg + +