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https://github.com/marqs85/ossc
synced 2026-10-31 04:07:14 +03:00
tweak activity detection to fix auto input
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e49106b635
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8 files changed
+8075
-8069
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+3
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@@ -172,7 +172,7 @@ end
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wire [7:0] TVP_R_post, TVP_G_post, TVP_B_post;
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wire TVP_HSYNC_post, TVP_VSYNC_post, TVP_DE_post, TVP_FID_post, TVP_datavalid_post;
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wire TVP_fe_interlace, TVP_fe_frame_change, TVP_sof_scaler, TVP_sync_active;
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wire [19:0] TVP_fe_pcnt_frame;
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wire [19:0] TVP_fe_pcnt_field;
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wire [7:0] TVP_hsync_width;
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wire [10:0] TVP_fe_vtotal, TVP_fe_xpos, TVP_fe_ypos;
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tvp7002_frontend u_tvp_frontend (
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@@ -208,7 +208,7 @@ tvp7002_frontend u_tvp_frontend (
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.vtotal(TVP_fe_vtotal),
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.frame_change(TVP_fe_frame_change),
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.sof_scaler(TVP_sof_scaler),
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.pcnt_frame(TVP_fe_pcnt_frame),
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.pcnt_field(TVP_fe_pcnt_field),
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.hsync_width(TVP_hsync_width),
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.sync_active(TVP_sync_active)
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);
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@@ -379,7 +379,7 @@ sys sys_inst(
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.pio_0_sys_ctrl_out_export (sys_ctrl),
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.pio_1_controls_in_export (controls),
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.sc_config_0_sc_if_fe_status_i ({19'h0, TVP_sync_active, TVP_fe_interlace, TVP_fe_vtotal}),
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.sc_config_0_sc_if_fe_status2_i ({4'h0, TVP_hsync_width, TVP_fe_pcnt_frame}),
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.sc_config_0_sc_if_fe_status2_i ({4'h0, TVP_hsync_width, TVP_fe_pcnt_field}),
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.sc_config_0_sc_if_lt_status_i (32'h00000000),
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.sc_config_0_sc_if_hv_in_config_o (hv_in_config),
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.sc_config_0_sc_if_hv_in_config2_o (hv_in_config2),
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+12
-8
@@ -50,7 +50,7 @@ module tvp7002_frontend (
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output reg [10:0] vtotal,
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output reg frame_change,
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output reg sof_scaler,
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output reg [19:0] pcnt_frame,
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output reg [19:0] pcnt_field,
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output reg [7:0] hsync_width,
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output reg sync_active
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);
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@@ -102,7 +102,7 @@ wire [3:0] lumacode = {lumacode_msbs, lumacode_lsbs};
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// Measurement registers
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reg [20:0] pcnt_frame_ctr;
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reg [17:0] syncpol_det_ctr, hsync_hpol_ctr, vsync_hpol_ctr;
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reg [3:0] sync_inactive_ctr;
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reg [2:0] sync_inactive_ctr;
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reg [11:0] pcnt_line, pcnt_line_ctr, meas_h_cnt, meas_h_cnt_sogref;
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reg [7:0] hs_ctr;
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reg pcnt_line_stored;
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@@ -130,8 +130,8 @@ wire [11:0] even_max_thold = (H_TOTAL / 12'd2) + (H_TOTAL / 12'd4);
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wire [11:0] meas_h_cnt_ref = (vsync_i_type == VSYNC_SEPARATED) ? meas_h_cnt_sogref : meas_h_cnt;
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wire [11:0] meas_even_min_thold = (pcnt_line / 12'd4);
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wire [11:0] meas_even_max_thold = (pcnt_line / 12'd2) + (pcnt_line / 12'd4);
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wire meas_vblank_region = (pcnt_frame_ctr < 8*pcnt_line) | (pcnt_frame_ctr > (({1'b0, pcnt_frame}<<interlace_flag) - 4*pcnt_line)) |
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(interlace_flag & (pcnt_frame_ctr < (pcnt_frame+8*pcnt_line)) & (pcnt_frame_ctr > (pcnt_frame - 4*pcnt_line)));
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wire meas_vblank_region = (pcnt_frame_ctr < 8*pcnt_line) | (pcnt_frame_ctr > (({1'b0, pcnt_field}<<interlace_flag) - 4*pcnt_line)) |
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(interlace_flag & (pcnt_frame_ctr < (pcnt_field+8*pcnt_line)) & (pcnt_frame_ctr > (pcnt_field - 4*pcnt_line)));
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wire [11:0] glitch_filt_thold = meas_vblank_region ? (pcnt_line/4) : (pcnt_line/8);
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// TODO: calculate H/V polarity independently
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@@ -145,7 +145,7 @@ wire [3:0] H_SAMPLE_SEL = hv_in_config3[31:28];
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wire [3:0] H_SAMPLE_SEL_ALT = (H_SAMPLE_SEL >= (H_SKIP+1)/2) ? (H_SAMPLE_SEL - ((H_SKIP+1)/2)) : (H_SAMPLE_SEL + ((H_SKIP+1)/2));
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// Lumacode tables (C64, Spectrum, empty)
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wire [23:0] lumacode_data[0:2][0:15] = '{'{ 24'h000000,24'h483aaa,24'h924a40,24'h9351b6,24'h675200,24'h606060,24'h8a8a8a,24'h84c5cc,24'hc33d00,24'h867ade,24'hb3b3b3,24'hd5df7c,24'h72b14b,24'hc18178,24'hb3ec91,24'hffffff},
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wire [23:0] lumacode_data[0:2][0:15] = '{'{ 24'h000000,24'h2a1b9d,24'h7d202c,24'h84258c,24'h4c2e00,24'h3c3c3c,24'h646464,24'h4fb3a5,24'h7f410d,24'h6351db,24'h939393,24'hbfd04a,24'h339840,24'hb44f5c,24'h7ce587,24'hffffff},
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'{ 24'h000000,24'h000000,24'h0200FD,24'hCF01CE,24'h0100CE,24'hCF0100,24'hFF02FD,24'h01CFCF,24'hFF0201,24'h00CF15,24'h02FFFF,24'hFFFF1D,24'h00FF1C,24'hCFCF15,24'hCFCFCF,24'hFFFFFF},
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'{ 24'h000000,24'h000000,24'h000000,24'h000000,24'h000000,24'h000000,24'h000000,24'h000000,24'h000000,24'h000000,24'h000000,24'h000000,24'h000000,24'h000000,24'h000000,24'h000000}};
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@@ -330,9 +330,12 @@ always @(posedge CLK_MEAS_i) begin
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if ((VSYNC_i_np_prev & ~VSYNC_i_np) & (~interlace_flag | (meas_fid == FID_EVEN))) begin
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pcnt_frame_ctr <= 1;
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pcnt_line_stored <= 1'b0;
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pcnt_frame <= interlace_flag ? (pcnt_frame_ctr>>1) : pcnt_frame_ctr[19:0];
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end else if (pcnt_frame_ctr < 21'h1fffff) begin
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if (sync_active & (pcnt_frame_ctr != '1))
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pcnt_field <= interlace_flag ? (pcnt_frame_ctr>>1) : pcnt_frame_ctr[19:0];
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end else if (pcnt_frame_ctr < '1) begin
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pcnt_frame_ctr <= pcnt_frame_ctr + 1'b1;
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end else begin
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pcnt_field <= 0;
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end
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if (HSYNC_i_np_prev & ~HSYNC_i_np) begin
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@@ -355,7 +358,7 @@ always @(posedge CLK_MEAS_i) begin
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VSYNC_i_np_prev <= VSYNC_i_np;
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end
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// Detect sync polarities and activity
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// Detect sync polarities and activity during ~10ms interval
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always @(posedge CLK_MEAS_i) begin
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if (syncpol_det_ctr == 0) begin
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hsync_i_pol <= (hsync_hpol_ctr > 18'h1ffff);
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@@ -365,6 +368,7 @@ always @(posedge CLK_MEAS_i) begin
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vsync_hpol_ctr <= 0;
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if ((vsync_hpol_ctr == '0) | (vsync_hpol_ctr == '1)) begin
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// If vsync has been stale for ~100ms, clear activity flag
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if (sync_inactive_ctr == '1)
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sync_active <= 1'b0;
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else
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