RomanRom2/ossc
1
0
Fork 0
mirror of https://github.com/marqs85/ossc synced 2025-10-28 06:26:03 +03:00
Code Issues Actions Packages Projects Releases Wiki Activity

add openocd scripts for ndmreset and reprogram

Browse Source
This commit is contained in:
marqs 2025-04-19 12:01:49 +03:00
parent 086c38f24b
commit 1a0fe36cef
3 changed files with 103 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
scripts/flash_addr.tcl Normal file
View File

@ -0,0 +1,16 @@
# flash details
set flash_base 0x02000000
set flash_imem_offset 0x00080000
set flash_imem_base [format 0x%.8x [expr "$flash_base + $flash_imem_offset"]]
set flash_secsize 65536
# flash controller register addresses
set control_register 0x00020100
set operating_protocols_setting 0x00020110
set read_instr 0x00020114
set write_instr 0x00020118
set flash_cmd_setting 0x0002011c
set flash_cmd_ctrl 0x00020120
set flash_cmd_addr_register 0x00020124
set flash_cmd_write_data_0 0x00020128
set flash_cmd_read_data_0 0x00020130

23
scripts/openocd_ndmreset.cfg Normal file
View File

@ -0,0 +1,23 @@
gdb_port disabled
tcl_port disabled
telnet_port disabled
source [find interface/altera-usb-blaster.cfg]
set _CHIPNAME EP4CE15E22C8
transport select jtag
adapter speed 5000
jtag newtap $_CHIPNAME tap -irlen 10 -ircapture 0x01 -irmask 0x3 -expected-id 0x020f20dd
target create $_CHIPNAME.cpu riscv -chain-position $_CHIPNAME.tap
riscv set_ir dtmcs 0x00c
riscv set_ir dmi 0x00e
riscv set_mem_access sysbus
init
reset
exit

64
scripts/openocd_reprogram.cfg Normal file
View File

@ -0,0 +1,64 @@
gdb_port disabled
tcl_port disabled
telnet_port disabled
source ../../scripts/flash_addr.tcl
source [find interface/altera-usb-blaster.cfg]
set _CHIPNAME EP4CE15E22C8
transport select jtag
adapter speed 5000
jtag newtap $_CHIPNAME tap -irlen 10 -ircapture 0x01 -irmask 0x3 -expected-id 0x020f20dd
target create $_CHIPNAME.cpu riscv -chain-position $_CHIPNAME.tap
riscv set_ir dtmcs 0x00c
riscv set_ir dmi 0x00e
riscv set_mem_access sysbus
init
puts "Halting CPU"
halt
# target file details
set bin_file mem_init/flash.bin
set bin_size [file size $bin_file]
set num_sectors [expr "($bin_size / $flash_secsize) + (($bin_size % $flash_secsize) ne 0)"]
### Erase
#write enable
write_memory $flash_cmd_setting 32 0x00000006
write_memory $flash_cmd_ctrl 32 0x1
#write status register (clear BP)
write_memory $flash_cmd_setting 32 0x00001001
write_memory $flash_cmd_write_data_0 32 0x00000000
write_memory $flash_cmd_ctrl 32 0x1
puts "Erasing $num_sectors flash sectors"
set addr $flash_imem_offset
for {set i 0} {$i<$num_sectors} {incr i} {
write_memory $flash_cmd_setting 32 0x00000006
write_memory $flash_cmd_ctrl 32 0x1
write_memory $flash_cmd_setting 32 0x000003D8
write_memory $flash_cmd_addr_register 32 $addr
write_memory $flash_cmd_ctrl 32 0x1
set addr [expr "$addr + $flash_secsize"]
after 500
}
### Load
puts "Loading new SW image into flash"
load_image mem_init/flash.bin 0x02080000 bin
### Verify
#verify_image mem_init/flash.bin 0x02080000 bin
puts "Resetting system"
reset
exit