diff --git a/ossc.sdc b/ossc.sdc
index d3903ea..042e97c 100644
--- a/ossc.sdc
+++ b/ossc.sdc
@@ -62,6 +62,9 @@ set_input_delay -clock flash_clk_out -clock_fall 5 [get_ports *ALTERA_DATA0]
set_output_delay -clock flash_clk_out 4 [get_ports *ALTERA_SCE]
set_output_delay -clock flash_clk_out 2 [get_ports *ALTERA_SDO]
+# Latency tester
+set_false_path -from [get_registers lat_tester:lt0|mode_synced*]
+
### CPU/scanconverter clock relations ###
diff --git a/rtl/ossc.v b/rtl/ossc.v
index b5e59f3..a0632e5 100644
--- a/rtl/ossc.v
+++ b/rtl/ossc.v
@@ -390,7 +390,7 @@ sys sys_inst(
.pio_1_controls_in_export (controls),
.sc_config_0_sc_if_fe_status_i ({19'h0, TVP_sync_active, TVP_fe_interlace, TVP_fe_vtotal}),
.sc_config_0_sc_if_fe_status2_i ({4'h0, TVP_hsync_width, TVP_fe_pcnt_field}),
- .sc_config_0_sc_if_lt_status_i (32'h00000000),
+ .sc_config_0_sc_if_lt_status_i ({lt_finished, 3'h0, lt_stb_result, lt_lat_result}),
.sc_config_0_sc_if_hv_in_config_o (hv_in_config),
.sc_config_0_sc_if_hv_in_config2_o (hv_in_config2),
.sc_config_0_sc_if_hv_in_config3_o (hv_in_config3),
@@ -477,6 +477,8 @@ scanconverter #(
.y_ctr_shmask(y_ctr_shmask),
.shmask_data(shmask_data),
.resync_strobe(resync_strobe_i),
+ .lt_active(lt_active),
+ .lt_mode(lt_mode_synced),
.emif_br_clk(1'b0),
.emif_br_reset(1'b0),
.emif_rd_addr(),
@@ -501,7 +503,7 @@ ir_rcv ir0 (
.ir_code_cnt (ir_code_cnt)
);
-/*lat_tester lt0 (
+lat_tester lt0 (
.clk27 (clk27),
.pclk (PCLK_sc),
.active (lt_active),
@@ -515,6 +517,6 @@ ir_rcv ir0 (
.stb_result (lt_stb_result),
.trig_waiting (lt_trig_waiting),
.finished (lt_finished)
-);*/
+);
endmodule
diff --git a/rtl/scanconverter.v b/rtl/scanconverter.v
index f1795c6..2a7c511 100644
--- a/rtl/scanconverter.v
+++ b/rtl/scanconverter.v
@@ -17,6 +17,8 @@
// along with this program. If not, see .
//
+`include "lat_tester_includes.v"
+
module scanconverter (
input PCLK_CAP_i,
input PCLK_OUT_i,
@@ -63,6 +65,8 @@ module scanconverter (
output reg [3:0] y_ctr_shmask,
input [11:0] shmask_data,
output reg resync_strobe,
+ input lt_active,
+ input [1:0] lt_mode,
input emif_br_clk,
input emif_br_reset,
output [27:0] emif_rd_addr,
@@ -162,6 +166,12 @@ wire [7:0] MASK_R = MISC_MASK_COLOR[2] ? {2{MISC_MASK_BR}} : 8'h00;
wire [7:0] MASK_G = MISC_MASK_COLOR[1] ? {2{MISC_MASK_BR}} : 8'h00;
wire [7:0] MASK_B = MISC_MASK_COLOR[0] ? {2{MISC_MASK_BR}} : 8'h00;
+// Latency tester box bounds
+wire [11:0] LT_BOX_X_START = (lt_mode == `LT_POS_TOPLEFT) ? 0 : ((lt_mode == `LT_POS_CENTER) ? ((H_ACTIVE/2'h2)-(H_ACTIVE/(`LT_WIDTH_DIV*2'h2))) : (H_ACTIVE-(H_ACTIVE/`LT_WIDTH_DIV)));
+wire [11:0] LT_BOX_X_STOP = (lt_mode == `LT_POS_TOPLEFT) ? (H_ACTIVE/`LT_WIDTH_DIV) : ((lt_mode == `LT_POS_CENTER) ? ((H_ACTIVE/2'h2)+(H_ACTIVE/(`LT_WIDTH_DIV*2'h2))) : H_ACTIVE);
+wire [11:0] LT_BOX_Y_START = (lt_mode == `LT_POS_TOPLEFT) ? 0 : ((lt_mode == `LT_POS_CENTER) ? ((V_ACTIVE/2'h2)-(V_ACTIVE/(`LT_HEIGHT_DIV*2'h2))) : (V_ACTIVE-(V_ACTIVE/`LT_HEIGHT_DIV)));
+wire [11:0] LT_BOX_Y_STOP = (lt_mode == `LT_POS_TOPLEFT) ? (V_ACTIVE/`LT_HEIGHT_DIV) : ((lt_mode == `LT_POS_CENTER) ? ((V_ACTIVE/2'h2)+(V_ACTIVE/(`LT_HEIGHT_DIV*2'h2))) : V_ACTIVE);
+
reg frame_change_sync1_reg, frame_change_sync2_reg, frame_change_prev, frame_change_resync;
wire frame_change = frame_change_sync2_reg;
@@ -206,6 +216,7 @@ reg DE_pp[PP_PL_START:PP_PL_END] /* synthesis ramstyle = "logic" */;
reg [11:0] xpos_pp[PP_PL_START:PP_PL_END] /* synthesis ramstyle = "logic" */;
reg [10:0] ypos_pp[PP_PL_START:PP_PL_END] /* synthesis ramstyle = "logic" */;
reg mask_enable_pp[PP_MASK_END:PP_TP_START] /* synthesis ramstyle = "logic" */;
+reg lt_box_enable_pp[PP_MASK_END:PP_TP_START] /* synthesis ramstyle = "logic" */;
reg draw_sl_pp[(PP_SLGEN_START+1):(PP_SLGEN_END-1)] /* synthesis ramstyle = "logic" */;
reg [3:0] x_ctr_sl_pp[PP_PL_START:PP_SLGEN_START] /* synthesis ramstyle = "logic" */;
reg [2:0] y_ctr_sl_pp[PP_PL_START:PP_SLGEN_START] /* synthesis ramstyle = "logic" */;
@@ -356,8 +367,6 @@ linebuf_top #(
videogen vg0 (
.pclk (PCLK_OUT_i),
- .lt_active (1'b0),
- .lt_mode (2'h0),
.xpos (xpos_pp[PP_TP_START]),
.ypos (ypos_pp[PP_TP_START]),
.R_out (R_vg),
@@ -418,6 +427,7 @@ end
// | SYNC/DE | | | | | | | | | | | |
// | X/Y POS | | | | | | | | | | | |
// | | MASK | | | | | | | | | | |
+// | | LT_BOX | | | | | | | | | | |
// | | LB_SETUP | LINEBUF | | | | | | | | | |
// | | | | SRCSEL | | | | | | | | |
// | | SHM_BUF | SHM_BUF | SHMASK | SHMASK | SHMASK | | | | | | |
@@ -529,7 +539,7 @@ always @(posedge PCLK_OUT_i) begin
B_pp[pp_idx] <= B_pp[pp_idx-1];
end
- /* ---------- Mask enable calculation (1 cycle) ---------- */
+ /* ---------- Mask / Latency tester overlay enable calculation (1 cycle) ---------- */
if (($signed({1'b0, xpos_pp[PP_MASK_START]}) >= X_OFFSET) &
($signed({1'b0, xpos_pp[PP_MASK_START]}) < X_OFFSET+X_SIZE) &
($signed({1'b0, ypos_pp[PP_MASK_START]}) >= Y_OFFSET) &
@@ -539,8 +549,16 @@ always @(posedge PCLK_OUT_i) begin
end else begin
mask_enable_pp[PP_MASK_END] <= 1'b1;
end
+ if ((xpos_pp[PP_MASK_START] >= LT_BOX_X_START) & (xpos_pp[PP_MASK_START] < LT_BOX_X_STOP) &
+ (ypos_pp[PP_MASK_START] >= LT_BOX_Y_START) & (ypos_pp[PP_MASK_START] < LT_BOX_Y_STOP))
+ begin
+ lt_box_enable_pp[PP_MASK_END] <= (lt_mode != 0);
+ end else begin
+ lt_box_enable_pp[PP_MASK_END] <= 1'b0;
+ end
for(pp_idx = PP_MASK_END+1; pp_idx <= PP_TP_START; pp_idx = pp_idx+1) begin
mask_enable_pp[pp_idx] <= mask_enable_pp[pp_idx-1];
+ lt_box_enable_pp[pp_idx] <= lt_box_enable_pp[pp_idx-1];
end
/* ---------- Source selection (1 cycle) ---------- */
@@ -608,10 +626,10 @@ always @(posedge PCLK_OUT_i) begin
G_pp[PP_SLGEN_END] <= (draw_sl_pp[PP_SLGEN_START+4] & sl_method) ? G_sl_mult : G_pp[PP_SLGEN_START+4];
B_pp[PP_SLGEN_END] <= (draw_sl_pp[PP_SLGEN_START+4] & sl_method) ? B_sl_mult : B_pp[PP_SLGEN_START+4];
- /* ---------- Testpattern / mask generation ---------- */
- R_pp[PP_TP_END] <= testpattern_enable ? R_vg : (mask_enable_pp[PP_TP_START] ? MASK_R : R_pp[PP_TP_START]);
- G_pp[PP_TP_END] <= testpattern_enable ? G_vg : (mask_enable_pp[PP_TP_START] ? MASK_G : G_pp[PP_TP_START]);
- B_pp[PP_TP_END] <= testpattern_enable ? B_vg : (mask_enable_pp[PP_TP_START] ? MASK_B : B_pp[PP_TP_START]);
+ /* ---------- Testpattern / mask / lt_box generation ---------- */
+ R_pp[PP_TP_END] <= lt_active ? {8{lt_box_enable_pp[PP_TP_START]}} : (testpattern_enable ? R_vg : (mask_enable_pp[PP_TP_START] ? MASK_R : R_pp[PP_TP_START]));
+ G_pp[PP_TP_END] <= lt_active ? {8{lt_box_enable_pp[PP_TP_START]}} : (testpattern_enable ? G_vg : (mask_enable_pp[PP_TP_START] ? MASK_G : G_pp[PP_TP_START]));
+ B_pp[PP_TP_END] <= lt_active ? {8{lt_box_enable_pp[PP_TP_START]}} : (testpattern_enable ? B_vg : (mask_enable_pp[PP_TP_START] ? MASK_B : B_pp[PP_TP_START]));
end
// Output
diff --git a/rtl/videogen.v b/rtl/videogen.v
index 935f789..940661e 100644
--- a/rtl/videogen.v
+++ b/rtl/videogen.v
@@ -17,12 +17,8 @@
// along with this program. If not, see .
//
-`include "lat_tester_includes.v"
-
module videogen (
input pclk,
- input lt_active,
- input [1:0] lt_mode,
input [11:0] xpos,
input [10:0] ypos,
output reg [7:0] R_out,
@@ -56,31 +52,14 @@ parameter V_BORDER = ((V_AREA-V_GRADIENT)>>1);
// Pattern gen
always @(posedge pclk)
begin
- if (lt_active) begin
- case (lt_mode)
- default: begin
- {R_out, G_out, B_out} <= {3{8'h00}};
- end
- `LT_POS_TOPLEFT: begin
- {R_out, G_out, B_out} <= {3{((xpos < (H_ACTIVE/`LT_WIDTH_DIV)) && (ypos < (V_ACTIVE/`LT_HEIGHT_DIV))) ? 8'hff : 8'h00}};
- end
- `LT_POS_CENTER: begin
- {R_out, G_out, B_out} <= {3{((xpos >= ((H_ACTIVE/2)-(H_ACTIVE/(`LT_WIDTH_DIV*2)))) && (xpos < ((H_ACTIVE/2)+(H_ACTIVE/(`LT_WIDTH_DIV*2)))) && (ypos >= ((V_ACTIVE/2)-(V_ACTIVE/(`LT_HEIGHT_DIV*2)))) && (ypos < ((V_ACTIVE/2)+(V_ACTIVE/(`LT_HEIGHT_DIV*2))))) ? 8'hff : 8'h00}};
- end
- `LT_POS_BOTTOMRIGHT: begin
- {R_out, G_out, B_out} <= {3{((xpos >= (H_ACTIVE-(H_ACTIVE/`LT_WIDTH_DIV))) && (ypos >= (V_ACTIVE-(V_ACTIVE/`LT_HEIGHT_DIV)))) ? 8'hff : 8'h00}};
- end
- endcase
- end else begin
- if ((xpos < H_OVERSCAN) || (xpos >= H_OVERSCAN+H_AREA) || (ypos < V_OVERSCAN) || (ypos >= V_OVERSCAN+V_AREA))
- {R_out, G_out, B_out} <= {3{(xpos[0] ^ ypos[0]) ? 8'hff : 8'h00}};
- else if ((xpos < H_OVERSCAN+H_BORDER) || (xpos >= H_OVERSCAN+H_AREA-H_BORDER) || (ypos < V_OVERSCAN+V_BORDER) || (ypos >= V_OVERSCAN+V_AREA-V_BORDER))
- {R_out, G_out, B_out} <= {3{8'h50}};
- else if (ypos >= V_OVERSCAN+V_BORDER+V_GRADIENT-V_GRAYRAMP)
- {R_out, G_out, B_out} <= {3{8'((((xpos - (H_OVERSCAN+H_BORDER)) >> 4) << 3) + (xpos - (H_OVERSCAN+H_BORDER) >> 6))}};
- else
- {R_out, G_out, B_out} <= {3{8'((xpos - (H_OVERSCAN+H_BORDER)) >> 1)}};
- end
+ if ((xpos < H_OVERSCAN) || (xpos >= H_OVERSCAN+H_AREA) || (ypos < V_OVERSCAN) || (ypos >= V_OVERSCAN+V_AREA))
+ {R_out, G_out, B_out} <= {3{(xpos[0] ^ ypos[0]) ? 8'hff : 8'h00}};
+ else if ((xpos < H_OVERSCAN+H_BORDER) || (xpos >= H_OVERSCAN+H_AREA-H_BORDER) || (ypos < V_OVERSCAN+V_BORDER) || (ypos >= V_OVERSCAN+V_AREA-V_BORDER))
+ {R_out, G_out, B_out} <= {3{8'h50}};
+ else if (ypos >= V_OVERSCAN+V_BORDER+V_GRADIENT-V_GRAYRAMP)
+ {R_out, G_out, B_out} <= {3{8'((((xpos - (H_OVERSCAN+H_BORDER)) >> 4) << 3) + (xpos - (H_OVERSCAN+H_BORDER) >> 6))}};
+ else
+ {R_out, G_out, B_out} <= {3{8'((xpos - (H_OVERSCAN+H_BORDER)) >> 1)}};
end
endmodule
diff --git a/software/sys_controller/src/menu.c b/software/sys_controller/src/menu.c
index 3d0716e..d012ca2 100644
--- a/software/sys_controller/src/menu.c
+++ b/software/sys_controller/src/menu.c
@@ -222,7 +222,7 @@ MENU(menu_postproc, P99_PROTECT({ \
{ "Sh. mask strength", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.shmask_str, OPT_NOWRAP, 0, SCANLINESTR_MAX, sl_str_disp } } },
{ "Border color", OPT_AVCONFIG_SELECTION, { .sel = { &tc.mask_color, OPT_NOWRAP, SETTING_ITEM(mask_color_desc) } } },
{ LNG("Border brightn.","ﾏｽｸｱｶﾙｻ"), OPT_AVCONFIG_NUMVALUE, { .num = { &tc.mask_br, OPT_NOWRAP, 0, HV_MASK_MAX_BR, value_disp } } },
- //{ LNG("","DIYﾁｴﾝﾃｽﾄ"), OPT_FUNC_CALL, { .fun = { latency_test, <_arg_info } } },
+ { LNG("","DIYﾁｴﾝﾃｽﾄ"), OPT_FUNC_CALL, { .fun = { latency_test, <_arg_info } } },
}))
MENU(menu_compatibility, P99_PROTECT({ \