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integrate zero-riscy
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@@ -4,7 +4,7 @@
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* Machine generated for CPU 'nios2_qsys_0' in SOPC Builder design 'sys'
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* SOPC Builder design path: ../../sys.sopcinfo
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*
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* Generated: Sun Oct 16 12:18:06 EEST 2016
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* Generated: Fri Oct 05 19:59:02 EEST 2018
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*/
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/*
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@@ -50,14 +50,14 @@
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MEMORY
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{
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epcq_controller_0_avl_mem : ORIGIN = 0x0, LENGTH = 8388608
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reset : ORIGIN = 0x810000, LENGTH = 32
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onchip_memory2_0 : ORIGIN = 0x810020, LENGTH = 40928
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reset : ORIGIN = 0x10000, LENGTH = 32
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onchip_memory2_0 : ORIGIN = 0x10020, LENGTH = 36832
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epcq_controller_0_avl_mem : ORIGIN = 0x800000, LENGTH = 8388608
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}
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/* Define symbols for each memory base-address */
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__alt_mem_epcq_controller_0_avl_mem = 0x0;
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__alt_mem_onchip_memory2_0 = 0x810000;
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__alt_mem_onchip_memory2_0 = 0x10000;
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__alt_mem_epcq_controller_0_avl_mem = 0x800000;
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OUTPUT_FORMAT( "elf32-littlenios2",
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"elf32-littlenios2",
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@@ -309,24 +309,7 @@ SECTIONS
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*
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*/
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.epcq_controller_0_avl_mem : AT ( LOADADDR (.bss) + SIZEOF (.bss) )
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{
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PROVIDE (_alt_partition_epcq_controller_0_avl_mem_start = ABSOLUTE(.));
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*(.epcq_controller_0_avl_mem .epcq_controller_0_avl_mem. epcq_controller_0_avl_mem.*)
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. = ALIGN(4);
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PROVIDE (_alt_partition_epcq_controller_0_avl_mem_end = ABSOLUTE(.));
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} > epcq_controller_0_avl_mem
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PROVIDE (_alt_partition_epcq_controller_0_avl_mem_load_addr = LOADADDR(.epcq_controller_0_avl_mem));
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/*
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*
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* This section's LMA is set to the .text region.
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* crt0 will copy to this section's specified mapped region virtual memory address (VMA)
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*
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*/
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.onchip_memory2_0 LOADADDR (.epcq_controller_0_avl_mem) + SIZEOF (.epcq_controller_0_avl_mem) : AT ( LOADADDR (.epcq_controller_0_avl_mem) + SIZEOF (.epcq_controller_0_avl_mem) )
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.onchip_memory2_0 LOADADDR (.bss) + SIZEOF (.bss) : AT ( LOADADDR (.bss) + SIZEOF (.bss) )
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{
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PROVIDE (_alt_partition_onchip_memory2_0_start = ABSOLUTE(.));
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*(.onchip_memory2_0 .onchip_memory2_0. onchip_memory2_0.*)
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@@ -339,6 +322,23 @@ SECTIONS
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PROVIDE (_alt_partition_onchip_memory2_0_load_addr = LOADADDR(.onchip_memory2_0));
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/*
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*
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* This section's LMA is set to the .text region.
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* crt0 will copy to this section's specified mapped region virtual memory address (VMA)
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*
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*/
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.epcq_controller_0_avl_mem : AT ( LOADADDR (.onchip_memory2_0) + SIZEOF (.onchip_memory2_0) )
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{
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PROVIDE (_alt_partition_epcq_controller_0_avl_mem_start = ABSOLUTE(.));
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*(.epcq_controller_0_avl_mem .epcq_controller_0_avl_mem. epcq_controller_0_avl_mem.*)
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. = ALIGN(4);
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PROVIDE (_alt_partition_epcq_controller_0_avl_mem_end = ABSOLUTE(.));
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} > epcq_controller_0_avl_mem
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PROVIDE (_alt_partition_epcq_controller_0_avl_mem_load_addr = LOADADDR(.epcq_controller_0_avl_mem));
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/*
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* Stabs debugging sections.
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*
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@@ -386,7 +386,7 @@ SECTIONS
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/*
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* Don't override this, override the __alt_stack_* symbols instead.
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*/
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__alt_data_end = 0x81a000;
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__alt_data_end = 0x19000;
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/*
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* The next two symbols define the location of the default stack. You can
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@@ -402,4 +402,4 @@ PROVIDE( __alt_stack_limit = __alt_stack_base );
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* Override this symbol to put the heap in a different memory.
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*/
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PROVIDE( __alt_heap_start = end );
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PROVIDE( __alt_heap_limit = 0x81a000 );
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PROVIDE( __alt_heap_limit = 0x19000 );
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