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Revert some drive strength adjustments to meet timing requirements

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marqs committed 2017-10-13 21:03:48 +03:00
1 parent 76623292a9
commit 75e072d622
3 files changed
+15 -16
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ossc.sdc
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@@ -75,7 +75,7 @@ set_false_path -from [get_clocks {pclk_sdtv}] -to [get_ports HDMI_TX_*]
set_false_path -from [get_registers {scanconverter_inst|H_* scanconverter_inst|V_* scanconverter_inst|X_* scanconverter_inst|FID_1x}]
# Ignore paths from registers which are updated only at leading edge of hsync
#set_false_path -from [get_registers {scanconverter:scanconverter_inst|line_idx scanconverter:scanconverter_inst|line_out_idx* scanconverter:scanconverter_inst|hmax*}]
set_false_path -from [get_registers {scanconverter:scanconverter_inst|line_idx scanconverter:scanconverter_inst|line_out_idx* scanconverter:scanconverter_inst|hmax*}]
### JTAG Signal Constraints ###