switch to RV32E

This commit is contained in:
marqs committed 2018-10-30 01:31:40 +02:00
1 parent f2405989e9
commit 76d69d19bf
11 files changed
+7449 -7534

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+2 -2
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@@ -136,7 +136,7 @@
<CustomBuild Enabled="yes">
<Target Name="compile_image_debug">make APP_CFLAGS_DEBUG_LEVEL="-DDEBUG" generate_hex</Target>
<Target Name="compile_image_aud-debug">make ENABLE_AUDIO=y APP_CFLAGS_DEBUG_LEVEL="-DDEBUG" generate_hex</Target>
<Target Name="Ack BSP update">cd ../sys_controller_bsp &amp;&amp; touch public.mk Makefile</Target>
<Target Name="Ack BSP update">cd ../sys_controller_bsp &amp;&amp; touch bsp_timestamp</Target>
<RebuildCommand/>
<CleanCommand>make clean</CleanCommand>
<BuildCommand>make APP_CFLAGS_DEBUG_LEVEL="-DDEBUG"</BuildCommand>
@@ -182,7 +182,7 @@
<Target Name="compile_image">make generate_hex</Target>
<Target Name="Build_jp">make OSDLANG=JP</Target>
<Target Name="Build_audio">make ENABLE_AUDIO=y</Target>
<Target Name="Ack BSP update">cd ../sys_controller_bsp &amp;&amp; touch public.mk Makefile</Target>
<Target Name="Ack BSP update">cd ../sys_controller_bsp &amp;&amp; touch bsp_timestamp</Target>
<RebuildCommand/>
<CleanCommand>make clean</CleanCommand>
<BuildCommand>make</BuildCommand>
+4 -4
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@@ -169,7 +169,7 @@ C_SRCS += ossc/utils.c
C_SRCS += ulibSD/sd_io.c
C_SRCS += ulibSD/spi_io.c
CXX_SRCS :=
ASM_SRCS := crt0.boot.S
ASM_SRCS := crt0.boot_E.S
# Path to root of object file tree.
@@ -652,11 +652,11 @@ build_post_process :
# included makefile fragment.
#
ifeq ($(DEFAULT_CROSS_COMPILE),)
DEFAULT_CROSS_COMPILE := riscv64-unknown-elf-
DEFAULT_CROSS_COMPILE := riscv32-unknown-elf-
endif
ifeq ($(DEFAULT_STACKREPORT),)
DEFAULT_STACKREPORT := riscv64-unknown-elf-size
DEFAULT_STACKREPORT := riscv32-unknown-elf-size
endif
ifeq ($(DEFAULT_DOWNLOAD),)
@@ -755,7 +755,7 @@ ifeq ($(MKDIR),)
MKDIR := $(DEFAULT_MKDIR)
endif
RV_OBJCOPY = riscv64-unknown-elf-objcopy
RV_OBJCOPY = riscv32-unknown-elf-objcopy
#------------------------------------------------------------------------------
# PATTERN RULES TO BUILD OBJECTS
+87
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@@ -0,0 +1,87 @@
// Copyright 2017 ETH Zurich and University of Bologna.
// Copyright and related rights are licensed under the Solderpad Hardware
// License, Version 0.51 (the “License”); you may not use this file except in
// compliance with the License. You may obtain a copy of the License at
// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law
// or agreed to in writing, software, hardware and materials distributed under
// this License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See the License for the
// specific language governing permissions and limitations under the License.
#include "pulpino.h"
#define EXCEPTION_STACK_SIZE 72
/* ========================================================= [ entry ] === */
.section .text
default_exc_handler:
jal x0, default_exc_handler
reset_handler:
/* set all registers to zero */
mv x1, x0
mv x2, x1
mv x3, x1
mv x4, x1
mv x5, x1
mv x6, x1
mv x7, x1
mv x8, x1
mv x9, x1
mv x10, x1
mv x11, x1
mv x12, x1
mv x13, x1
mv x14, x1
mv x15, x1
/* stack initilization */
la x2, _stack_start
_start:
.global _start
/* clear BSS */
la x14, _bss_start
la x15, _bss_end
bge x14, x15, zero_loop_end
zero_loop:
sw x0, 0(x14)
addi x14, x14, 4
ble x14, x15, zero_loop
zero_loop_end:
main_entry:
/* jump to alt_main program entry point */
jal alt_main
/* =================================================== [ exceptions ] === */
/* This section has to be down here, since we have to disable rvc for it */
.section .vectors, "ax"
.option norvc;
// external interrupts are handled by the same callback
// until compiler supports IRQ routines
.org 0x00
.rept 31
nop
.endr
jal x0, default_exc_handler
// reset vector
.org 0x80
jal x0, reset_handler
// illegal instruction exception
.org 0x84
jal x0, default_exc_handler
// ecall handler
.org 0x88
jal x0, default_exc_handler
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+4 -4
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@@ -112,10 +112,10 @@ SOPC_FILE := ../../sys.sopcinfo
#-------------------------------------------------------------------------------
# Archiver command. Creates library files.
AR = riscv64-unknown-elf-ar
AR = riscv32-unknown-elf-ar
# Assembler command. Note that CC is used for .S files.
AS = riscv64-unknown-elf-gcc
AS = riscv32-unknown-elf-gcc
# Custom flags only passed to the archiver. This content of this variable is
# directly passed to the archiver rather than the more standard "ARFLAGS". The
@@ -139,10 +139,10 @@ BSP_CFLAGS_OPTIMIZATION = -Os
BSP_CFLAGS_WARNINGS = -Wall
# C compiler command.
CC = riscv64-unknown-elf-gcc -xc
CC = riscv32-unknown-elf-gcc -xc
# C++ compiler command.
CXX = riscv64-unknown-elf-gcc -xc++
CXX = riscv32-unknown-elf-gcc -xc++
# Command used to remove files during 'clean' target.
RM = rm -f
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+1 -1
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@@ -259,7 +259,7 @@ ALT_CPPFLAGS += -DSMALL_C_LIB
# or common. none
# setting hal.make.cflags_mgpopt is -mgpopt=global
#ALT_CFLAGS += -mgpopt=global
ALT_CFLAGS += -march=rv32imc -mabi=ilp32
ALT_CFLAGS += -march=rv32emc -mabi=ilp32e
# Enable BSP generation to query if SOPC system is big endian. If true ignores
# export of 'ALT_CFLAGS += -meb' to public.mk if big endian system. none