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make pll_reconfig more robust

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marqs committed 2019-10-12 22:56:10 +03:00
1 parent 8e7236dc00
commit 85c295c5e2
8 files changed
+7454 -7358
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ip/pll_reconfig/inc/pll_reconfig_regs.h
+3 -1
View File
@@ -26,7 +26,9 @@ typedef union {
struct {
alt_u8 reset:1;
alt_u8 update:1;
alt_u32 pll_reconfig_rsv:29;
alt_u8 t_config_id:4;
alt_u32 pll_reconfig_rsv:21;
alt_u8 c_config_id:4;
alt_u8 busy:1;
} __attribute__((packed, __may_alias__));
alt_u32 data;
ip/pll_reconfig/pll_reconfig_top.sv
+10 -7
View File
@@ -56,10 +56,12 @@ reg [1:0] state;
reg scan_shift;
reg scandone_prev;
reg configupdate_pre;
reg [7:0] ctr;
reg [7:0] shift_ctr;
wire pll_reset = pll_config_status[0];
wire start_update = pll_config_status[1];
wire [3:0] t_config_id = pll_config_status[5:2];
wire [3:0] c_config_id = pll_config_status[30:27];
wire config_busy = pll_config_status[31];
assign areset = pll_reset | areset_strobe;
@@ -141,7 +143,7 @@ begin
if (start_update) begin
pll_config_status[31] <= 1'b1;
scanclkena <= 1'b1;
ctr <= PLL_CONFIG_DATA_BITS;
shift_ctr <= PLL_CONFIG_DATA_BITS;
state <= STATE_SHIFT;
end else begin
pll_config_status[31] <= 1'b0;
@@ -150,22 +152,23 @@ begin
STATE_SHIFT:
begin
scan_shift <= 1'b1;
if (ctr > 0) begin
ctr <= ctr - 1'b1;
if (shift_ctr > 0) begin
shift_ctr <= shift_ctr - 1'b1;
end else begin
scan_shift <= 1'b0;
scanclkena <= 1'b0;
configupdate_pre <= 1'b1;
ctr <= 8'hff;
state <= STATE_WAITRESP;
end
end
STATE_WAITRESP:
begin
configupdate_pre <= 1'b0;
ctr <= ctr - 1'b1;
if (scandone_prev | (ctr == 8'h0)) begin
if (pll_reset) begin
state <= STATE_IDLE;
end else if (scandone_prev) begin
areset_strobe <= 1'b1;
pll_config_status[30:27] <= t_config_id;
state <= STATE_IDLE;
end
end