diff --git a/rtl/tvp7002_frontend.v b/rtl/tvp7002_frontend.v
index 628f37e..1fba50a 100644
--- a/rtl/tvp7002_frontend.v
+++ b/rtl/tvp7002_frontend.v
@@ -201,7 +201,7 @@ always @(posedge PCLK_i) begin
 
     // vsync leading edge processing per quadrant
     if (VS_i_np_prev & ~VS_i_np) begin
-        if (h_cnt_ref < even_min_thold) begin
+        if ((HS_i_prev & ~HS_i) | (h_cnt_ref < even_min_thold)) begin
             fid_next <= FID_ODD;
             fid_next_ctr <= 2'h1;
         end else if ((h_cnt_ref > even_max_thold) | ~interlace_flag) begin