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fix PLL reference clock switchover logic

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marqs committed 2019-10-09 23:58:55 +03:00
1 parent 3771d5cb14
commit 9feb96888b
6 files changed
+220 -24
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rtl/pll_2x.ppf
+1
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@@ -10,6 +10,7 @@
<pin name="scanclk" direction="input" scope="external" source="clock" />
<pin name="scanclkena" direction="input" scope="external" />
<pin name="scandata" direction="input" scope="external" />
<pin name="activeclock" direction="output" scope="external" />
<pin name="c0" direction="output" scope="external" source="clock" />
<pin name="c1" direction="output" scope="external" source="clock" />
<pin name="locked" direction="output" scope="external" />