bump sys_ctrl register to 32bit

This commit is contained in:
marqs committed 2023-01-31 20:50:33 +02:00
1 parent db1cf5922f
commit aa4beec957
8 files changed
+13 -13

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+2 -2
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@@ -43,7 +43,7 @@ extern avmode_t cm;
extern avconfig_t tc;
extern avinput_t target_input;
extern alt_u8 menu_active;
extern alt_u16 sys_ctrl;
extern alt_u32 sys_ctrl;
extern alt_u16 tc_sampler_phase;
extern alt_u8 profile_sel, profile_sel_menu;
extern alt_u8 lcd_bl_timeout;
@@ -182,7 +182,7 @@ int parse_control()
sniprintf((char*)osd->osd_array.data[1][0], OSD_CHAR_COLS, "Mode preset:");
sniprintf((char*)osd->osd_array.data[1][1], OSD_CHAR_COLS, "%s", video_modes[cm.id].name);
sniprintf((char*)osd->osd_array.data[2][0], OSD_CHAR_COLS, "Imode (FPGA):");
sniprintf((char*)osd->osd_array.data[2][1], OSD_CHAR_COLS, "%lu-%c%c %lu.%.2luHz", (unsigned long)((sc_status.vmax+1)<<sc_status.interlace_flag)+sc_status.interlace_flag,
sniprintf((char*)osd->osd_array.data[2][1], OSD_CHAR_COLS, "%lu-%c%c %lu.%.2luHz", (unsigned long)sc_status.vmax,
sc_status.interlace_flag ? 'i' : 'p',
sc_status.fpga_vsyncgen ? '*' : ' ',
fpga_v_hz_x100/100,
+1 -1
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@@ -33,7 +33,7 @@
extern char menu_row1[LCD_ROW_LEN+1], menu_row2[LCD_ROW_LEN+1];
extern alt_u16 rc_keymap[REMOTE_MAX_KEYS];
extern SD_DEV sdcard_dev;
extern alt_u16 sys_ctrl;
extern alt_u32 sys_ctrl;
static int check_fw_header(alt_u8 *databuf, fw_hdr *hdr)
{
+1 -1
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@@ -31,7 +31,7 @@
#define WRDELAY 20
#define CLEARDELAY 800
extern alt_u16 sys_ctrl;
extern alt_u32 sys_ctrl;
static void lcd_cmd(alt_u8 cmd, alt_u16 postdelay) {
SPI_write(I2CA_BASE, &cmd, 1);
+1 -1
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@@ -7,7 +7,7 @@
#include "spi_io.h"
#include "av_controller.h"
extern alt_u16 sys_ctrl;
extern alt_u32 sys_ctrl;
alt_u32 sd_timer_ts;
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+1 -1
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@@ -337,7 +337,7 @@
#define PIO_0_BIT_CLEARING_EDGE_REGISTER 0
#define PIO_0_BIT_MODIFYING_OUTPUT_REGISTER 0
#define PIO_0_CAPTURE 0
#define PIO_0_DATA_WIDTH 16
#define PIO_0_DATA_WIDTH 32
#define PIO_0_DO_TEST_BENCH_WIRING 0
#define PIO_0_DRIVEN_SIM_VALUE 0
#define PIO_0_EDGE_TYPE "NONE"