calculate hsync width on FPGA instead of reading TVP7002

This commit is contained in:
marqs committed 2023-05-28 17:06:07 +03:00
1 parent de1b441167
commit ab6bd9fc8a
8 files changed
+31 -11

No files matched your search

+2 -1
View File
@@ -36,7 +36,8 @@ typedef union {
typedef union {
struct {
uint32_t pcnt_frame:20;
uint16_t fe_rsv:12;
uint8_t hsync_width:8;
uint8_t fe_rsv:4;
} __attribute__((packed, __may_alias__));
uint32_t data;
} fe_status2_reg;