calculate hsync width on FPGA instead of reading TVP7002

rtl/ossc.v

@@ -176,6 +176,7 @@ wire [7:0] TVP_R_post, TVP_G_post, TVP_B_post;
 wire TVP_HSYNC_post, TVP_VSYNC_post, TVP_DE_post, TVP_FID_post, TVP_datavalid_post;
 wire TVP_fe_interlace, TVP_fe_frame_change, TVP_sof_scaler, TVP_sync_active;
 wire [19:0] TVP_fe_pcnt_frame;
+wire [7:0] TVP_hsync_width;
 wire [10:0] TVP_fe_vtotal, TVP_fe_xpos, TVP_fe_ypos;
 tvp7002_frontend u_tvp_frontend ( 
     .PCLK_i(TVP_PCLK_i),
@@ -210,6 +211,7 @@ tvp7002_frontend u_tvp_frontend (
     .frame_change(TVP_fe_frame_change),
     .sof_scaler(TVP_sof_scaler),
     .pcnt_frame(TVP_fe_pcnt_frame),
+    .hsync_width(TVP_hsync_width),
     .sync_active(TVP_sync_active)
 );
 
@@ -374,7 +376,7 @@ sys sys_inst(
     .pio_0_sys_ctrl_out_export              (sys_ctrl),
     .pio_1_controls_in_export               (controls),
     .sc_config_0_sc_if_fe_status_i          ({19'h0, TVP_sync_active, TVP_fe_interlace, TVP_fe_vtotal}),
-    .sc_config_0_sc_if_fe_status2_i         ({12'h0, TVP_fe_pcnt_frame}),
+    .sc_config_0_sc_if_fe_status2_i         ({4'h0, TVP_hsync_width, TVP_fe_pcnt_frame}),
     .sc_config_0_sc_if_lt_status_i          (32'h00000000),
     .sc_config_0_sc_if_hv_in_config_o       (hv_in_config),
     .sc_config_0_sc_if_hv_in_config2_o      (hv_in_config2),

rtl/tvp7002_frontend.v

@@ -50,6 +50,7 @@ module tvp7002_frontend (
     output reg frame_change,
     output reg sof_scaler,
     output reg [19:0] pcnt_frame,
+    output reg [7:0] hsync_width,
     output reg sync_active
 );
 
@@ -87,6 +88,7 @@ reg [20:0] pcnt_frame_ctr;
 reg [17:0] syncpol_det_ctr, hsync_hpol_ctr, vsync_hpol_ctr;
 reg [3:0] sync_inactive_ctr;
 reg [11:0] pcnt_line, pcnt_line_ctr, meas_h_cnt, meas_h_cnt_sogref;
+reg [7:0] hs_ctr;
 reg pcnt_line_stored;
 reg [10:0] meas_v_cnt;
 reg meas_hl_det, meas_fid;
@@ -252,14 +254,18 @@ always @(posedge CLK_MEAS_i) begin
 
     if (HSYNC_i_np_prev & ~HSYNC_i_np) begin
         pcnt_line_ctr <= 1;
+        hs_ctr <= 1;
 
         // store count 1ms after vsync
         if (~pcnt_line_stored & (pcnt_frame_ctr > 21'd27000)) begin
             pcnt_line <= pcnt_line_ctr;
+            hsync_width <= hs_ctr;
             pcnt_line_stored <= 1'b1;
         end
     end else begin
         pcnt_line_ctr <= pcnt_line_ctr + 1'b1;
+        if (~HSYNC_i_np)
+            hs_ctr <= hs_ctr + 1'b1;
     end
 
     HSYNC_i_np_prev <= HSYNC_i_np;