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Set fast output on HDMI_TX pins.

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Also adjust timing constraits to reflect working state with line3x at
162 MHz.
This commit is contained in:
Russell Harmon 2020-06-14 09:16:49 +00:00
parent a6d8c51ddd
commit c2b0687e7b
3 changed files with 41 additions and 4 deletions
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14
ossc.qsf
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@ -240,4 +240,18 @@ set_global_assignment -name SDC_FILE ossc.sdc
set_global_assignment -name CDF_FILE output_files/Chain1.cdf set_global_assignment -name CDF_FILE output_files/Chain1.cdf
set_global_assignment -name SIGNALTAP_FILE output_files/ossc_la.stp set_global_assignment -name SIGNALTAP_FILE output_files/ossc_la.stp
set_global_assignment -name QIP_FILE rtl/char_array.qip set_global_assignment -name QIP_FILE rtl/char_array.qip
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_DE
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_HS
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_PCLK
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_VS
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_BD
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_GD
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to HDMI_TX_RD
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_DE
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_HS
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_PCLK
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_VS
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_BD
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_GD
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to HDMI_TX_RD
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

8
ossc.sdc
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@ -10,8 +10,8 @@ set_false_path -to {sys:sys_inst|sys_pio_1:pio_1|readdata*}
### Scanconverter clock constraints ### ### Scanconverter clock constraints ###
create_clock -period 108MHz -name pclk_1x [get_ports PCLK_in] create_clock -period 108MHz -name pclk_1x [get_ports PCLK_in]
create_clock -period 33MHz -name pclk_2x_source [get_ports PCLK_in] -add create_clock -period 54MHz -name pclk_2x_source [get_ports PCLK_in] -add
create_clock -period 33MHz -name pclk_3x_source [get_ports PCLK_in] -add create_clock -period 54MHz -name pclk_3x_source [get_ports PCLK_in] -add
create_clock -period 33MHz -name pclk_4x_source [get_ports PCLK_in] -add create_clock -period 33MHz -name pclk_4x_source [get_ports PCLK_in] -add
create_clock -period 33MHz -name pclk_5x_source [get_ports PCLK_in] -add create_clock -period 33MHz -name pclk_5x_source [get_ports PCLK_in] -add
@ -54,8 +54,8 @@ foreach_in_collection c [get_clocks "pclk_1x pclk_*_source"] {
} }
# output delay constraints # output delay constraints
set IT_Tsu 1.0 set IT_Tsu 1.5
set IT_Th -0.5 set IT_Th -0.3
set critoutputs_hdmi [get_ports {HDMI_TX_RD* HDMI_TX_GD* HDMI_TX_BD* HDMI_TX_DE HDMI_TX_HS HDMI_TX_VS}] set critoutputs_hdmi [get_ports {HDMI_TX_RD* HDMI_TX_GD* HDMI_TX_BD* HDMI_TX_DE HDMI_TX_HS HDMI_TX_VS}]
foreach_in_collection c [get_clocks pclk_*_out] { foreach_in_collection c [get_clocks pclk_*_out] {
set_output_delay -clock $c -min $IT_Th $critoutputs_hdmi -add set_output_delay -clock $c -min $IT_Th $critoutputs_hdmi -add

23
tools/Makefile Normal file
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@ -0,0 +1,23 @@
.PHONY: generate_hex update_mif generate_firmware assemble_ossc
all: generate_firmware
generate_hex: bin2hex
$(MAKE) -C ../software/sys_controller generate_hex
update_mif: generate_hex
cd .. && quartus_cdb ossc --update_mif
assemble_ossc: update_mif
cd .. && quartus_asm ossc
generate_firmware: assemble_ossc create_fw_img
./create_fw_img ../output_files/ossc.rbf 0.86 aud-psp
bin2hex: bin2hex.c
$(CC) bin2hex.c -o bin2hex
create_fw_img: create_fw_img.c
gcc create_fw_img.c -o create_fw_img
# vim: set noet ts=2 sw=2 sts=2