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https://github.com/marqs85/ossc
synced 2026-11-06 15:10:00 +03:00
implement ndmreset via RV DM
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7 files changed
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@@ -21,7 +21,7 @@
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{
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datum _sortIndex
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{
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value = "7";
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value = "8";
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type = "int";
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}
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}
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@@ -42,7 +42,7 @@
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{
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datum _sortIndex
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{
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value = "8";
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value = "9";
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type = "int";
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}
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}
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@@ -63,7 +63,7 @@
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{
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datum _sortIndex
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{
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value = "9";
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value = "10";
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type = "int";
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}
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}
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@@ -84,7 +84,7 @@
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{
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datum _sortIndex
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{
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value = "1";
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value = "2";
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type = "int";
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}
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}
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@@ -108,7 +108,7 @@
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{
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datum _sortIndex
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{
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value = "6";
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value = "7";
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type = "int";
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}
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}
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@@ -142,7 +142,7 @@
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{
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datum _sortIndex
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{
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value = "5";
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value = "6";
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type = "int";
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}
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}
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@@ -163,7 +163,7 @@
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{
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datum _sortIndex
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{
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value = "3";
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value = "4";
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type = "int";
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}
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}
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@@ -171,7 +171,7 @@
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{
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datum _sortIndex
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{
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value = "2";
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value = "3";
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type = "int";
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}
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}
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@@ -205,7 +205,7 @@
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{
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datum _sortIndex
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{
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value = "13";
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value = "14";
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type = "int";
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}
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}
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@@ -226,7 +226,7 @@
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{
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datum _sortIndex
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{
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value = "10";
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value = "11";
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type = "int";
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}
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}
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@@ -247,7 +247,7 @@
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{
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datum _sortIndex
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{
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value = "11";
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value = "12";
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type = "int";
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}
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}
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@@ -268,7 +268,7 @@
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{
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datum _sortIndex
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{
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value = "14";
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value = "15";
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type = "int";
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}
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}
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@@ -285,11 +285,19 @@
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type = "String";
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}
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}
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element po_reset_bridge_0
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{
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datum _sortIndex
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{
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value = "1";
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type = "int";
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}
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}
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element sc_config_0
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{
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datum _sortIndex
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{
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value = "12";
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value = "13";
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type = "int";
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}
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}
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@@ -310,7 +318,7 @@
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{
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datum _sortIndex
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{
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value = "4";
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value = "5";
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type = "int";
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}
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}
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@@ -364,6 +372,8 @@
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internal="ibex_0.config"
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type="conduit"
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dir="end" />
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<interface name="ibex_0_dm" internal="ibex_0.dm" />
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<interface name="ibex_0_ndm" internal="ibex_0.ndm" type="conduit" dir="end" />
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<interface
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name="master_0_master_reset"
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internal="master_0.master_reset"
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@@ -389,7 +399,16 @@
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internal="pll_reconfig_0.pll_reconfig_if"
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type="conduit"
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dir="end" />
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<interface name="reset" internal="clk_27.clk_in_reset" type="reset" dir="end" />
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<interface
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name="reset_po"
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internal="po_reset_bridge_0.in_reset"
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type="reset"
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dir="end" />
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<interface
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name="reset_sys"
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internal="clk_27.clk_in_reset"
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type="reset"
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dir="end" />
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<interface
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name="sc_config_0_sc_if"
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internal="sc_config_0.sc_if"
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@@ -399,7 +418,7 @@
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<parameter name="clockFrequency" value="27000000" />
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<parameter name="clockFrequencyKnown" value="true" />
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<parameter name="inputClockFrequency" value="0" />
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<parameter name="resetSynchronousEdges" value="NONE" />
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<parameter name="resetSynchronousEdges" value="DEASSERT" />
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</module>
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<module name="hw_crc32_0" kind="hw_crc32" version="1.0" enabled="1" />
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<module
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@@ -418,6 +437,7 @@
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</module>
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<module name="ibex_0" kind="ibex" version="1.0" enabled="1">
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<parameter name="AUTO_INTERRUPT_RECEIVER_INTERRUPTS_USED" value="15" />
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<parameter name="IBEX_ICACHE" value="true" />
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<parameter name="IBEX_RV32E" value="true" />
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</module>
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<module
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@@ -507,7 +527,7 @@
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<parameter name="instanceID" value="NONE" />
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<parameter name="memorySize" value="16384" />
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<parameter name="readDuringWriteMode" value="DONT_CARE" />
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<parameter name="resetrequest_enabled" value="true" />
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<parameter name="resetrequest_enabled" value="false" />
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<parameter name="simAllowMRAMContentsFile" value="false" />
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<parameter name="simMemInitOnlyFilename" value="0" />
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<parameter name="singleClockOperation" value="true" />
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@@ -547,6 +567,17 @@
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<parameter name="width" value="32" />
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</module>
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<module name="pll_reconfig_0" kind="pll_reconfig" version="1.0" enabled="1" />
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<module
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name="po_reset_bridge_0"
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kind="altera_reset_bridge"
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version="24.1"
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enabled="1">
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<parameter name="ACTIVE_LOW_RESET" value="1" />
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<parameter name="AUTO_CLK_CLOCK_RATE" value="27000000" />
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<parameter name="NUM_RESET_OUTPUTS" value="1" />
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<parameter name="SYNCHRONOUS_EDGES" value="deassert" />
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<parameter name="USE_RESET_REQUEST" value="0" />
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</module>
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<module name="sc_config_0" kind="sc_config" version="1.0" enabled="1" />
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<module name="timer_0" kind="altera_avalon_timer" version="24.1" enabled="1">
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<parameter name="alwaysRun" value="false" />
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@@ -759,6 +790,11 @@
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version="24.1"
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start="clk_27.clk"
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end="intel_generic_serial_flash_interface_top_0.clk" />
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<connection
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kind="clock"
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version="24.1"
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start="clk_27.clk"
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end="po_reset_bridge_0.clk" />
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<connection
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kind="clock"
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version="24.1"
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@@ -823,11 +859,6 @@
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end="timer_0.irq">
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<parameter name="irqNumber" value="3" />
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</connection>
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<connection
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kind="reset"
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version="24.1"
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start="clk_27.clk_reset"
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end="master_0.clk_reset" />
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<connection
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kind="reset"
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version="24.1"
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@@ -893,6 +924,16 @@
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version="24.1"
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start="clk_27.clk_reset"
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end="ibex_0.reset_sink" />
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<connection
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kind="reset"
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version="24.1"
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start="po_reset_bridge_0.out_reset"
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end="master_0.clk_reset" />
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<connection
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kind="reset"
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version="24.1"
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start="po_reset_bridge_0.out_reset"
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end="ibex_0.po_reset_sink" />
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<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
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<interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="false" />
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<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
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