mirror of
https://github.com/marqs85/ossc
synced 2025-05-30 08:34:22 +03:00
integrate JTAG interface to Ibex
This commit is contained in:
marqs
parent
c572fb651a
commit
cc7c4766a5
@ -1 +1 @@
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Subproject commit 80569615842bf4e82f8efdef7c4937b0d9e0141e
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Subproject commit 34749dfc1dec1fb8bbfdf52434bb06ab22f8f88e
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34
rtl/ossc.v
34
rtl/ossc.v
@ -58,7 +58,12 @@ module ossc (
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output SD_CLK,
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inout SD_CMD,
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inout [3:0] SD_DAT
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inout [3:0] SD_DAT,
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input altera_reserved_tms,
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input altera_reserved_tck,
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input altera_reserved_tdi,
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output altera_reserved_tdo
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);
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@ -86,6 +91,8 @@ wire clkmux_clkout;
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wire [15:0] ir_code;
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wire [7:0] ir_code_cnt;
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wire tms, tck, tdi, tdo;
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wire [7:0] R_sc, G_sc, B_sc;
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wire HSYNC_sc, VSYNC_sc, DE_sc;
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wire pll_areset, pll_scanclk, pll_scanclkena, pll_configupdate, pll_scandata, pll_scandone, pll_activeclock;
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@ -95,9 +102,9 @@ wire pclk_out = PCLK_sc;
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reg [7:0] po_reset_ctr = 0;
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reg po_reset_n = 1'b0;
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wire jtagm_reset_req, ndmreset_req;
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wire ndmreset_req;
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reg ndmreset_ack, ndmreset_pulse;
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wire sys_reset_n = (po_reset_n & ~jtagm_reset_req & ~ndmreset_pulse);
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wire sys_reset_n = (po_reset_n & ~ndmreset_pulse);
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reg [7:0] TVP_R, TVP_G, TVP_B;
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reg TVP_HS, TVP_VS, TVP_FID;
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@ -378,7 +385,11 @@ sys sys_inst(
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.ibex_0_ndm_ndmreset_ack_i (ndmreset_ack),
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.ibex_0_config_boot_addr_i (32'h02080000),
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.ibex_0_config_core_sleep_o (),
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.master_0_master_reset_reset (jtagm_reset_req),
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.ibex_0_tck_clk (tck),
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.ibex_0_jtag_tdi (tdi),
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.ibex_0_jtag_tms (tms),
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.ibex_0_jtag_tdo (tdo),
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.ibex_0_jtag_trstn (),
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.i2c_opencores_0_export_scl_pad_io (scl),
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.i2c_opencores_0_export_sda_pad_io (sda),
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.i2c_opencores_0_export_spi_miso_pad_i (1'b0),
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@ -415,10 +426,6 @@ sys sys_inst(
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.pll_reconfig_0_pll_reconfig_if_scandone (pll_scandone)
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);
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// These do not work in current Quartus version (23.1) and a patch file (scripts/qsys.patch) must be used after Qsys generation instead
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defparam
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sys_inst.master_0.fifo.USE_MEMORY_BLOCKS = 0;
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scanconverter #(
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.EMIF_ENABLE(0),
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.NUM_LINE_BUFFERS(2)
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@ -489,6 +496,17 @@ ir_rcv ir0 (
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.ir_code_cnt (ir_code_cnt)
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);
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cycloneive_jtag jtag_inst(
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.tms(altera_reserved_tms),
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.tck(altera_reserved_tck),
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.tdi(altera_reserved_tdi),
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.tdo(altera_reserved_tdo),
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.tmsutap(tms),
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.tckutap(tck),
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.tdiutap(tdi),
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.tdouser(tdo)
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);
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/*lat_tester lt0 (
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.clk27 (clk27),
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.pclk (PCLK_sc),
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132
sys.qsys
132
sys.qsys
@ -21,7 +21,7 @@
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{
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datum _sortIndex
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{
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value = "8";
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value = "7";
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type = "int";
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}
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}
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@ -42,7 +42,7 @@
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{
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datum _sortIndex
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{
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value = "9";
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value = "8";
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type = "int";
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}
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}
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@ -63,7 +63,7 @@
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{
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datum _sortIndex
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{
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value = "10";
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value = "9";
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type = "int";
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}
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}
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@ -88,14 +88,6 @@
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type = "int";
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}
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}
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element ibex_0.avalon_slave_dbgreg
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{
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datum _lockedAddress
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{
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value = "1";
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type = "boolean";
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}
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}
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element ibex_0.avalon_slave_dm
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{
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datum _lockedAddress
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@ -108,7 +100,7 @@
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{
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datum _sortIndex
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{
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value = "7";
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value = "6";
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type = "int";
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}
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}
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@ -142,7 +134,7 @@
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{
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datum _sortIndex
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{
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value = "6";
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value = "5";
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type = "int";
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}
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}
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@ -159,14 +151,6 @@
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type = "String";
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}
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}
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element master_0
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{
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datum _sortIndex
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{
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value = "4";
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type = "int";
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}
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}
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element onchip_memory2_0
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{
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datum _sortIndex
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@ -205,7 +189,7 @@
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{
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datum _sortIndex
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{
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value = "14";
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value = "13";
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type = "int";
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}
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}
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@ -226,7 +210,7 @@
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{
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datum _sortIndex
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{
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value = "11";
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value = "10";
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type = "int";
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}
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}
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@ -247,7 +231,7 @@
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{
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datum _sortIndex
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{
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value = "12";
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value = "11";
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type = "int";
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}
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}
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@ -268,7 +252,7 @@
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{
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datum _sortIndex
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{
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value = "15";
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value = "14";
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type = "int";
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}
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}
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@ -297,7 +281,7 @@
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{
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datum _sortIndex
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{
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value = "13";
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value = "12";
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type = "int";
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}
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}
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@ -318,7 +302,7 @@
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{
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datum _sortIndex
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{
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value = "5";
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value = "4";
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type = "int";
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}
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}
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@ -373,12 +357,9 @@
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type="conduit"
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dir="end" />
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<interface name="ibex_0_dm" internal="ibex_0.dm" />
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<interface name="ibex_0_jtag" internal="ibex_0.jtag" type="conduit" dir="end" />
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<interface name="ibex_0_ndm" internal="ibex_0.ndm" type="conduit" dir="end" />
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<interface
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name="master_0_master_reset"
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internal="master_0.master_reset"
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type="reset"
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dir="start" />
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<interface name="ibex_0_tck" internal="ibex_0.tck" type="clock" dir="end" />
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<interface
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name="osd_generator_0_osd_if"
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internal="osd_generator_0.osd_if"
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@ -436,7 +417,7 @@
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<parameter name="dedicated_spi" value="1" />
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</module>
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<module name="ibex_0" kind="ibex" version="1.0" enabled="1">
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<parameter name="AUTO_INTERRUPT_RECEIVER_INTERRUPTS_USED" value="15" />
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<parameter name="AUTO_INTERRUPT_RECEIVER_INTERRUPTS_USED" value="11" />
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<parameter name="IBEX_ICACHE" value="true" />
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<parameter name="IBEX_RV32E" value="true" />
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</module>
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@ -475,7 +456,7 @@
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name="jtag_uart_0"
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kind="altera_avalon_jtag_uart"
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version="24.1"
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enabled="1">
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enabled="0">
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<parameter name="allowMultipleConnections" value="false" />
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<parameter name="avalonSpec" value="2.0" />
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<parameter name="clkFreq" value="27000000" />
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@ -491,20 +472,6 @@
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<parameter name="writeBufferDepth" value="16" />
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<parameter name="writeIRQThreshold" value="8" />
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</module>
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<module
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name="master_0"
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kind="altera_jtag_avalon_master"
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version="24.1"
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enabled="1">
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<parameter name="AUTO_DEVICE" value="EP4CE15E22C8" />
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<parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
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<parameter name="AUTO_DEVICE_SPEEDGRADE" value="8" />
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<parameter name="COMPONENT_CLOCK" value="0" />
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<parameter name="FAST_VER" value="0" />
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<parameter name="FIFO_DEPTHS" value="2" />
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<parameter name="PLI_PORT" value="50000" />
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<parameter name="USE_PLI" value="0" />
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</module>
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<module
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name="onchip_memory2_0"
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kind="altera_avalon_onchip_memory2"
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@ -717,6 +684,33 @@
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<parameter name="baseAddress" value="0x00010000" />
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<parameter name="defaultConnection" value="false" />
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</connection>
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<connection
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kind="avalon"
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version="24.1"
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start="ibex_0.avalon_master_bus_debug"
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end="intel_generic_serial_flash_interface_top_0.avl_csr">
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<parameter name="arbitrationPriority" value="1" />
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<parameter name="baseAddress" value="0x00020100" />
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<parameter name="defaultConnection" value="false" />
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</connection>
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<connection
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kind="avalon"
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version="24.1"
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start="ibex_0.avalon_master_bus_debug"
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end="intel_generic_serial_flash_interface_top_0.avl_mem">
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<parameter name="arbitrationPriority" value="1" />
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<parameter name="baseAddress" value="0x02000000" />
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<parameter name="defaultConnection" value="false" />
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</connection>
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<connection
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kind="avalon"
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version="24.1"
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start="ibex_0.avalon_master_bus_debug"
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end="onchip_memory2_0.s2">
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<parameter name="arbitrationPriority" value="1" />
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<parameter name="baseAddress" value="0x00010000" />
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<parameter name="defaultConnection" value="false" />
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</connection>
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<connection
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kind="avalon"
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version="24.1"
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@ -744,47 +738,10 @@
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<parameter name="baseAddress" value="0x00010000" />
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<parameter name="defaultConnection" value="false" />
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</connection>
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<connection
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kind="avalon"
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version="24.1"
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start="master_0.master"
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end="ibex_0.avalon_slave_dbgreg">
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<parameter name="arbitrationPriority" value="1" />
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<parameter name="baseAddress" value="0x0000" />
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<parameter name="defaultConnection" value="false" />
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</connection>
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<connection
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kind="avalon"
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version="24.1"
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start="master_0.master"
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end="intel_generic_serial_flash_interface_top_0.avl_csr">
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<parameter name="arbitrationPriority" value="1" />
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<parameter name="baseAddress" value="0x00020100" />
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<parameter name="defaultConnection" value="false" />
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</connection>
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<connection
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kind="avalon"
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version="24.1"
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start="master_0.master"
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end="intel_generic_serial_flash_interface_top_0.avl_mem">
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<parameter name="arbitrationPriority" value="1" />
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<parameter name="baseAddress" value="0x02000000" />
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<parameter name="defaultConnection" value="false" />
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</connection>
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<connection
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kind="avalon"
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version="24.1"
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start="master_0.master"
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end="onchip_memory2_0.s2">
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<parameter name="arbitrationPriority" value="1" />
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<parameter name="baseAddress" value="0x00010000" />
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<parameter name="defaultConnection" value="false" />
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</connection>
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<connection kind="clock" version="24.1" start="clk_27.clk" end="jtag_uart_0.clk" />
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<connection kind="clock" version="24.1" start="clk_27.clk" end="pio_0.clk" />
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<connection kind="clock" version="24.1" start="clk_27.clk" end="pio_1.clk" />
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<connection kind="clock" version="24.1" start="clk_27.clk" end="timer_0.clk" />
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<connection kind="clock" version="24.1" start="clk_27.clk" end="master_0.clk" />
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<connection
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kind="clock"
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version="24.1"
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@ -924,11 +881,6 @@
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version="24.1"
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start="clk_27.clk_reset"
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end="ibex_0.reset_sink" />
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<connection
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kind="reset"
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version="24.1"
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start="po_reset_bridge_0.out_reset"
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end="master_0.clk_reset" />
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<connection
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kind="reset"
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version="24.1"
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2445
sys.sopcinfo
2445
sys.sopcinfo
File diff suppressed because it is too large
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