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* Clean up some FPGA code
* Wrap sampling phase setting * Enable hal.enable_lightweight_device_driver_api to reduce CPU code size
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@@ -4,7 +4,7 @@
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* Machine generated for CPU 'nios2_qsys_0' in SOPC Builder design 'sys'
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* SOPC Builder design path: ../../sys.sopcinfo
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*
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* Generated: Thu Oct 20 01:24:13 EEST 2016
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* Generated: Sat Dec 31 11:45:57 EET 2016
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*/
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/*
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