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https://github.com/marqs85/ossc
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Add support for GBI 360p
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0905620b4d
commit
f276cda190
7 files changed
+63
-23
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@@ -361,8 +361,8 @@ status_t get_status(tvp_input_t input, video_format format)
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return status;
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}
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// h_info: [31:30] [29] [28] [27:20] [19:11] [10:0]
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// | H_MULTMODE[1:0] | H_L5FMT | | H_SYNCLEN[7:0] | H_BACKPORCH[8:0] | H_ACTIVE[10:0] |
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// h_info: [31:30] [29] [28] [27:20] [19:11] [10:0]
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// | H_MULTMODE[1:0] | H_L5FMT | H_L3_240x360 | H_SYNCLEN[7:0] | H_BACKPORCH[8:0] | H_ACTIVE[10:0] |
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//
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// h_info2: [31:30] [29:19] [18:16] [15:13] [12:10] [9:0]
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// | | H_MASK[10:0] | H_OPT_SCALE[2:0] | H_OPT_SAMPLE_SEL[2:0] | H_OPT_SAMPLE_MULT[2:0] | H_OPT_STARTOFF[9:0] |
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@@ -398,6 +398,7 @@ void set_videoinfo()
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switch (cm.target_lm) {
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case MODE_L2_320_COL:
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case MODE_L2_240x360:
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h_opt_scale = 4;
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break;
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case MODE_L2_256_COL:
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@@ -409,6 +410,9 @@ void set_videoinfo()
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case MODE_L3_256_COL:
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h_opt_scale = 4-cm.cc.ar_256col;
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break;
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case MODE_L3_240x360:
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h_opt_scale = 6;
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break;
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case MODE_L4_320_COL:
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h_opt_scale = 4;
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break;
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@@ -456,6 +460,7 @@ void set_videoinfo()
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IOWR_ALTERA_AVALON_PIO_DATA(PIO_3_BASE, (cm.fpga_hmultmode<<30) |
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((cm.cc.l5_fmt!=L5FMT_1600x1200)<<29) |
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((cm.target_lm==MODE_L3_240x360)<<28) |
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(((cm.sample_mult*h_synclen)&0xff)<<20) |
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(((cm.sample_mult*(alt_u16)video_modes[cm.id].h_backporch)&0x1ff)<<11) |
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((cm.sample_mult*video_modes[cm.id].h_active)&0x7ff));
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@@ -55,6 +55,7 @@
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#define FPGA_H_MULTMODE_FULLWIDTH 0
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#define FPGA_H_MULTMODE_ASPECTFIX 1
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#define FPGA_H_MULTMODE_OPTIMIZED 2
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#define FPGA_H_MULTMODE_OPTIMIZED_1X 3
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#define FPGA_SCANLINEMODE_OFF 0
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#define FPGA_SCANLINEMODE_H 1
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@@ -55,7 +55,8 @@ static const char *l2l4l5_mode_desc[] = { LNG("Generic 4:3","ジェネリッ
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static const char *l5_fmt_desc[] = { "1920x1080", "1600x1200", "1920x1200" };
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static const char *pm_240p_desc[] = { LNG("Passthru","パススルー"), "Line2x", "Line3x", "Line4x", "Line5x" };
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static const char *pm_480i_desc[] = { LNG("Passthru","パススルー"), "Line2x (bob)", "Line3x (laced)", "Line4x (bob)" };
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static const char *pm_384p_480p_desc[] = { LNG("Passthru","パススルー"), "Line2x" };
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static const char *pm_384p_desc[] = { LNG("Passthru","パススルー"), "Line2x", "Line2x 240x360", "Line3x 240x360" };
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static const char *pm_480p_desc[] = { LNG("Passthru","パススルー"), "Line2x" };
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static const char *pm_1080i_desc[] = { LNG("Passthru","パススルー"), "Line2x (bob)" };
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static const char *ar_256col_desc[] = { "4:3", "8:7" };
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static const char *tx_mode_desc[] = { "HDMI", "DVI" };
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@@ -129,9 +130,9 @@ MENU(menu_sync, P99_PROTECT({ \
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MENU(menu_output, P99_PROTECT({ \
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{ LNG("240p/288p proc","240p/288pショリ"), OPT_AVCONFIG_SELECTION, { .sel = { &tc.pm_240p, OPT_WRAP, SETTING_ITEM(pm_240p_desc) } } },
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{ LNG("384p proc","384pショリ"), OPT_AVCONFIG_SELECTION, { .sel = { &tc.pm_384p, OPT_WRAP, SETTING_ITEM(pm_384p_480p_desc) } } },
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{ LNG("384p proc","384pショリ"), OPT_AVCONFIG_SELECTION, { .sel = { &tc.pm_384p, OPT_WRAP, SETTING_ITEM(pm_384p_desc) } } },
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{ LNG("480i/576i proc","480i/576iショリ"), OPT_AVCONFIG_SELECTION, { .sel = { &tc.pm_480i, OPT_WRAP, SETTING_ITEM(pm_480i_desc) } } },
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{ LNG("480p/576p proc","480p/576pショリ"), OPT_AVCONFIG_SELECTION, { .sel = { &tc.pm_480p, OPT_WRAP, SETTING_ITEM(pm_384p_480p_desc) } } },
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{ LNG("480p/576p proc","480p/576pショリ"), OPT_AVCONFIG_SELECTION, { .sel = { &tc.pm_480p, OPT_WRAP, SETTING_ITEM(pm_480p_desc) } } },
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{ LNG("960i/1080i proc","960i/1080iショリ"), OPT_AVCONFIG_SELECTION, { .sel = { &tc.pm_1080i, OPT_WRAP, SETTING_ITEM(pm_1080i_desc) } } },
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{ LNG("Line2x mode","Line2xモード"), OPT_AVCONFIG_SELECTION, { .sel = { &tc.l2_mode, OPT_WRAP, SETTING_ITEM(l2l4l5_mode_desc) } } },
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{ LNG("Line3x mode","Line3xモード"), OPT_AVCONFIG_SELECTION, { .sel = { &tc.l3_mode, OPT_WRAP, SETTING_ITEM(l3_mode_desc) } } },
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@@ -49,7 +49,11 @@ alt_8 get_mode_id(alt_u32 totlines, alt_u8 progressive, alt_u32 hz, video_type t
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switch (video_modes[i].group) {
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case GROUP_NONE:
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case GROUP_240P:
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break;
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case GROUP_384P:
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//fixed Line2x/3x mode for 240x360p
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valid_lm[2] = MODE_L2_240x360;
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valid_lm[3] = MODE_L3_240x360;
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break;
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case GROUP_480I:
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//fixed Line3x/4x mode for 480i
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@@ -107,7 +111,7 @@ alt_8 get_mode_id(alt_u32 totlines, alt_u8 progressive, alt_u32 hz, video_type t
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cm.fpga_vmultmode = FPGA_V_MULTMODE_2X;
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// Use native 2x sampling with low-res modes when possible to minimize jitter and generate min. 25MHz input pclk for FPGA PLL
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if ((!cm.cc.vga_ilace_fix) && (video_modes[i].h_total < 1400) && ((video_modes[i].group == GROUP_240P) || (video_modes[i].group == GROUP_384P) || (video_modes[i].group == GROUP_480I))) {
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cm.fpga_hmultmode = FPGA_H_MULTMODE_OPTIMIZED;
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cm.fpga_hmultmode = FPGA_H_MULTMODE_OPTIMIZED_1X;
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cm.sample_mult = 2;
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} else {
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cm.fpga_hmultmode = FPGA_H_MULTMODE_FULLWIDTH;
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@@ -124,14 +128,19 @@ alt_8 get_mode_id(alt_u32 totlines, alt_u8 progressive, alt_u32 hz, video_type t
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break;
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case MODE_L2_256_COL:
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cm.fpga_vmultmode = FPGA_V_MULTMODE_2X;
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cm.fpga_hmultmode = FPGA_H_MULTMODE_OPTIMIZED;
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cm.fpga_hmultmode = FPGA_H_MULTMODE_OPTIMIZED_1X;
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cm.sample_mult = 6;
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break;
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case MODE_L2_320_COL:
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cm.fpga_vmultmode = FPGA_V_MULTMODE_2X;
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cm.fpga_hmultmode = FPGA_H_MULTMODE_OPTIMIZED;
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cm.fpga_hmultmode = FPGA_H_MULTMODE_OPTIMIZED_1X;
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cm.sample_mult = 4;
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break;
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case MODE_L2_240x360:
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cm.fpga_vmultmode = FPGA_V_MULTMODE_2X;
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cm.fpga_hmultmode = FPGA_H_MULTMODE_OPTIMIZED;
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cm.sample_mult = 5;
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break;
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case MODE_L3_GEN_16_9:
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cm.fpga_vmultmode = FPGA_V_MULTMODE_3X;
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cm.fpga_hmultmode = FPGA_H_MULTMODE_FULLWIDTH;
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@@ -157,6 +166,12 @@ alt_8 get_mode_id(alt_u32 totlines, alt_u8 progressive, alt_u32 hz, video_type t
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cm.fpga_hmultmode = FPGA_H_MULTMODE_OPTIMIZED;
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cm.sample_mult = 5;
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break;
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case MODE_L3_240x360:
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cm.fpga_vmultmode = FPGA_V_MULTMODE_3X;
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cm.fpga_hmultmode = FPGA_H_MULTMODE_OPTIMIZED;
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cm.sample_mult = 7;
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cm.hsync_cut = 13;
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break;
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case MODE_L4_GEN_4_3:
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cm.fpga_vmultmode = FPGA_V_MULTMODE_4X;
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cm.fpga_hmultmode = FPGA_H_MULTMODE_FULLWIDTH;
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@@ -70,16 +70,18 @@ typedef enum {
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MODE_L2 = (1<<3),
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MODE_L2_320_COL = (1<<4),
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MODE_L2_256_COL = (1<<5),
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MODE_L3_GEN_16_9 = (1<<6),
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MODE_L3_GEN_4_3 = (1<<7),
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MODE_L3_320_COL = (1<<8),
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MODE_L3_256_COL = (1<<9),
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MODE_L4_GEN_4_3 = (1<<10),
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MODE_L4_320_COL = (1<<11),
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MODE_L4_256_COL = (1<<12),
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MODE_L5_GEN_4_3 = (1<<13),
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MODE_L5_320_COL = (1<<14),
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MODE_L5_256_COL = (1<<15),
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MODE_L2_240x360 = (1<<6),
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MODE_L3_GEN_16_9 = (1<<7),
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MODE_L3_GEN_4_3 = (1<<8),
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MODE_L3_320_COL = (1<<9),
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MODE_L3_256_COL = (1<<10),
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MODE_L3_240x360 = (1<<11),
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MODE_L4_GEN_4_3 = (1<<12),
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MODE_L4_320_COL = (1<<13),
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MODE_L4_256_COL = (1<<14),
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MODE_L5_GEN_4_3 = (1<<15),
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MODE_L5_320_COL = (1<<16),
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MODE_L5_256_COL = (1<<17),
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} mode_flags;
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typedef struct {
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@@ -113,6 +115,9 @@ typedef struct {
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{ "320x240LB", 320, 240, 426, 312, 49, 41, 31, 3, (VIDEO_SDTV | VIDEO_PC), GROUP_240P, (MODE_L2_320_COL | MODE_L3_320_COL | MODE_L4_320_COL | MODE_L5_320_COL) }, \
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{ "256x240LB", 256, 240, 341, 312, 39, 41, 25, 3, (VIDEO_SDTV | VIDEO_PC), GROUP_240P, (MODE_L2_256_COL | MODE_L3_256_COL | MODE_L4_256_COL | MODE_L5_256_COL) }, \
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{ "288p", 720, 288, 864, 312, 69, 19, 63, 3, (VIDEO_SDTV | VIDEO_PC), GROUP_240P, (MODE_PT | MODE_L2 | MODE_PLLDIVBY2) }, \
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/* 360p: GBI */ \
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{ "480x360", 480, 360, 600, 375, 63, 10, 38, 3, (VIDEO_EDTV), GROUP_384P, (MODE_PT | MODE_L2 | MODE_PLLDIVBY2) }, \
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{ "240x360", 256, 360, 300, 375, 24, 10, 18, 3, (VIDEO_EDTV), GROUP_384P, (MODE_L2_240x360 | MODE_L3_240x360) }, \
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/* 384p: Sega Model 2 */ \
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{ "384p", 496, 384, 640, 423, 50, 29, 62, 3, (VIDEO_EDTV), GROUP_384P, (MODE_PT | MODE_L2 | MODE_PLLDIVBY2) }, \
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/* 640x400, VGA Mode 13h */ \
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