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Release 0.67.

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- Code cleanup
- Some project files added
- PAL linetriple added
- FPGA PLL parameters optimized
- Reduced jitter on low video clock sources
This commit is contained in:
marqs committed 2016-03-27 23:09:31 +03:00
1 parent 388c464f63
commit f502b2e46c
30 files changed
+3680 -2691
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software/sys_controller/it6613/hdmitx_nios2.c
+57 -46
View File
@@ -5,78 +5,89 @@
#include "hdmitx.h"
#include "it6613.h"
inline alt_u32 read_it2(alt_u32 regaddr) {
I2C_start(I2CA_BASE, IT_BASE, 0);
I2C_write(I2CA_BASE, regaddr, 0);
I2C_start(I2CA_BASE, IT_BASE, 1);
return I2C_read(I2CA_BASE,1);
inline alt_u32 read_it2(alt_u32 regaddr)
{
I2C_start(I2CA_BASE, IT_BASE, 0);
I2C_write(I2CA_BASE, regaddr, 0);
I2C_start(I2CA_BASE, IT_BASE, 1);
return I2C_read(I2CA_BASE,1);
}
inline void write_it2(alt_u32 regaddr, alt_u8 data) {
I2C_start(I2CA_BASE, IT_BASE, 0);
I2C_write(I2CA_BASE, regaddr, 0);
I2C_write(I2CA_BASE, data, 1);
inline void write_it2(alt_u32 regaddr, alt_u8 data)
{
I2C_start(I2CA_BASE, IT_BASE, 0);
I2C_write(I2CA_BASE, regaddr, 0);
I2C_write(I2CA_BASE, data, 1);
}
BYTE I2C_Read_Byte(BYTE Addr,BYTE RegAddr) {
I2C_start(I2CA_BASE, Addr, 0);
I2C_write(I2CA_BASE, RegAddr, 0);
I2C_start(I2CA_BASE, Addr, 1);
return I2C_read(I2CA_BASE,1);
BYTE I2C_Read_Byte(BYTE Addr,BYTE RegAddr)
{
I2C_start(I2CA_BASE, Addr, 0);
I2C_write(I2CA_BASE, RegAddr, 0);
I2C_start(I2CA_BASE, Addr, 1);
return I2C_read(I2CA_BASE,1);
}
SYS_STATUS I2C_Write_Byte(BYTE Addr,BYTE RegAddr,BYTE Data) {
I2C_start(I2CA_BASE, Addr, 0);
I2C_write(I2CA_BASE, RegAddr, 0);
I2C_write(I2CA_BASE, Data, 1);
return 0;
SYS_STATUS I2C_Write_Byte(BYTE Addr,BYTE RegAddr,BYTE Data)
{
I2C_start(I2CA_BASE, Addr, 0);
I2C_write(I2CA_BASE, RegAddr, 0);
I2C_write(I2CA_BASE, Data, 1);
return 0;
}
SYS_STATUS I2C_Read_ByteN(BYTE Addr,BYTE RegAddr,BYTE *pData,int N) {
int i;
SYS_STATUS I2C_Read_ByteN(BYTE Addr,BYTE RegAddr,BYTE *pData,int N)
{
int i;
for (i=0; i<N; i++)
pData[i] = I2C_Read_Byte(Addr, RegAddr+i);
for (i=0; i<N; i++)
pData[i] = I2C_Read_Byte(Addr, RegAddr+i);
return 0;
return 0;
}
SYS_STATUS I2C_Write_ByteN(BYTE Addr,BYTE RegAddr,BYTE *pData,int N) {
int i;
SYS_STATUS I2C_Write_ByteN(BYTE Addr,BYTE RegAddr,BYTE *pData,int N)
{
int i;
for (i=0; i<N; i++)
I2C_Write_Byte(Addr, RegAddr+i, pData[i]);
for (i=0; i<N; i++)
I2C_Write_Byte(Addr, RegAddr+i, pData[i]);
return 0;
return 0;
}
BYTE HDMITX_ReadI2C_Byte(BYTE RegAddr) {
return read_it2(RegAddr);
BYTE HDMITX_ReadI2C_Byte(BYTE RegAddr)
{
return read_it2(RegAddr);
}
SYS_STATUS HDMITX_WriteI2C_Byte(BYTE RegAddr,BYTE val) {
write_it2(RegAddr, val);
return 0;
SYS_STATUS HDMITX_WriteI2C_Byte(BYTE RegAddr,BYTE val)
{
write_it2(RegAddr, val);
return 0;
}
SYS_STATUS HDMITX_ReadI2C_ByteN(BYTE RegAddr,BYTE *pData,int N) {
int i;
SYS_STATUS HDMITX_ReadI2C_ByteN(BYTE RegAddr,BYTE *pData,int N)
{
int i;
for (i=0; i<N; i++)
pData[i] = HDMITX_ReadI2C_Byte(RegAddr+i);
for (i=0; i<N; i++)
pData[i] = HDMITX_ReadI2C_Byte(RegAddr+i);
return 0;
return 0;
}
SYS_STATUS HDMITX_WriteI2C_ByteN(BYTE RegAddr,BYTE *pData,int N) {
int i;
SYS_STATUS HDMITX_WriteI2C_ByteN(BYTE RegAddr,BYTE *pData,int N)
{
int i;
for (i=0; i<N; i++)
HDMITX_WriteI2C_Byte(RegAddr+i, pData[i]);
for (i=0; i<N; i++)
HDMITX_WriteI2C_Byte(RegAddr+i, pData[i]);
return 0;
return 0;
}
void DelayMS(unsigned int ms) {
usleep(1000*ms);
void DelayMS(unsigned int ms)
{
usleep(1000*ms);
}