Russell Harmon
d80a9fbb0c
Ignore paths which use shared clock lines.
...
Quartus calculates fmax (the theoretical maximum clock rate) based on
the entirety of the logic between registers. In the case of the pclk_*
lines, this includes some invalid paths which cross between the
3x <-> 2x and 5x <-> 4x clock domains. This is because these clocks
share output pins from the PLL, but the PLL is configured to output only
one of these clocks at a time, and the correct output from the logic is
selected via a multiplexer. Therefore these paths cannot co-occur.
This has the effect of increasing the calculated fmax of these paths to:
pclk_3x: 107.98 MHz -> 132.52 MHz
pclk_5x: 162.23 MHz -> 170.33 MHz
2020-06-01 00:31:44 +00:00
marqs
b1892079d8
select 576p / 800x600 preset based on refresh rate
2020-04-28 22:31:57 +03:00
marqs
2319a6f8bd
misc tool updates
2020-04-28 18:48:35 +03:00
marqs85
4dab90a651
Merge pull request #38 from MichelsonChapman/release
...
Update lcd.c
2020-04-08 22:58:12 +03:00
marqs85
3c9ed1edf8
Merge pull request #43 from eatnumber1/release
...
Increase max V. Backporch value from 63 to 236
2020-04-08 22:56:14 +03:00
Russell Harmon
bab85e713b
Increase max V. Backporch value from 63 to 236
...
This change allows highly letterboxed content (e.g. the PSP's 480x272
picture in a 720x480 frame) to be "zoomed" to a full screen picture by
treating the letterbox as horizontal and vertical backporch.
Co-authored-by: Chris Lockfort <clockfort@gmail.com>
2020-04-07 12:51:36 -07:00
marqs
0c55cc03bb
use LEDs for debug in latency tester mode
2020-02-09 21:35:50 +02:00
marqs
a076c6d2db
update quartus to 19.1
2020-02-09 21:28:24 +02:00
marqs
8006cad1f2
Analog frontend updates
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* add Clamp/ALC offset option
* add ALC V+H filter options
* add Analog STC LPF option
* update AV3 alternative RGB compatibility option
2020-02-09 20:21:53 +02:00
marqs
aa1e9eb60c
tvp7002 related updates
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* fix clock selection function implementation
* add support for ALC filter configuration
* add coarse clamp LPF selection
* add support for clamp/ALC offset
2020-02-09 20:13:33 +02:00
MichelsonChapman
28d9e40c2f
Update lcd.c
...
Mod: Additional delay for copycat lcd module
2019-11-14 04:03:06 +08:00
marqs
286c9a94d1
add Kana set to character ROM
2019-10-27 20:16:48 +02:00
marqs
aeb164dd2f
increase OSD width in line4x and 5x modes
2019-10-15 20:18:44 +03:00
marqs
70dc68d504
fix dataram size setting
2019-10-12 22:59:04 +03:00
marqs
85c295c5e2
make pll_reconfig more robust
2019-10-12 22:56:10 +03:00
marqs
8e7236dc00
timing optimizations
2019-10-10 01:00:48 +03:00
borti4938
b8c80c7425
put a small border around OSD text area
2019-10-10 00:00:37 +03:00
marqs
9feb96888b
fix PLL reference clock switchover logic
2019-10-09 23:58:55 +03:00
marqs
3771d5cb14
fix OSD size in certain modes
2019-10-08 01:08:18 +03:00
marqs
ba4614a4f8
correct even/odd field naming
2019-10-08 01:07:25 +03:00
marqs
b22365af20
add timeout to pll_reconfig and update postprocess pipeline diagram
2019-10-07 23:20:44 +03:00
marqs
3a12592c53
fix linebuf read address timing bottleneck
2019-10-07 01:25:33 +03:00
marqs
9d496383c3
optimize clock network
...
* replace all clock muxes with a single cycloneive_clkctrl to minimize skew
* use a single dynamically configured PLL to comply with cycloneive_clkctrl
2019-10-06 23:54:32 +03:00
marqs
d1fd30019f
osd_generator: add M9K support to allow larger character array
2019-10-05 11:33:59 +03:00
marqs
a6bdd8cfab
free up 1 M9K by modifying altera_jtag_avalon_master
2019-10-03 23:47:59 +03:00
marqs
6266976114
first OSD implementation
2019-10-03 02:03:43 +03:00
marqs
aa43991534
add mask color option
2019-09-30 19:31:05 +03:00
marqs
c7fc62c038
use symlinks for SW IP BSP files
2019-09-30 18:56:27 +03:00
marqs
077ce8afdc
update fitter seed to more optimal value
2019-09-28 12:16:32 +03:00
marqs
1d7f512172
add 384x240 optimized mode
2019-08-30 00:29:30 +03:00
marqs
52e8493873
fix audio infoframe content to comply with HDMI spec
2019-08-24 10:54:13 +03:00
marqs
0fc1a4707b
update 400p preset parameters
2019-08-04 23:39:22 +03:00
marqs
4a686da462
improve 400p support
...
* 400p in sampler option
* 1600x400 preset for line3x
2019-08-03 01:29:24 +03:00
marqs
df07eece10
add default HDMI VIC compatibility option
2019-07-29 21:26:28 +03:00
marqs
b24e6c6366
remote hotkey and display improvements
...
* fix direct sampling phase adjustment while in sampling menu
* wrap around sampling phase value in menu
* always display full samplerate value in menu
* enable direct loading of profile 10 and higher
2019-07-29 20:58:26 +03:00
marqs
5e0277fb48
add Panasonic hack for improving line count tolerance with line2x
2019-07-01 19:15:57 +03:00
marqs
1ba8d68aab
set HDMI AVI Infoframe VIC in passthru modes
...
The change should fix interlace compatibility with some Denon AV receivers.
2019-07-01 01:24:18 +03:00
marqs
5d39e2b752
add compatibility option for AV3 to use AV1 RGB (and audio)
2019-06-25 23:22:41 +03:00
marqs
d4696271c9
make initconfig and profile versions independent of fw version
2019-06-25 20:02:10 +03:00
marqs
f0a14679d9
make H. samplerate fine-tuning more intuitive
2019-06-25 00:23:45 +03:00
marqs
550e57a22b
Merge branch 'paulb-nl-samplerate' into release
2019-06-02 22:44:17 +03:00
paulb-nl
96d33a12b5
Add fine-tune of samplerate for optimized modes
2019-05-31 11:52:44 +02:00
marqs
3d49b74667
add auto YPbPr CSC option
2019-05-11 13:51:29 +03:00
marqs
125814225f
make sampling phase mode-specific
2019-05-08 00:05:16 +03:00
marqs
9e81fb5922
Scanline updates and fixes
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* Enable overlay pattern customization
* Fix non-alternating mode with line4x interlace sources
* Add alternate interval option for pre-linedoubled sources
2019-03-23 00:09:46 +02:00
marqs
f561f4586e
enable 35MHz video LPF for 720p & 1080i in auto mode
2019-03-16 01:20:16 +02:00
marqs
2bac00fd82
TX improvements
...
* tweak audio parameters
* set AFE level based on PCLK
2019-01-11 00:26:40 +02:00
marqs
687905780e
fix profile load not reading all data
2018-11-24 16:19:46 +02:00
marqs
4c1b211641
Merge branch 'rv-integration' into release
2018-11-14 19:06:59 +02:00
marqs
9533428a92
restore profile import notification
2018-11-07 23:39:25 +02:00
