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https://github.com/marqs85/ossc
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246 lines
8.2 KiB
C
246 lines
8.2 KiB
C
#ifndef __ALT_IRQ_H__
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#define __ALT_IRQ_H__
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/******************************************************************************
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* *
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* License Agreement *
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* *
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* Copyright (c) 2009 Altera Corporation, San Jose, California, USA. *
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* All rights reserved. *
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* *
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* Permission is hereby granted, free of charge, to any person obtaining a *
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* copy of this software and associated documentation files (the "Software"), *
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* to deal in the Software without restriction, including without limitation *
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* the rights to use, copy, modify, merge, publish, distribute, sublicense, *
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* and/or sell copies of the Software, and to permit persons to whom the *
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* Software is furnished to do so, subject to the following conditions: *
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* *
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* The above copyright notice and this permission notice shall be included in *
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* all copies or substantial portions of the Software. *
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* *
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR *
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, *
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER *
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING *
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER *
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* DEALINGS IN THE SOFTWARE. *
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* *
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* This agreement shall be governed in all respects by the laws of the State *
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* of California and by the laws of the United States of America. *
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* *
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******************************************************************************/
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/*
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* alt_irq.h is the Nios II specific implementation of the interrupt controller
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* interface.
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*
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* Nios II includes optional support for an external interrupt controller.
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* When an external controller is present, the "Enhanced" interrupt API
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* must be used to manage individual interrupts. The enhanced API also
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* supports the processor's internal interrupt controller. Certain API
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* members are accessible from either the "legacy" or "enhanced" interrpt
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* API.
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*
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* Regardless of which API is in use, this file should be included by
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* application code and device drivers that register ISRs or manage interrpts.
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*/
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#include <errno.h>
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#include "nios2.h"
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#include "alt_types.h"
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#include "system.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif /* __cplusplus */
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/*
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* Macros used by alt_irq_enabled
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*/
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#define ALT_IRQ_ENABLED 1
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#define ALT_IRQ_DISABLED 0
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/*
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* Number of available interrupts in internal interrupt controller.
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*/
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#define ALT_NIRQ NIOS2_NIRQ
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/*
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* Used by alt_irq_disable_all() and alt_irq_enable_all().
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*/
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typedef int alt_irq_context;
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/* ISR Prototype */
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#ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT
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typedef void (*alt_isr_func)(void* isr_context);
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#else
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typedef void (*alt_isr_func)(void* isr_context, alt_u32 id);
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#endif
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/*
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* The following protypes and routines are supported by both
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* the enhanced and legacy interrupt APIs
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*/
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/*
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* alt_irq_enabled can be called to determine if the processor's global
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* interrupt enable is asserted. The return value is zero if interrupts
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* are disabled, and non-zero otherwise.
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*
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* Whether the internal or external interrupt controller is present,
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* individual interrupts may still be disabled. Use the other API to query
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* a specific interrupt.
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*/
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static ALT_INLINE int ALT_ALWAYS_INLINE alt_irq_enabled (void)
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{
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int status;
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NIOS2_READ_STATUS (status);
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return status & NIOS2_STATUS_PIE_MSK;
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}
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/*
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* alt_irq_disable_all()
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*
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* This routine inhibits all interrupts by negating the status register PIE
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* bit. It returns the previous contents of the CPU status register (IRQ
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* context) which can be used to restore the status register PIE bit to its
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* state before this routine was called.
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*/
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static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE
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alt_irq_disable_all (void)
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{
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alt_irq_context context;
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NIOS2_READ_STATUS (context);
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NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK);
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return context;
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}
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/*
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* alt_irq_enable_all()
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*
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* Enable all interrupts that were previously disabled by alt_irq_disable_all()
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*
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* This routine accepts a context to restore the CPU status register PIE bit
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* to the state prior to a call to alt_irq_disable_all().
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* In the case of nested calls to alt_irq_disable_all()/alt_irq_enable_all(),
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* this means that alt_irq_enable_all() does not necessarily re-enable
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* interrupts.
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*
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* This routine will perform a read-modify-write sequence to restore only
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* status.PIE if the processor is configured with options that add additional
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* writeable status register bits. These include the MMU, MPU, the enhanced
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* interrupt controller port, and shadow registers. Otherwise, as a performance
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* enhancement, status is overwritten with the prior context.
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*/
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static ALT_INLINE void ALT_ALWAYS_INLINE
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alt_irq_enable_all (alt_irq_context context)
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{
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#if (NIOS2_NUM_OF_SHADOW_REG_SETS > 0) || (defined NIOS2_EIC_PRESENT) || \
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(defined NIOS2_MMU_PRESENT) || (defined NIOS2_MPU_PRESENT)
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alt_irq_context status;
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NIOS2_READ_STATUS (status);
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status &= ~NIOS2_STATUS_PIE_MSK;
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status |= (context & NIOS2_STATUS_PIE_MSK);
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NIOS2_WRITE_STATUS (status);
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#else
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NIOS2_WRITE_STATUS (context);
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#endif
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}
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/*
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* The function alt_irq_init() is defined within the auto-generated file
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* alt_sys_init.c. This function calls the initilization macros for all
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* interrupt controllers in the system at config time, before any other
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* non-interrupt controller driver is initialized.
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*
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* The "base" parameter is ignored and only present for backwards-compatibility.
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* It is recommended that NULL is passed in for the "base" parameter.
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*/
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extern void alt_irq_init (const void* base);
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/*
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* alt_irq_cpu_enable_interrupts() enables the CPU to start taking interrupts.
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*/
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static ALT_INLINE void ALT_ALWAYS_INLINE
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alt_irq_cpu_enable_interrupts (void)
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{
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NIOS2_WRITE_STATUS(NIOS2_STATUS_PIE_MSK
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#if defined(NIOS2_EIC_PRESENT) && (NIOS2_NUM_OF_SHADOW_REG_SETS > 0)
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| NIOS2_STATUS_RSIE_MSK
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#endif
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);
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}
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/*
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* Prototypes for the enhanced interrupt API.
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*/
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#ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT
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/*
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* alt_ic_isr_register() can be used to register an interrupt handler. If the
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* function is succesful, then the requested interrupt will be enabled upon
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* return.
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*/
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extern int alt_ic_isr_register(alt_u32 ic_id,
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alt_u32 irq,
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alt_isr_func isr,
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void *isr_context,
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void *flags);
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/*
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* alt_ic_irq_enable() and alt_ic_irq_disable() enable/disable a specific
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* interrupt by using IRQ port and interrupt controller instance.
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*/
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int alt_ic_irq_enable (alt_u32 ic_id, alt_u32 irq);
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int alt_ic_irq_disable(alt_u32 ic_id, alt_u32 irq);
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/*
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* alt_ic_irq_enabled() indicates whether a specific interrupt, as
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* specified by IRQ port and interrupt controller instance is enabled.
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*/
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alt_u32 alt_ic_irq_enabled(alt_u32 ic_id, alt_u32 irq);
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#else
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/*
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* Prototypes for the legacy interrupt API.
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*/
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#include "priv/alt_legacy_irq.h"
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#endif
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/*
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* alt_irq_pending() returns a bit list of the current pending interrupts.
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* This is used by alt_irq_handler() to determine which registered interrupt
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* handlers should be called.
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*
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* This routine is only available for the Nios II internal interrupt
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* controller.
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*/
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#ifndef NIOS2_EIC_PRESENT
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static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_irq_pending (void)
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{
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alt_u32 active;
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NIOS2_READ_IPENDING (active);
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return active;
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}
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#endif
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* __ALT_IRQ_H__ */
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