mirror of
https://github.com/marqs85/ossc
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129 lines
3.5 KiB
C
129 lines
3.5 KiB
C
//
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// Copyright (C) 2015-2019 Markus Hiienkari <mhiienka@niksula.hut.fi>
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//
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// This file is part of Open Source Scan Converter project.
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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#ifndef AV_CONTROLLER_H_
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#define AV_CONTROLLER_H_
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#include "avconfig.h"
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#include "sysconfig.h"
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#include "sc_config_regs.h"
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#include "osd_generator_regs.h"
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#include "pll_reconfig_regs.h"
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// sys_ctrl bits
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#define VSYNC_I_TYPE (1<<18)
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#define LT_ACTIVE (1<<15)
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#define LT_ARMED (1<<14)
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#define LT_MODE_OFFS 12
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#define REMOTE_EVENT (1<<8)
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#define SD_SPI_SS_N (1<<7)
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#define LCD_CS_N (1<<6)
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#define LCD_RS (1<<5)
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#define LCD_BL (1<<4)
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#define LCD_BL_TIMEOUT_OFFS 2
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#define VIDGEN_OFF (1<<1)
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#define AV_RESET_N (1<<0)
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#define LT_CTRL_MASK 0xf000
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// HDMI_TX definitions
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#define HDMITX_MODE_MASK 0x00040000
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#define PLL_ACTIVECLK_MASK 0x00080000
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#define TX_PIXELREP_DISABLE 0
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#define TX_PIXELREP_2X 1
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#define TX_PIXELREP_4X 3
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// FPGA macros
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#define FPGA_V_MULTMODE_1X 0
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#define FPGA_V_MULTMODE_2X 1
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#define FPGA_V_MULTMODE_3X 2
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#define FPGA_V_MULTMODE_4X 3
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#define FPGA_V_MULTMODE_5X 4
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#define FPGA_H_MULTMODE_FULLWIDTH 0
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#define FPGA_H_MULTMODE_ASPECTFIX 1
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#define FPGA_H_MULTMODE_OPTIMIZED 2
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#define FPGA_H_MULTMODE_OPTIMIZED_1X 3
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#define AUTO_OFF 0
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#define AUTO_CURRENT_INPUT 1
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#define AUTO_MAX_COUNT 100
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#define AUTO_CURRENT_MAX_COUNT 6
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#define PLL_CONFIG_VG 0
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#define PLL_CONFIG_2X_5X 1
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#define PLL_CONFIG_3X_4X 2
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// In reverse order of importance
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typedef enum {
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NO_CHANGE = 0,
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SC_CONFIG_CHANGE = 1,
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MODE_CHANGE = 2,
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TX_MODE_CHANGE = 3,
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ACTIVITY_CHANGE = 4
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} status_t;
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typedef enum {
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TX_HDMI_RGB = 0,
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TX_HDMI_YCBCR444 = 1,
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TX_DVI = 2
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} tx_mode_t;
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typedef struct {
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alt_u32 data[5];
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} pll_config_t;
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//TODO: transform binary values into flags
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typedef struct {
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alt_u32 totlines;
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alt_u32 pcnt_frame;
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alt_u32 clkcnt;
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alt_u8 progressive;
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alt_u8 macrovis;
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alt_8 id;
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alt_u8 sync_active;
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alt_u8 fpga_vmultmode;
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alt_u8 fpga_hmultmode;
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alt_u8 tx_pixelrep;
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alt_u8 hdmitx_pixr_ifr;
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alt_u8 hdmitx_pclk_level;
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HDMI_Video_Type hdmitx_vic;
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alt_u8 sample_mult;
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alt_u8 sample_sel;
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alt_u8 hsync_cut;
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alt_u16 h_mult_total;
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mode_flags target_lm;
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avinput_t avinput;
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alt_u8 pll_config;
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// Current configuration
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avconfig_t cc;
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} avmode_t;
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void ui_disp_menu(alt_u8 osd_mode);
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void ui_disp_status(alt_u8 refresh_osd_timer);
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int load_profile();
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int save_profile();
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int latency_test();
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#endif
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