Files
ossc/software/sys_controller/tvp7002
marqs db1cf5922f tvp7002 related robustness improvements
* bypass VSYNC processing
* enable raw SOG/HSYNC output
* add frontend RTL to read status from unprocessed signals
2023-01-31 20:49:08 +02:00
..
2016-03-27 23:09:31 +03:00
2020-08-13 21:32:26 +03:00