RomanRom2/ossc
1
0 Fork 0
mirror of https://github.com/marqs85/ossc synced 2026-10-31 12:17:17 +03:00
Code Issues Actions Packages Projects Releases Wiki Activity
Files
a4884220897ba44f49c901469f324c44821b1e00
ossc/software/sys_controller/mem_init
T
History
marqs a488422089 * Fix scanline rendering issues 
* Add initial input and SDTV sync glitch filter settings
* Modify input initialization logic
* Fix debug build warnings
2016-08-14 18:57:50 +03:00
..
epcq_controller_0.hex
Initial public release (FW 0.64)
2016-02-23 01:03:50 +02:00
meminit.qip
Initial public release (FW 0.64)
2016-02-23 01:03:50 +02:00
meminit.spd
Initial public release (FW 0.64)
2016-02-23 01:03:50 +02:00
sys_onchip_memory2_0.hex
* Fix scanline rendering issues
2016-08-14 18:57:50 +03:00