marqs e3d055db27 fix occasional line synchronization issue

2023-05-29 21:43:29 +03:00

..

char_array.qip

update to Quartus 21.1

2022-12-27 14:59:47 +02:00

char_array.v

update to Quartus 21.1

2022-12-27 14:59:47 +02:00

char_rom.qip

update to Quartus 21.1

2022-12-27 14:59:47 +02:00

char_rom.v

update to Quartus 21.1

2022-12-27 14:59:47 +02:00

ir_rcv.v

Improve IR receiver tolerance

2017-01-28 03:37:29 +02:00

lat_tester_includes.v

Scanline updates and fixes

2019-03-23 00:09:46 +02:00

lat_tester.v

use LEDs for debug in latency tester mode

2020-02-09 21:35:50 +02:00

linebuf_top.v

integrate RTL from ossc_pro project

2023-02-28 19:39:59 +02:00

linebuf.qip

update project configuration and IP files

2023-02-13 18:55:14 +02:00

linebuf.v

update project configuration and IP files

2023-02-13 18:55:14 +02:00

lpm_mult_4_hybr_ref_pre.qip

update to Quartus 21.1

2022-12-27 14:59:47 +02:00

lpm_mult_4_hybr_ref_pre.v

update to Quartus 21.1

2022-12-27 14:59:47 +02:00

lpm_mult_4_hybr_ref.qip

update to Quartus 21.1

2022-12-27 14:59:47 +02:00

lpm_mult_4_hybr_ref.v

update to Quartus 21.1

2022-12-27 14:59:47 +02:00

lpm_mult_4_sl.qip

update to Quartus 21.1

2022-12-27 14:59:47 +02:00

lpm_mult_4_sl.v

update to Quartus 21.1

2022-12-27 14:59:47 +02:00

ossc.v

calculate hsync width on FPGA instead of reading TVP7002

2023-05-28 17:06:07 +03:00

pll_2x.ppf

update project configuration and IP files

2023-02-13 18:55:14 +02:00

pll_2x.qip

update project configuration and IP files

2023-02-13 18:55:14 +02:00

pll_2x.v

update project configuration and IP files

2023-02-13 18:55:14 +02:00

pll_config_2x_5x_data.mif

optimize clock network

2019-10-06 23:54:32 +03:00

pll_config_3x_4x_data.mif

optimize clock network

2019-10-06 23:54:32 +03:00

pll_config_default_data.mif

fix PLL reference clock switchover logic

2019-10-09 23:58:55 +03:00

scanconverter.v

fix occasional line synchronization issue

2023-05-29 21:43:29 +03:00

timescale.v

Initial public release (FW 0.64)

2016-02-23 01:03:50 +02:00

tvp7002_frontend.v

calculate hsync width on FPGA instead of reading TVP7002

2023-05-28 17:06:07 +03:00

videogen.v

fix linebuf read address timing bottleneck

2019-10-07 01:25:33 +03:00