mirror of
https://github.com/marqs85/ossc_pcb
synced 2025-04-19 11:29:56 +03:00
initial updates for pcb v1.8
* update to new Kicad version * update schematic with SOGOUT connection * clean up layout
This commit is contained in:
marqs
parent
ee4e84720d
commit
d90b47afa0
@ -1,38 +1,43 @@
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|||||||
(module 3xRCA_CONN (layer F.Cu) (tedit 569D725E)
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(footprint "3xRCA_CONN" (version 20211014) (generator pcbnew)
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||||||
(fp_text reference REF** (at 22.71522 -3.5814 90) (layer F.SilkS)
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(layer "F.Cu")
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||||||
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(tedit 569D725E)
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||||||
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(attr through_hole)
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(fp_text reference "REF**" (at 22.71522 -3.5814 90) (layer "F.SilkS")
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||||||
(effects (font (size 1 1) (thickness 0.15)))
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 76f3a130-9575-46d1-801e-6fad11488cb5)
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)
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)
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(fp_text value VAL** (at 6.51002 0.6096) (layer F.Fab)
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(fp_text value "VAL**" (at 6.51002 0.6096) (layer "F.Fab")
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||||||
(effects (font (size 1 1) (thickness 0.15)))
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 8271f392-e2c8-4fab-a8fb-4403663f297f)
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)
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)
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(fp_line (start 9.80186 3.98272) (end 11.2141 2.2225) (layer F.SilkS) (width 0.15))
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(fp_line (start 9.8 3.99288) (end 9.8 2.1717) (layer "F.SilkS") (width 0.15) (tstamp 13f4fa3c-442b-4773-93ec-53987222b3b5))
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(fp_line (start 9.82472 2.19964) (end 11.2141 3.937) (layer F.SilkS) (width 0.15))
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(fp_line (start 9.82472 2.19964) (end 11.2141 3.937) (layer "F.SilkS") (width 0.15) (tstamp 17c37129-3e0e-4b88-8838-b1711334c610))
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||||||
(fp_line (start -11.25474 3.97002) (end -9.83488 2.20218) (layer F.SilkS) (width 0.15))
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(fp_line (start -11.25474 3.97002) (end -9.83488 2.20218) (layer "F.SilkS") (width 0.15) (tstamp 17c81ce1-d760-4153-a207-c370d63f0e72))
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(fp_line (start -11.24966 2.17678) (end -9.82726 3.94716) (layer F.SilkS) (width 0.15))
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(fp_line (start 11.25 2.1717) (end 11.25 3.97764) (layer "F.SilkS") (width 0.15) (tstamp 280dc8f1-b6d8-4bb6-9a86-b6336887d76e))
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(fp_line (start -9.82726 3.94716) (end -9.82218 3.95986) (layer F.SilkS) (width 0.15))
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(fp_line (start -9.82726 3.94716) (end -9.82218 3.95986) (layer "F.SilkS") (width 0.15) (tstamp 2ba4ca26-f8e1-4f8c-86a7-68726cc7b129))
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(fp_line (start 11.25 2.1717) (end 11.25 3.97764) (layer F.SilkS) (width 0.15))
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(fp_line (start -11.25 3.99288) (end -11.25 2.1717) (layer "F.SilkS") (width 0.15) (tstamp 3fbb9273-a8c9-49e0-be88-2c8cd306a895))
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(fp_line (start 9.8 2.1717) (end 11.25 2.1717) (layer F.SilkS) (width 0.15))
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(fp_line (start -20 4) (end -20 -6) (layer "F.SilkS") (width 0.15) (tstamp 551da54a-9be9-46ce-b775-7e6111221a6a))
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(fp_line (start 9.8 3.99288) (end 9.8 2.1717) (layer F.SilkS) (width 0.15))
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(fp_line (start 20 -6) (end 20 4) (layer "F.SilkS") (width 0.15) (tstamp 8eb03741-10d9-4783-99e8-aa495172a4f1))
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(fp_line (start -11.25 3.99288) (end -11.25 2.1717) (layer F.SilkS) (width 0.15))
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(fp_line (start -20 4) (end 20 4) (layer "F.SilkS") (width 0.15) (tstamp b0410a94-bd42-4461-a8a5-b0e2b0beea7b))
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(fp_line (start -11.25 2.1717) (end -9.8 2.1717) (layer F.SilkS) (width 0.15))
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(fp_line (start 9.8 2.1717) (end 11.25 2.1717) (layer "F.SilkS") (width 0.15) (tstamp b575da8b-240b-48a5-a0a6-eee256ac3567))
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(fp_line (start -9.8 2.1717) (end -9.8 3.97764) (layer F.SilkS) (width 0.15))
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(fp_line (start -9.8 2.1717) (end -9.8 3.97764) (layer "F.SilkS") (width 0.15) (tstamp b7bcf13e-1ba7-4e30-9842-11c481569d87))
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(fp_line (start -20 4) (end -20 -6) (layer F.SilkS) (width 0.15))
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(fp_line (start -20 -6) (end 20 -6) (layer "F.SilkS") (width 0.15) (tstamp c6434318-f220-446a-8c26-5a4fd5ddee6d))
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(fp_line (start -20 -6) (end 20 -6) (layer F.SilkS) (width 0.15))
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(fp_line (start 9.80186 3.98272) (end 11.2141 2.2225) (layer "F.SilkS") (width 0.15) (tstamp d8d21ac6-c218-4e6d-91d9-509a60d59075))
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(fp_line (start 20 -6) (end 20 4) (layer F.SilkS) (width 0.15))
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(fp_line (start -11.24966 2.17678) (end -9.82726 3.94716) (layer "F.SilkS") (width 0.15) (tstamp e163d5a3-642c-44aa-b62d-c32878ea585d))
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(fp_line (start -20 4) (end 20 4) (layer F.SilkS) (width 0.15))
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(fp_line (start -11.25 2.1717) (end -9.8 2.1717) (layer "F.SilkS") (width 0.15) (tstamp fb6b98ee-0bf8-41fe-85b1-2c8cb59ead70))
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(pad "" thru_hole circle (at 7.5 -4.2) (size 2 2) (drill 2) (layers *.Cu *.Mask F.SilkS))
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(pad "" np_thru_hole oval (at -19.8 0) (size 2.5 2.5) (drill 2.5) (layers F&B.Cu *.Mask) (tstamp 0b449ede-4553-42c9-bad2-860c5a7201c6))
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(pad "" thru_hole circle (at -7.5 -4.2) (size 2 2) (drill 2) (layers *.Cu *.Mask F.SilkS))
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(pad "" np_thru_hole oval (at 19.8 0) (size 2.5 2.5) (drill 2.5) (layers F&B.Cu *.Mask) (tstamp 94a0946c-ec59-49fd-b538-e3a9b369a38a))
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(pad "" thru_hole circle (at -10.53338 3.14452) (size 2.3 2.3) (drill 2.3) (layers *.Cu *.Mask F.SilkS))
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(pad "" np_thru_hole circle (at -7.5 -4.2) (size 2 2) (drill 2) (layers F&B.Cu *.Mask) (tstamp 98056103-ed88-479f-af3a-7e1e733d0ec4))
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(pad "" thru_hole circle (at 10.53338 3.14452) (size 2.3 2.3) (drill 2.3) (layers *.Cu *.Mask F.SilkS))
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(pad "" np_thru_hole circle (at 10.53338 3.14452) (size 2.3 2.3) (drill 2.3) (layers F&B.Cu *.Mask) (tstamp bfcdb330-b98a-4fde-8edf-62a955e7017d))
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(pad 2 thru_hole circle (at 11.25 -4.5) (size 4.2 4.2) (drill oval 1.2 3) (layers *.Cu *.Mask F.SilkS))
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(pad "" np_thru_hole circle (at 7.5 -4.2) (size 2 2) (drill 2) (layers F&B.Cu *.Mask) (tstamp d859a18b-dabc-4ab0-a717-94cc07eecd66))
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(pad 2 thru_hole circle (at 18.75 -4.5) (size 4.2 4.2) (drill oval 1.2 3) (layers *.Cu *.Mask F.SilkS))
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(pad "" np_thru_hole circle (at -10.53338 3.14452) (size 2.3 2.3) (drill 2.3) (layers F&B.Cu *.Mask) (tstamp d9797270-8bba-4a75-b8cd-5bac71eef533))
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(pad 3 thru_hole circle (at -18.75 -4.5) (size 4.2 4.2) (drill oval 1.2 3) (layers *.Cu *.Mask F.SilkS))
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(pad "1" thru_hole circle (at 3.75 -4.5) (size 4.2 4.2) (drill oval 1.2 3) (layers *.Cu *.Mask "F.SilkS") (tstamp 3c906000-7275-48b4-a7b2-ded03aa8c40c))
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(pad 3 thru_hole circle (at -11.25 -4.5) (size 4.2 4.2) (drill oval 1.2 3) (layers *.Cu *.Mask F.SilkS))
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(pad "1" thru_hole circle (at -3.75 -4.5) (size 4.2 4.2) (drill oval 1.2 3) (layers *.Cu *.Mask "F.SilkS") (tstamp ffca8ac2-55a0-4a0b-bc29-15f37c31f282))
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(pad 4 thru_hole circle (at -15 0) (size 4 4) (drill oval 2.82 1.2) (layers *.Cu *.Mask F.SilkS))
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(pad "2" thru_hole circle (at 18.75 -4.5) (size 4.2 4.2) (drill oval 1.2 3) (layers *.Cu *.Mask "F.SilkS") (tstamp 0bf1b80c-05d3-4863-84a9-c8433054bdc1))
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(pad 4 thru_hole circle (at 0 0) (size 4 4) (drill oval 2.82 1.2) (layers *.Cu *.Mask F.SilkS))
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(pad "2" thru_hole circle (at 11.25 -4.5) (size 4.2 4.2) (drill oval 1.2 3) (layers *.Cu *.Mask "F.SilkS") (tstamp 67a9c4e9-a219-4612-995e-79c7b52f0b19))
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(pad 4 thru_hole circle (at 15 0) (size 4 4) (drill oval 2.82 1.2) (layers *.Cu *.Mask F.SilkS))
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(pad "3" thru_hole circle (at -11.25 -4.5) (size 4.2 4.2) (drill oval 1.2 3) (layers *.Cu *.Mask "F.SilkS") (tstamp 55a67de0-b73b-4900-8188-02cf9e1c02e9))
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(pad "" thru_hole oval (at 19.8 0) (size 2.5 2.5) (drill 2.5) (layers *.Cu *.Mask F.SilkS))
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(pad "3" thru_hole circle (at -18.75 -4.5) (size 4.2 4.2) (drill oval 1.2 3) (layers *.Cu *.Mask "F.SilkS") (tstamp 6fe67145-fca6-466d-8652-83636a6e6557))
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(pad "" thru_hole oval (at -19.8 0) (size 2.5 2.5) (drill 2.5) (layers *.Cu *.Mask F.SilkS))
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(pad "4" thru_hole circle (at 15 0) (size 4 4) (drill oval 2.82 1.2) (layers *.Cu *.Mask "F.SilkS") (tstamp 1ad808c3-877b-4cdc-bbbb-b014c7fe1fa1))
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(pad 1 thru_hole circle (at 3.75 -4.5) (size 4.2 4.2) (drill oval 1.2 3) (layers *.Cu *.Mask F.SilkS))
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(pad "4" thru_hole circle (at 0 0) (size 4 4) (drill oval 2.82 1.2) (layers *.Cu *.Mask "F.SilkS") (tstamp 37a04771-382b-4441-90fc-8c1e4c1b6011))
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(pad 1 thru_hole circle (at -3.75 -4.5) (size 4.2 4.2) (drill oval 1.2 3) (layers *.Cu *.Mask F.SilkS))
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(pad "4" thru_hole circle (at -15 0) (size 4 4) (drill oval 2.82 1.2) (layers *.Cu *.Mask "F.SilkS") (tstamp a3e17ff8-07e9-459d-a235-cf3bcd45904e))
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)
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)
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@ -1,23 +1,28 @@
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(module SW_PUSH-SKHCBFA010 (layer F.Cu) (tedit 56950D65)
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(footprint "SW_PUSH-SKHCBFA010" (version 20211014) (generator pcbnew)
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(fp_text reference REF** (at 0 -0.762) (layer F.SilkS)
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(layer "F.Cu")
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(tedit 56950D65)
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(attr through_hole)
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(fp_text reference "REF**" (at 0 -0.762) (layer "F.SilkS")
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(effects (font (size 1 1) (thickness 0.15)))
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 02627333-89d7-4e6c-ba7e-3771cf507a35)
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)
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)
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(fp_text value SW_PUSH-12mm (at 0 1.016) (layer F.Fab)
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(fp_text value "SW_PUSH-12mm" (at 0 1.016) (layer "F.Fab")
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(effects (font (size 1 1) (thickness 0.15)))
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 3806c6b9-f83f-4010-9651-519e05aa80a9)
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)
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)
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(fp_circle (center 0 0) (end 3.81 2.54) (layer F.SilkS) (width 0.15))
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(fp_line (start 6 -6) (end 6 6) (layer "F.SilkS") (width 0.15) (tstamp 24e3a9ca-b30a-4aa0-8032-4553efbfa668))
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(fp_line (start -6 -6) (end 6 -6) (layer F.SilkS) (width 0.15))
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(fp_line (start -6 -6) (end 6 -6) (layer "F.SilkS") (width 0.15) (tstamp 74e7b4d7-8372-4a9d-a335-53090d4eb47d))
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(fp_line (start 6 -6) (end 6 6) (layer F.SilkS) (width 0.15))
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(fp_line (start 6 6) (end -6 6) (layer "F.SilkS") (width 0.15) (tstamp 75e243c4-5fe9-4b4d-aacf-ed3769c9cdd4))
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(fp_line (start 6 6) (end -6 6) (layer F.SilkS) (width 0.15))
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(fp_line (start -6 6) (end -6 -6) (layer "F.SilkS") (width 0.15) (tstamp fe4ca1f3-7589-4c29-8c76-0c064a99abe3))
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(fp_line (start -6 6) (end -6 -6) (layer F.SilkS) (width 0.15))
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(fp_circle (center 0 0) (end 3.81 2.54) (layer "F.SilkS") (width 0.15) (fill none) (tstamp 33e1d61d-fa38-428e-8bfd-ef4704bfd632))
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(pad 1 thru_hole circle (at 6.25 -2.5) (size 2 2) (drill 1.2) (layers *.Cu *.Mask F.SilkS))
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(pad "" np_thru_hole circle (at 0 4.5) (size 1.7 1.7) (drill 1.7) (layers F&B.Cu *.Mask) (tstamp 297cfffa-b781-41bf-92f7-1b140371a881))
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(pad 2 thru_hole circle (at 6.25 2.5) (size 2 2) (drill 1.2) (layers *.Cu *.Mask F.SilkS))
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(pad "" np_thru_hole circle (at 0 -4.5) (size 1.7 1.7) (drill 1.7) (layers F&B.Cu *.Mask) (tstamp 3208e9ba-40e6-46a8-867a-5b9ac0b2a047))
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(pad 1 thru_hole circle (at -6.25 -2.5) (size 2 2) (drill 1.2) (layers *.Cu *.Mask F.SilkS))
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(pad "1" thru_hole circle (at -6.25 -2.5) (size 2 2) (drill 1.2) (layers *.Cu *.Mask "F.SilkS") (tstamp 57dee2fb-a54e-44b2-b19e-6c63c7cb5121))
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(pad 2 thru_hole circle (at -6.25 2.5) (size 2 2) (drill 1.2) (layers *.Cu *.Mask F.SilkS))
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(pad "1" thru_hole circle (at 6.25 -2.5) (size 2 2) (drill 1.2) (layers *.Cu *.Mask "F.SilkS") (tstamp db1b7ed2-7811-4698-b9f7-5ec3c933a0a9))
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(pad "" thru_hole circle (at 0 4.5) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask F.SilkS))
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(pad "2" thru_hole circle (at -6.25 2.5) (size 2 2) (drill 1.2) (layers *.Cu *.Mask "F.SilkS") (tstamp 2df221ef-e119-46e9-ba8c-1123eb937b6d))
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(pad "" thru_hole circle (at 0 -4.5) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask F.SilkS))
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(pad "2" thru_hole circle (at 6.25 2.5) (size 2 2) (drill 1.2) (layers *.Cu *.Mask "F.SilkS") (tstamp 604cde3f-4ce9-4191-94a1-8820c610a439))
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(model Buttons_Switches_ThroughHole.3dshapes/SW_PUSH-12mm.wrl
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(model "Buttons_Switches_ThroughHole.3dshapes/SW_PUSH-12mm.wrl"
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(at (xyz 0 0 0))
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(offset (xyz 0 0 0))
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(scale (xyz 4 4 4))
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(scale (xyz 4 4 4))
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(rotate (xyz 0 0 0))
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(rotate (xyz 0 0 0))
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)
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)
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BIN
doc/ossc_board.pdf
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BIN
doc/ossc_board.pdf
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fpga.kicad_sch
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fpga.kicad_sch
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hdmitx.kicad_sch
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hdmitx.kicad_sch
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hdmitx.sch
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hdmitx.sch
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ossc_board.kicad_pcb
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ossc_board.kicad_pcb
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77
ossc_board.kicad_prl
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ossc_board.kicad_prl
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@ -0,0 +1,77 @@
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{
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"board": {
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"active_layer": 31,
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"active_layer_preset": "",
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"auto_track_width": true,
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"hidden_nets": [],
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"high_contrast_mode": 0,
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"net_color_mode": 1,
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"opacity": {
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"pads": 1.0,
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"tracks": 1.0,
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"vias": 1.0,
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"zones": 0.6
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},
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"ratsnest_display_mode": 0,
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"selection_filter": {
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"dimensions": true,
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"footprints": true,
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"graphics": true,
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"keepouts": true,
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"lockedItems": true,
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"otherItems": true,
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"pads": true,
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"text": true,
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"tracks": true,
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"vias": true,
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"zones": true
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},
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"visible_items": [
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],
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"visible_layers": "fffff75_ffffffff",
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"zone_display_mode": 1
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},
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"meta": {
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"filename": "ossc_board.kicad_prl",
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"version": 3
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},
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"project": {
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"files": []
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}
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}
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578
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{
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"board": {
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"design_settings": {
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"defaults": {
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
},
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
"drill": 3.048,
|
||||||
|
"height": 4.064,
|
||||||
|
"width": 4.064
|
||||||
|
},
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
"silk_text_upright": false,
|
||||||
|
"zones": {
|
||||||
|
"45_degree_only": true,
|
||||||
|
"min_clearance": 0.16
|
||||||
|
}
|
||||||
|
},
|
||||||
|
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|
||||||
|
{
|
||||||
|
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|
||||||
|
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|
||||||
|
"width": 0.0
|
||||||
|
}
|
||||||
|
],
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
"version": 2
|
||||||
|
},
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
"extra_footprint": "warning",
|
||||||
|
"footprint_type_mismatch": "error",
|
||||||
|
"hole_clearance": "error",
|
||||||
|
"hole_near_hole": "error",
|
||||||
|
"invalid_outline": "error",
|
||||||
|
"item_on_disabled_layer": "error",
|
||||||
|
"items_not_allowed": "error",
|
||||||
|
"length_out_of_range": "error",
|
||||||
|
"malformed_courtyard": "error",
|
||||||
|
"microvia_drill_out_of_range": "error",
|
||||||
|
"missing_courtyard": "ignore",
|
||||||
|
"missing_footprint": "warning",
|
||||||
|
"net_conflict": "warning",
|
||||||
|
"npth_inside_courtyard": "ignore",
|
||||||
|
"padstack": "error",
|
||||||
|
"pth_inside_courtyard": "ignore",
|
||||||
|
"shorting_items": "error",
|
||||||
|
"silk_over_copper": "ignore",
|
||||||
|
"silk_overlap": "ignore",
|
||||||
|
"skew_out_of_range": "error",
|
||||||
|
"through_hole_pad_without_hole": "error",
|
||||||
|
"too_many_vias": "error",
|
||||||
|
"track_dangling": "warning",
|
||||||
|
"track_width": "error",
|
||||||
|
"tracks_crossing": "error",
|
||||||
|
"unconnected_items": "error",
|
||||||
|
"unresolved_variable": "error",
|
||||||
|
"via_dangling": "warning",
|
||||||
|
"zone_has_empty_net": "error",
|
||||||
|
"zones_intersect": "error"
|
||||||
|
},
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
"min_via_diameter": 0.6859999999999999,
|
||||||
|
"use_height_for_length_calcs": true
|
||||||
|
},
|
||||||
|
"track_widths": [
|
||||||
|
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|
||||||
|
0.2,
|
||||||
|
0.25,
|
||||||
|
0.3,
|
||||||
|
0.35,
|
||||||
|
0.4,
|
||||||
|
0.45,
|
||||||
|
0.5,
|
||||||
|
0.7,
|
||||||
|
1.0
|
||||||
|
],
|
||||||
|
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|
||||||
|
{
|
||||||
|
"diameter": 0.0,
|
||||||
|
"drill": 0.0
|
||||||
|
}
|
||||||
|
],
|
||||||
|
"zones_allow_external_fillets": false,
|
||||||
|
"zones_use_no_outline": true
|
||||||
|
},
|
||||||
|
"layer_presets": []
|
||||||
|
},
|
||||||
|
"boards": [],
|
||||||
|
"cvpcb": {
|
||||||
|
"equivalence_files": []
|
||||||
|
},
|
||||||
|
"erc": {
|
||||||
|
"erc_exclusions": [],
|
||||||
|
"meta": {
|
||||||
|
"version": 0
|
||||||
|
},
|
||||||
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||||||
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|
||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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0,
|
||||||
|
0,
|
||||||
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2
|
||||||
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|
||||||
|
[
|
||||||
|
0,
|
||||||
|
2,
|
||||||
|
1,
|
||||||
|
1,
|
||||||
|
0,
|
||||||
|
0,
|
||||||
|
1,
|
||||||
|
0,
|
||||||
|
2,
|
||||||
|
0,
|
||||||
|
0,
|
||||||
|
2
|
||||||
|
],
|
||||||
|
[
|
||||||
|
2,
|
||||||
|
2,
|
||||||
|
2,
|
||||||
|
2,
|
||||||
|
2,
|
||||||
|
2,
|
||||||
|
2,
|
||||||
|
2,
|
||||||
|
2,
|
||||||
|
2,
|
||||||
|
2,
|
||||||
|
2
|
||||||
|
]
|
||||||
|
],
|
||||||
|
"rule_severities": {
|
||||||
|
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|
||||||
|
"bus_entry_needed": "error",
|
||||||
|
"bus_label_syntax": "error",
|
||||||
|
"bus_to_bus_conflict": "error",
|
||||||
|
"bus_to_net_conflict": "error",
|
||||||
|
"different_unit_footprint": "error",
|
||||||
|
"different_unit_net": "error",
|
||||||
|
"duplicate_reference": "error",
|
||||||
|
"duplicate_sheet_names": "error",
|
||||||
|
"extra_units": "error",
|
||||||
|
"global_label_dangling": "warning",
|
||||||
|
"hier_label_mismatch": "error",
|
||||||
|
"label_dangling": "error",
|
||||||
|
"lib_symbol_issues": "warning",
|
||||||
|
"multiple_net_names": "warning",
|
||||||
|
"net_not_bus_member": "warning",
|
||||||
|
"no_connect_connected": "warning",
|
||||||
|
"no_connect_dangling": "warning",
|
||||||
|
"pin_not_connected": "error",
|
||||||
|
"pin_not_driven": "error",
|
||||||
|
"pin_to_pin": "warning",
|
||||||
|
"power_pin_not_driven": "error",
|
||||||
|
"similar_labels": "warning",
|
||||||
|
"unannotated": "error",
|
||||||
|
"unit_value_mismatch": "error",
|
||||||
|
"unresolved_variable": "error",
|
||||||
|
"wire_dangling": "error"
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"libraries": {
|
||||||
|
"pinned_footprint_libs": [],
|
||||||
|
"pinned_symbol_libs": []
|
||||||
|
},
|
||||||
|
"meta": {
|
||||||
|
"filename": "ossc_board.kicad_pro",
|
||||||
|
"version": 1
|
||||||
|
},
|
||||||
|
"net_settings": {
|
||||||
|
"classes": [
|
||||||
|
{
|
||||||
|
"bus_width": 12.0,
|
||||||
|
"clearance": 0.16,
|
||||||
|
"diff_pair_gap": 0.25,
|
||||||
|
"diff_pair_via_gap": 0.25,
|
||||||
|
"diff_pair_width": 0.2,
|
||||||
|
"line_style": 0,
|
||||||
|
"microvia_diameter": 0.508,
|
||||||
|
"microvia_drill": 0.127,
|
||||||
|
"name": "Default",
|
||||||
|
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||||
|
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||||
|
"track_width": 0.22,
|
||||||
|
"via_diameter": 0.686,
|
||||||
|
"via_drill": 0.33,
|
||||||
|
"wire_width": 6.0
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"bus_width": 12.0,
|
||||||
|
"clearance": 0.2,
|
||||||
|
"diff_pair_gap": 0.25,
|
||||||
|
"diff_pair_via_gap": 0.25,
|
||||||
|
"diff_pair_width": 0.2,
|
||||||
|
"line_style": 0,
|
||||||
|
"microvia_diameter": 0.508,
|
||||||
|
"microvia_drill": 0.127,
|
||||||
|
"name": "75ohm_vid",
|
||||||
|
"nets": [
|
||||||
|
"/tvp_board1/RGB1_B",
|
||||||
|
"/tvp_board1/RGB1_G",
|
||||||
|
"/tvp_board1/RGB1_R",
|
||||||
|
"/tvp_board1/RGB1_S",
|
||||||
|
"/tvp_board1/RGB2_B",
|
||||||
|
"/tvp_board1/RGB2_G",
|
||||||
|
"/tvp_board1/RGB2_R",
|
||||||
|
"/tvp_board1/RGB3_B",
|
||||||
|
"/tvp_board1/RGB3_G",
|
||||||
|
"/tvp_board1/RGB3_R"
|
||||||
|
],
|
||||||
|
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||||
|
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||||
|
"track_width": 0.64,
|
||||||
|
"via_diameter": 0.686,
|
||||||
|
"via_drill": 0.35,
|
||||||
|
"wire_width": 6.0
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"bus_width": 12.0,
|
||||||
|
"clearance": 0.16,
|
||||||
|
"diff_pair_gap": 0.25,
|
||||||
|
"diff_pair_via_gap": 0.25,
|
||||||
|
"diff_pair_width": 0.2,
|
||||||
|
"line_style": 0,
|
||||||
|
"microvia_diameter": 0.508,
|
||||||
|
"microvia_drill": 0.127,
|
||||||
|
"name": "FAT_power",
|
||||||
|
"nets": [
|
||||||
|
"Net-(F1-Pad1)"
|
||||||
|
],
|
||||||
|
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||||
|
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||||
|
"track_width": 1.0,
|
||||||
|
"via_diameter": 1.5,
|
||||||
|
"via_drill": 1.1,
|
||||||
|
"wire_width": 6.0
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"bus_width": 12.0,
|
||||||
|
"clearance": 0.16,
|
||||||
|
"diff_pair_gap": 0.25,
|
||||||
|
"diff_pair_via_gap": 0.25,
|
||||||
|
"diff_pair_width": 0.2,
|
||||||
|
"line_style": 0,
|
||||||
|
"microvia_diameter": 0.508,
|
||||||
|
"microvia_drill": 0.127,
|
||||||
|
"name": "Power",
|
||||||
|
"nets": [
|
||||||
|
"/fpga1/VCCA",
|
||||||
|
"/fpga1/VCCD_PLL",
|
||||||
|
"/fpga1/VCCINT",
|
||||||
|
"/hdmitx1/AVCC1V8",
|
||||||
|
"/hdmitx1/DVDD1V8",
|
||||||
|
"/tvp_board1/AVDD",
|
||||||
|
"/tvp_board1/DVDD",
|
||||||
|
"GND"
|
||||||
|
],
|
||||||
|
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||||
|
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||||
|
"track_width": 0.25,
|
||||||
|
"via_diameter": 0.686,
|
||||||
|
"via_drill": 0.35,
|
||||||
|
"wire_width": 6.0
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"bus_width": 12.0,
|
||||||
|
"clearance": 0.16,
|
||||||
|
"diff_pair_gap": 0.25,
|
||||||
|
"diff_pair_via_gap": 0.25,
|
||||||
|
"diff_pair_width": 0.2,
|
||||||
|
"line_style": 0,
|
||||||
|
"microvia_diameter": 0.508,
|
||||||
|
"microvia_drill": 0.127,
|
||||||
|
"name": "digi_hs",
|
||||||
|
"nets": [
|
||||||
|
"/fpga1/ASDO",
|
||||||
|
"/fpga1/DATA0",
|
||||||
|
"/fpga1/DCLK",
|
||||||
|
"/fpga1/HDMITX_HSYNC",
|
||||||
|
"/fpga1/HDMITX_INT_N",
|
||||||
|
"/fpga1/HDMITX_PCLK",
|
||||||
|
"/fpga1/HDMITX_R0",
|
||||||
|
"/fpga1/HDMITX_R1",
|
||||||
|
"/fpga1/HDMITX_R2",
|
||||||
|
"/fpga1/HDMITX_R3",
|
||||||
|
"/fpga1/HDMITX_R4",
|
||||||
|
"/fpga1/HDMITX_R5",
|
||||||
|
"/fpga1/HDMITX_R6",
|
||||||
|
"/fpga1/HDMITX_R7",
|
||||||
|
"/fpga1/HDMITX_VSYNC",
|
||||||
|
"/fpga1/IR_RX",
|
||||||
|
"/fpga1/SCL",
|
||||||
|
"/fpga1/SDA",
|
||||||
|
"/fpga1/nCSO",
|
||||||
|
"/hdmitx1/TMDS_CLK+",
|
||||||
|
"/hdmitx1/TMDS_CLK-",
|
||||||
|
"/hdmitx1/TMDS_D0+",
|
||||||
|
"/hdmitx1/TMDS_D0-",
|
||||||
|
"/hdmitx1/TMDS_D1+",
|
||||||
|
"/hdmitx1/TMDS_D1-",
|
||||||
|
"/hdmitx1/TMDS_D2+",
|
||||||
|
"/hdmitx1/TMDS_D2-",
|
||||||
|
"/tvp_board1/PCLK"
|
||||||
|
],
|
||||||
|
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||||
|
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||||
|
"track_width": 0.18,
|
||||||
|
"via_diameter": 0.686,
|
||||||
|
"via_drill": 0.33,
|
||||||
|
"wire_width": 6.0
|
||||||
|
}
|
||||||
|
],
|
||||||
|
"meta": {
|
||||||
|
"version": 2
|
||||||
|
},
|
||||||
|
"net_colors": null
|
||||||
|
},
|
||||||
|
"pcbnew": {
|
||||||
|
"last_paths": {
|
||||||
|
"gencad": "",
|
||||||
|
"idf": "",
|
||||||
|
"netlist": "",
|
||||||
|
"specctra_dsn": "",
|
||||||
|
"step": "",
|
||||||
|
"vrml": ""
|
||||||
|
},
|
||||||
|
"page_layout_descr_file": ""
|
||||||
|
},
|
||||||
|
"schematic": {
|
||||||
|
"annotate_start_num": 0,
|
||||||
|
"drawing": {
|
||||||
|
"default_line_thickness": 6.0,
|
||||||
|
"default_text_size": 60.0,
|
||||||
|
"field_names": [],
|
||||||
|
"intersheets_ref_own_page": false,
|
||||||
|
"intersheets_ref_prefix": "",
|
||||||
|
"intersheets_ref_short": false,
|
||||||
|
"intersheets_ref_show": false,
|
||||||
|
"intersheets_ref_suffix": "",
|
||||||
|
"junction_size_choice": 3,
|
||||||
|
"label_size_ratio": 0.25,
|
||||||
|
"pin_symbol_size": 0.0,
|
||||||
|
"text_offset_ratio": 0.08
|
||||||
|
},
|
||||||
|
"legacy_lib_dir": "",
|
||||||
|
"legacy_lib_list": [],
|
||||||
|
"meta": {
|
||||||
|
"version": 1
|
||||||
|
},
|
||||||
|
"net_format_name": "",
|
||||||
|
"ngspice": {
|
||||||
|
"fix_include_paths": true,
|
||||||
|
"fix_passive_vals": false,
|
||||||
|
"meta": {
|
||||||
|
"version": 0
|
||||||
|
},
|
||||||
|
"model_mode": 0,
|
||||||
|
"workbook_filename": ""
|
||||||
|
},
|
||||||
|
"page_layout_descr_file": "ossc_board.kicad_wks",
|
||||||
|
"plot_directory": "doc/",
|
||||||
|
"spice_adjust_passive_values": false,
|
||||||
|
"spice_external_command": "spice \"%I\"",
|
||||||
|
"subpart_first_id": 65,
|
||||||
|
"subpart_id_separator": 0
|
||||||
|
},
|
||||||
|
"sheets": [
|
||||||
|
[
|
||||||
|
"7617fb4c-5622-4dbc-87c9-3373ab01a33e",
|
||||||
|
""
|
||||||
|
],
|
||||||
|
[
|
||||||
|
"00000000-0000-0000-0000-000054fdd796",
|
||||||
|
"tvp_board1"
|
||||||
|
],
|
||||||
|
[
|
||||||
|
"00000000-0000-0000-0000-000054fe3a8c",
|
||||||
|
"fpga1"
|
||||||
|
],
|
||||||
|
[
|
||||||
|
"00000000-0000-0000-0000-000054ff6758",
|
||||||
|
"hdmitx1"
|
||||||
|
]
|
||||||
|
],
|
||||||
|
"text_variables": {}
|
||||||
|
}
|
||||||
2821
ossc_board.kicad_sch
Normal file
2821
ossc_board.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
BIN
ossc_board.pdf
BIN
ossc_board.pdf
Binary file not shown.
462
ossc_board.sch
462
ossc_board.sch
@ -1,462 +0,0 @@
|
|||||||
EESchema Schematic File Version 4
|
|
||||||
EELAYER 30 0
|
|
||||||
EELAYER END
|
|
||||||
$Descr A4 11693 8268
|
|
||||||
encoding utf-8
|
|
||||||
Sheet 1 4
|
|
||||||
Title "Open Source Scan Converter"
|
|
||||||
Date "2020-12-28"
|
|
||||||
Rev "1.7"
|
|
||||||
Comp ""
|
|
||||||
Comment1 ""
|
|
||||||
Comment2 ""
|
|
||||||
Comment3 ""
|
|
||||||
Comment4 ""
|
|
||||||
$EndDescr
|
|
||||||
$Sheet
|
|
||||||
S 4650 950 2100 4200
|
|
||||||
U 54FE3A8C
|
|
||||||
F0 "fpga1" 50
|
|
||||||
F1 "fpga.sch" 50
|
|
||||||
F2 "SDA" B L 4650 4600 60
|
|
||||||
F3 "SCL" O L 4650 4700 60
|
|
||||||
F4 "PCLK_in" I L 4650 3750 60
|
|
||||||
F5 "HSYNC_in" I L 4650 3850 60
|
|
||||||
F6 "VSYNC_in" I L 4650 3950 60
|
|
||||||
F7 "FID_in" I L 4650 4050 60
|
|
||||||
F8 "HDMITX_INT_N" I R 6750 4400 60
|
|
||||||
F9 "HDMITX_VSYNC" O R 6750 3950 60
|
|
||||||
F10 "HDMITX_HSYNC" O R 6750 3850 60
|
|
||||||
F11 "HDMITX_DE" O R 6750 4050 60
|
|
||||||
F12 "HDMITX_PCLK" O R 6750 3750 60
|
|
||||||
F13 "Rin0" I L 4650 1050 60
|
|
||||||
F14 "Rin1" I L 4650 1150 60
|
|
||||||
F15 "Rin2" I L 4650 1250 60
|
|
||||||
F16 "Rin3" I L 4650 1350 60
|
|
||||||
F17 "Rin4" I L 4650 1450 60
|
|
||||||
F18 "Rin5" I L 4650 1550 60
|
|
||||||
F19 "Rin6" I L 4650 1650 60
|
|
||||||
F20 "Rin7" I L 4650 1750 60
|
|
||||||
F21 "Gin0" I L 4650 1950 60
|
|
||||||
F22 "Gin1" I L 4650 2050 60
|
|
||||||
F23 "Gin2" I L 4650 2150 60
|
|
||||||
F24 "Gin3" I L 4650 2250 60
|
|
||||||
F25 "Gin4" I L 4650 2350 60
|
|
||||||
F26 "Gin5" I L 4650 2450 60
|
|
||||||
F27 "Gin6" I L 4650 2550 60
|
|
||||||
F28 "Gin7" I L 4650 2650 60
|
|
||||||
F29 "Bin0" I L 4650 2850 60
|
|
||||||
F30 "Bin1" I L 4650 2950 60
|
|
||||||
F31 "Bin2" I L 4650 3050 60
|
|
||||||
F32 "Bin3" I L 4650 3150 60
|
|
||||||
F33 "Bin4" I L 4650 3250 60
|
|
||||||
F34 "Bin5" I L 4650 3350 60
|
|
||||||
F35 "Bin6" I L 4650 3450 60
|
|
||||||
F36 "Bin7" I L 4650 3550 60
|
|
||||||
F37 "HDMITX_B0" O R 6750 2850 60
|
|
||||||
F38 "HDMITX_B1" O R 6750 2950 60
|
|
||||||
F39 "HDMITX_B2" O R 6750 3050 60
|
|
||||||
F40 "HDMITX_B3" O R 6750 3150 60
|
|
||||||
F41 "HDMITX_B4" O R 6750 3250 60
|
|
||||||
F42 "HDMITX_B5" O R 6750 3350 60
|
|
||||||
F43 "HDMITX_B6" O R 6750 3450 60
|
|
||||||
F44 "HDMITX_B7" O R 6750 3550 60
|
|
||||||
F45 "HDMITX_G0" O R 6750 1950 60
|
|
||||||
F46 "HDMITX_G1" O R 6750 2050 60
|
|
||||||
F47 "HDMITX_G2" O R 6750 2150 60
|
|
||||||
F48 "HDMITX_G3" O R 6750 2250 60
|
|
||||||
F49 "HDMITX_G4" O R 6750 2350 60
|
|
||||||
F50 "HDMITX_G5" O R 6750 2450 60
|
|
||||||
F51 "HDMITX_G6" O R 6750 2550 60
|
|
||||||
F52 "HDMITX_G7" O R 6750 2650 60
|
|
||||||
F53 "HDMITX_R0" O R 6750 1050 60
|
|
||||||
F54 "HDMITX_R1" O R 6750 1150 60
|
|
||||||
F55 "HDMITX_R2" O R 6750 1250 60
|
|
||||||
F56 "HDMITX_R3" O R 6750 1350 60
|
|
||||||
F57 "HDMITX_R4" O R 6750 1450 60
|
|
||||||
F58 "HDMITX_R5" O R 6750 1550 60
|
|
||||||
F59 "HDMITX_R6" O R 6750 1650 60
|
|
||||||
F60 "HDMITX_R7" O R 6750 1750 60
|
|
||||||
F61 "VCCIO" I L 4650 4950 60
|
|
||||||
F62 "CLK27" I L 4650 4400 60
|
|
||||||
F63 "RESET_N" O R 6750 4300 60
|
|
||||||
$EndSheet
|
|
||||||
Text Notes 8900 5550 0 60 ~ 0
|
|
||||||
max. 184mA drawn
|
|
||||||
Text Notes 9000 5700 0 60 ~ 0
|
|
||||||
1mA drawn
|
|
||||||
Text Notes 2150 4750 0 60 ~ 0
|
|
||||||
I2C pull-ups\ninside
|
|
||||||
$Sheet
|
|
||||||
S 1700 950 1350 5900
|
|
||||||
U 54FDD796
|
|
||||||
F0 "tvp_board1" 50
|
|
||||||
F1 "tvp_board.sch" 50
|
|
||||||
F2 "R0" O R 3050 1050 60
|
|
||||||
F3 "R2" O R 3050 1250 60
|
|
||||||
F4 "R4" O R 3050 1450 60
|
|
||||||
F5 "R6" O R 3050 1650 60
|
|
||||||
F6 "G0" O R 3050 1950 60
|
|
||||||
F7 "R1" O R 3050 1150 60
|
|
||||||
F8 "R3" O R 3050 1350 60
|
|
||||||
F9 "R5" O R 3050 1550 60
|
|
||||||
F10 "R7" O R 3050 1750 60
|
|
||||||
F11 "G1" O R 3050 2050 60
|
|
||||||
F12 "G2" O R 3050 2150 60
|
|
||||||
F13 "G4" O R 3050 2350 60
|
|
||||||
F14 "G6" O R 3050 2550 60
|
|
||||||
F15 "G3" O R 3050 2250 60
|
|
||||||
F16 "G5" O R 3050 2450 60
|
|
||||||
F17 "G7" O R 3050 2650 60
|
|
||||||
F18 "B0" O R 3050 2850 60
|
|
||||||
F19 "B2" O R 3050 3050 60
|
|
||||||
F20 "B4" O R 3050 3250 60
|
|
||||||
F21 "B6" O R 3050 3450 60
|
|
||||||
F22 "B1" O R 3050 2950 60
|
|
||||||
F23 "B3" O R 3050 3150 60
|
|
||||||
F24 "B5" O R 3050 3350 60
|
|
||||||
F25 "B7" O R 3050 3550 60
|
|
||||||
F26 "RESET_N" O R 3050 4300 60
|
|
||||||
F27 "HSYNC" O R 3050 3850 60
|
|
||||||
F28 "VSYNC" O R 3050 3950 60
|
|
||||||
F29 "FID" O R 3050 4050 60
|
|
||||||
F30 "PCLK" O R 3050 3750 60
|
|
||||||
F31 "SDA" B R 3050 4600 60
|
|
||||||
F32 "SCL" I R 3050 4700 60
|
|
||||||
F33 "AVDD3V3" O R 3050 5650 60
|
|
||||||
F34 "DVDD3V3" O R 3050 5550 60
|
|
||||||
F35 "CLK27" O R 3050 4400 60
|
|
||||||
F36 "5V" O R 3050 5900 60
|
|
||||||
F37 "AV2_AUD_L" O R 3050 6300 60
|
|
||||||
F38 "AV2_AUD_R" O R 3050 6400 60
|
|
||||||
F39 "AV1_AUD_L" O R 3050 6100 60
|
|
||||||
F40 "AV1_AUD_R" O R 3050 6200 60
|
|
||||||
F41 "AV3_AUD_L" O R 3050 6500 60
|
|
||||||
F42 "AV3_AUD_R" O R 3050 6600 60
|
|
||||||
$EndSheet
|
|
||||||
Text Notes 5050 4850 0 60 ~ 0
|
|
||||||
max. 230mA drawn
|
|
||||||
Text Notes 1900 5450 0 60 ~ 0
|
|
||||||
max. 175mA drawn
|
|
||||||
$Sheet
|
|
||||||
S 8350 950 1650 5900
|
|
||||||
U 54FF6758
|
|
||||||
F0 "hdmitx1" 50
|
|
||||||
F1 "hdmitx.sch" 50
|
|
||||||
F2 "DE" I L 8350 4050 60
|
|
||||||
F3 "HSYNC" I L 8350 3850 60
|
|
||||||
F4 "VSYNC" I L 8350 3950 60
|
|
||||||
F5 "SDA" B L 8350 4600 60
|
|
||||||
F6 "SCL" I L 8350 4700 60
|
|
||||||
F7 "B0" I L 8350 2850 60
|
|
||||||
F8 "B1" I L 8350 2950 60
|
|
||||||
F9 "B2" I L 8350 3050 60
|
|
||||||
F10 "B3" I L 8350 3150 60
|
|
||||||
F11 "B4" I L 8350 3250 60
|
|
||||||
F12 "B5" I L 8350 3350 60
|
|
||||||
F13 "B6" I L 8350 3450 60
|
|
||||||
F14 "B7" I L 8350 3550 60
|
|
||||||
F15 "G0" I L 8350 1950 60
|
|
||||||
F16 "G1" I L 8350 2050 60
|
|
||||||
F17 "G2" I L 8350 2150 60
|
|
||||||
F18 "G3" I L 8350 2250 60
|
|
||||||
F19 "G4" I L 8350 2350 60
|
|
||||||
F20 "G5" I L 8350 2450 60
|
|
||||||
F21 "G6" I L 8350 2550 60
|
|
||||||
F22 "G7" I L 8350 2650 60
|
|
||||||
F23 "R0" I L 8350 1050 60
|
|
||||||
F24 "R1" I L 8350 1150 60
|
|
||||||
F25 "R2" I L 8350 1250 60
|
|
||||||
F26 "R3" I L 8350 1350 60
|
|
||||||
F27 "R4" I L 8350 1450 60
|
|
||||||
F28 "R5" I L 8350 1550 60
|
|
||||||
F29 "R6" I L 8350 1650 60
|
|
||||||
F30 "R7" I L 8350 1750 60
|
|
||||||
F31 "PCLK" I L 8350 3750 60
|
|
||||||
F32 "SYSRSTN" I L 8350 4300 60
|
|
||||||
F33 "INTn" O L 8350 4400 60
|
|
||||||
F34 "DVDD3V3" I L 8350 5550 60
|
|
||||||
F35 "AVDD3V3" I L 8350 5650 60
|
|
||||||
F36 "5V" I L 8350 5900 60
|
|
||||||
F37 "AV1_AUD_L" I L 8350 6100 60
|
|
||||||
F38 "AV1_AUD_R" I L 8350 6200 60
|
|
||||||
F39 "AV2_AUD_L" I L 8350 6300 60
|
|
||||||
F40 "AV2_AUD_R" I L 8350 6400 60
|
|
||||||
F41 "AV3_AUD_L" I L 8350 6500 60
|
|
||||||
F42 "AV3_AUD_R" I L 8350 6600 60
|
|
||||||
$EndSheet
|
|
||||||
$Comp
|
|
||||||
L Mechanical:MountingHole MH1
|
|
||||||
U 1 1 55126368
|
|
||||||
P 1250 950
|
|
||||||
F 0 "MH1" H 1330 950 40 0000 L CNN
|
|
||||||
F 1 "CONN_1" H 1250 1005 30 0001 C CNN
|
|
||||||
F 2 "Connect:1pin" H 1250 950 60 0001 C CNN
|
|
||||||
F 3 "" H 1250 950 60 0000 C CNN
|
|
||||||
1 1250 950
|
|
||||||
0 -1 -1 0
|
|
||||||
$EndComp
|
|
||||||
$Comp
|
|
||||||
L Mechanical:MountingHole MH3
|
|
||||||
U 1 1 55129B56
|
|
||||||
P 1350 6250
|
|
||||||
F 0 "MH3" H 1430 6250 40 0000 L CNN
|
|
||||||
F 1 "CONN_1" H 1350 6305 30 0001 C CNN
|
|
||||||
F 2 "Connect:1pin" H 1350 6250 60 0001 C CNN
|
|
||||||
F 3 "" H 1350 6250 60 0000 C CNN
|
|
||||||
1 1350 6250
|
|
||||||
0 -1 -1 0
|
|
||||||
$EndComp
|
|
||||||
$Comp
|
|
||||||
L Mechanical:MountingHole MH4
|
|
||||||
U 1 1 5512E422
|
|
||||||
P 10400 6200
|
|
||||||
F 0 "MH4" H 10480 6200 40 0000 L CNN
|
|
||||||
F 1 "CONN_1" H 10400 6255 30 0001 C CNN
|
|
||||||
F 2 "Connect:1pin" H 10400 6200 60 0001 C CNN
|
|
||||||
F 3 "" H 10400 6200 60 0000 C CNN
|
|
||||||
1 10400 6200
|
|
||||||
0 -1 -1 0
|
|
||||||
$EndComp
|
|
||||||
Wire Wire Line
|
|
||||||
3050 1050 4650 1050
|
|
||||||
Wire Wire Line
|
|
||||||
3050 1150 4650 1150
|
|
||||||
Wire Wire Line
|
|
||||||
3050 1250 4650 1250
|
|
||||||
Wire Wire Line
|
|
||||||
3050 1350 4650 1350
|
|
||||||
Wire Wire Line
|
|
||||||
3050 1450 4650 1450
|
|
||||||
Wire Wire Line
|
|
||||||
3050 1550 4650 1550
|
|
||||||
Wire Wire Line
|
|
||||||
3050 1650 4650 1650
|
|
||||||
Wire Wire Line
|
|
||||||
3050 1750 4650 1750
|
|
||||||
Wire Wire Line
|
|
||||||
3050 1950 4650 1950
|
|
||||||
Wire Wire Line
|
|
||||||
3050 2050 4650 2050
|
|
||||||
Wire Wire Line
|
|
||||||
3050 2150 4650 2150
|
|
||||||
Wire Wire Line
|
|
||||||
3050 2250 4650 2250
|
|
||||||
Wire Wire Line
|
|
||||||
3050 2350 4650 2350
|
|
||||||
Wire Wire Line
|
|
||||||
3050 2450 4650 2450
|
|
||||||
Wire Wire Line
|
|
||||||
3050 2550 4650 2550
|
|
||||||
Wire Wire Line
|
|
||||||
3050 2650 4650 2650
|
|
||||||
Wire Wire Line
|
|
||||||
3050 2850 4650 2850
|
|
||||||
Wire Wire Line
|
|
||||||
3050 2950 4650 2950
|
|
||||||
Wire Wire Line
|
|
||||||
3050 3050 4650 3050
|
|
||||||
Wire Wire Line
|
|
||||||
3050 3150 4650 3150
|
|
||||||
Wire Wire Line
|
|
||||||
3050 3250 4650 3250
|
|
||||||
Wire Wire Line
|
|
||||||
3050 3350 4650 3350
|
|
||||||
Wire Wire Line
|
|
||||||
3050 3450 4650 3450
|
|
||||||
Wire Wire Line
|
|
||||||
3050 3550 4650 3550
|
|
||||||
Wire Wire Line
|
|
||||||
3050 3850 4650 3850
|
|
||||||
Wire Wire Line
|
|
||||||
3050 3950 4650 3950
|
|
||||||
Wire Wire Line
|
|
||||||
3050 4050 4650 4050
|
|
||||||
Wire Wire Line
|
|
||||||
3050 4300 4150 4300
|
|
||||||
Wire Wire Line
|
|
||||||
3050 4600 4350 4600
|
|
||||||
Wire Wire Line
|
|
||||||
3050 4700 4500 4700
|
|
||||||
Wire Wire Line
|
|
||||||
6750 1050 8350 1050
|
|
||||||
Wire Wire Line
|
|
||||||
6750 1150 8350 1150
|
|
||||||
Wire Wire Line
|
|
||||||
6750 1250 8350 1250
|
|
||||||
Wire Wire Line
|
|
||||||
6750 1350 8350 1350
|
|
||||||
Wire Wire Line
|
|
||||||
6750 1450 8350 1450
|
|
||||||
Wire Wire Line
|
|
||||||
6750 1550 8350 1550
|
|
||||||
Wire Wire Line
|
|
||||||
6750 1650 8350 1650
|
|
||||||
Wire Wire Line
|
|
||||||
6750 1750 8350 1750
|
|
||||||
Wire Wire Line
|
|
||||||
6750 1950 8350 1950
|
|
||||||
Wire Wire Line
|
|
||||||
6750 2050 8350 2050
|
|
||||||
Wire Wire Line
|
|
||||||
6750 2150 8350 2150
|
|
||||||
Wire Wire Line
|
|
||||||
6750 2250 8350 2250
|
|
||||||
Wire Wire Line
|
|
||||||
6750 2350 8350 2350
|
|
||||||
Wire Wire Line
|
|
||||||
6750 2450 8350 2450
|
|
||||||
Wire Wire Line
|
|
||||||
6750 2550 8350 2550
|
|
||||||
Wire Wire Line
|
|
||||||
6750 2650 8350 2650
|
|
||||||
Wire Wire Line
|
|
||||||
6750 2850 8350 2850
|
|
||||||
Wire Wire Line
|
|
||||||
6750 2950 8350 2950
|
|
||||||
Wire Wire Line
|
|
||||||
6750 3050 8350 3050
|
|
||||||
Wire Wire Line
|
|
||||||
6750 3150 8350 3150
|
|
||||||
Wire Wire Line
|
|
||||||
6750 3250 8350 3250
|
|
||||||
Wire Wire Line
|
|
||||||
6750 3350 8350 3350
|
|
||||||
Wire Wire Line
|
|
||||||
6750 3450 8350 3450
|
|
||||||
Wire Wire Line
|
|
||||||
6750 3550 8350 3550
|
|
||||||
Wire Wire Line
|
|
||||||
6750 3750 8350 3750
|
|
||||||
Wire Wire Line
|
|
||||||
6750 3850 8350 3850
|
|
||||||
Wire Wire Line
|
|
||||||
6750 3950 8350 3950
|
|
||||||
Wire Wire Line
|
|
||||||
6750 4050 8350 4050
|
|
||||||
Wire Wire Line
|
|
||||||
6750 4300 6950 4300
|
|
||||||
Wire Wire Line
|
|
||||||
6750 4400 8350 4400
|
|
||||||
Wire Wire Line
|
|
||||||
4500 4700 4500 5250
|
|
||||||
Wire Wire Line
|
|
||||||
8200 4700 8200 5250
|
|
||||||
Wire Wire Line
|
|
||||||
8200 4700 8350 4700
|
|
||||||
Connection ~ 4500 4700
|
|
||||||
Wire Wire Line
|
|
||||||
4350 4600 4350 5350
|
|
||||||
Wire Wire Line
|
|
||||||
8050 4600 8050 5350
|
|
||||||
Wire Wire Line
|
|
||||||
8050 4600 8350 4600
|
|
||||||
Connection ~ 4350 4600
|
|
||||||
Wire Wire Line
|
|
||||||
4650 3750 3050 3750
|
|
||||||
Wire Notes Line
|
|
||||||
8950 5700 9550 5700
|
|
||||||
Wire Wire Line
|
|
||||||
3050 5550 3800 5550
|
|
||||||
Wire Wire Line
|
|
||||||
3050 5650 8350 5650
|
|
||||||
Wire Notes Line
|
|
||||||
2100 4550 2750 4550
|
|
||||||
Wire Notes Line
|
|
||||||
2750 4550 2750 4750
|
|
||||||
Wire Notes Line
|
|
||||||
2750 4750 2100 4750
|
|
||||||
Wire Notes Line
|
|
||||||
2100 4750 2100 4550
|
|
||||||
Wire Wire Line
|
|
||||||
8050 5350 4350 5350
|
|
||||||
Wire Wire Line
|
|
||||||
8200 5250 4500 5250
|
|
||||||
Wire Notes Line
|
|
||||||
5050 4750 5950 4750
|
|
||||||
Wire Notes Line
|
|
||||||
5050 4850 5950 4850
|
|
||||||
Wire Notes Line
|
|
||||||
5050 4850 5050 4750
|
|
||||||
Wire Notes Line
|
|
||||||
5950 4850 5950 4750
|
|
||||||
Wire Wire Line
|
|
||||||
3800 4950 4650 4950
|
|
||||||
Wire Wire Line
|
|
||||||
3050 4400 4650 4400
|
|
||||||
Wire Notes Line
|
|
||||||
8950 5700 8950 5600
|
|
||||||
Wire Notes Line
|
|
||||||
8950 5600 9550 5600
|
|
||||||
Wire Notes Line
|
|
||||||
9550 5600 9550 5700
|
|
||||||
Wire Notes Line
|
|
||||||
9800 5450 8900 5450
|
|
||||||
Wire Notes Line
|
|
||||||
8900 5550 9800 5550
|
|
||||||
Wire Notes Line
|
|
||||||
8900 5450 8900 5550
|
|
||||||
Wire Notes Line
|
|
||||||
9800 5550 9800 5450
|
|
||||||
Wire Notes Line
|
|
||||||
1900 5350 2800 5350
|
|
||||||
Wire Notes Line
|
|
||||||
2800 5350 2800 5450
|
|
||||||
Wire Notes Line
|
|
||||||
2800 5450 1900 5450
|
|
||||||
Wire Notes Line
|
|
||||||
1900 5450 1900 5350
|
|
||||||
Text Notes 1900 5800 0 60 ~ 0
|
|
||||||
max. 110mA drawn
|
|
||||||
Wire Notes Line
|
|
||||||
1900 5700 2800 5700
|
|
||||||
Wire Notes Line
|
|
||||||
1900 5700 1900 5800
|
|
||||||
Wire Notes Line
|
|
||||||
1900 5800 2800 5800
|
|
||||||
Wire Notes Line
|
|
||||||
2800 5800 2800 5700
|
|
||||||
Wire Wire Line
|
|
||||||
6950 4300 6950 5450
|
|
||||||
Wire Wire Line
|
|
||||||
6950 5450 4150 5450
|
|
||||||
Wire Wire Line
|
|
||||||
4150 5450 4150 4300
|
|
||||||
Connection ~ 6950 4300
|
|
||||||
Wire Wire Line
|
|
||||||
3800 4950 3800 5550
|
|
||||||
Connection ~ 3800 5550
|
|
||||||
Wire Wire Line
|
|
||||||
3050 5900 8350 5900
|
|
||||||
Wire Wire Line
|
|
||||||
3050 6100 8350 6100
|
|
||||||
Wire Wire Line
|
|
||||||
3050 6200 8350 6200
|
|
||||||
Wire Wire Line
|
|
||||||
3050 6300 8350 6300
|
|
||||||
Wire Wire Line
|
|
||||||
3050 6400 8350 6400
|
|
||||||
Wire Wire Line
|
|
||||||
3050 6500 8350 6500
|
|
||||||
Wire Wire Line
|
|
||||||
3050 6600 8350 6600
|
|
||||||
Wire Wire Line
|
|
||||||
4500 4700 4650 4700
|
|
||||||
Wire Wire Line
|
|
||||||
4350 4600 4650 4600
|
|
||||||
Wire Wire Line
|
|
||||||
6950 4300 8350 4300
|
|
||||||
Wire Wire Line
|
|
||||||
3800 5550 8350 5550
|
|
||||||
$Comp
|
|
||||||
L Mechanical:MountingHole MH2
|
|
||||||
U 1 1 5512C83E
|
|
||||||
P 10450 1000
|
|
||||||
F 0 "MH2" H 10530 1000 40 0000 L CNN
|
|
||||||
F 1 "CONN_1" H 10450 1055 30 0001 C CNN
|
|
||||||
F 2 "Connect:1pin" H 10450 1000 60 0001 C CNN
|
|
||||||
F 3 "" H 10450 1000 60 0000 C CNN
|
|
||||||
1 10450 1000
|
|
||||||
0 -1 -1 0
|
|
||||||
$EndComp
|
|
||||||
$EndSCHEMATC
|
|
||||||
11431
tvp_board.kicad_sch
Normal file
11431
tvp_board.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
3468
tvp_board.sch
3468
tvp_board.sch
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user