This is a KiCad 9 template + diff --git a/Templates/PCIexpress_x16_half/.gitignore b/Templates/M.2 A Key Templates/M.2 A Key 2230/.gitignore similarity index 100% rename from Templates/PCIexpress_x16_half/.gitignore rename to Templates/M.2 A Key Templates/M.2 A Key 2230/.gitignore diff --git a/Templates/M.2 A Key Templates/M.2 A Key 2230/M.2 A Key 2230.kicad_pcb b/Templates/M.2 A Key Templates/M.2 A Key 2230/M.2 A Key 2230.kicad_pcb new file mode 100644 index 0000000..a97be14 --- /dev/null +++ b/Templates/M.2 A Key Templates/M.2 A Key 2230/M.2 A Key 2230.kicad_pcb @@ -0,0 +1,3328 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) 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"Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (pdf_metadata yes) + (pdf_single_document no) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (sketchpadsonfab no) + (plotpadnumbers no) + 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This is a KiCad 9 template + diff --git a/Templates/PCIexpress_x16_low/.gitignore b/Templates/M.2 A Key Templates/M.2 A Key 2242/.gitignore similarity index 100% rename from Templates/PCIexpress_x16_low/.gitignore rename to Templates/M.2 A Key Templates/M.2 A Key 2242/.gitignore diff --git a/Templates/M.2 A Key Templates/M.2 A Key 2242/M.2 A Key 2242.kicad_pcb b/Templates/M.2 A Key Templates/M.2 A Key 2242/M.2 A Key 2242.kicad_pcb new file mode 100644 index 0000000..5a4463b --- /dev/null +++ b/Templates/M.2 A Key Templates/M.2 A Key 2242/M.2 A Key 2242.kicad_pcb @@ -0,0 +1,3321 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + 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This is a KiCad 9 template + diff --git a/Templates/PCIexpress_x1_full/.gitignore b/Templates/M.2 A Key Templates/M.2 A Key 2260/.gitignore similarity index 100% rename from Templates/PCIexpress_x1_full/.gitignore rename to Templates/M.2 A Key Templates/M.2 A Key 2260/.gitignore diff --git a/Templates/M.2 A Key Templates/M.2 A Key 2260/M.2 A Key 2260.kicad_pcb b/Templates/M.2 A Key Templates/M.2 A Key 2260/M.2 A Key 2260.kicad_pcb new file mode 100644 index 0000000..3dbd236 --- /dev/null +++ b/Templates/M.2 A Key Templates/M.2 A Key 2260/M.2 A Key 2260.kicad_pcb @@ -0,0 +1,3322 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + 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This is a KiCad 9 template + diff --git a/Templates/PCIexpress_x1_half/.gitignore b/Templates/M.2 A Key Templates/M.2 A Key 2280/.gitignore similarity index 100% rename from Templates/PCIexpress_x1_half/.gitignore rename to Templates/M.2 A Key Templates/M.2 A Key 2280/.gitignore diff --git a/Templates/M.2 A Key Templates/M.2 A Key 2280/M.2 A Key 2280.kicad_pcb b/Templates/M.2 A Key Templates/M.2 A Key 2280/M.2 A Key 2280.kicad_pcb new file mode 100644 index 0000000..830cb92 --- /dev/null +++ b/Templates/M.2 A Key Templates/M.2 A Key 2280/M.2 A Key 2280.kicad_pcb @@ -0,0 +1,3320 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + 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This is a KiCad 9 template + diff --git a/Templates/PCIexpress_x2_full/.gitignore b/Templates/M.2 A Key Templates/M.2 A Key 3030/.gitignore similarity index 100% rename from Templates/PCIexpress_x2_full/.gitignore rename to Templates/M.2 A Key Templates/M.2 A Key 3030/.gitignore diff --git a/Templates/M.2 A Key Templates/M.2 A Key 3030/M.2 A Key 3030.kicad_pcb b/Templates/M.2 A Key Templates/M.2 A Key 3030/M.2 A Key 3030.kicad_pcb new file mode 100644 index 0000000..0c25682 --- /dev/null +++ b/Templates/M.2 A Key Templates/M.2 A Key 3030/M.2 A Key 3030.kicad_pcb @@ -0,0 +1,3336 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + 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This is a KiCad 9 template + diff --git a/Templates/PCIexpress_x2_half/.gitignore b/Templates/M.2 A Key Templates/M.2 A Key 3042/.gitignore similarity index 100% rename from Templates/PCIexpress_x2_half/.gitignore rename to Templates/M.2 A Key Templates/M.2 A Key 3042/.gitignore diff --git a/Templates/M.2 A Key Templates/M.2 A Key 3042/M.2 A Key 3042.kicad_pcb b/Templates/M.2 A Key Templates/M.2 A Key 3042/M.2 A Key 3042.kicad_pcb new file mode 100644 index 0000000..fed3ff9 --- /dev/null +++ b/Templates/M.2 A Key Templates/M.2 A Key 3042/M.2 A Key 3042.kicad_pcb @@ -0,0 +1,3339 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + 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This is a KiCad 9 template + diff --git a/Templates/PCIexpress_x2_low/.gitignore b/Templates/M.2 A Key Templates/M.2 A Key 3060/.gitignore similarity index 100% rename from Templates/PCIexpress_x2_low/.gitignore rename to Templates/M.2 A Key Templates/M.2 A Key 3060/.gitignore diff --git a/Templates/M.2 A Key Templates/M.2 A Key 3060/M.2 A Key 3060.kicad_pcb b/Templates/M.2 A Key Templates/M.2 A Key 3060/M.2 A Key 3060.kicad_pcb new file mode 100644 index 0000000..af4d910 --- /dev/null +++ b/Templates/M.2 A Key Templates/M.2 A Key 3060/M.2 A Key 3060.kicad_pcb @@ -0,0 +1,3339 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + 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This is a KiCad 9 template + diff --git a/Templates/PCIexpress_x4_half/.gitignore b/Templates/M.2 A+E Key Templates/M.2 A+E Key 22110/.gitignore similarity index 100% rename from Templates/PCIexpress_x4_half/.gitignore rename to Templates/M.2 A+E Key Templates/M.2 A+E Key 22110/.gitignore diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 22110/M.2 A+E Key 22110.kicad_pcb b/Templates/M.2 A+E Key Templates/M.2 A+E Key 22110/M.2 A+E Key 22110.kicad_pcb new file mode 100644 index 0000000..1648f6d --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 22110/M.2 A+E Key 22110.kicad_pcb @@ -0,0 +1,3195 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user 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This is a KiCad 9 template + diff --git a/Templates/PCIexpress_x4_low/.gitignore b/Templates/M.2 A+E Key Templates/M.2 A+E Key 2230/.gitignore similarity index 100% rename from Templates/PCIexpress_x4_low/.gitignore rename to Templates/M.2 A+E Key Templates/M.2 A+E Key 2230/.gitignore diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 2230/M.2 A+E Key 2230.kicad_pcb b/Templates/M.2 A+E Key Templates/M.2 A+E Key 2230/M.2 A+E Key 2230.kicad_pcb new file mode 100644 index 0000000..d19f68c --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 2230/M.2 A+E Key 2230.kicad_pcb @@ -0,0 +1,3218 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user 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This is a KiCad 9 template + diff --git a/Templates/PCIexpress_x8_full/.gitignore b/Templates/M.2 A+E Key Templates/M.2 A+E Key 2242/.gitignore similarity index 100% rename from Templates/PCIexpress_x8_full/.gitignore rename to Templates/M.2 A+E Key Templates/M.2 A+E Key 2242/.gitignore diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 2242/M.2 A+E Key 2242.kicad_pcb b/Templates/M.2 A+E Key Templates/M.2 A+E Key 2242/M.2 A+E Key 2242.kicad_pcb new file mode 100644 index 0000000..cd8673c --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 2242/M.2 A+E Key 2242.kicad_pcb @@ -0,0 +1,3195 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (pdf_metadata yes) + (pdf_single_document no) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (sketchpadsonfab no) + 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This is a KiCad 9 template + diff --git a/Templates/PCIexpress_x8_half/.gitignore b/Templates/M.2 A+E Key Templates/M.2 A+E Key 2260/.gitignore similarity index 100% rename from Templates/PCIexpress_x8_half/.gitignore rename to Templates/M.2 A+E Key Templates/M.2 A+E Key 2260/.gitignore diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 2260/M.2 A+E Key 2260.kicad_pcb b/Templates/M.2 A+E Key Templates/M.2 A+E Key 2260/M.2 A+E Key 2260.kicad_pcb new file mode 100644 index 0000000..5b4a8af --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 2260/M.2 A+E Key 2260.kicad_pcb @@ -0,0 +1,3195 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user 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This is a KiCad 9 template + diff --git a/Templates/PCIexpress_x8_low/.gitignore b/Templates/M.2 A+E Key Templates/M.2 A+E Key 2280/.gitignore similarity index 100% rename from Templates/PCIexpress_x8_low/.gitignore rename to Templates/M.2 A+E Key Templates/M.2 A+E Key 2280/.gitignore diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 2280/M.2 A+E Key 2280.kicad_pcb b/Templates/M.2 A+E Key Templates/M.2 A+E Key 2280/M.2 A+E Key 2280.kicad_pcb new file mode 100644 index 0000000..6362bc0 --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 2280/M.2 A+E Key 2280.kicad_pcb @@ -0,0 +1,3195 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user 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"/fd8586f0-0941-47c3-ae9d-eb887ec11093/b5fcee2c-3957-4f01-a7d8-c20d919c0a63/4085d364-ba96-420e-b5a6-dae580e8c21f" + (reference "C2") + (unit 1) + ) + (path "/fd8586f0-0941-47c3-ae9d-eb887ec11093/b5fcee2c-3957-4f01-a7d8-c20d919c0a63/d91fb369-9227-4ab0-aedf-b8e91770cbc3" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 2280/meta/info.html b/Templates/M.2 A+E Key Templates/M.2 A+E Key 2280/meta/info.html new file mode 100644 index 0000000..ea5786c --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 2280/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 30110/.gitignore b/Templates/M.2 A+E Key Templates/M.2 A+E Key 30110/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 30110/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 30110/M.2 A+E Key 30110.kicad_pcb b/Templates/M.2 A+E Key Templates/M.2 A+E Key 30110/M.2 A+E Key 30110.kicad_pcb new file mode 100644 index 0000000..389a75d --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 30110/M.2 A+E Key 30110.kicad_pcb @@ -0,0 +1,3318 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + 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"/5bfde3f2-ac4a-4ea4-a840-8d5d82bc8c6d/b8a0b662-626f-4b18-a541-bb821f464aa6/4085d364-ba96-420e-b5a6-dae580e8c21f" + (reference "C2") + (unit 1) + ) + (path "/5bfde3f2-ac4a-4ea4-a840-8d5d82bc8c6d/b8a0b662-626f-4b18-a541-bb821f464aa6/d91fb369-9227-4ab0-aedf-b8e91770cbc3" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 30110/meta/info.html b/Templates/M.2 A+E Key Templates/M.2 A+E Key 30110/meta/info.html new file mode 100644 index 0000000..d1d4ac0 --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 30110/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 3030/.gitignore b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3030/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3030/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 3030/M.2 A+E Key 3030.kicad_pcb b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3030/M.2 A+E Key 3030.kicad_pcb new file mode 100644 index 0000000..6b8a964 --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3030/M.2 A+E Key 3030.kicad_pcb @@ -0,0 +1,3222 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 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15 "unconnected-(J1-NC-Pad20)") + (net 16 "unconnected-(J1-NC-Pad21)") + (net 17 "unconnected-(J1-NC-Pad22)") + (net 18 "unconnected-(J1-NC-Pad23)") + (net 19 "unconnected-(J1-NC-Pad32)") + (net 20 "unconnected-(J1-NC-Pad34)") + (net 21 "/PER0-") + (net 22 "unconnected-(J1-NC-Pad36)") + (net 23 "/PER0+") + (net 24 "unconnected-(J1-Vender_Defined-Pad38)") + (net 25 "unconnected-(J1-Vender_Defined-Pad40)") + (net 26 "unconnected-(J1-Vender_Defined-Pad42)") + (net 27 "unconnected-(J1-COEX3-Pad44)") + (net 28 "unconnected-(J1-COEX2-Pad46)") + (net 29 "/REFCLK0+") + (net 30 "unconnected-(J1-COEX1-Pad48)") + (net 31 "/REFCLK0-") + (net 32 "/SUSCLK") + (net 33 "/PERST0#") + (net 34 "/CLKREQ0#") + (net 35 "/W_DISABLE2#") + (net 36 "/PEWAKE#") + (net 37 "/W_DISABLE1#") + (net 38 "/I2C_DATA") + (net 39 "/PER1+") + (net 40 "/I2C_CLK") + (net 41 "/PER1-") + (net 42 "/ALERT#") + (net 43 "unconnected-(J1-RESERVED-Pad64)") + (net 44 "/PERST1#") + (net 45 "/CLKREQ1#") + (net 46 "/PEWAKE1#") + (net 47 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(justify left) + ) + (uuid "e1afedb5-767a-4503-9e2f-d66a5fcb1981") + ) + (hierarchical_label "IN+" + (shape input) + (at 143.51 91.44 90) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + (uuid "f75fae40-18bb-4724-a48a-191ee53ca258") + ) + (hierarchical_label "OUT+" + (shape input) + (at 143.51 109.22 270) + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + (uuid "f8cce2ed-83c5-4c49-9fe9-de2cf9bb5ff8") + ) + (hierarchical_label "OUT-" + (shape input) + (at 129.54 109.22 270) + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + (uuid "ff5bdcf1-76c0-4d9d-b23d-02c1c676dcf3") + ) + (symbol + (lib_id "Device:C") + (at 129.54 100.33 0) + (unit 1) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (dnp no) + (fields_autoplaced yes) + (uuid "2016188b-af52-4362-a831-61bc1de993d6") + (property "Reference" "C3" + (at 133.35 99.0599 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + ) + (property "Value" "220nF" + (at 133.35 101.5999 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + ) + (property "Footprint" "Capacitor_SMD:C_0201_0603Metric" + (at 130.5052 104.14 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Datasheet" "~" + (at 129.54 100.33 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 129.54 100.33 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (pin "2" + (uuid "eb1285e8-4cda-436d-8d84-fbc2282a0df0") + ) + (pin "1" + (uuid "242134ca-a643-4559-8c9d-f39fd56de8e8") + ) + (instances + (project "M.2 A+E Key 3030" + (path "/c9b36956-78da-44fd-a825-31202f0468d7/f5ddec20-60b4-4925-8fe8-a27c9ef76a12/4085d364-ba96-420e-b5a6-dae580e8c21f" + (reference "C1") + (unit 1) + ) + (path "/c9b36956-78da-44fd-a825-31202f0468d7/f5ddec20-60b4-4925-8fe8-a27c9ef76a12/d91fb369-9227-4ab0-aedf-b8e91770cbc3" + (reference "C3") + (unit 1) + ) + ) + ) + ) + (symbol + (lib_id "Device:C") + (at 143.51 100.33 0) + (unit 1) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (dnp no) + (fields_autoplaced yes) + (uuid "a9ef9354-d3cb-4e55-896f-ff5d6835b2b3") + (property "Reference" "C4" + (at 147.32 99.0599 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + ) + (property "Value" "220nF" + (at 147.32 101.5999 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + ) + (property "Footprint" "Capacitor_SMD:C_0201_0603Metric" + (at 144.4752 104.14 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Datasheet" "~" + (at 143.51 100.33 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 143.51 100.33 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (pin "2" + (uuid "348fa5ae-bcf0-4ea0-bf42-a0ec4e10fe9d") + ) + (pin "1" + (uuid "cc9c0ac6-29f8-46e9-9428-8358641fc969") + ) + (instances + (project "M.2 A+E Key 3030" + (path "/c9b36956-78da-44fd-a825-31202f0468d7/f5ddec20-60b4-4925-8fe8-a27c9ef76a12/4085d364-ba96-420e-b5a6-dae580e8c21f" + (reference "C2") + (unit 1) + ) + (path "/c9b36956-78da-44fd-a825-31202f0468d7/f5ddec20-60b4-4925-8fe8-a27c9ef76a12/d91fb369-9227-4ab0-aedf-b8e91770cbc3" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 3030/meta/info.html b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3030/meta/info.html new file mode 100644 index 0000000..a9f9295 --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3030/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 3042/.gitignore b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3042/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3042/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 3042/M.2 A+E Key 3042.kicad_pcb b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3042/M.2 A+E Key 3042.kicad_pcb new file mode 100644 index 0000000..7c10133 --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3042/M.2 A+E Key 3042.kicad_pcb @@ -0,0 +1,3318 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 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"/REFCLK1+") + (net 47 "/REFCLK1-") + (net 48 "/PET0+") + (net 49 "/PET1-") + (net 50 "/PET1+") + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "00d48f33-db01-42ae-8fc7-3e3b123f15ac") + (at 102.36 153.13 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C2" + (at 0 1.11 90) + (layer "F.SilkS") + (uuid "9ffe7648-6f73-48bd-bbc1-2da46deaf561") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "35a92d45-a2ab-4166-bd81-c3fd3c6894ee") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "73c954e9-631f-4f8a-98f5-c12e7b281845") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + 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This is a KiCad 9 template + diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 3060/.gitignore b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3060/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3060/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 3060/M.2 A+E Key 3060.kicad_pcb b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3060/M.2 A+E Key 3060.kicad_pcb new file mode 100644 index 0000000..bbdde6c --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3060/M.2 A+E Key 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This is a KiCad 9 template + diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 3080/.gitignore b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3080/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3080/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 A+E Key Templates/M.2 A+E Key 3080/M.2 A+E Key 3080.kicad_pcb b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3080/M.2 A+E Key 3080.kicad_pcb new file mode 100644 index 0000000..16afa3e --- /dev/null +++ b/Templates/M.2 A+E Key Templates/M.2 A+E Key 3080/M.2 A+E Key 3080.kicad_pcb @@ -0,0 +1,3222 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" 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This is a KiCad 9 template + diff --git a/Templates/M.2 B Key Templates/M.2 B Key 22110/.gitignore b/Templates/M.2 B Key Templates/M.2 B Key 22110/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 22110/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B Key Templates/M.2 B Key 22110/M.2 B Key 22110.kicad_pcb b/Templates/M.2 B Key Templates/M.2 B Key 22110/M.2 B Key 22110.kicad_pcb new file mode 100644 index 0000000..6cd78bc --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 22110/M.2 B Key 22110.kicad_pcb @@ -0,0 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Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref 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"/DPR") + (net 17 "/GPIO_7") + (net 18 "/GPIO_11") + (net 19 "/GPIO_10") + (net 20 "/GPIO_8") + (net 21 "/UIM-RESET") + (net 22 "/UIM-CLK") + (net 23 "/UIM-DATA") + (net 24 "/PER1-") + (net 25 "/UIM-PWR") + (net 26 "/PER1+") + (net 27 "/DEVSLP") + (net 28 "/GPIO_0") + (net 29 "/GPIO_1") + (net 30 "/GPIO_2") + (net 31 "/GPIO_3") + (net 32 "/PER0-") + (net 33 "/GPIO_4") + (net 34 "/PER0+") + (net 35 "/PERST#") + (net 36 "/CLKREQ#") + (net 37 "/REFCLK-") + (net 38 "/PEWAKE#") + (net 39 "/REFCLK+") + (net 40 "unconnected-(J1-NC-Pad56)") + (net 41 "unconnected-(J1-NC-Pad58)") + (net 42 "/ANTCTL0") + (net 43 "unconnected-(J1-COEX3-Pad60)") + (net 44 "/ANTCTL1") + (net 45 "unconnected-(J1-COEX2-Pad62)") + (net 46 "/ANTCTL2") + (net 47 "unconnected-(J1-COEX1-Pad64)") + (net 48 "/ANTCTL3") + (net 49 "/SIM_DETECT") + (net 50 "/RESET#") + (net 51 "/SUSCLK") + (net 52 "/CONFIG_1") + (net 53 "/CONFIG_2") + (net 54 "/PET0+") + (net 55 "/PET1+") + (net 56 "/PET1-") + (net 57 "/PET0-") + (footprint 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1.27 1.27) + ) + (justify right) + ) + ) + (pin "OUT+" input + (at 45.72 96.52 180) + (uuid "13c9754d-e48f-44f0-ac01-5970ddbbb390") + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + ) + (pin "IN-" input + (at 60.96 93.98 0) + (uuid "ac886ae9-7a92-411c-a97e-d53217d5ca3a") + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + ) + (instances + (project "M.2 B Key 22110" + (path "/f3fa63fa-fb2c-4305-95f0-f07fa800a3ec/2cfdebf3-ff5f-4f96-8b2f-db95c3f348c3" + (page "3") + ) + ) + ) + ) +) diff --git a/Templates/M.2 B Key Templates/M.2 B Key 22110/PCIe Couple Caps.kicad_sch b/Templates/M.2 B Key Templates/M.2 B Key 22110/PCIe Couple Caps.kicad_sch new file mode 100644 index 0000000..ce0f4c9 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 22110/PCIe Couple Caps.kicad_sch @@ -0,0 +1,380 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "0c06aba0-fe64-4bc3-bd4a-079ccee23272") + (paper "A4") + (lib_symbols + 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) + (property "Datasheet" "~" + (at 143.51 100.33 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 143.51 100.33 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (pin "2" + (uuid "e55fe723-aaf7-4765-bc75-3a55abfa462f") + ) + (pin "1" + (uuid "396231c3-17a0-4144-8f77-2a58c51b26fd") + ) + (instances + (project "M.2 B Key 22110" + (path "/f3fa63fa-fb2c-4305-95f0-f07fa800a3ec/2cfdebf3-ff5f-4f96-8b2f-db95c3f348c3/27d77bf0-8499-4672-87f1-05095c3d0a68" + (reference "C4") + (unit 1) + ) + (path "/f3fa63fa-fb2c-4305-95f0-f07fa800a3ec/2cfdebf3-ff5f-4f96-8b2f-db95c3f348c3/2cd6dc77-f114-44b1-9704-d60d213c1d42" + (reference "C2") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 B Key Templates/M.2 B Key 22110/meta/info.html b/Templates/M.2 B Key Templates/M.2 B Key 22110/meta/info.html new file mode 100644 index 0000000..7b95db4 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 22110/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 B Key Templates/M.2 B Key 2230/.gitignore b/Templates/M.2 B Key Templates/M.2 B Key 2230/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 2230/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B Key Templates/M.2 B Key 2230/M.2 B Key 2230.kicad_pcb b/Templates/M.2 B Key Templates/M.2 B Key 2230/M.2 B Key 2230.kicad_pcb new file mode 100644 index 0000000..9fc5795 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 2230/M.2 B Key 2230.kicad_pcb @@ -0,0 +1,3199 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + 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18 "/SIM_DETECT") + (net 19 "/UIM-PWR") + (net 20 "unconnected-(J1-COEX3-Pad60)") + (net 21 "/REFCLK-") + (net 22 "/RESET#") + (net 23 "/PER0-") + (net 24 "/GPIO_7") + (net 25 "/ANTCTL1") + (net 26 "/GPIO_0") + (net 27 "/GPIO_5") + (net 28 "/SUSCLK") + (net 29 "/GPIO_6") + (net 30 "/PERST#") + (net 31 "/UIM-CLK") + (net 32 "/GPIO_1") + (net 33 "/GPIO_10") + (net 34 "/ANTCTL0") + (net 35 "unconnected-(J1-COEX2-Pad62)") + (net 36 "/GPIO_2") + (net 37 "/CONFIG_3") + (net 38 "/PEWAKE#") + (net 39 "/CONFIG_0") + (net 40 "/GPIO_11") + (net 41 "/ANTCTL2") + (net 42 "unconnected-(J1-NC-Pad56)") + (net 43 "/USB_D-") + (net 44 "unconnected-(J1-COEX1-Pad64)") + (net 45 "/UIM-RESET") + (net 46 "/CONFIG_2") + (net 47 "/PER0+") + (net 48 "/CLKREQ#") + (net 49 "/ANTCTL3") + (net 50 "/FULL_CARD_PWR_OFF#") + (net 51 "/GPIO_9{slash}LED#1") + (net 52 "unconnected-(J1-NC-Pad58)") + (net 53 "/USB_D+") + (net 54 "/GPIO_3") + (net 55 "/REFCLK+") + (net 56 "/PER1-") + (net 57 "/PER1+") + (footprint "Athena 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This is a KiCad 9 template + diff --git a/Templates/M.2 B Key Templates/M.2 B Key 2242/.gitignore b/Templates/M.2 B Key Templates/M.2 B Key 2242/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 2242/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B Key Templates/M.2 B Key 2242/M.2 B Key 2242.kicad_pcb b/Templates/M.2 B Key Templates/M.2 B Key 2242/M.2 B Key 2242.kicad_pcb new file mode 100644 index 0000000..ad00fad --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 2242/M.2 B Key 2242.kicad_pcb @@ -0,0 +1,3176 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + 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This is a KiCad 9 template + diff --git a/Templates/M.2 B Key Templates/M.2 B Key 2260/.gitignore b/Templates/M.2 B Key Templates/M.2 B Key 2260/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 2260/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B Key Templates/M.2 B Key 2260/M.2 B Key 2260.kicad_pcb b/Templates/M.2 B Key Templates/M.2 B Key 2260/M.2 B Key 2260.kicad_pcb new file mode 100644 index 0000000..6500e7d --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 2260/M.2 B Key 2260.kicad_pcb @@ -0,0 +1,3266 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + 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This is a KiCad 9 template + diff --git a/Templates/M.2 B Key Templates/M.2 B Key 2280/.gitignore b/Templates/M.2 B Key Templates/M.2 B Key 2280/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 2280/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B Key Templates/M.2 B Key 2280/M.2 B Key 2280.kicad_pcb b/Templates/M.2 B Key Templates/M.2 B Key 2280/M.2 B Key 2280.kicad_pcb new file mode 100644 index 0000000..fdc9c03 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 2280/M.2 B Key 2280.kicad_pcb @@ -0,0 +1,3266 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"d2d8b4f7-4faa-4040-8da4-a639b5936d16") + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + ) + (instances + (project "M.2 B Key 2280" + (path "/f02f9a67-3421-481f-99a5-004295b9b181" + (page "2") + ) + ) + ) + ) + (sheet_instances + (path "/" + (page "1") + ) + ) + (embedded_fonts no) +) diff --git a/Templates/M.2 B Key Templates/M.2 B Key 2280/M.2 B key.kicad_sch b/Templates/M.2 B Key Templates/M.2 B Key 2280/M.2 B key.kicad_sch new file mode 100644 index 0000000..6d0fbdc --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 2280/M.2 B key.kicad_sch @@ -0,0 +1,3999 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "82704d6d-46d4-44c4-9e05-97698149e6dd") + (paper "A4") + (lib_symbols + (symbol "Mechanical:MountingHole_Pad" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 1.016) + (hide yes) + ) + (exclude_from_sim no) + (in_bom no) + (on_board yes) + (property "Reference" "H" + (at 0 6.35 0) + (effects + (font + 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This is a KiCad 9 template + diff --git a/Templates/M.2 B Key Templates/M.2 B Key 30110/.gitignore b/Templates/M.2 B Key Templates/M.2 B Key 30110/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 30110/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B Key Templates/M.2 B Key 30110/M.2 B key 30110.kicad_pcb b/Templates/M.2 B Key Templates/M.2 B Key 30110/M.2 B key 30110.kicad_pcb new file mode 100644 index 0000000..5beb305 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 30110/M.2 B key 30110.kicad_pcb @@ -0,0 +1,3290 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (pdf_metadata yes) + (pdf_single_document no) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (sketchpadsonfab no) + (plotpadnumbers no) + (hidednponfab no) + (sketchdnponfab yes) + (crossoutdnponfab yes) + (subtractmaskfromsilk no) + (outputformat 1) + (mirror no) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + (net 0 "") + (net 1 "/M.2 B key/PET1N") + (net 2 "/M.2 B key/PET1P") + (net 3 "/M.2 B key/PET0P") + (net 4 "/M.2 B key/PET0N") + (net 5 "/PET1-") + (net 6 "/PET0-") + (net 7 "/CONFIG_3") + (net 8 "+3.3V") + (net 9 "GND") + (net 10 "/FULL_CARD_PWR_OFF#") + (net 11 "/USB_D+") + (net 12 "/W_DISABLE1#") + (net 13 "/USB_D-") + (net 14 "/GPIO_9{slash}LED#1") + (net 15 "/GPIO_5") + (net 16 "/CONFIG_0") + (net 17 "/GPIO_6") + (net 18 "/DPR") + (net 19 "/GPIO_7") + (net 20 "/GPIO_11") + (net 21 "/GPIO_10") + (net 22 "/GPIO_8") + (net 23 "/UIM-RESET") + (net 24 "/UIM-CLK") + (net 25 "/UIM-DATA") + (net 26 "/PER1-") + (net 27 "/UIM-PWR") + (net 28 "/PER1+") + (net 29 "/DEVSLP") + (net 30 "/GPIO_0") + (net 31 "/GPIO_1") + (net 32 "/GPIO_2") + (net 33 "/GPIO_3") + (net 34 "/PER0-") + (net 35 "/GPIO_4") + (net 36 "/PER0+") + (net 37 "/PERST#") + (net 38 "/CLKREQ#") + (net 39 "/REFCLK-") + (net 40 "/PEWAKE#") + (net 41 "/REFCLK+") + (net 42 "unconnected-(J1-NC-Pad56)") + (net 43 "unconnected-(J1-NC-Pad58)") + (net 44 "/ANTCTL0") + (net 45 "unconnected-(J1-COEX3-Pad60)") + (net 46 "/ANTCTL1") + (net 47 "unconnected-(J1-COEX2-Pad62)") + (net 48 "/ANTCTL2") + (net 49 "unconnected-(J1-COEX1-Pad64)") + (net 50 "/ANTCTL3") + (net 51 "/SIM_DETECT") + (net 52 "/RESET#") + (net 53 "/SUSCLK") + (net 54 "/CONFIG_1") + (net 55 "/CONFIG_2") + (net 56 "/PET0+") + (net 57 "/PET1+") + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "00eec7ae-e629-46e2-8812-8774baccd223") + (at 110.41 153.47 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C4" + (at 0 -0.72 90) + (layer "F.SilkS") + (uuid "aeef58e6-53ed-4809-9b2c-f3958a71c8fc") + (effects + (font + (size 0.5 0.5) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "2a42951d-a1e7-45d8-a9c0-088eeec9f7f8") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "92513790-6830-451b-a966-07721cc352bb") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 0 0 90) + (layer "F.Fab") + (hide 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(roundrect_rratio 0.25) + (uuid "f3863ab4-1181-40bf-bc21-b7dba523d17f") + ) + (pad "1" smd roundrect + (at -0.32 0 90) + (size 0.46 0.4) + (layers "F.Cu" "F.Mask") + (roundrect_rratio 0.25) + (net 2 "/M.2 B key/PET1P") + (pintype "passive") + (uuid "98d15ac8-08f1-4272-9715-7ddeee3e0e59") + ) + (pad "2" smd roundrect + (at 0.32 0 90) + (size 0.46 0.4) + (layers "F.Cu" "F.Mask") + (roundrect_rratio 0.25) + (net 57 "/PET1+") + (pintype "passive") + (uuid "461e0d79-c14e-4c25-ac93-07f510761235") + ) + (embedded_fonts no) + (model "${KICAD9_3DMODEL_DIR}/Capacitor_SMD.3dshapes/C_0201_0603Metric.wrl" + (offset + (xyz 0 0 0) + ) + (scale + (xyz 1 1 1) + ) + (rotate + (xyz 0 0 0) + ) + ) + ) + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "5a769ddd-b568-4b9f-8dd2-37dd2145500d") + (at 108.11 153.47 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C1" + (at 0 0.73 270) + (layer "F.SilkS") + (uuid "a5a5fb2d-c10c-4392-b157-7a87ebcf2472") + (effects + (font + (size 0.5 0.5) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "896b5c6e-b63d-465d-b238-48b6dc0794d1") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "b1b8a1f6-b573-4b97-b641-141087f8d413") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "6a5f92fe-5fe3-4d15-a470-5cedf90d44ac") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (attr smd) + (fp_line + (start 0.7 -0.35) + (end 0.7 0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (net 1) + (uuid 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(uuid "b4a731f9-4a90-4abd-a9c3-5bb743ae2004") + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + ) + (pin "FULL_CARD_PWR_OFF#" input + (at 140.97 142.24 0) + (uuid "01cc697b-9af8-4c07-ab41-2a5d9bf4e3dd") + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + ) + (pin "DPR" input + (at 140.97 139.7 0) + (uuid "3919e479-660e-4b20-895c-417bd83821d0") + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + ) + (pin "SUSCLK" input + (at 106.68 140.97 180) + (uuid "7d63355c-7474-456e-8e25-72f0b0e3255b") + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + ) + (instances + (project "M.2 B key 30110" + (path "/214bfc41-24f4-4af9-b8d5-f53b552105c4" + (page "2") + ) + ) + ) + ) + (sheet_instances + (path "/" + (page "1") + ) + ) + (embedded_fonts no) +) diff --git a/Templates/M.2 B Key Templates/M.2 B Key 30110/M.2 B key.kicad_sch b/Templates/M.2 B Key Templates/M.2 B Key 30110/M.2 B key.kicad_sch new file mode 100644 index 0000000..a50a154 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 30110/M.2 B key.kicad_sch @@ -0,0 +1,3999 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "82704d6d-46d4-44c4-9e05-97698149e6dd") + (paper "A4") + (lib_symbols + (symbol "Mechanical:MountingHole_Pad" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 1.016) + (hide yes) + ) + (exclude_from_sim no) + (in_bom no) + (on_board yes) + (property "Reference" "H" + (at 0 6.35 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "MountingHole_Pad" + (at 0 4.445 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Datasheet" "~" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Description" "Mounting Hole with connection" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property 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This is a KiCad 9 template + diff --git a/Templates/M.2 B Key Templates/M.2 B Key 3030/.gitignore b/Templates/M.2 B Key Templates/M.2 B Key 3030/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 3030/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B Key Templates/M.2 B Key 3030/M.2 B Key 3030.kicad_pcb b/Templates/M.2 B Key Templates/M.2 B Key 3030/M.2 B Key 3030.kicad_pcb new file mode 100644 index 0000000..fa3d24b --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 3030/M.2 B Key 3030.kicad_pcb @@ -0,0 +1,3160 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 1.6) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (pdf_metadata yes) + (pdf_single_document no) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (sketchpadsonfab no) + (plotpadnumbers no) + (hidednponfab no) + (sketchdnponfab yes) + (crossoutdnponfab yes) + (subtractmaskfromsilk no) + (outputformat 1) + (mirror no) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + (net 0 "") + (net 1 "/M.2 B key/PET0N") + (net 2 "/M.2 B key/PET0P") + (net 3 "/M.2 B key/PET1P") + (net 4 "/M.2 B key/PET1N") + (net 5 "GND") + (net 6 "/CONFIG_3") + (net 7 "+3.3V") + (net 8 "/FULL_CARD_PWR_OFF#") + (net 9 "/USB_D+") + (net 10 "/W_DISABLE1#") + (net 11 "/USB_D-") + (net 12 "/GPIO_9{slash}LED#1") + (net 13 "/GPIO_5") + (net 14 "/CONFIG_0") + (net 15 "/GPIO_6") + (net 16 "/DPR") + (net 17 "/GPIO_7") + (net 18 "/GPIO_11") + (net 19 "/GPIO_10") + (net 20 "/GPIO_8") + (net 21 "/UIM-RESET") + (net 22 "/UIM-CLK") + (net 23 "/UIM-DATA") + (net 24 "/PER1-") + (net 25 "/UIM-PWR") + (net 26 "/PER1+") + (net 27 "/DEVSLP") + (net 28 "/GPIO_0") + (net 29 "/GPIO_1") + (net 30 "/GPIO_2") + (net 31 "/GPIO_3") + (net 32 "/PER0-") + (net 33 "/GPIO_4") + (net 34 "/PER0+") + (net 35 "/PERST#") + (net 36 "/CLKREQ#") + (net 37 "/REFCLK-") + (net 38 "/PEWAKE#") + (net 39 "/REFCLK+") + (net 40 "unconnected-(J1-NC-Pad56)") + (net 41 "unconnected-(J1-NC-Pad58)") + (net 42 "/ANTCTL0") + (net 43 "unconnected-(J1-COEX3-Pad60)") + (net 44 "/ANTCTL1") + (net 45 "unconnected-(J1-COEX2-Pad62)") + (net 46 "/ANTCTL2") + (net 47 "unconnected-(J1-COEX1-Pad64)") + (net 48 "/ANTCTL3") + (net 49 "/SIM_DETECT") + (net 50 "/RESET#") + (net 51 "/SUSCLK") + (net 52 "/CONFIG_1") + (net 53 "/CONFIG_2") + (net 54 "/PET0+") + (net 55 "/PET1+") + (net 56 "/PET1-") + (net 57 "/PET0-") + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "0d079970-0806-4cc7-a7ad-ec83bb19f056") + (at 108.36 153.24 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C1" + (at 0 0.73 270) + (layer "F.SilkS") + (uuid "32829e15-e0eb-496a-b416-6586949d9cb3") + (effects + (font + (size 0.5 0.5) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid 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"9.0") + (uuid "82704d6d-46d4-44c4-9e05-97698149e6dd") + (paper "A4") + (lib_symbols + (symbol "Mechanical:MountingHole_Pad" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 1.016) + (hide yes) + ) + (exclude_from_sim no) + (in_bom no) + (on_board yes) + (property "Reference" "H" + (at 0 6.35 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "MountingHole_Pad" + (at 0 4.445 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Datasheet" "~" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Description" "Mounting Hole with connection" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "ki_keywords" "mounting hole" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "ki_fp_filters" "MountingHole*Pad*" + (at 0 0 0) + (effects + (font + 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This is a KiCad 9 template + diff --git a/Templates/M.2 B Key Templates/M.2 B Key 3042/.gitignore b/Templates/M.2 B Key Templates/M.2 B Key 3042/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 3042/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B Key Templates/M.2 B Key 3042/M.2 B key 3042.kicad_pcb b/Templates/M.2 B Key Templates/M.2 B Key 3042/M.2 B key 3042.kicad_pcb new file mode 100644 index 0000000..2d70149 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 3042/M.2 B key 3042.kicad_pcb @@ -0,0 +1,3200 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (pdf_metadata yes) + (pdf_single_document no) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (sketchpadsonfab no) + (plotpadnumbers no) + (hidednponfab no) + (sketchdnponfab yes) + (crossoutdnponfab yes) + (subtractmaskfromsilk no) + (outputformat 1) + (mirror no) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + (net 0 "") + (net 1 "/M.2 B key/PET1N") + (net 2 "/M.2 B key/PET1P") + (net 3 "/M.2 B key/PET0P") + (net 4 "/M.2 B key/PET0N") + (net 5 "/PET1-") + (net 6 "/PET0-") + (net 7 "/CONFIG_3") + (net 8 "+3.3V") + (net 9 "GND") + (net 10 "/FULL_CARD_PWR_OFF#") + (net 11 "/USB_D+") + (net 12 "/W_DISABLE1#") + (net 13 "/USB_D-") + (net 14 "/GPIO_9{slash}LED#1") + (net 15 "/GPIO_5") + (net 16 "/CONFIG_0") + (net 17 "/GPIO_6") + (net 18 "/DPR") + (net 19 "/GPIO_7") + (net 20 "/GPIO_11") + (net 21 "/GPIO_10") + (net 22 "/GPIO_8") + (net 23 "/UIM-RESET") + (net 24 "/UIM-CLK") + (net 25 "/UIM-DATA") + (net 26 "/PER1-") + (net 27 "/UIM-PWR") + (net 28 "/PER1+") + (net 29 "/DEVSLP") + (net 30 "/GPIO_0") + (net 31 "/GPIO_1") + (net 32 "/GPIO_2") + (net 33 "/GPIO_3") + (net 34 "/PER0-") + (net 35 "/GPIO_4") + (net 36 "/PER0+") + (net 37 "/PERST#") + (net 38 "/CLKREQ#") + (net 39 "/REFCLK-") + (net 40 "/PEWAKE#") + (net 41 "/REFCLK+") + (net 42 "unconnected-(J1-NC-Pad56)") + (net 43 "unconnected-(J1-NC-Pad58)") + (net 44 "/ANTCTL0") + (net 45 "unconnected-(J1-COEX3-Pad60)") + (net 46 "/ANTCTL1") + (net 47 "unconnected-(J1-COEX2-Pad62)") + (net 48 "/ANTCTL2") + (net 49 "unconnected-(J1-COEX1-Pad64)") + (net 50 "/ANTCTL3") + (net 51 "/SIM_DETECT") + (net 52 "/RESET#") + (net 53 "/SUSCLK") + (net 54 "/CONFIG_1") + (net 55 "/CONFIG_2") + (net 56 "/PET0+") + (net 57 "/PET1+") + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "0c643610-2eb1-4c9f-a494-16a6ec64b0b6") + (at 108.16 154.72 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C2" + (at 0 -0.73 90) + (layer "F.SilkS") + (uuid "eb1b7d02-7678-410e-8726-4eef9ea83be5") + (effects + (font + (size 0.5 0.5) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "b7e5cbae-a64e-463c-8778-0131878eb128") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "bd87f155-c4bc-4712-980d-61ef33f1c6c1") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 0 0 90) + (layer "F.Fab") + (hide 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"/16cc4e00-b4ef-48df-8291-57cc6b27a578" + (page "2") + ) + ) + ) + ) + (sheet_instances + (path "/" + (page "1") + ) + ) + (embedded_fonts no) +) diff --git a/Templates/M.2 B Key Templates/M.2 B Key 3042/M.2 B key.kicad_sch b/Templates/M.2 B Key Templates/M.2 B Key 3042/M.2 B key.kicad_sch new file mode 100644 index 0000000..cfbeca1 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 3042/M.2 B key.kicad_sch @@ -0,0 +1,3999 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "82704d6d-46d4-44c4-9e05-97698149e6dd") + (paper "A4") + (lib_symbols + (symbol "Mechanical:MountingHole_Pad" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 1.016) + (hide yes) + ) + (exclude_from_sim no) + (in_bom no) + (on_board yes) + (property "Reference" "H" + (at 0 6.35 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "MountingHole_Pad" + (at 0 4.445 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Datasheet" "~" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Description" "Mounting Hole with connection" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "ki_keywords" "mounting hole" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "ki_fp_filters" "MountingHole*Pad*" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (symbol "MountingHole_Pad_0_1" + (circle + (center 0 1.27) + (radius 1.27) + (stroke + (width 1.27) + (type default) + ) + (fill + (type none) + ) + ) + ) + (symbol "MountingHole_Pad_1_1" + (pin input line + (at 0 -2.54 90) + (length 2.54) + (name "1" + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (number "1" + (effects + (font + (size 1.27 1.27) + ) + ) + ) + ) + ) + (embedded_fonts no) + ) + (symbol "PCIexpress:M.2_B_Key" + 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This is a KiCad 9 template + diff --git a/Templates/M.2 B Key Templates/M.2 B Key 3060/.gitignore b/Templates/M.2 B Key Templates/M.2 B Key 3060/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 3060/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B Key Templates/M.2 B Key 3060/M.2 B Key 3060.kicad_pcb b/Templates/M.2 B Key Templates/M.2 B Key 3060/M.2 B Key 3060.kicad_pcb new file mode 100644 index 0000000..ff6dced --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 3060/M.2 B Key 3060.kicad_pcb @@ -0,0 +1,3200 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (pdf_metadata yes) + (pdf_single_document no) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (sketchpadsonfab no) + (plotpadnumbers no) + (hidednponfab no) + (sketchdnponfab yes) + (crossoutdnponfab yes) + (subtractmaskfromsilk no) + (outputformat 1) + (mirror no) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + (net 0 "") + (net 1 "/M.2 B key/PET1N") + (net 2 "/M.2 B key/PET1P") + (net 3 "/M.2 B key/PET0P") + (net 4 "/M.2 B key/PET0N") + (net 5 "/PET1-") + (net 6 "/PET0-") + (net 7 "/CONFIG_3") + (net 8 "+3.3V") + (net 9 "GND") + (net 10 "/FULL_CARD_PWR_OFF#") + (net 11 "/USB_D+") + (net 12 "/W_DISABLE1#") + (net 13 "/USB_D-") + (net 14 "/GPIO_9{slash}LED#1") + (net 15 "/GPIO_5") + (net 16 "/CONFIG_0") + (net 17 "/GPIO_6") + (net 18 "/DPR") + (net 19 "/GPIO_7") + (net 20 "/GPIO_11") + (net 21 "/GPIO_10") + (net 22 "/GPIO_8") + (net 23 "/UIM-RESET") + (net 24 "/UIM-CLK") + (net 25 "/UIM-DATA") + (net 26 "/PER1-") + (net 27 "/UIM-PWR") + (net 28 "/PER1+") + (net 29 "/DEVSLP") + (net 30 "/GPIO_0") + (net 31 "/GPIO_1") + (net 32 "/GPIO_2") + (net 33 "/GPIO_3") + (net 34 "/PER0-") + (net 35 "/GPIO_4") + (net 36 "/PER0+") + (net 37 "/PERST#") + (net 38 "/CLKREQ#") + (net 39 "/REFCLK-") + (net 40 "/PEWAKE#") + (net 41 "/REFCLK+") + (net 42 "unconnected-(J1-NC-Pad56)") + (net 43 "unconnected-(J1-NC-Pad58)") + (net 44 "/ANTCTL0") + (net 45 "unconnected-(J1-COEX3-Pad60)") + (net 46 "/ANTCTL1") + (net 47 "unconnected-(J1-COEX2-Pad62)") + (net 48 "/ANTCTL2") + (net 49 "unconnected-(J1-COEX1-Pad64)") + (net 50 "/ANTCTL3") + (net 51 "/SIM_DETECT") + (net 52 "/RESET#") + (net 53 "/SUSCLK") + (net 54 "/CONFIG_1") + (net 55 "/CONFIG_2") + (net 56 "/PET0+") + (net 57 "/PET1+") + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "0d94e3dc-a8b4-4053-9475-75412033c060") + (at 111.41 155.47 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C4" + (at 0 -0.72 90) + (layer "F.SilkS") + (uuid "ad11deeb-69a1-4b1e-8721-4af3602f6a68") + (effects + (font + (size 0.5 0.5) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "1c27c5ed-de18-430a-9c76-f71859249983") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "d9409957-072d-4787-9ff8-31daab268c86") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 0 0 90) + (layer "F.Fab") + (hide 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3060/M.2 B key.kicad_sch new file mode 100644 index 0000000..97828e6 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 3060/M.2 B key.kicad_sch @@ -0,0 +1,3999 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "82704d6d-46d4-44c4-9e05-97698149e6dd") + (paper "A4") + (lib_symbols + (symbol "Mechanical:MountingHole_Pad" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 1.016) + (hide yes) + ) + (exclude_from_sim no) + (in_bom no) + (on_board yes) + (property "Reference" "H" + (at 0 6.35 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "MountingHole_Pad" + (at 0 4.445 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Datasheet" "~" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Description" "Mounting Hole with connection" + (at 0 0 0) + (effects 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This is a KiCad 9 template + diff --git a/Templates/M.2 B Key Templates/M.2 B Key 3080/.gitignore b/Templates/M.2 B Key Templates/M.2 B Key 3080/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 3080/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B Key Templates/M.2 B Key 3080/M.2 B Key 3080.kicad_pcb b/Templates/M.2 B Key Templates/M.2 B Key 3080/M.2 B Key 3080.kicad_pcb new file mode 100644 index 0000000..95411d5 --- /dev/null +++ b/Templates/M.2 B Key Templates/M.2 B Key 3080/M.2 B Key 3080.kicad_pcb @@ -0,0 +1,3198 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (pdf_metadata yes) + (pdf_single_document no) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (sketchpadsonfab no) + (plotpadnumbers no) + (hidednponfab no) + (sketchdnponfab yes) + (crossoutdnponfab yes) + (subtractmaskfromsilk no) + (outputformat 1) + (mirror no) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + (net 0 "") + (net 1 "/M.2 B key/PET1N") + (net 2 "/M.2 B key/PET1P") + (net 3 "/M.2 B key/PET0P") + (net 4 "/M.2 B key/PET0N") + (net 5 "/PET1-") + (net 6 "/PET0-") + (net 7 "/CONFIG_3") + (net 8 "+3.3V") + (net 9 "GND") + (net 10 "/FULL_CARD_PWR_OFF#") + (net 11 "/USB_D+") + (net 12 "/W_DISABLE1#") + (net 13 "/USB_D-") + (net 14 "/GPIO_9{slash}LED#1") + (net 15 "/GPIO_5") + (net 16 "/CONFIG_0") + (net 17 "/GPIO_6") + (net 18 "/DPR") + (net 19 "/GPIO_7") + (net 20 "/GPIO_11") + (net 21 "/GPIO_10") + (net 22 "/GPIO_8") + (net 23 "/UIM-RESET") + (net 24 "/UIM-CLK") + (net 25 "/UIM-DATA") + (net 26 "/PER1-") + (net 27 "/UIM-PWR") + (net 28 "/PER1+") + (net 29 "/DEVSLP") + (net 30 "/GPIO_0") + (net 31 "/GPIO_1") + (net 32 "/GPIO_2") + (net 33 "/GPIO_3") + (net 34 "/PER0-") + (net 35 "/GPIO_4") + (net 36 "/PER0+") + (net 37 "/PERST#") + (net 38 "/CLKREQ#") + (net 39 "/REFCLK-") + (net 40 "/PEWAKE#") + (net 41 "/REFCLK+") + (net 42 "unconnected-(J1-NC-Pad56)") + (net 43 "unconnected-(J1-NC-Pad58)") + (net 44 "/ANTCTL0") + (net 45 "unconnected-(J1-COEX3-Pad60)") + (net 46 "/ANTCTL1") + (net 47 "unconnected-(J1-COEX2-Pad62)") + (net 48 "/ANTCTL2") + (net 49 "unconnected-(J1-COEX1-Pad64)") + (net 50 "/ANTCTL3") + (net 51 "/SIM_DETECT") + (net 52 "/RESET#") + (net 53 "/SUSCLK") + (net 54 "/CONFIG_1") + (net 55 "/CONFIG_2") + (net 56 "/PET0+") + (net 57 "/PET1+") + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "109443c9-78ab-4dbd-8793-15e217902c64") + (at 107.66 150.41 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C2" + (at 0 -0.73 90) + (layer "F.SilkS") + (uuid "2cf9afae-af87-4549-ad47-b9e22834034f") + (effects + (font + (size 0.5 0.5) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "0b799439-0415-4862-bae0-4be726fe8945") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "7cda57e6-9847-4e4a-8f89-ab171517cbd4") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 0 0 90) + (layer "F.Fab") + (hide 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This is a KiCad 9 template + diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 22110/.gitignore b/Templates/M.2 B+M Key Templates/M.2 B+M Key 22110/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 22110/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 22110/M.2 B+M Key 22110.kicad_pcb b/Templates/M.2 B+M Key Templates/M.2 B+M Key 22110/M.2 B+M Key 22110.kicad_pcb new file mode 100644 index 0000000..927af28 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 22110/M.2 B+M Key 22110.kicad_pcb @@ -0,0 +1,3259 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + 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yes) + ) + ) + (pin "2" + (uuid "80430cb9-b4b4-48a1-9795-86a7124d5506") + ) + (pin "1" + (uuid "5edc64c5-9f2e-445b-a6b8-138a1f7edfaa") + ) + (instances + (project "M.2 B+M Key 22110" + (path "/a237e335-d00c-4750-a072-6582cd3125fb/2543d8f5-6a71-4624-8bbc-11852c8372b1/49bba5f2-c387-43d5-bfb3-4f108d45a837" + (reference "C2") + (unit 1) + ) + (path "/a237e335-d00c-4750-a072-6582cd3125fb/2543d8f5-6a71-4624-8bbc-11852c8372b1/b5a0e78d-bc67-4b7e-8137-4f88148172fd" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 22110/meta/info.html b/Templates/M.2 B+M Key Templates/M.2 B+M Key 22110/meta/info.html new file mode 100644 index 0000000..1658ab8 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 22110/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2230/.gitignore b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2230/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2230/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2230/M.2 B+M Key 2230.kicad_pcb b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2230/M.2 B+M Key 2230.kicad_pcb new file mode 100644 index 0000000..12074f0 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2230/M.2 B+M Key 2230.kicad_pcb @@ -0,0 +1,3187 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" 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(uuid "433aa8c8-392c-44fb-8f4f-e5b8ce7ad996") + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + ) + (instances + (project "M.2 B+M Key 2230" + (path "/7eaf6b55-0f11-4912-bb58-f9dbc0625108/83dcd142-0f4d-4852-9a7e-5099cdae9f20" + (page "4") + ) + ) + ) + ) +) diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2230/PCIe Couple Caps.kicad_sch b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2230/PCIe Couple Caps.kicad_sch new file mode 100644 index 0000000..ea545d8 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2230/PCIe Couple Caps.kicad_sch @@ -0,0 +1,380 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "0c06aba0-fe64-4bc3-bd4a-079ccee23272") + (paper "A4") + (lib_symbols + (symbol "Device:C" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 0.254) + ) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (property "Reference" "C" + (at 0.635 2.54 0) + (effects + (font + (size 1.27 1.27) + ) + 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) + (pin "2" + (uuid "c35fad9a-89c6-4e61-8364-043394cbdf9c") + ) + (pin "1" + (uuid "b7ce36f1-5939-4685-b59e-3e9dc3714d7a") + ) + (instances + (project "M.2 B+M Key 2230" + (path "/7eaf6b55-0f11-4912-bb58-f9dbc0625108/83dcd142-0f4d-4852-9a7e-5099cdae9f20/49bba5f2-c387-43d5-bfb3-4f108d45a837" + (reference "C2") + (unit 1) + ) + (path "/7eaf6b55-0f11-4912-bb58-f9dbc0625108/83dcd142-0f4d-4852-9a7e-5099cdae9f20/b5a0e78d-bc67-4b7e-8137-4f88148172fd" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2230/meta/info.html b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2230/meta/info.html new file mode 100644 index 0000000..da38a92 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2230/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2242/.gitignore b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2242/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2242/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2242/M.2 B+M Key 2242.kicad_pcb b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2242/M.2 B+M Key 2242.kicad_pcb new file mode 100644 index 0000000..ccbfb2f --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2242/M.2 B+M Key 2242.kicad_pcb @@ -0,0 +1,3260 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 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"/GPIO_9{slash}LED#1") + (net 16 "/GPIO_5") + (net 17 "/CONFIG_0") + (net 18 "/GPIO_6") + (net 19 "/DPR") + (net 20 "/GPIO_7") + (net 21 "/GPIO_11") + (net 22 "/GPIO_10") + (net 23 "/GPIO_8") + (net 24 "/UIM-RESET") + (net 25 "/UIM-CLK") + (net 26 "/UIM-DATA") + (net 27 "/PER1-") + (net 28 "/UIM-PWR") + (net 29 "/PER1+") + (net 30 "/DEVSLP") + (net 31 "/GPIO_0") + (net 32 "/GPIO_1") + (net 33 "/GPIO_2") + (net 34 "/GPIO_3") + (net 35 "/PER0-") + (net 36 "/GPIO_4") + (net 37 "/PER0+") + (net 38 "/PERST#") + (net 39 "/CLKREQ#") + (net 40 "/REFCLK-") + (net 41 "/PEWAKE#") + (net 42 "/REFCLK+") + (net 43 "unconnected-(J1-NC-Pad56)") + (net 44 "unconnected-(J1-NC-Pad58)") + (net 45 "/RESET#") + (net 46 "/SUSCLK") + (net 47 "/CONFIG_1") + (net 48 "/CONFIG_2") + (net 49 "/PET1-") + (footprint "Athena KiCAd library:M.2 Mounting Pad" + (layer "F.Cu") + (uuid "481e848d-3059-4427-9495-74e14df4914a") + (at 108.51 117.59) + (property "Reference" "H1" + (at 0 -4.82 0) + (unlocked yes) + (layer "F.Fab") + (uuid "6ceb84ab-2c3f-4bd7-9448-684a6e8c4a14") + (effects + (font + (size 1 1) + (thickness 0.1) + ) + ) + ) + (property "Value" "MountingHole_Pad" + (at 0 1 0) + (unlocked yes) + (layer "F.Fab") + (uuid "f749ece0-6459-4111-b58e-afba5b2e6dde") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 0) + (unlocked yes) + (layer "F.Fab") + (hide yes) + (uuid "b6de276e-ffd2-45e9-ac05-e1840e361885") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Description" "Mounting Hole with connection" + (at 0 0 0) + (unlocked yes) + (layer "F.Fab") + (hide yes) + (uuid "0b3703a0-1caa-4520-88e0-038b3a159e86") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (attr smd exclude_from_bom) + (fp_text user "${REFERENCE}" + (at 0 2.5 0) + (unlocked yes) + (layer "F.Fab") + (uuid "17c9c865-a001-4bba-84c2-9bae65f5bddb") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (pad "1" thru_hole circle + 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(uuid "f9c293b1-81e0-4aab-b3d4-0cb86453e8d7") + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + ) + (instances + (project "M.2 B+M Key 2242" + (path "/253eff07-53f4-4bee-bab0-3832dd5598c8" + (page "2") + ) + ) + ) + ) + (sheet_instances + (path "/" + (page "1") + ) + ) + (embedded_fonts no) +) diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2242/M.2 B+M key.kicad_sch b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2242/M.2 B+M key.kicad_sch new file mode 100644 index 0000000..f8da3f3 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2242/M.2 B+M key.kicad_sch @@ -0,0 +1,3714 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "47267e8c-a37a-4dc6-a561-99ca5ccc9577") + (paper "A4") + (lib_symbols + (symbol "Mechanical:MountingHole_Pad" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 1.016) + (hide yes) + ) + (exclude_from_sim no) + (in_bom no) + (on_board yes) + (property "Reference" "H" + (at 0 6.35 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yes) + ) + ) + (pin "2" + (uuid "563466d0-7e99-4388-b06a-311e6006e3d5") + ) + (pin "1" + (uuid "6260ba52-6ecf-488e-94dd-10d95740eca3") + ) + (instances + (project "M.2 B+M Key 2242" + (path "/253eff07-53f4-4bee-bab0-3832dd5598c8/94c20632-289a-4bcd-acaf-b86d2878e857/49bba5f2-c387-43d5-bfb3-4f108d45a837" + (reference "C2") + (unit 1) + ) + (path "/253eff07-53f4-4bee-bab0-3832dd5598c8/94c20632-289a-4bcd-acaf-b86d2878e857/b5a0e78d-bc67-4b7e-8137-4f88148172fd" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2242/meta/info.html b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2242/meta/info.html new file mode 100644 index 0000000..a078839 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2242/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2260/.gitignore b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2260/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2260/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2260/M.2 B+M Key 2260.kicad_pcb b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2260/M.2 B+M Key 2260.kicad_pcb new file mode 100644 index 0000000..9c9aca9 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2260/M.2 B+M Key 2260.kicad_pcb @@ -0,0 +1,3163 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" 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a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2260/M.2 B+M key.kicad_sch b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2260/M.2 B+M key.kicad_sch new file mode 100644 index 0000000..cace90a --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2260/M.2 B+M key.kicad_sch @@ -0,0 +1,3714 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "47267e8c-a37a-4dc6-a561-99ca5ccc9577") + (paper "A4") + (lib_symbols + (symbol "Mechanical:MountingHole_Pad" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 1.016) + (hide yes) + ) + (exclude_from_sim no) + (in_bom no) + (on_board yes) + (property "Reference" "H" + (at 0 6.35 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "MountingHole_Pad" + (at 0 4.445 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Datasheet" "~" + (at 0 0 0) + (effects + (font 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yes) + ) + ) + (pin "2" + (uuid "087b1f31-49d3-4e34-ba18-5385b5bf14ba") + ) + (pin "1" + (uuid "7ce1c611-b176-44d6-96bd-9aa6fb1f38df") + ) + (instances + (project "M.2 B+M Key 2260" + (path "/bf595846-33e1-4f83-992a-a65eed3469a0/82c5a48b-099a-43ad-b86b-8105f738af61/49bba5f2-c387-43d5-bfb3-4f108d45a837" + (reference "C2") + (unit 1) + ) + (path "/bf595846-33e1-4f83-992a-a65eed3469a0/82c5a48b-099a-43ad-b86b-8105f738af61/b5a0e78d-bc67-4b7e-8137-4f88148172fd" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2260/meta/info.html b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2260/meta/info.html new file mode 100644 index 0000000..c6365f6 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2260/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2280/.gitignore b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2280/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2280/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2280/M.2 B+M Key 2280.kicad_pcb b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2280/M.2 B+M Key 2280.kicad_pcb new file mode 100644 index 0000000..562bd96 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2280/M.2 B+M Key 2280.kicad_pcb @@ -0,0 +1,3259 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" 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yes) + ) + ) + (pin "2" + (uuid "077265ec-1ab9-4543-ab5a-4cb2843c442f") + ) + (pin "1" + (uuid "31748f9b-a33c-495d-a6fc-1190500d5a73") + ) + (instances + (project "M.2 B+M Key 2280" + (path "/0e5434ce-5e10-40a4-84b4-46c88cb3228f/932cf4bc-be2d-469c-911a-4326b33c6b54/49bba5f2-c387-43d5-bfb3-4f108d45a837" + (reference "C2") + (unit 1) + ) + (path "/0e5434ce-5e10-40a4-84b4-46c88cb3228f/932cf4bc-be2d-469c-911a-4326b33c6b54/b5a0e78d-bc67-4b7e-8137-4f88148172fd" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 2280/meta/info.html b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2280/meta/info.html new file mode 100644 index 0000000..04429b5 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 2280/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 30110/.gitignore b/Templates/M.2 B+M Key Templates/M.2 B+M Key 30110/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 30110/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 30110/M.2 B+M Key 30110.kicad_pcb b/Templates/M.2 B+M Key Templates/M.2 B+M Key 30110/M.2 B+M Key 30110.kicad_pcb new file mode 100644 index 0000000..9ef09be --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 30110/M.2 B+M Key 30110.kicad_pcb @@ -0,0 +1,3187 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + 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15 "/GPIO_9{slash}LED#1") + (net 16 "/GPIO_5") + (net 17 "/CONFIG_0") + (net 18 "/GPIO_6") + (net 19 "/DPR") + (net 20 "/GPIO_7") + (net 21 "/GPIO_11") + (net 22 "/GPIO_10") + (net 23 "/GPIO_8") + (net 24 "/UIM-RESET") + (net 25 "/UIM-CLK") + (net 26 "/UIM-DATA") + (net 27 "/PER1-") + (net 28 "/UIM-PWR") + (net 29 "/PER1+") + (net 30 "/DEVSLP") + (net 31 "/GPIO_0") + (net 32 "/GPIO_1") + (net 33 "/GPIO_2") + (net 34 "/GPIO_3") + (net 35 "/PER0-") + (net 36 "/GPIO_4") + (net 37 "/PER0+") + (net 38 "/PERST#") + (net 39 "/CLKREQ#") + (net 40 "/REFCLK-") + (net 41 "/PEWAKE#") + (net 42 "/REFCLK+") + (net 43 "unconnected-(J1-NC-Pad56)") + (net 44 "unconnected-(J1-NC-Pad58)") + (net 45 "/RESET#") + (net 46 "/SUSCLK") + (net 47 "/CONFIG_1") + (net 48 "/CONFIG_2") + (net 49 "/PET0-") + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "4a553d2a-88b4-4f75-b08f-a133d923b70e") + (at 110.66 154.57 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C4" + (at 0 -0.71 90) + (layer "F.SilkS") + (uuid "fbddb0c2-5fb7-4611-8f9d-0efd4c8361a9") + (effects + (font + (size 0.5 0.5) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "6c435924-427b-4a65-a89a-49096df77ddb") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "d116ca1e-0469-492d-b0b3-de29ca277afe") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "da02382e-d576-4553-b141-9ebf54db5205") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (attr smd) + (fp_line + (start 0.7 -0.35) + (end 0.7 0.35) + (stroke + (width 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solid) + ) + (layer "F.Fab") + (uuid "c7a0991f-5859-41cf-8522-84a7ede90b64") + ) + (fp_line + (start -0.3 0.15) + (end -0.3 -0.15) + (stroke + (width 0.1) + (type solid) + ) + (layer "F.Fab") + (uuid "f19c0064-0541-4c9b-ae52-28f42f1a6a1e") + ) + (fp_text user "${REFERENCE}" + (at 0 -0.68 90) + (layer "F.Fab") + (uuid "5ddc99f3-e07e-47d2-acc5-ca84c1076863") + (effects + (font + (size 0.25 0.25) + (thickness 0.04) + ) + ) + ) + (pad "" smd roundrect + (at -0.345 0 90) + (size 0.318 0.36) + (layers "F.Paste") + (roundrect_rratio 0.25) + (uuid "a1cc418b-9f3d-4d13-869a-b2d626ab8c33") + ) + (pad "" smd roundrect + (at 0.345 0 90) + (size 0.318 0.36) + (layers "F.Paste") + (roundrect_rratio 0.25) + (uuid "3a94fc7d-36d3-4b59-aefc-ac55700c1541") + ) + (pad "1" smd roundrect + (at -0.32 0 90) + (size 0.46 0.4) + (layers "F.Cu" "F.Mask") + (roundrect_rratio 0.25) + (net 3 "/M.2 B+M Key/PET1P") + (pintype "passive") + (uuid "69066cc2-27e8-4ee0-89f8-9714b89597af") + ) + (pad "2" smd roundrect + (at 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a/Templates/M.2 B+M Key Templates/M.2 B+M Key 30110/M.2 B+M key.kicad_sch b/Templates/M.2 B+M Key Templates/M.2 B+M Key 30110/M.2 B+M key.kicad_sch new file mode 100644 index 0000000..43dbf6d --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 30110/M.2 B+M key.kicad_sch @@ -0,0 +1,3714 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "47267e8c-a37a-4dc6-a561-99ca5ccc9577") + (paper "A4") + (lib_symbols + (symbol "Mechanical:MountingHole_Pad" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 1.016) + (hide yes) + ) + (exclude_from_sim no) + (in_bom no) + (on_board yes) + (property "Reference" "H" + (at 0 6.35 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "MountingHole_Pad" + (at 0 4.445 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Datasheet" "~" + (at 0 0 0) + (effects + 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yes) + ) + ) + (pin "2" + (uuid "3f797ba9-4cca-4083-8328-6e1edfbab379") + ) + (pin "1" + (uuid "ebbb8125-bf85-49f5-ad0a-2665cc2fa6a6") + ) + (instances + (project "M.2 B+M Key 30110" + (path "/4d4860f4-2bdc-4b48-b740-5ce90df16949/380d4eb8-16bb-4061-873c-1ba2cf97bca6/49bba5f2-c387-43d5-bfb3-4f108d45a837" + (reference "C2") + (unit 1) + ) + (path "/4d4860f4-2bdc-4b48-b740-5ce90df16949/380d4eb8-16bb-4061-873c-1ba2cf97bca6/b5a0e78d-bc67-4b7e-8137-4f88148172fd" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 30110/meta/info.html b/Templates/M.2 B+M Key Templates/M.2 B+M Key 30110/meta/info.html new file mode 100644 index 0000000..f311faa --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 30110/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3030/.gitignore b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3030/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3030/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3030/M.2 B+M Key 3030.kicad_pcb b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3030/M.2 B+M Key 3030.kicad_pcb new file mode 100644 index 0000000..5c7cfa8 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3030/M.2 B+M Key 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"/99c03190-ad99-4b1f-8f22-805ba5f522f9" + (page "2") + ) + ) + ) + ) + (sheet_instances + (path "/" + (page "1") + ) + ) + (embedded_fonts no) +) diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3030/M.2 B+M key.kicad_sch b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3030/M.2 B+M key.kicad_sch new file mode 100644 index 0000000..ec71c95 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3030/M.2 B+M key.kicad_sch @@ -0,0 +1,3714 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "47267e8c-a37a-4dc6-a561-99ca5ccc9577") + (paper "A4") + (lib_symbols + (symbol "Mechanical:MountingHole_Pad" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 1.016) + (hide yes) + ) + (exclude_from_sim no) + (in_bom no) + (on_board yes) + (property "Reference" "H" + (at 0 6.35 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "MountingHole_Pad" + (at 0 4.445 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Datasheet" "~" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Description" "Mounting Hole with connection" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "ki_keywords" "mounting hole" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "ki_fp_filters" "MountingHole*Pad*" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (symbol "MountingHole_Pad_0_1" + (circle + (center 0 1.27) + (radius 1.27) + (stroke + (width 1.27) + (type default) + ) + (fill + (type none) + ) + ) + ) + (symbol "MountingHole_Pad_1_1" + (pin input line + (at 0 -2.54 90) + (length 2.54) + (name "1" + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (number "1" + (effects + (font + (size 1.27 1.27) + ) + ) + ) + ) + ) + (embedded_fonts no) + ) + (symbol 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yes) + ) + ) + (pin "2" + (uuid "b5d63167-a1b5-452b-82c5-9833d09978da") + ) + (pin "1" + (uuid "a24bdb7b-2c3e-47f2-84b3-286d2fe98ff2") + ) + (instances + (project "M.2 B+M Key 3030" + (path "/99c03190-ad99-4b1f-8f22-805ba5f522f9/8211a040-5fc8-487a-a321-b69e7b3bc300/49bba5f2-c387-43d5-bfb3-4f108d45a837" + (reference "C2") + (unit 1) + ) + (path "/99c03190-ad99-4b1f-8f22-805ba5f522f9/8211a040-5fc8-487a-a321-b69e7b3bc300/b5a0e78d-bc67-4b7e-8137-4f88148172fd" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3030/meta/info.html b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3030/meta/info.html new file mode 100644 index 0000000..b26de60 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3030/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3042/.gitignore b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3042/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3042/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3042/M.2 B+M Key 3042.kicad_pcb b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3042/M.2 B+M Key 3042.kicad_pcb new file mode 100644 index 0000000..9ad0299 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3042/M.2 B+M Key 3042.kicad_pcb @@ -0,0 +1,3283 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 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yes) + ) + ) + (pin "2" + (uuid "4211f564-70d2-46a2-b5cd-50bdd38b1dd9") + ) + (pin "1" + (uuid "d2c26583-3a5b-4495-ab9f-c5f731183acd") + ) + (instances + (project "M.2 B+M Key 3042" + (path "/d52149c5-2780-43d7-ad28-0fd143303ca1/8092d5df-0815-401e-9925-32233013917e/49bba5f2-c387-43d5-bfb3-4f108d45a837" + (reference "C2") + (unit 1) + ) + (path "/d52149c5-2780-43d7-ad28-0fd143303ca1/8092d5df-0815-401e-9925-32233013917e/b5a0e78d-bc67-4b7e-8137-4f88148172fd" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3042/meta/info.html b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3042/meta/info.html new file mode 100644 index 0000000..36880e8 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3042/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3060/.gitignore b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3060/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3060/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3060/M.2 B+M Key 3060.kicad_pcb b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3060/M.2 B+M Key 3060.kicad_pcb new file mode 100644 index 0000000..4ca93b3 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3060/M.2 B+M Key 3060.kicad_pcb @@ -0,0 +1,3188 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 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"/GPIO_9{slash}LED#1") + (net 16 "/GPIO_5") + (net 17 "/CONFIG_0") + (net 18 "/GPIO_6") + (net 19 "/DPR") + (net 20 "/GPIO_7") + (net 21 "/GPIO_11") + (net 22 "/GPIO_10") + (net 23 "/GPIO_8") + (net 24 "/UIM-RESET") + (net 25 "/UIM-CLK") + (net 26 "/UIM-DATA") + (net 27 "/PER1-") + (net 28 "/UIM-PWR") + (net 29 "/PER1+") + (net 30 "/DEVSLP") + (net 31 "/GPIO_0") + (net 32 "/GPIO_1") + (net 33 "/GPIO_2") + (net 34 "/GPIO_3") + (net 35 "/PER0-") + (net 36 "/GPIO_4") + (net 37 "/PER0+") + (net 38 "/PERST#") + (net 39 "/CLKREQ#") + (net 40 "/REFCLK-") + (net 41 "/PEWAKE#") + (net 42 "/REFCLK+") + (net 43 "unconnected-(J1-NC-Pad56)") + (net 44 "unconnected-(J1-NC-Pad58)") + (net 45 "/RESET#") + (net 46 "/SUSCLK") + (net 47 "/CONFIG_1") + (net 48 "/CONFIG_2") + (net 49 "/PET0-") + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "0fffcf28-1110-4958-9ca0-84a45a0f2951") + (at 112.86 154.82 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C3" + (at 0 0.75 90) + (layer "F.SilkS") + (uuid "7a884980-ab16-4b5a-bdc1-2188b27ead7a") + (effects + (font + (size 0.5 0.5) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "f17439bc-e052-4564-9c57-d892c6ad5adb") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "70326e96-3f01-442c-85a8-91b7a78c0678") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "72537bf2-3d60-4e26-81ca-49e464d50917") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (attr smd) + (fp_line + (start 0.7 -0.35) + (end 0.7 0.35) + (stroke + (width 0.05) + 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a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3060/M.2 B+M key.kicad_sch b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3060/M.2 B+M key.kicad_sch new file mode 100644 index 0000000..5f8193a --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3060/M.2 B+M key.kicad_sch @@ -0,0 +1,3714 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "47267e8c-a37a-4dc6-a561-99ca5ccc9577") + (paper "A4") + (lib_symbols + (symbol "Mechanical:MountingHole_Pad" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 1.016) + (hide yes) + ) + (exclude_from_sim no) + (in_bom no) + (on_board yes) + (property "Reference" "H" + (at 0 6.35 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "MountingHole_Pad" + (at 0 4.445 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Datasheet" "~" + (at 0 0 0) + (effects + (font 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yes) + ) + ) + (pin "2" + (uuid "53a8d18a-ea04-4c87-9f4d-8f1639430898") + ) + (pin "1" + (uuid "ee595ce4-e497-4c16-89fc-4d5e1c12c146") + ) + (instances + (project "M.2 B+M Key 3060" + (path "/c871196e-a37f-421b-8d7c-60dcd33a83b4/e086ee9a-3d5b-4ff1-a047-e817495952af/49bba5f2-c387-43d5-bfb3-4f108d45a837" + (reference "C2") + (unit 1) + ) + (path "/c871196e-a37f-421b-8d7c-60dcd33a83b4/e086ee9a-3d5b-4ff1-a047-e817495952af/b5a0e78d-bc67-4b7e-8137-4f88148172fd" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3060/meta/info.html b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3060/meta/info.html new file mode 100644 index 0000000..20a46c8 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3060/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3080/.gitignore b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3080/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3080/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3080/M.2 B+M Key 3080.kicad_pcb b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3080/M.2 B+M Key 3080.kicad_pcb new file mode 100644 index 0000000..18a5a3c --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3080/M.2 B+M Key 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a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3080/M.2 B+M key.kicad_sch b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3080/M.2 B+M key.kicad_sch new file mode 100644 index 0000000..b49a1fb --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3080/M.2 B+M key.kicad_sch @@ -0,0 +1,3714 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "47267e8c-a37a-4dc6-a561-99ca5ccc9577") + (paper "A4") + (lib_symbols + (symbol "Mechanical:MountingHole_Pad" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 1.016) + (hide yes) + ) + (exclude_from_sim no) + (in_bom no) + (on_board yes) + (property "Reference" "H" + (at 0 6.35 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "MountingHole_Pad" + (at 0 4.445 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Datasheet" "~" + (at 0 0 0) + (effects + (font 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yes) + ) + ) + (pin "2" + (uuid "6fe97dc0-19fc-48a3-9809-607c5b983378") + ) + (pin "1" + (uuid "2796894e-6b08-4cf9-9752-b253378d3be3") + ) + (instances + (project "M.2 B+M Key 3080" + (path "/eeff3bcf-e91e-4d19-86e6-b188e47dcd7a/a4265a8c-dd19-4998-b67a-81893b868cd5/49bba5f2-c387-43d5-bfb3-4f108d45a837" + (reference "C2") + (unit 1) + ) + (path "/eeff3bcf-e91e-4d19-86e6-b188e47dcd7a/a4265a8c-dd19-4998-b67a-81893b868cd5/b5a0e78d-bc67-4b7e-8137-4f88148172fd" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 B+M Key Templates/M.2 B+M Key 3080/meta/info.html b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3080/meta/info.html new file mode 100644 index 0000000..2e88d66 --- /dev/null +++ b/Templates/M.2 B+M Key Templates/M.2 B+M Key 3080/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 E Key Templates/M.2 E Key 22110/.gitignore b/Templates/M.2 E Key Templates/M.2 E Key 22110/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 22110/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 E Key Templates/M.2 E Key 22110/M.2 E Key 22110.kicad_pcb b/Templates/M.2 E Key Templates/M.2 E Key 22110/M.2 E Key 22110.kicad_pcb new file mode 100644 index 0000000..b04f4b9 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 22110/M.2 E Key 22110.kicad_pcb @@ -0,0 +1,3299 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref 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22110/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 E Key Templates/M.2 E Key 2230/.gitignore b/Templates/M.2 E Key Templates/M.2 E Key 2230/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 2230/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 E Key Templates/M.2 E Key 2230/M.2 E Key 2230.kicad_pcb b/Templates/M.2 E Key Templates/M.2 E Key 2230/M.2 E Key 2230.kicad_pcb new file mode 100644 index 0000000..958271e --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 2230/M.2 E Key 2230.kicad_pcb @@ -0,0 +1,3230 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (pdf_metadata yes) + (pdf_single_document no) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (sketchpadsonfab no) + (plotpadnumbers no) + (hidednponfab no) + (sketchdnponfab yes) + (crossoutdnponfab yes) + (subtractmaskfromsilk no) + (outputformat 1) + (mirror no) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + (net 0 "") + (net 1 "/PET1-") + (net 2 "/M.2 E Key/PET1N") + (net 3 "/PET1+") + (net 4 "/M.2 E Key/PET1P") + (net 5 "/M.2 E Key/PET0N") + (net 6 "/PET0-") + (net 7 "/PET0+") + (net 8 "/M.2 E Key/PET0P") + (net 9 "GND") + (net 10 "unconnected-(J1-Vender_Defined-Pad38)") + (net 11 "/UART_WAKE#") + (net 12 "/I2S_SD_IN") + (net 13 "/PEWAKE1#") + (net 14 "/I2S_WS") + (net 15 "/UART_TXD") + (net 16 "/I2C_DATA") + (net 17 "/USB_D-") + (net 18 "/PEWAKE#") + (net 19 "/SDIO__WAKE#") + (net 20 "/ALERT#") + (net 21 "/W_DISABLE2#") + (net 22 "unconnected-(J1-COEX2-Pad46)") + (net 23 "/PER1+") + (net 24 "+3.3V") + (net 25 "unconnected-(J1-RESERVED-Pad64)") + (net 26 "/SDIO_DATA3") + (net 27 "/SDIO_DATA1") + (net 28 "/LED#2") + (net 29 "/SDIO_RESET#") + (net 30 "/REFCLK0-") + (net 31 "/CLKREQ0#") + (net 32 "unconnected-(J1-COEX3-Pad44)") + (net 33 "/REFCLK1-") + (net 34 "/UART_RXD") + (net 35 "/USB_D+") + (net 36 "/SDIO_DATA2") + (net 37 "/PER1-") + (net 38 "unconnected-(J1-Vender_Defined-Pad42)") + (net 39 "unconnected-(J1-COEX1-Pad48)") + (net 40 "/LED#1") + (net 41 "/I2C_CLK") + (net 42 "/UARD_RTS") + (net 43 "/SUSCLK") + (net 44 "/I2S_SCK") + (net 45 "/SDIO_CLK") + (net 46 "/PER0-") + (net 47 "/UART_CTS") + (net 48 "/CLKREQ1#") + (net 49 "/SDIO_CMD") + (net 50 "/SDIO_DATA0") + (net 51 "/I2S_SD_OUT") + (net 52 "/PERST0#") + (net 53 "unconnected-(J1-Vender_Defined-Pad40)") + (net 54 "/REFCLK1+") + (net 55 "/PERST1#") + (net 56 "/REFCLK0+") + (net 57 "/W_DISABLE1#") + (net 58 "/PER0+") + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "06f4cecf-c4fe-4c55-96ea-4a3e3188e793") + (at 103.36 155.11 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C2" + (at 0 1.09 90) + (layer "F.SilkS") + (uuid "0308fdba-0392-4581-9c9a-111c8eb0a320") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "0b60e0f9-43cb-4665-9bd5-7a7270f1b1e1") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "5088411b-2bf8-44e9-8367-93d212dc2b13") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + 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) + (hide yes) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 143.51 100.33 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (pin "2" + (uuid "37fc8c9d-488c-4f33-a2e1-9c31f8062a12") + ) + (pin "1" + (uuid "2ebb334d-38f0-4e33-b909-0e77129ac6dc") + ) + (instances + (project "M.2 E Key 2230" + (path "/c75f4d31-c8a9-4fca-a333-63a789de630e/1240ca36-3abd-446f-9cff-2fc07fb9ce0d/50ac1df9-4d43-4cce-8aa0-372f84fe8ac9" + (reference "C4") + (unit 1) + ) + (path "/c75f4d31-c8a9-4fca-a333-63a789de630e/1240ca36-3abd-446f-9cff-2fc07fb9ce0d/fa8b5729-454d-4030-ab20-6e9ee0cf319c" + (reference "C2") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 E Key Templates/M.2 E Key 2230/meta/info.html b/Templates/M.2 E Key Templates/M.2 E Key 2230/meta/info.html new file mode 100644 index 0000000..63d4c0e --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 2230/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 E Key Templates/M.2 E Key 2242/.gitignore b/Templates/M.2 E Key Templates/M.2 E Key 2242/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 2242/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 E Key Templates/M.2 E Key 2242/M.2 E Key 2242.kicad_pcb b/Templates/M.2 E Key Templates/M.2 E Key 2242/M.2 E Key 2242.kicad_pcb new file mode 100644 index 0000000..366718f --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 2242/M.2 E Key 2242.kicad_pcb @@ -0,0 +1,3207 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + 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18 "/I2S_SD_OUT") + (net 19 "/SDIO_DATA0") + (net 20 "/I2S_SD_IN") + (net 21 "/SDIO_DATA3") + (net 22 "/LED#2") + (net 23 "/SDIO_DATA2") + (net 24 "/SDIO_DATA1") + (net 25 "/UART_WAKE#") + (net 26 "/SDIO__WAKE#") + (net 27 "/UART_TXD") + (net 28 "/SDIO_RESET#") + (net 29 "/UART_RXD") + (net 30 "/UARD_RTS") + (net 31 "/PER0-") + (net 32 "/UART_CTS") + (net 33 "/PER0+") + (net 34 "unconnected-(J1-Vender_Defined-Pad38)") + (net 35 "unconnected-(J1-Vender_Defined-Pad40)") + (net 36 "unconnected-(J1-Vender_Defined-Pad42)") + (net 37 "unconnected-(J1-COEX3-Pad44)") + (net 38 "unconnected-(J1-COEX2-Pad46)") + (net 39 "/REFCLK0+") + (net 40 "unconnected-(J1-COEX1-Pad48)") + (net 41 "/REFCLK0-") + (net 42 "/SUSCLK") + (net 43 "/PERST0#") + (net 44 "/CLKREQ0#") + (net 45 "/W_DISABLE2#") + (net 46 "/PEWAKE#") + (net 47 "/W_DISABLE1#") + (net 48 "/I2C_DATA") + (net 49 "/PER1+") + (net 50 "/I2C_CLK") + (net 51 "/PER1-") + (net 52 "/ALERT#") + (net 53 "unconnected-(J1-RESERVED-Pad64)") + (net 54 "/PERST1#") + (net 55 "/CLKREQ1#") + (net 56 "/PEWAKE1#") + (net 57 "/REFCLK1+") + (net 58 "/REFCLK1-") + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "14d0c729-f8f1-4695-bfc1-62b4462de8ed") + (at 106.11 153.93 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C4" + (at 0 1.14 90) + (layer "F.SilkS") + (uuid "cbfb49f1-d7bb-4d45-a3ad-8f63fa7e06f6") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "2e67f59a-50df-4cd8-95f1-ae393808c132") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "6f30b98f-881c-40f8-b6e3-011abf2e6b4e") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + 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This is a KiCad 9 template + diff --git a/Templates/M.2 E Key Templates/M.2 E Key 2260/.gitignore b/Templates/M.2 E Key Templates/M.2 E Key 2260/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 2260/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 E Key Templates/M.2 E Key 2260/M.2 E Key 2260.kicad_pcb b/Templates/M.2 E Key Templates/M.2 E Key 2260/M.2 E Key 2260.kicad_pcb new file mode 100644 index 0000000..7b2c91c --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 2260/M.2 E Key 2260.kicad_pcb @@ -0,0 +1,3207 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2260/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 E Key Templates/M.2 E Key 2280/.gitignore b/Templates/M.2 E Key Templates/M.2 E Key 2280/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 2280/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 E Key Templates/M.2 E Key 2280/M.2 E Key 2280.kicad_pcb b/Templates/M.2 E Key Templates/M.2 E Key 2280/M.2 E Key 2280.kicad_pcb new file mode 100644 index 0000000..35be37d --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 2280/M.2 E Key 2280.kicad_pcb @@ -0,0 +1,3298 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(thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + 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2280/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 E Key Templates/M.2 E Key 30110/.gitignore b/Templates/M.2 E Key Templates/M.2 E Key 30110/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 30110/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 E Key Templates/M.2 E Key 30110/M.2 E Key 30110.kicad_pcb b/Templates/M.2 E Key Templates/M.2 E Key 30110/M.2 E Key 30110.kicad_pcb new file mode 100644 index 0000000..91221a8 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 30110/M.2 E Key 30110.kicad_pcb @@ -0,0 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This is a KiCad 9 template + diff --git a/Templates/M.2 E Key Templates/M.2 E Key 3030/.gitignore b/Templates/M.2 E Key Templates/M.2 E Key 3030/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 3030/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 E Key Templates/M.2 E Key 3030/M.2 E Key 3030.kicad_pcb b/Templates/M.2 E Key Templates/M.2 E Key 3030/M.2 E Key 3030.kicad_pcb new file mode 100644 index 0000000..5a2fff7 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 3030/M.2 E Key 3030.kicad_pcb @@ -0,0 +1,3234 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) + (property "Datasheet" "~" + (at 143.51 100.33 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 143.51 100.33 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (pin "2" + (uuid "1ed5d0e7-f0f1-4a8f-bc29-1eba8a95176e") + ) + (pin "1" + (uuid "7a0edfd7-cded-4d35-b68d-167cdbfe8f40") + ) + (instances + (project "M.2 E Key 3030" + (path "/1d0f9d41-fb54-427a-b9c0-69148f17f49e/d9244323-d0d2-42d8-9562-7a770dfe078e/50ac1df9-4d43-4cce-8aa0-372f84fe8ac9" + (reference "C4") + (unit 1) + ) + (path "/1d0f9d41-fb54-427a-b9c0-69148f17f49e/d9244323-d0d2-42d8-9562-7a770dfe078e/fa8b5729-454d-4030-ab20-6e9ee0cf319c" + (reference "C2") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 E Key Templates/M.2 E Key 3030/meta/info.html b/Templates/M.2 E Key Templates/M.2 E Key 3030/meta/info.html new file mode 100644 index 0000000..cf61e11 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 3030/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 E Key Templates/M.2 E Key 3042/.gitignore b/Templates/M.2 E Key Templates/M.2 E Key 3042/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 3042/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 E Key Templates/M.2 E Key 3042/M.2 E Key 3042.kicad_pcb b/Templates/M.2 E Key Templates/M.2 E Key 3042/M.2 E Key 3042.kicad_pcb new file mode 100644 index 0000000..2300ff9 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 3042/M.2 E Key 3042.kicad_pcb @@ -0,0 +1,3234 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This is a KiCad 9 template + diff --git a/Templates/M.2 E Key Templates/M.2 E Key 3060/.gitignore b/Templates/M.2 E Key Templates/M.2 E Key 3060/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 3060/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 E Key Templates/M.2 E Key 3060/M.2 E Key 3060.kicad_pcb b/Templates/M.2 E Key Templates/M.2 E Key 3060/M.2 E Key 3060.kicad_pcb new file mode 100644 index 0000000..ab8ff5a --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 3060/M.2 E Key 3060.kicad_pcb @@ -0,0 +1,3326 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + 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"/SDIO_DATA3") + (net 18 "/LED#2") + (net 19 "/SDIO_DATA2") + (net 20 "/SDIO_DATA1") + (net 21 "/UART_WAKE#") + (net 22 "/SDIO__WAKE#") + (net 23 "/UART_TXD") + (net 24 "/SDIO_RESET#") + (net 25 "/UART_RXD") + (net 26 "/UARD_RTS") + (net 27 "/PER0-") + (net 28 "/UART_CTS") + (net 29 "/PER0+") + (net 30 "unconnected-(J1-Vender_Defined-Pad38)") + (net 31 "unconnected-(J1-Vender_Defined-Pad40)") + (net 32 "unconnected-(J1-Vender_Defined-Pad42)") + (net 33 "unconnected-(J1-COEX3-Pad44)") + (net 34 "unconnected-(J1-COEX2-Pad46)") + (net 35 "/REFCLK0+") + (net 36 "unconnected-(J1-COEX1-Pad48)") + (net 37 "/REFCLK0-") + (net 38 "/SUSCLK") + (net 39 "/PERST0#") + (net 40 "/CLKREQ0#") + (net 41 "/W_DISABLE2#") + (net 42 "/PEWAKE#") + (net 43 "/W_DISABLE1#") + (net 44 "/I2C_DATA") + (net 45 "/PER1+") + (net 46 "/I2C_CLK") + (net 47 "/PER1-") + (net 48 "/ALERT#") + (net 49 "unconnected-(J1-RESERVED-Pad64)") + (net 50 "/PERST1#") + (net 51 "/CLKREQ1#") + (net 52 "/PEWAKE1#") + (net 53 "/REFCLK1+") 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) + (property "Datasheet" "~" + (at 143.51 100.33 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 143.51 100.33 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (pin "2" + (uuid "5451d037-2a76-414f-b132-3d8a729ae374") + ) + (pin "1" + (uuid "86438147-ad74-4bee-9de6-ceb36b6ff8bf") + ) + (instances + (project "M.2 E Key 3060" + (path "/952b5b3f-9d7c-422c-a52a-bc367f304ba9/cdf26e33-645a-4e13-b036-4ca70156327e/50ac1df9-4d43-4cce-8aa0-372f84fe8ac9" + (reference "C4") + (unit 1) + ) + (path "/952b5b3f-9d7c-422c-a52a-bc367f304ba9/cdf26e33-645a-4e13-b036-4ca70156327e/fa8b5729-454d-4030-ab20-6e9ee0cf319c" + (reference "C2") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 E Key Templates/M.2 E Key 3060/meta/info.html b/Templates/M.2 E Key Templates/M.2 E Key 3060/meta/info.html new file mode 100644 index 0000000..cec5035 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 3060/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 E Key Templates/M.2 E Key 3080/.gitignore b/Templates/M.2 E Key Templates/M.2 E Key 3080/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 3080/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 E Key Templates/M.2 E Key 3080/M.2 E Key 3080.kicad_pcb b/Templates/M.2 E Key Templates/M.2 E Key 3080/M.2 E Key 3080.kicad_pcb new file mode 100644 index 0000000..c208888 --- /dev/null +++ b/Templates/M.2 E Key Templates/M.2 E Key 3080/M.2 E Key 3080.kicad_pcb @@ -0,0 +1,3326 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (pdf_metadata yes) + (pdf_single_document no) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (sketchpadsonfab no) + (plotpadnumbers no) + (hidednponfab no) + (sketchdnponfab yes) + (crossoutdnponfab yes) + (subtractmaskfromsilk no) + (outputformat 1) + (mirror no) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + (net 0 "") + (net 1 "/M.2 E Key/PET1P") + (net 2 "/M.2 E Key/PET1N") + (net 3 "/M.2 E Key/PET0P") + (net 4 "/M.2 E Key/PET0N") + (net 5 "GND") + (net 6 "+3.3V") + (net 7 "/USB_D+") + (net 8 "/USB_D-") + (net 9 "/LED#1") + (net 10 "/I2S_SCK") + (net 11 "/SDIO_CLK") + (net 12 "/I2S_WS") + (net 13 "/SDIO_CMD") + (net 14 "/I2S_SD_OUT") + (net 15 "/SDIO_DATA0") + (net 16 "/I2S_SD_IN") + (net 17 "/SDIO_DATA3") + (net 18 "/LED#2") + (net 19 "/SDIO_DATA2") + (net 20 "/SDIO_DATA1") + (net 21 "/UART_WAKE#") + (net 22 "/SDIO__WAKE#") + (net 23 "/UART_TXD") + (net 24 "/SDIO_RESET#") + (net 25 "/UART_RXD") + (net 26 "/UARD_RTS") + (net 27 "/PER0-") + (net 28 "/UART_CTS") + (net 29 "/PER0+") + (net 30 "unconnected-(J1-Vender_Defined-Pad38)") + (net 31 "unconnected-(J1-Vender_Defined-Pad40)") + (net 32 "unconnected-(J1-Vender_Defined-Pad42)") + (net 33 "unconnected-(J1-COEX3-Pad44)") + (net 34 "unconnected-(J1-COEX2-Pad46)") + (net 35 "/REFCLK0+") + (net 36 "unconnected-(J1-COEX1-Pad48)") + (net 37 "/REFCLK0-") + (net 38 "/SUSCLK") + (net 39 "/PERST0#") + (net 40 "/CLKREQ0#") + (net 41 "/W_DISABLE2#") + (net 42 "/PEWAKE#") + (net 43 "/W_DISABLE1#") + (net 44 "/I2C_DATA") + (net 45 "/PER1+") + (net 46 "/I2C_CLK") + (net 47 "/PER1-") + (net 48 "/ALERT#") + (net 49 "unconnected-(J1-RESERVED-Pad64)") + (net 50 "/PERST1#") + (net 51 "/CLKREQ1#") + (net 52 "/PEWAKE1#") + (net 53 "/REFCLK1+") + (net 54 "/REFCLK1-") + (net 55 "/PET0-") + (net 56 "/PET1+") + (net 57 "/PET0+") + (net 58 "/PET1-") + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "5cf3136d-2a0f-47e8-8d12-1eb54ce8c83a") + (at 100.61 154.01 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C2" + (at 0 1.09 90) + (layer "F.SilkS") + (uuid "892c0ae3-46cd-4f48-94ef-7c70c5d049fe") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "2f89578d-e086-489c-8365-28de93c070a1") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "2dcbfa60-2bab-4ff6-abd6-c1804a8e97ad") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "868594f7-2cbf-4804-8360-8656e240f1a6") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (attr smd) + (fp_line + (start 0.7 -0.35) + (end 0.7 0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (net 1) + (uuid "da6548ab-4ab5-44c4-bfba-a74815d0ce45") + ) + (fp_line + (start -0.7 -0.35) + (end 0.7 -0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (net 1) + (uuid "433741b2-ef88-47bd-8393-ec8dbf1109ee") + ) + (fp_line + (start 0.7 0.35) + (end -0.7 0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (net 1) + (uuid "95add3d4-052f-4c79-ab1d-1cbb7ee71e10") + ) + (fp_line + (start -0.7 0.35) + (end -0.7 -0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (net 1) + (uuid "7f9966fa-524a-4099-8202-780563a225b6") + ) + (fp_line + (start 0.3 -0.15) + (end 0.3 0.15) + (stroke + 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3080/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 M Key Templates/M.2 M Key 22110/.gitignore b/Templates/M.2 M Key Templates/M.2 M Key 22110/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 22110/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 M Key Templates/M.2 M Key 22110/M.2 M Key 22110.kicad_pcb b/Templates/M.2 M Key Templates/M.2 M Key 22110/M.2 M Key 22110.kicad_pcb new file mode 100644 index 0000000..4524178 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 22110/M.2 M Key 22110.kicad_pcb @@ -0,0 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Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref 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This is a KiCad 9 template + diff --git a/Templates/M.2 M Key Templates/M.2 M Key 2230/.gitignore b/Templates/M.2 M Key Templates/M.2 M Key 2230/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 2230/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 M Key Templates/M.2 M Key 2230/M.2 M Key 2230.kicad_pcb b/Templates/M.2 M Key Templates/M.2 M Key 2230/M.2 M Key 2230.kicad_pcb new file mode 100644 index 0000000..ed2eb9c --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 2230/M.2 M Key 2230.kicad_pcb @@ -0,0 +1,4172 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + 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"/1646a8b2-c07c-4f7d-b009-d69eb6a13cbe/63519646-dcc0-4eb2-a912-36e68cdd7779/f596e965-9af1-41dd-9f15-6f309ad60165" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 M Key Templates/M.2 M Key 2230/meta/info.html b/Templates/M.2 M Key Templates/M.2 M Key 2230/meta/info.html new file mode 100644 index 0000000..704ca93 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 2230/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 M Key Templates/M.2 M Key 2242/.gitignore b/Templates/M.2 M Key Templates/M.2 M Key 2242/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 2242/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 M Key Templates/M.2 M Key 2242/M.2 M Key 2242.kicad_pcb b/Templates/M.2 M Key Templates/M.2 M Key 2242/M.2 M Key 2242.kicad_pcb new file mode 100644 index 0000000..f6efb95 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 2242/M.2 M Key 2242.kicad_pcb @@ -0,0 +1,4256 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (pdf_metadata yes) + (pdf_single_document no) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (sketchpadsonfab no) + (plotpadnumbers no) + (hidednponfab no) + (sketchdnponfab yes) + (crossoutdnponfab yes) + (subtractmaskfromsilk no) + (outputformat 1) + (mirror no) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + (net 0 "") + (net 1 "/M.2 M Key/PET1P") + (net 2 "/M.2 M Key/PET1N") + (net 3 "/M.2 M Key/PET0P") + (net 4 "/M.2 M Key/PET0N") + (net 5 "/M.2 M Key/PET2N") + (net 6 "/M.2 M Key/PET3N") + (net 7 "/M.2 M Key/PET3P") + (net 8 "/M.2 M Key/PET2P") + (net 9 "/PET2+") + (net 10 "/PET3+") + (net 11 "/PET0-") + (net 12 "/PET1-") + (net 13 "/PET1+") + (net 14 "/PET2-") + (net 15 "/PET0+") + (net 16 "/PET3-") + (net 17 "GND") + (net 18 "+3.3V") + (net 19 "unconnected-(J1-NC-Pad6)") + (net 20 "unconnected-(J1-NC-Pad8)") + (net 21 "/LED1#") + (net 22 "/PER3-") + (net 23 "/PER3+") + (net 24 "unconnected-(J1-NC-Pad20)") + (net 25 "unconnected-(J1-NC-Pad22)") + (net 26 "/PER2-") + (net 27 "unconnected-(J1-NC-Pad24)") + (net 28 "/PER2+") + (net 29 "unconnected-(J1-NC-Pad26)") + (net 30 "unconnected-(J1-NC-Pad28)") + (net 31 "unconnected-(J1-NC-Pad30)") + (net 32 "unconnected-(J1-NC-Pad32)") + (net 33 "unconnected-(J1-NC-Pad34)") + (net 34 "/PER1-") + (net 35 "unconnected-(J1-NC-Pad36)") + (net 36 "/PER1+") + (net 37 "/DEVSLP") + (net 38 "unconnected-(J1-NC-Pad40)") + (net 39 "unconnected-(J1-NC-Pad42)") + (net 40 "unconnected-(J1-NC-Pad44)") + (net 41 "unconnected-(J1-NC-Pad46)") + (net 42 "/PER0-") + (net 43 "unconnected-(J1-NC-Pad48)") + (net 44 "/PER0+") + (net 45 "/PERST#") + (net 46 "/CLKREQ#") + (net 47 "/REFCLK-") + (net 48 "/PEWAKE#") + (net 49 "/REFCLK+") + (net 50 "unconnected-(J1-NC-Pad56)") + (net 51 "unconnected-(J1-NC-Pad58)") + (net 52 "unconnected-(J1-NC-Pad67)") + (net 53 "/SUSCLK") + (net 54 "/PEDET") + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "2301479a-bffa-4fca-a17f-bb502f6d92d5") + (at 107.795 153.315 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C1" + (at 0 0.765 90) + (layer "F.SilkS") + (uuid "15942e21-7bd2-4cd8-bfce-697b849d6dd5") + (effects + (font + (size 0.5 0.5) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "895eecfc-b252-4734-8c29-34d63deaa61d") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "05153361-6c1f-4b41-b401-5c9ed10440a9") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "a521dc43-8634-4fd8-bafa-da04d31ca2fc") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (attr smd) + (fp_line + (start 0.7 -0.35) + (end 0.7 0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (net 256) + (uuid "191bf27e-1294-4f7a-b7e5-4dd7a2e2c42c") + ) + (fp_line + (start -0.7 -0.35) + (end 0.7 -0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (net 256) + (uuid "2b5a974b-0829-4b47-aa7d-ee7c0b44d511") + ) + (fp_line + (start 0.7 0.35) + (end -0.7 0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (net 256) + (uuid "ccb3610b-9d37-4e4d-9795-005b593a94d4") + ) + (fp_line + (start -0.7 0.35) + (end -0.7 -0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (net 256) + (uuid "08d8aa38-a5d1-43f0-8758-80523604a293") + ) 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"/ffa4ea8c-f120-443b-b9ae-648b6f790dec/e76ae136-46aa-4390-a3fe-6a05f8ebf881/f596e965-9af1-41dd-9f15-6f309ad60165" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 M Key Templates/M.2 M Key 2242/meta/info.html b/Templates/M.2 M Key Templates/M.2 M Key 2242/meta/info.html new file mode 100644 index 0000000..24d6fb4 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 2242/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 M Key Templates/M.2 M Key 2260/.gitignore b/Templates/M.2 M Key Templates/M.2 M Key 2260/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 2260/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 M Key Templates/M.2 M Key 2260/M.2 M Key 2260.kicad_pcb b/Templates/M.2 M Key Templates/M.2 M Key 2260/M.2 M Key 2260.kicad_pcb new file mode 100644 index 0000000..249e57c --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 2260/M.2 M Key 2260.kicad_pcb @@ -0,0 +1,4132 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (pdf_metadata yes) + (pdf_single_document no) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (sketchpadsonfab no) + (plotpadnumbers no) + (hidednponfab no) + (sketchdnponfab yes) + (crossoutdnponfab yes) + (subtractmaskfromsilk no) + (outputformat 1) + (mirror no) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + (net 0 "") + (net 1 "/M.2 M Key/PET2P") + (net 2 "/PET2+") + (net 3 "/M.2 M Key/PET3P") + (net 4 "/PET3+") + (net 5 "/M.2 M Key/PET0N") + (net 6 "/PET0-") + (net 7 "/M.2 M Key/PET1N") + (net 8 "/PET1-") + (net 9 "/M.2 M Key/PET1P") + (net 10 "/PET1+") + (net 11 "/M.2 M Key/PET2N") + (net 12 "/PET2-") + (net 13 "/M.2 M Key/PET0P") + (net 14 "/PET0+") + (net 15 "/M.2 M Key/PET3N") + (net 16 "/PET3-") + (net 17 "GND") + (net 18 "+3.3V") + (net 19 "unconnected-(J1-NC-Pad6)") + (net 20 "unconnected-(J1-NC-Pad8)") + (net 21 "/LED1#") + (net 22 "/PER3-") + (net 23 "/PER3+") + (net 24 "unconnected-(J1-NC-Pad20)") + (net 25 "unconnected-(J1-NC-Pad22)") + (net 26 "/PER2-") + (net 27 "unconnected-(J1-NC-Pad24)") + (net 28 "/PER2+") + (net 29 "unconnected-(J1-NC-Pad26)") + (net 30 "unconnected-(J1-NC-Pad28)") + (net 31 "unconnected-(J1-NC-Pad30)") + (net 32 "unconnected-(J1-NC-Pad32)") + (net 33 "unconnected-(J1-NC-Pad34)") + (net 34 "/PER1-") + (net 35 "unconnected-(J1-NC-Pad36)") + (net 36 "/PER1+") + (net 37 "/DEVSLP") + (net 38 "unconnected-(J1-NC-Pad40)") + (net 39 "unconnected-(J1-NC-Pad42)") + (net 40 "unconnected-(J1-NC-Pad44)") + (net 41 "unconnected-(J1-NC-Pad46)") + (net 42 "/PER0-") + (net 43 "unconnected-(J1-NC-Pad48)") + (net 44 "/PER0+") + (net 45 "/PERST#") + (net 46 "/CLKREQ#") + (net 47 "/REFCLK-") + (net 48 "/PEWAKE#") + (net 49 "/REFCLK+") + (net 50 "unconnected-(J1-NC-Pad56)") + (net 51 "unconnected-(J1-NC-Pad58)") + (net 52 "unconnected-(J1-NC-Pad67)") + (net 53 "/SUSCLK") + (net 54 "/PEDET") + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "243a6779-9b57-4ae7-8cea-6f537120e4a6") + (at 113.805 154.75 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C5" + (at 0 0.74 90) + (layer "F.SilkS") + (uuid "b6d033a1-2e8a-4b57-b44f-c80281170030") + (effects + (font + (size 0.5 0.5) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "885560a9-fe61-45c9-b5cc-9b8cbbfc7c88") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "e15fcb01-a79b-4f80-b72f-826faa10caf1") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "43823777-9249-43a3-a5ba-b5d34f2a4285") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (attr smd) + (fp_line + (start 0.7 -0.35) + (end 0.7 0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "5ff9d19b-180d-4e8b-ae85-004d96b9a727") + ) + (fp_line + (start -0.7 -0.35) + (end 0.7 -0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "8bacedb0-ed22-4fd3-b74f-0e6d5c57e08b") + ) + (fp_line + (start 0.7 0.35) + (end -0.7 0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "c3dcaaa7-eb50-49b7-bf85-a77dbe6c5e49") + ) + (fp_line + (start -0.7 0.35) + (end -0.7 -0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "fb4c8da8-686f-4929-8748-4d5252eb0dd3") + ) + (fp_line + (start 0.3 -0.15) + (end 0.3 0.15) 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0.318 0.36) + (layers "F.Paste") + (roundrect_rratio 0.25) + (uuid "228decbf-271e-46a8-a3c9-90b7c41c0d73") + ) + (pad "1" smd roundrect + (at -0.32 0 90) + (size 0.46 0.4) + (layers "F.Cu" "F.Mask") + (roundrect_rratio 0.25) + (net 11 "/M.2 M Key/PET2N") + (pintype "passive") + (uuid "94b18977-09b0-4830-b5aa-7a171d022f05") + ) + (pad "2" smd roundrect + (at 0.32 0 90) + (size 0.46 0.4) + (layers "F.Cu" "F.Mask") + (roundrect_rratio 0.25) + (net 12 "/PET2-") + (pintype "passive") + (uuid "1e26788a-24ad-47cb-9e31-5c6bb46ab57b") + ) + (embedded_fonts no) + (model "${KICAD9_3DMODEL_DIR}/Capacitor_SMD.3dshapes/C_0201_0603Metric.wrl" + (offset + (xyz 0 0 0) + ) + (scale + (xyz 1 1 1) + ) + (rotate + (xyz 0 0 0) + ) + ) + ) + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "29685bdf-8b79-4221-a8cc-d4020e34fe82") + (at 116.105 154.75 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: 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(uuid "5cab6068-0655-407c-aa18-c2fe85e82b7c") + ) + (fp_line + (start -0.7 -0.35) + (end 0.7 -0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "df12f059-90a6-4c13-bc4d-e7876554973c") + ) + (fp_line + (start 0.7 0.35) + (end -0.7 0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "4d53f922-e45a-49e8-95d2-2561900ab400") + ) + (fp_line + (start -0.7 0.35) + (end -0.7 -0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "6e94e793-5230-4c79-9eb5-80c2eaf417c2") + ) + (fp_line + (start 0.3 -0.15) + (end 0.3 0.15) + (stroke + (width 0.1) + (type solid) + ) + (layer "F.Fab") + (uuid "cf599d7e-6715-40d7-ade1-4f957d30ae89") + ) + (fp_line + (start -0.3 -0.15) + (end 0.3 -0.15) + (stroke + (width 0.1) + (type solid) + ) + (layer "F.Fab") + (uuid "2907e22b-27bb-4729-bcc7-be573092da93") + ) + (fp_line + (start 0.3 0.15) + (end -0.3 0.15) + (stroke + (width 0.1) + (type solid) + ) + (layer "F.Fab") + (uuid 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"IN-" input + (at 72.39 76.2 0) + (uuid "46e8b6ea-f86d-4345-986b-e75d247ae2a8") + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + ) + (instances + (project "M.2 M Key 2260" + (path "/51d3b2a4-79a2-490c-bf93-bef617b30261/cdbe3338-4e5b-44c5-88d6-d72a964e7c75" + (page "6") + ) + ) + ) + ) +) diff --git a/Templates/M.2 M Key Templates/M.2 M Key 2260/PCIe Couple Caps.kicad_sch b/Templates/M.2 M Key Templates/M.2 M Key 2260/PCIe Couple Caps.kicad_sch new file mode 100644 index 0000000..f1341a8 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 2260/PCIe Couple Caps.kicad_sch @@ -0,0 +1,396 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "0c06aba0-fe64-4bc3-bd4a-079ccee23272") + (paper "A4") + (lib_symbols + (symbol "Device:C" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 0.254) + ) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (property "Reference" "C" + (at 0.635 2.54 0) + (effects + (font + (size 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This is a KiCad 9 template + diff --git a/Templates/M.2 M Key Templates/M.2 M Key 2280/.gitignore b/Templates/M.2 M Key Templates/M.2 M Key 2280/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 2280/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 M Key Templates/M.2 M Key 2280/M.2 M Key 2280.kicad_pcb b/Templates/M.2 M Key Templates/M.2 M Key 2280/M.2 M Key 2280.kicad_pcb new file mode 100644 index 0000000..db41209 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 2280/M.2 M Key 2280.kicad_pcb @@ -0,0 +1,4136 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (pdf_metadata yes) + (pdf_single_document no) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (sketchpadsonfab no) + (plotpadnumbers no) + (hidednponfab no) + (sketchdnponfab yes) + (crossoutdnponfab yes) + (subtractmaskfromsilk no) + (outputformat 1) + (mirror no) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + (net 0 "") + (net 1 "/M.2 M Key/PET2P") + (net 2 "/PET2+") + (net 3 "/M.2 M Key/PET3P") + (net 4 "/PET3+") + (net 5 "/M.2 M Key/PET0N") + (net 6 "/PET0-") + (net 7 "/M.2 M Key/PET1N") + (net 8 "/PET1-") + (net 9 "/M.2 M Key/PET1P") + (net 10 "/PET1+") + (net 11 "/M.2 M Key/PET2N") + (net 12 "/PET2-") + (net 13 "/M.2 M Key/PET0P") + (net 14 "/PET0+") + (net 15 "/M.2 M Key/PET3N") + (net 16 "/PET3-") + (net 17 "GND") + (net 18 "+3.3V") + (net 19 "unconnected-(J1-NC-Pad6)") + (net 20 "unconnected-(J1-NC-Pad8)") + (net 21 "/LED1#") + (net 22 "/PER3-") + (net 23 "/PER3+") + (net 24 "unconnected-(J1-NC-Pad20)") + (net 25 "unconnected-(J1-NC-Pad22)") + (net 26 "/PER2-") + (net 27 "unconnected-(J1-NC-Pad24)") + (net 28 "/PER2+") + (net 29 "unconnected-(J1-NC-Pad26)") + (net 30 "unconnected-(J1-NC-Pad28)") + (net 31 "unconnected-(J1-NC-Pad30)") + (net 32 "unconnected-(J1-NC-Pad32)") + (net 33 "unconnected-(J1-NC-Pad34)") + (net 34 "/PER1-") + (net 35 "unconnected-(J1-NC-Pad36)") + (net 36 "/PER1+") + (net 37 "/DEVSLP") + (net 38 "unconnected-(J1-NC-Pad40)") + (net 39 "unconnected-(J1-NC-Pad42)") + (net 40 "unconnected-(J1-NC-Pad44)") + (net 41 "unconnected-(J1-NC-Pad46)") + (net 42 "/PER0-") + (net 43 "unconnected-(J1-NC-Pad48)") + (net 44 "/PER0+") + (net 45 "/PERST#") + (net 46 "/CLKREQ#") + (net 47 "/REFCLK-") + (net 48 "/PEWAKE#") + (net 49 "/REFCLK+") + (net 50 "unconnected-(J1-NC-Pad56)") + (net 51 "unconnected-(J1-NC-Pad58)") + (net 52 "unconnected-(J1-NC-Pad67)") + (net 53 "/SUSCLK") + (net 54 "/PEDET") + (footprint "PCIexpress:M.2 M Key Connector" + (layer "F.Cu") + (uuid "1240811f-f848-449b-b6a4-44047031c490") + (at 109.81 157.965) + (property "Reference" "J1" + (at 0 -5.08 0) + (unlocked yes) + (layer "F.Fab") + (uuid "cc38beed-6472-4a52-b956-84feff92fc05") + (effects + (font + (size 1 1) + (thickness 0.1) + ) + ) + ) + (property "Value" "~" + (at 0 1 0) + (unlocked yes) + (layer "F.Fab") + (uuid "e194af1a-ca71-4394-8be7-f3ce997784e5") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 0) + (unlocked yes) + (layer "F.Fab") + (hide yes) + (uuid "b6d87b23-b707-4e0d-b544-858fd8ae812e") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Description" "" + (at 0 0 0) + (unlocked yes) + (layer "F.Fab") + (hide yes) + (uuid "5b3b0989-baa2-4266-b529-40603c942d84") + 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"IN-" input + (at 72.39 76.2 0) + (uuid "9e829286-bd01-4e76-832e-76e5c5fa12cf") + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + ) + (instances + (project "M.2 M Key 2280" + (path "/219a884a-3de7-458b-a1ef-b1ef28e44cf6/fe45642c-7e29-4b13-a620-3dcf8308ed1b" + (page "6") + ) + ) + ) + ) +) diff --git a/Templates/M.2 M Key Templates/M.2 M Key 2280/PCIe Couple Caps.kicad_sch b/Templates/M.2 M Key Templates/M.2 M Key 2280/PCIe Couple Caps.kicad_sch new file mode 100644 index 0000000..4de7957 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 2280/PCIe Couple Caps.kicad_sch @@ -0,0 +1,396 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "0c06aba0-fe64-4bc3-bd4a-079ccee23272") + (paper "A4") + (lib_symbols + (symbol "Device:C" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 0.254) + ) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (property "Reference" "C" + (at 0.635 2.54 0) + (effects + (font + (size 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This is a KiCad 9 template + diff --git a/Templates/M.2 M Key Templates/M.2 M Key 30110/.gitignore b/Templates/M.2 M Key Templates/M.2 M Key 30110/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 30110/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 M Key Templates/M.2 M Key 30110/M.2 M Key 30110.kicad_pcb b/Templates/M.2 M Key Templates/M.2 M Key 30110/M.2 M Key 30110.kicad_pcb new file mode 100644 index 0000000..0eb6add --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 30110/M.2 M Key 30110.kicad_pcb @@ -0,0 +1,4156 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (pdf_metadata yes) + (pdf_single_document no) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (sketchpadsonfab no) + (plotpadnumbers no) + (hidednponfab no) + (sketchdnponfab yes) + (crossoutdnponfab yes) + (subtractmaskfromsilk no) + (outputformat 1) + (mirror no) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + (net 0 "") + (net 1 "/M.2 M Key/PET1P") + (net 2 "/M.2 M Key/PET1N") + (net 3 "/M.2 M Key/PET0N") + (net 4 "/M.2 M Key/PET0P") + (net 5 "/M.2 M Key/PET3N") + (net 6 "/M.2 M Key/PET2P") + (net 7 "/M.2 M Key/PET2N") + (net 8 "/M.2 M Key/PET3P") + (net 9 "/PET2+") + (net 10 "/PET3+") + (net 11 "/PET0-") + (net 12 "/PET1-") + (net 13 "GND") + (net 14 "+3.3V") + (net 15 "unconnected-(J1-NC-Pad6)") + (net 16 "unconnected-(J1-NC-Pad8)") + (net 17 "/LED1#") + (net 18 "/PER3-") + (net 19 "/PER3+") + (net 20 "unconnected-(J1-NC-Pad20)") + (net 21 "unconnected-(J1-NC-Pad22)") + (net 22 "/PER2-") + (net 23 "unconnected-(J1-NC-Pad24)") + (net 24 "/PER2+") + (net 25 "unconnected-(J1-NC-Pad26)") + (net 26 "unconnected-(J1-NC-Pad28)") + (net 27 "unconnected-(J1-NC-Pad30)") + (net 28 "unconnected-(J1-NC-Pad32)") + (net 29 "unconnected-(J1-NC-Pad34)") + (net 30 "/PER1-") + (net 31 "unconnected-(J1-NC-Pad36)") + (net 32 "/PER1+") + (net 33 "/DEVSLP") + (net 34 "unconnected-(J1-NC-Pad40)") + (net 35 "unconnected-(J1-NC-Pad42)") + (net 36 "unconnected-(J1-NC-Pad44)") + (net 37 "unconnected-(J1-NC-Pad46)") + (net 38 "/PER0-") + (net 39 "unconnected-(J1-NC-Pad48)") + (net 40 "/PER0+") + (net 41 "/PERST#") + (net 42 "/CLKREQ#") + (net 43 "/REFCLK-") + (net 44 "/PEWAKE#") + (net 45 "/REFCLK+") + (net 46 "unconnected-(J1-NC-Pad56)") + (net 47 "unconnected-(J1-NC-Pad58)") + (net 48 "unconnected-(J1-NC-Pad67)") + (net 49 "/SUSCLK") + (net 50 "/PEDET") + (net 51 "/PET1+") + (net 52 "/PET2-") + (net 53 "/PET0+") + (net 54 "/PET3-") + (footprint "PCIexpress:M.2 Mounting Pad" + (layer "F.Cu") + (uuid "09cfe4ab-9efd-4c86-ae99-812c14494702") + (at 103.73 47.04) + (property "Reference" "H1" + (at 0 -4.82 0) + (unlocked yes) + (layer "F.Fab") + (uuid "db5b7222-6365-44ca-979d-b8627e0dfae5") + (effects + (font + (size 1 1) + (thickness 0.1) + ) + ) + ) + (property "Value" "MountingHole_Pad" + (at 0 1 0) + (unlocked yes) + (layer "F.Fab") + (uuid "d3e108a1-e5fb-49a5-9215-7cce7f7e6d3a") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 0) + (unlocked yes) + (layer "F.Fab") + (hide yes) + (uuid "9d2a31da-3946-4b6b-8998-03bdeb83ecc8") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Description" "Mounting Hole with connection" + (at 0 0 0) + (unlocked yes) + (layer "F.Fab") + (hide yes) + (uuid "b1de0ac5-a32b-4a4b-935c-f9e3fef363bd") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (attr smd exclude_from_bom) + (fp_text user "${REFERENCE}" + (at 0 2.5 0) + (unlocked yes) + (layer "F.Fab") + (uuid "21e03e1d-d4e1-4702-a7dc-78e12b51a480") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (pad "1" thru_hole circle + (at 0 0) + (size 5.5 5.5) + (drill 3.5) + (property pad_prop_castellated) + (layers "*.Cu" "*.Mask") + (remove_unused_layers no) + (net 13 "GND") + (pinfunction "1") + (pintype "input") + (uuid "28b7aab0-d89b-43aa-bf8b-6a8a0051c7b6") + (padstack + (mode front_inner_back) + (layer "Inner" + (shape circle) + (size 5.5 5.5) + (zone_connect -1) + ) + (layer "B.Cu" + (shape oval) + (size 6 8) + (thermal_bridge_angle 45) + (zone_connect -1) + ) + ) + ) + (embedded_fonts no) + ) + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "35e12347-3a73-45c1-897a-f29b633d1036") + (at 103.08 152.28 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C1" + (at 0 0.765 90) + (layer "F.SilkS") + (uuid "c499baef-06a0-4d85-ac42-4d0106bdcbdc") + (effects + (font + (size 0.5 0.5) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "b7add788-1f68-4ae9-b43a-b075b74b815f") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "be162adf-b537-435e-a179-188461bcafb0") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "e57866e8-f6ca-44bf-a9e5-fcda9d14c5dc") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (attr smd) + (fp_line + (start 0.7 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+ (pin "IN-" input + (at 72.39 76.2 0) + (uuid "d512974d-f5aa-4a64-b2de-467c23a0b7ba") + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + ) + (instances + (project "M.2 M Key 30110" + (path "/225e45d4-8736-425f-a7bd-ada36700ab53/b71dd013-93d1-4bea-b245-7c5834e0818c" + (page "6") + ) + ) + ) + ) +) diff --git a/Templates/M.2 M Key Templates/M.2 M Key 30110/PCIe Couple Caps.kicad_sch b/Templates/M.2 M Key Templates/M.2 M Key 30110/PCIe Couple Caps.kicad_sch new file mode 100644 index 0000000..4de6154 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 30110/PCIe Couple Caps.kicad_sch @@ -0,0 +1,396 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "0c06aba0-fe64-4bc3-bd4a-079ccee23272") + (paper "A4") + (lib_symbols + (symbol "Device:C" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 0.254) + ) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (property "Reference" "C" + (at 0.635 2.54 0) + (effects + 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This is a KiCad 9 template + diff --git a/Templates/M.2 M Key Templates/M.2 M Key 3030/.gitignore b/Templates/M.2 M Key Templates/M.2 M Key 3030/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 3030/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 M Key Templates/M.2 M Key 3030/M.2 M Key 3030.kicad_pcb b/Templates/M.2 M Key Templates/M.2 M Key 3030/M.2 M Key 3030.kicad_pcb new file mode 100644 index 0000000..972a3de --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 3030/M.2 M Key 3030.kicad_pcb @@ -0,0 +1,4154 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (pdf_metadata yes) + (pdf_single_document no) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (sketchpadsonfab no) + (plotpadnumbers no) + (hidednponfab no) + (sketchdnponfab yes) + (crossoutdnponfab yes) + (subtractmaskfromsilk no) + (outputformat 1) + (mirror no) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + (net 0 "") + (net 1 "/M.2 M Key/PET1P") + (net 2 "/M.2 M Key/PET1N") + (net 3 "/M.2 M Key/PET0P") + (net 4 "/M.2 M Key/PET0N") + (net 5 "/M.2 M Key/PET2N") + (net 6 "/M.2 M Key/PET3N") + (net 7 "/M.2 M Key/PET3P") + (net 8 "/M.2 M Key/PET2P") + (net 9 "/PET2+") + (net 10 "/PET3+") + (net 11 "/PET0-") + (net 12 "/PET1-") + (net 13 "/PET1+") + (net 14 "/PET2-") + (net 15 "/PET0+") + (net 16 "/PET3-") + (net 17 "GND") + (net 18 "+3.3V") + (net 19 "unconnected-(J1-NC-Pad6)") + (net 20 "unconnected-(J1-NC-Pad8)") + (net 21 "/LED1#") + (net 22 "/PER3-") + (net 23 "/PER3+") + (net 24 "unconnected-(J1-NC-Pad20)") + (net 25 "unconnected-(J1-NC-Pad22)") + (net 26 "/PER2-") + (net 27 "unconnected-(J1-NC-Pad24)") + (net 28 "/PER2+") + (net 29 "unconnected-(J1-NC-Pad26)") + (net 30 "unconnected-(J1-NC-Pad28)") + (net 31 "unconnected-(J1-NC-Pad30)") + (net 32 "unconnected-(J1-NC-Pad32)") + (net 33 "unconnected-(J1-NC-Pad34)") + (net 34 "/PER1-") + (net 35 "unconnected-(J1-NC-Pad36)") + (net 36 "/PER1+") + (net 37 "/DEVSLP") + (net 38 "unconnected-(J1-NC-Pad40)") + (net 39 "unconnected-(J1-NC-Pad42)") + (net 40 "unconnected-(J1-NC-Pad44)") + (net 41 "unconnected-(J1-NC-Pad46)") + (net 42 "/PER0-") + (net 43 "unconnected-(J1-NC-Pad48)") + (net 44 "/PER0+") + (net 45 "/PERST#") + (net 46 "/CLKREQ#") + (net 47 "/REFCLK-") + (net 48 "/PEWAKE#") + (net 49 "/REFCLK+") + (net 50 "unconnected-(J1-NC-Pad56)") + (net 51 "unconnected-(J1-NC-Pad58)") + (net 52 "unconnected-(J1-NC-Pad67)") + (net 53 "/SUSCLK") + (net 54 "/PEDET") + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "04c6e54f-a02b-4e4e-a370-ec146055d2b2") + (at 111.855 150.54 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C6" + (at 0 -0.755 90) + (layer "F.SilkS") + (uuid "2ba5c8d8-962b-4156-9181-41de5f27a6f4") + (effects + (font + (size 0.5 0.5) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "b55d893d-feb3-4878-96be-e522e5b563be") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "4a84de9b-3a81-4da8-91a4-b6913b4d3c6d") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "911a8c10-cc02-42c1-953c-805db5a71604") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (attr smd) + (fp_line + (start 0.7 -0.35) + (end 0.7 0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "ea69c61f-311d-4a75-a2bf-5ebb79d58e26") + ) + (fp_line + (start -0.7 -0.35) + (end 0.7 -0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "16041041-3bd8-4a69-82e0-7e5159107355") + ) + (fp_line + (start 0.7 0.35) + (end -0.7 0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "2b9ad94a-bb7c-4c84-9747-6ae3ed933a6b") + ) + (fp_line + (start -0.7 0.35) + (end -0.7 -0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "062579b0-ccea-4175-9e99-a7885ca789fe") + ) + (fp_line + (start 0.3 -0.15) + (end 0.3 0.15) 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0.318 0.36) + (layers "F.Paste") + (roundrect_rratio 0.25) + (uuid "100b785e-b0f2-4e22-844a-de264cc20bfc") + ) + (pad "1" smd roundrect + (at -0.32 0 90) + (size 0.46 0.4) + (layers "F.Cu" "F.Mask") + (roundrect_rratio 0.25) + (net 8 "/M.2 M Key/PET2P") + (pintype "passive") + (uuid "7f95d6d4-9d08-44ff-bc57-f9094b433ac3") + ) + (pad "2" smd roundrect + (at 0.32 0 90) + (size 0.46 0.4) + (layers "F.Cu" "F.Mask") + (roundrect_rratio 0.25) + (net 9 "/PET2+") + (pintype "passive") + (uuid "c9433061-c0be-492f-a4b8-b9bbe16bd2fa") + ) + (embedded_fonts no) + (model "${KICAD9_3DMODEL_DIR}/Capacitor_SMD.3dshapes/C_0201_0603Metric.wrl" + (offset + (xyz 0 0 0) + ) + (scale + (xyz 1 1 1) + ) + (rotate + (xyz 0 0 0) + ) + ) + ) + (footprint "Capacitor_SMD:C_0201_0603Metric" + (layer "F.Cu") + (uuid "0ceef0d0-5d44-4e24-8430-14a6e528eea5") + (at 106.555 150.54 90) + (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC-7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") + (tags "capacitor") + (property "Reference" "C1" + (at 0 0.765 90) + (layer "F.SilkS") + (uuid "eccab611-91f7-4926-9911-de0da80abf52") + (effects + (font + (size 0.5 0.5) + (thickness 0.15) + ) + ) + ) + (property "Value" "220nF" + (at 0 1.05 90) + (layer "F.Fab") + (uuid "caf37318-0d69-4428-b1c2-35c61cea6d6b") + (effects + (font + (size 1 1) + (thickness 0.15) + ) + ) + ) + (property "Datasheet" "" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "a6c6a4f6-2749-4dff-abd9-42d0a129d90f") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (property "Description" "Unpolarized capacitor" + (at 0 0 90) + (layer "F.Fab") + (hide yes) + (uuid "742287dc-677c-4677-850a-68f8cee6e714") + (effects + (font + (size 1.27 1.27) + (thickness 0.15) + ) + ) + ) + (attr smd) + (fp_line + (start 0.7 -0.35) + (end 0.7 0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "86035124-e751-4ab1-a656-7db7c90ecc7b") + ) + (fp_line + (start -0.7 -0.35) + (end 0.7 -0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "f2eb8af8-cd0e-46da-91ba-4922f6776851") + ) + (fp_line + (start 0.7 0.35) + (end -0.7 0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "4e2294f1-656e-409b-a8b4-10d2619f3315") + ) + (fp_line + (start -0.7 0.35) + (end -0.7 -0.35) + (stroke + (width 0.05) + (type solid) + ) + (layer "F.CrtYd") + (uuid "6c18c4eb-3fb8-40e0-85c3-98fca7705c36") + ) + (fp_line + (start 0.3 -0.15) + (end 0.3 0.15) + (stroke + (width 0.1) + (type solid) + ) + (layer "F.Fab") + (uuid "fb4ee434-f7e6-4d63-8d40-9b8faab00f55") + ) + (fp_line + (start -0.3 -0.15) + (end 0.3 -0.15) + (stroke + (width 0.1) + (type solid) + ) + (layer "F.Fab") + (uuid "f51b0fa4-83ba-44d0-91bc-bbe6d6ffa99b") + ) + (fp_line + (start 0.3 0.15) + (end -0.3 0.15) + (stroke + (width 0.1) + (type solid) + ) + (layer "F.Fab") + (uuid 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This is a KiCad 9 template + diff --git a/Templates/M.2 M Key Templates/M.2 M Key 3042/.gitignore b/Templates/M.2 M Key Templates/M.2 M Key 3042/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 3042/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 M Key Templates/M.2 M Key 3042/M.2 M Key.kicad_sch b/Templates/M.2 M Key Templates/M.2 M Key 3042/M.2 M Key.kicad_sch new file mode 100644 index 0000000..22d83de --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 3042/M.2 M Key.kicad_sch @@ -0,0 +1,4166 @@ +(kicad_sch + (version 20250114) + (generator "eeschema") + (generator_version "9.0") + (uuid "6a94e6f9-6d3d-4d14-95f9-e68665b15013") + (paper "A4") + (lib_symbols + (symbol "Mechanical:MountingHole_Pad" + (pin_numbers + (hide yes) + ) + (pin_names + (offset 1.016) + (hide yes) + ) + (exclude_from_sim no) + (in_bom no) + (on_board yes) + (property "Reference" "H" + (at 0 6.35 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "MountingHole_Pad" + (at 0 4.445 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Datasheet" "~" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Description" "Mounting Hole with connection" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "ki_keywords" "mounting hole" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "ki_fp_filters" "MountingHole*Pad*" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (symbol "MountingHole_Pad_0_1" + (circle + (center 0 1.27) + (radius 1.27) + (stroke + (width 1.27) + (type default) + ) + (fill + (type none) + ) + ) + ) + (symbol "MountingHole_Pad_1_1" + (pin input line + (at 0 -2.54 90) + (length 2.54) + (name "1" + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (number "1" + (effects + (font + (size 1.27 1.27) + ) + ) + ) + ) + ) + (embedded_fonts no) + ) + (symbol "PCIexpress:M.2_M_Key" + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (property "Reference" "J" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "PCIexpress:M.2 M Key Connector" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Datasheet" "" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Description" "" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Note" "Check PCIe M.2 Specification for Pin Alt mode functions. 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) + (pin "2" + (uuid "714d28f5-bc1e-48d9-8707-694d8c487cff") + ) + (pin "1" + (uuid "5137d5bb-8f6f-4891-a339-504889566ce5") + ) + (instances + (project "M.2 M key 3042" + (path "/33a896b5-698c-4421-ac90-a15bdf9e4c25/98cbbf9f-4962-4ccb-835c-8a53971f66d2/5d0595b3-944b-441f-b22b-db89ec1a22e6" + (reference "C6") + (unit 1) + ) + (path "/33a896b5-698c-4421-ac90-a15bdf9e4c25/98cbbf9f-4962-4ccb-835c-8a53971f66d2/6b0ad683-ac06-4c6d-a09c-9523f796fa3b" + (reference "C2") + (unit 1) + ) + (path "/33a896b5-698c-4421-ac90-a15bdf9e4c25/98cbbf9f-4962-4ccb-835c-8a53971f66d2/90d8a0fe-6e9e-4d1d-ad54-87aefda3ab86" + (reference "C8") + (unit 1) + ) + (path "/33a896b5-698c-4421-ac90-a15bdf9e4c25/98cbbf9f-4962-4ccb-835c-8a53971f66d2/f596e965-9af1-41dd-9f15-6f309ad60165" + (reference "C4") + (unit 1) + ) + ) + ) + ) +) diff --git a/Templates/M.2 M Key Templates/M.2 M Key 3042/meta/info.html b/Templates/M.2 M Key Templates/M.2 M Key 3042/meta/info.html new file mode 100644 index 0000000..585f3d9 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 3042/meta/info.html @@ -0,0 +1,3 @@ +
This is a KiCad 9 template + diff --git a/Templates/M.2 M Key Templates/M.2 M Key 3060/.gitignore b/Templates/M.2 M Key Templates/M.2 M Key 3060/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 3060/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 M Key Templates/M.2 M Key 3060/M.2 M Key 3060.kicad_pcb b/Templates/M.2 M Key Templates/M.2 M Key 3060/M.2 M Key 3060.kicad_pcb new file mode 100644 index 0000000..620bd45 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 3060/M.2 M Key 3060.kicad_pcb @@ -0,0 +1,4157 @@ +(kicad_pcb + (version 20241229) + (generator "pcbnew") + (generator_version "9.0") + (general + (thickness 0.8) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (9 "F.Adhes" user "F.Adhesive") + (11 "B.Adhes" user "B.Adhesive") + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user "F.Silkscreen") + (7 "B.SilkS" user "B.Silkscreen") + (1 "F.Mask" user) + (3 "B.Mask" user) + (17 "Dwgs.User" user "User.Drawings") + (19 "Cmts.User" user "User.Comments") + (21 "Eco1.User" user "User.Eco1") + (23 "Eco2.User" user "User.Eco2") + (25 "Edge.Cuts" user) + (27 "Margin" user) + (31 "F.CrtYd" user "F.Courtyard") + (29 "B.CrtYd" user "B.Courtyard") + (35 "F.Fab" user) + (33 "B.Fab" user) + (39 "User.1" user) + (41 "User.2" user) + (43 "User.3" user) + (45 "User.4" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + (thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + 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(net 16 "unconnected-(J1-NC-Pad8)") + (net 17 "/LED1#") + (net 18 "/PER3-") + (net 19 "/PER3+") + (net 20 "unconnected-(J1-NC-Pad20)") + (net 21 "unconnected-(J1-NC-Pad22)") + (net 22 "/PER2-") + (net 23 "unconnected-(J1-NC-Pad24)") + (net 24 "/PER2+") + (net 25 "unconnected-(J1-NC-Pad26)") + (net 26 "unconnected-(J1-NC-Pad28)") + (net 27 "unconnected-(J1-NC-Pad30)") + (net 28 "unconnected-(J1-NC-Pad32)") + (net 29 "unconnected-(J1-NC-Pad34)") + (net 30 "/PER1-") + (net 31 "unconnected-(J1-NC-Pad36)") + (net 32 "/PER1+") + (net 33 "/DEVSLP") + (net 34 "unconnected-(J1-NC-Pad40)") + (net 35 "unconnected-(J1-NC-Pad42)") + (net 36 "unconnected-(J1-NC-Pad44)") + (net 37 "unconnected-(J1-NC-Pad46)") + (net 38 "/PER0-") + (net 39 "unconnected-(J1-NC-Pad48)") + (net 40 "/PER0+") + (net 41 "/PERST#") + (net 42 "/CLKREQ#") + (net 43 "/REFCLK-") + (net 44 "/PEWAKE#") + (net 45 "/REFCLK+") + (net 46 "unconnected-(J1-NC-Pad56)") + (net 47 "unconnected-(J1-NC-Pad58)") + (net 48 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This is a KiCad 9 template + diff --git a/Templates/M.2 M Key Templates/M.2 M Key 3080/.gitignore b/Templates/M.2 M Key Templates/M.2 M Key 3080/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 3080/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/M.2 M Key Templates/M.2 M Key 3080/M.2 M Key 3080.kicad_pcb b/Templates/M.2 M Key Templates/M.2 M Key 3080/M.2 M Key 3080.kicad_pcb new file mode 100644 index 0000000..2daf1f3 --- /dev/null +++ b/Templates/M.2 M Key Templates/M.2 M Key 3080/M.2 M Key 3080.kicad_pcb @@ -0,0 +1,4156 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(thickness 0.01) + ) + (layer "F.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "dielectric 1" + (type "core") + (thickness 0.71) + (material "FR4") + (epsilon_r 4.5) + (loss_tangent 0.02) + ) + (layer "B.Cu" + (type "copper") + (thickness 0.035) + ) + (layer "B.Mask" + (type "Bottom Solder Mask") + (thickness 0.01) + ) + (layer "B.Paste" + (type "Bottom Solder Paste") + ) + (layer "B.SilkS" + (type "Bottom Silk Screen") + ) + (copper_finish "None") + (dielectric_constraints no) + ) + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (tenting front back) + (pcbplotparams + (layerselection 0x00000000_00000000_55555555_5755f5ff) + (plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12.000000) + (dashed_line_gap_ratio 3.000000) + (svgprecision 4) + (plotframeref no) + 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(net 16 "unconnected-(J1-NC-Pad8)") + (net 17 "/LED1#") + (net 18 "/PER3-") + (net 19 "/PER3+") + (net 20 "unconnected-(J1-NC-Pad20)") + (net 21 "unconnected-(J1-NC-Pad22)") + (net 22 "/PER2-") + (net 23 "unconnected-(J1-NC-Pad24)") + (net 24 "/PER2+") + (net 25 "unconnected-(J1-NC-Pad26)") + (net 26 "unconnected-(J1-NC-Pad28)") + (net 27 "unconnected-(J1-NC-Pad30)") + (net 28 "unconnected-(J1-NC-Pad32)") + (net 29 "unconnected-(J1-NC-Pad34)") + (net 30 "/PER1-") + (net 31 "unconnected-(J1-NC-Pad36)") + (net 32 "/PER1+") + (net 33 "/DEVSLP") + (net 34 "unconnected-(J1-NC-Pad40)") + (net 35 "unconnected-(J1-NC-Pad42)") + (net 36 "unconnected-(J1-NC-Pad44)") + (net 37 "unconnected-(J1-NC-Pad46)") + (net 38 "/PER0-") + (net 39 "unconnected-(J1-NC-Pad48)") + (net 40 "/PER0+") + (net 41 "/PERST#") + (net 42 "/CLKREQ#") + (net 43 "/REFCLK-") + (net 44 "/PEWAKE#") + (net 45 "/REFCLK+") + (net 46 "unconnected-(J1-NC-Pad56)") + (net 47 "unconnected-(J1-NC-Pad58)") + (net 48 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Templates/PCIexpress_x1_full/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x1_full/PCIexpress_x1_full.kicad_pcb b/Templates/PCIe x1 Templates/PCIexpress_x1_full/PCIexpress_x1_full.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x1_full/PCIexpress_x1_full.kicad_pcb rename to Templates/PCIe x1 Templates/PCIexpress_x1_full/PCIexpress_x1_full.kicad_pcb diff --git a/Templates/PCIexpress_x1_full/PCIexpress_x1_full.kicad_pro b/Templates/PCIe x1 Templates/PCIexpress_x1_full/PCIexpress_x1_full.kicad_pro similarity index 100% rename from Templates/PCIexpress_x1_full/PCIexpress_x1_full.kicad_pro rename to Templates/PCIe x1 Templates/PCIexpress_x1_full/PCIexpress_x1_full.kicad_pro diff --git a/Templates/PCIexpress_x1_full/PCIexpress_x1_full.kicad_sch b/Templates/PCIe x1 Templates/PCIexpress_x1_full/PCIexpress_x1_full.kicad_sch similarity index 100% rename from Templates/PCIexpress_x1_full/PCIexpress_x1_full.kicad_sch rename to Templates/PCIe x1 Templates/PCIexpress_x1_full/PCIexpress_x1_full.kicad_sch diff --git a/Templates/PCIexpress_x1_full/decap.kicad_sch b/Templates/PCIe x1 Templates/PCIexpress_x1_full/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x1_full/decap.kicad_sch rename to Templates/PCIe x1 Templates/PCIexpress_x1_full/decap.kicad_sch diff --git a/Templates/PCIexpress_x16_full/fp-lib-table b/Templates/PCIe x1 Templates/PCIexpress_x1_full/fp-lib-table similarity index 100% rename from Templates/PCIexpress_x16_full/fp-lib-table rename to Templates/PCIe x1 Templates/PCIexpress_x1_full/fp-lib-table diff --git a/Templates/PCIexpress_x1_full/meta/info.html b/Templates/PCIe x1 Templates/PCIexpress_x1_full/meta/info.html similarity index 100% rename from Templates/PCIexpress_x1_full/meta/info.html rename to Templates/PCIe x1 Templates/PCIexpress_x1_full/meta/info.html diff --git a/Templates/PCIexpress_x16_full/sym-lib-table b/Templates/PCIe x1 Templates/PCIexpress_x1_full/sym-lib-table similarity index 100% rename from Templates/PCIexpress_x16_full/sym-lib-table rename to Templates/PCIe x1 Templates/PCIexpress_x1_full/sym-lib-table diff --git a/Templates/PCIexpress_x1_full/term.kicad_sch b/Templates/PCIe x1 Templates/PCIexpress_x1_full/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x1_full/term.kicad_sch rename to Templates/PCIe x1 Templates/PCIexpress_x1_full/term.kicad_sch diff --git a/Templates/PCIe x1 Templates/PCIexpress_x1_half/.gitignore b/Templates/PCIe x1 Templates/PCIexpress_x1_half/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/PCIe x1 Templates/PCIexpress_x1_half/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/PCIexpress_x1_half/PCIexpress_connector.kicad_sch b/Templates/PCIe x1 Templates/PCIexpress_x1_half/PCIexpress_connector.kicad_sch similarity index 100% rename from Templates/PCIexpress_x1_half/PCIexpress_connector.kicad_sch rename to Templates/PCIe x1 Templates/PCIexpress_x1_half/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x1_half/PCIexpress_x1_half.kicad_pcb b/Templates/PCIe x1 Templates/PCIexpress_x1_half/PCIexpress_x1_half.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x1_half/PCIexpress_x1_half.kicad_pcb rename to Templates/PCIe x1 Templates/PCIexpress_x1_half/PCIexpress_x1_half.kicad_pcb diff --git a/Templates/PCIexpress_x1_half/PCIexpress_x1_half.kicad_pro b/Templates/PCIe x1 Templates/PCIexpress_x1_half/PCIexpress_x1_half.kicad_pro similarity index 100% rename from Templates/PCIexpress_x1_half/PCIexpress_x1_half.kicad_pro rename to Templates/PCIe x1 Templates/PCIexpress_x1_half/PCIexpress_x1_half.kicad_pro diff --git a/Templates/PCIexpress_x1_half/PCIexpress_x1_half.kicad_sch b/Templates/PCIe x1 Templates/PCIexpress_x1_half/PCIexpress_x1_half.kicad_sch similarity index 100% rename from Templates/PCIexpress_x1_half/PCIexpress_x1_half.kicad_sch rename to Templates/PCIe x1 Templates/PCIexpress_x1_half/PCIexpress_x1_half.kicad_sch diff --git a/Templates/PCIexpress_x1_half/decap.kicad_sch b/Templates/PCIe x1 Templates/PCIexpress_x1_half/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x1_half/decap.kicad_sch rename to Templates/PCIe x1 Templates/PCIexpress_x1_half/decap.kicad_sch diff --git a/Templates/PCIexpress_x16_half/fp-lib-table b/Templates/PCIe x1 Templates/PCIexpress_x1_half/fp-lib-table similarity index 100% rename from Templates/PCIexpress_x16_half/fp-lib-table rename to Templates/PCIe x1 Templates/PCIexpress_x1_half/fp-lib-table diff --git a/Templates/PCIexpress_x1_half/meta/info.html b/Templates/PCIe x1 Templates/PCIexpress_x1_half/meta/info.html similarity index 100% rename from Templates/PCIexpress_x1_half/meta/info.html rename to Templates/PCIe x1 Templates/PCIexpress_x1_half/meta/info.html diff --git a/Templates/PCIexpress_x16_half/sym-lib-table b/Templates/PCIe x1 Templates/PCIexpress_x1_half/sym-lib-table similarity index 100% rename from Templates/PCIexpress_x16_half/sym-lib-table rename to Templates/PCIe x1 Templates/PCIexpress_x1_half/sym-lib-table diff --git a/Templates/PCIexpress_x1_half/term.kicad_sch b/Templates/PCIe x1 Templates/PCIexpress_x1_half/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x1_half/term.kicad_sch rename to Templates/PCIe x1 Templates/PCIexpress_x1_half/term.kicad_sch diff --git a/Templates/PCIe x1 Templates/PCIexpress_x1_low/.gitignore b/Templates/PCIe x1 Templates/PCIexpress_x1_low/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/PCIe x1 Templates/PCIexpress_x1_low/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/PCIexpress_x1_low/PCIexpress_connector.kicad_sch b/Templates/PCIe x1 Templates/PCIexpress_x1_low/PCIexpress_connector.kicad_sch similarity index 100% rename from Templates/PCIexpress_x1_low/PCIexpress_connector.kicad_sch rename to Templates/PCIe x1 Templates/PCIexpress_x1_low/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x1_low/PCIexpress_x1_low.kicad_pcb b/Templates/PCIe x1 Templates/PCIexpress_x1_low/PCIexpress_x1_low.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x1_low/PCIexpress_x1_low.kicad_pcb rename to Templates/PCIe x1 Templates/PCIexpress_x1_low/PCIexpress_x1_low.kicad_pcb diff --git a/Templates/PCIexpress_x1_low/PCIexpress_x1_low.kicad_pro b/Templates/PCIe x1 Templates/PCIexpress_x1_low/PCIexpress_x1_low.kicad_pro similarity index 100% rename from Templates/PCIexpress_x1_low/PCIexpress_x1_low.kicad_pro rename to Templates/PCIe x1 Templates/PCIexpress_x1_low/PCIexpress_x1_low.kicad_pro diff --git a/Templates/PCIexpress_x1_low/PCIexpress_x1_low.kicad_sch b/Templates/PCIe x1 Templates/PCIexpress_x1_low/PCIexpress_x1_low.kicad_sch similarity index 100% rename from Templates/PCIexpress_x1_low/PCIexpress_x1_low.kicad_sch rename to Templates/PCIe x1 Templates/PCIexpress_x1_low/PCIexpress_x1_low.kicad_sch diff --git a/Templates/PCIexpress_x1_low/decap.kicad_sch b/Templates/PCIe x1 Templates/PCIexpress_x1_low/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x1_low/decap.kicad_sch rename to Templates/PCIe x1 Templates/PCIexpress_x1_low/decap.kicad_sch diff --git a/Templates/PCIexpress_x16_low/fp-lib-table b/Templates/PCIe x1 Templates/PCIexpress_x1_low/fp-lib-table similarity index 100% rename from Templates/PCIexpress_x16_low/fp-lib-table rename to Templates/PCIe x1 Templates/PCIexpress_x1_low/fp-lib-table diff --git a/Templates/PCIexpress_x1_low/meta/info.html b/Templates/PCIe x1 Templates/PCIexpress_x1_low/meta/info.html similarity index 100% rename from Templates/PCIexpress_x1_low/meta/info.html rename to Templates/PCIe x1 Templates/PCIexpress_x1_low/meta/info.html diff --git a/Templates/PCIexpress_x16_low/sym-lib-table b/Templates/PCIe x1 Templates/PCIexpress_x1_low/sym-lib-table similarity index 100% rename from Templates/PCIexpress_x16_low/sym-lib-table rename to Templates/PCIe x1 Templates/PCIexpress_x1_low/sym-lib-table diff --git a/Templates/PCIexpress_x1_low/term.kicad_sch b/Templates/PCIe x1 Templates/PCIexpress_x1_low/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x1_low/term.kicad_sch rename to Templates/PCIe x1 Templates/PCIexpress_x1_low/term.kicad_sch diff --git a/Templates/PCIe x16 Templates/PCIexpress_x16_full/.gitignore b/Templates/PCIe x16 Templates/PCIexpress_x16_full/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/PCIe x16 Templates/PCIexpress_x16_full/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/PCIexpress_x16_full/PCIexpress_connector.kicad_sch b/Templates/PCIe x16 Templates/PCIexpress_x16_full/PCIexpress_connector.kicad_sch similarity index 100% rename from Templates/PCIexpress_x16_full/PCIexpress_connector.kicad_sch rename to Templates/PCIe x16 Templates/PCIexpress_x16_full/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x16_full/PCIexpress_x16_full.kicad_pcb b/Templates/PCIe x16 Templates/PCIexpress_x16_full/PCIexpress_x16_full.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x16_full/PCIexpress_x16_full.kicad_pcb rename to Templates/PCIe x16 Templates/PCIexpress_x16_full/PCIexpress_x16_full.kicad_pcb diff --git a/Templates/PCIexpress_x16_full/PCIexpress_x16_full.kicad_pro b/Templates/PCIe x16 Templates/PCIexpress_x16_full/PCIexpress_x16_full.kicad_pro similarity index 100% rename from Templates/PCIexpress_x16_full/PCIexpress_x16_full.kicad_pro rename to Templates/PCIe x16 Templates/PCIexpress_x16_full/PCIexpress_x16_full.kicad_pro diff --git a/Templates/PCIexpress_x16_full/PCIexpress_x16_full.kicad_sch b/Templates/PCIe x16 Templates/PCIexpress_x16_full/PCIexpress_x16_full.kicad_sch similarity index 100% rename from Templates/PCIexpress_x16_full/PCIexpress_x16_full.kicad_sch rename to Templates/PCIe x16 Templates/PCIexpress_x16_full/PCIexpress_x16_full.kicad_sch diff --git a/Templates/PCIexpress_x16_full/decap.kicad_sch b/Templates/PCIe x16 Templates/PCIexpress_x16_full/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x16_full/decap.kicad_sch rename to Templates/PCIe x16 Templates/PCIexpress_x16_full/decap.kicad_sch diff --git a/Templates/PCIexpress_x1_full/fp-lib-table b/Templates/PCIe x16 Templates/PCIexpress_x16_full/fp-lib-table similarity index 100% rename from Templates/PCIexpress_x1_full/fp-lib-table rename to Templates/PCIe x16 Templates/PCIexpress_x16_full/fp-lib-table diff --git a/Templates/PCIexpress_x16_full/meta/info.html b/Templates/PCIe x16 Templates/PCIexpress_x16_full/meta/info.html similarity index 100% rename from Templates/PCIexpress_x16_full/meta/info.html rename to Templates/PCIe x16 Templates/PCIexpress_x16_full/meta/info.html diff --git a/Templates/PCIexpress_x1_full/sym-lib-table b/Templates/PCIe x16 Templates/PCIexpress_x16_full/sym-lib-table similarity index 100% rename from Templates/PCIexpress_x1_full/sym-lib-table rename to Templates/PCIe x16 Templates/PCIexpress_x16_full/sym-lib-table diff --git a/Templates/PCIexpress_x16_full/term.kicad_sch b/Templates/PCIe x16 Templates/PCIexpress_x16_full/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x16_full/term.kicad_sch rename to Templates/PCIe x16 Templates/PCIexpress_x16_full/term.kicad_sch diff --git a/Templates/PCIe x16 Templates/PCIexpress_x16_half/.gitignore b/Templates/PCIe x16 Templates/PCIexpress_x16_half/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/PCIe x16 Templates/PCIexpress_x16_half/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/PCIexpress_x16_half/PCIexpress_connector.kicad_sch b/Templates/PCIe x16 Templates/PCIexpress_x16_half/PCIexpress_connector.kicad_sch similarity index 100% rename from Templates/PCIexpress_x16_half/PCIexpress_connector.kicad_sch rename to Templates/PCIe x16 Templates/PCIexpress_x16_half/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x16_half/PCIexpress_x16_half.kicad_pcb b/Templates/PCIe x16 Templates/PCIexpress_x16_half/PCIexpress_x16_half.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x16_half/PCIexpress_x16_half.kicad_pcb rename to Templates/PCIe x16 Templates/PCIexpress_x16_half/PCIexpress_x16_half.kicad_pcb diff --git a/Templates/PCIexpress_x16_half/PCIexpress_x16_half.kicad_pro b/Templates/PCIe x16 Templates/PCIexpress_x16_half/PCIexpress_x16_half.kicad_pro similarity index 100% rename from Templates/PCIexpress_x16_half/PCIexpress_x16_half.kicad_pro rename to Templates/PCIe x16 Templates/PCIexpress_x16_half/PCIexpress_x16_half.kicad_pro diff --git a/Templates/PCIexpress_x16_half/PCIexpress_x16_half.kicad_sch b/Templates/PCIe x16 Templates/PCIexpress_x16_half/PCIexpress_x16_half.kicad_sch similarity index 100% rename from Templates/PCIexpress_x16_half/PCIexpress_x16_half.kicad_sch rename to Templates/PCIe x16 Templates/PCIexpress_x16_half/PCIexpress_x16_half.kicad_sch diff --git a/Templates/PCIexpress_x16_half/decap.kicad_sch b/Templates/PCIe x16 Templates/PCIexpress_x16_half/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x16_half/decap.kicad_sch rename to Templates/PCIe x16 Templates/PCIexpress_x16_half/decap.kicad_sch diff --git a/Templates/PCIexpress_x1_half/fp-lib-table b/Templates/PCIe x16 Templates/PCIexpress_x16_half/fp-lib-table similarity index 100% rename from Templates/PCIexpress_x1_half/fp-lib-table rename to Templates/PCIe x16 Templates/PCIexpress_x16_half/fp-lib-table diff --git a/Templates/PCIexpress_x16_half/meta/info.html b/Templates/PCIe x16 Templates/PCIexpress_x16_half/meta/info.html similarity index 100% rename from Templates/PCIexpress_x16_half/meta/info.html rename to Templates/PCIe x16 Templates/PCIexpress_x16_half/meta/info.html diff --git a/Templates/PCIexpress_x1_half/sym-lib-table b/Templates/PCIe x16 Templates/PCIexpress_x16_half/sym-lib-table similarity index 100% rename from Templates/PCIexpress_x1_half/sym-lib-table rename to Templates/PCIe x16 Templates/PCIexpress_x16_half/sym-lib-table diff --git a/Templates/PCIexpress_x16_half/term.kicad_sch b/Templates/PCIe x16 Templates/PCIexpress_x16_half/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x16_half/term.kicad_sch rename to Templates/PCIe x16 Templates/PCIexpress_x16_half/term.kicad_sch diff --git a/Templates/PCIe x16 Templates/PCIexpress_x16_low/.gitignore b/Templates/PCIe x16 Templates/PCIexpress_x16_low/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/PCIe x16 Templates/PCIexpress_x16_low/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/PCIexpress_x16_low/PCIexpress_connector.kicad_sch b/Templates/PCIe x16 Templates/PCIexpress_x16_low/PCIexpress_connector.kicad_sch similarity index 100% rename from Templates/PCIexpress_x16_low/PCIexpress_connector.kicad_sch rename to Templates/PCIe x16 Templates/PCIexpress_x16_low/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x16_low/PCIexpress_x16_low.kicad_pcb b/Templates/PCIe x16 Templates/PCIexpress_x16_low/PCIexpress_x16_low.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x16_low/PCIexpress_x16_low.kicad_pcb rename to Templates/PCIe x16 Templates/PCIexpress_x16_low/PCIexpress_x16_low.kicad_pcb diff --git a/Templates/PCIexpress_x16_low/PCIexpress_x16_low.kicad_pro b/Templates/PCIe x16 Templates/PCIexpress_x16_low/PCIexpress_x16_low.kicad_pro similarity index 100% rename from Templates/PCIexpress_x16_low/PCIexpress_x16_low.kicad_pro rename to Templates/PCIe x16 Templates/PCIexpress_x16_low/PCIexpress_x16_low.kicad_pro diff --git a/Templates/PCIexpress_x16_low/PCIexpress_x16_low.kicad_sch b/Templates/PCIe x16 Templates/PCIexpress_x16_low/PCIexpress_x16_low.kicad_sch similarity index 100% rename from Templates/PCIexpress_x16_low/PCIexpress_x16_low.kicad_sch rename to Templates/PCIe x16 Templates/PCIexpress_x16_low/PCIexpress_x16_low.kicad_sch diff --git a/Templates/PCIexpress_x16_low/decap.kicad_sch b/Templates/PCIe x16 Templates/PCIexpress_x16_low/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x16_low/decap.kicad_sch rename to Templates/PCIe x16 Templates/PCIexpress_x16_low/decap.kicad_sch diff --git a/Templates/PCIexpress_x1_low/fp-lib-table b/Templates/PCIe x16 Templates/PCIexpress_x16_low/fp-lib-table similarity index 100% rename from Templates/PCIexpress_x1_low/fp-lib-table rename to Templates/PCIe x16 Templates/PCIexpress_x16_low/fp-lib-table diff --git a/Templates/PCIexpress_x16_low/meta/info.html b/Templates/PCIe x16 Templates/PCIexpress_x16_low/meta/info.html similarity index 100% rename from Templates/PCIexpress_x16_low/meta/info.html rename to Templates/PCIe x16 Templates/PCIexpress_x16_low/meta/info.html diff --git a/Templates/PCIexpress_x1_low/sym-lib-table b/Templates/PCIe x16 Templates/PCIexpress_x16_low/sym-lib-table similarity index 100% rename from Templates/PCIexpress_x1_low/sym-lib-table rename to Templates/PCIe x16 Templates/PCIexpress_x16_low/sym-lib-table diff --git a/Templates/PCIexpress_x16_low/term.kicad_sch b/Templates/PCIe x16 Templates/PCIexpress_x16_low/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x16_low/term.kicad_sch rename to Templates/PCIe x16 Templates/PCIexpress_x16_low/term.kicad_sch diff --git a/Templates/PCIe x2 Templates/PCIexpress_x2_full/.gitignore b/Templates/PCIe x2 Templates/PCIexpress_x2_full/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/PCIe x2 Templates/PCIexpress_x2_full/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/PCIexpress_x2_full/PCIexpress_connector.kicad_sch b/Templates/PCIe x2 Templates/PCIexpress_x2_full/PCIexpress_connector.kicad_sch similarity index 100% rename from Templates/PCIexpress_x2_full/PCIexpress_connector.kicad_sch rename to Templates/PCIe x2 Templates/PCIexpress_x2_full/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x2_full/PCIexpress_x2_full.kicad_pcb b/Templates/PCIe x2 Templates/PCIexpress_x2_full/PCIexpress_x2_full.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x2_full/PCIexpress_x2_full.kicad_pcb rename to Templates/PCIe x2 Templates/PCIexpress_x2_full/PCIexpress_x2_full.kicad_pcb diff --git a/Templates/PCIexpress_x2_full/PCIexpress_x2_full.kicad_pro b/Templates/PCIe x2 Templates/PCIexpress_x2_full/PCIexpress_x2_full.kicad_pro similarity index 100% rename from Templates/PCIexpress_x2_full/PCIexpress_x2_full.kicad_pro rename to Templates/PCIe x2 Templates/PCIexpress_x2_full/PCIexpress_x2_full.kicad_pro diff --git a/Templates/PCIexpress_x2_full/PCIexpress_x2_full.kicad_sch b/Templates/PCIe x2 Templates/PCIexpress_x2_full/PCIexpress_x2_full.kicad_sch similarity index 100% rename from Templates/PCIexpress_x2_full/PCIexpress_x2_full.kicad_sch rename to Templates/PCIe x2 Templates/PCIexpress_x2_full/PCIexpress_x2_full.kicad_sch diff --git a/Templates/PCIexpress_x2_full/decap.kicad_sch b/Templates/PCIe x2 Templates/PCIexpress_x2_full/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x2_full/decap.kicad_sch rename to Templates/PCIe x2 Templates/PCIexpress_x2_full/decap.kicad_sch diff --git a/Templates/PCIexpress_x2_full/meta/info.html b/Templates/PCIe x2 Templates/PCIexpress_x2_full/meta/info.html similarity index 100% rename from Templates/PCIexpress_x2_full/meta/info.html rename to Templates/PCIe x2 Templates/PCIexpress_x2_full/meta/info.html diff --git a/Templates/PCIexpress_x2_full/term.kicad_sch b/Templates/PCIe x2 Templates/PCIexpress_x2_full/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x2_full/term.kicad_sch rename to Templates/PCIe x2 Templates/PCIexpress_x2_full/term.kicad_sch diff --git a/Templates/PCIe x2 Templates/PCIexpress_x2_half/.gitignore b/Templates/PCIe x2 Templates/PCIexpress_x2_half/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/PCIe x2 Templates/PCIexpress_x2_half/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/PCIexpress_x2_half/PCIexpress_connector.kicad_sch b/Templates/PCIe x2 Templates/PCIexpress_x2_half/PCIexpress_connector.kicad_sch similarity index 100% rename from Templates/PCIexpress_x2_half/PCIexpress_connector.kicad_sch rename to Templates/PCIe x2 Templates/PCIexpress_x2_half/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x2_half/PCIexpress_x2_half.kicad_pcb b/Templates/PCIe x2 Templates/PCIexpress_x2_half/PCIexpress_x2_half.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x2_half/PCIexpress_x2_half.kicad_pcb rename to Templates/PCIe x2 Templates/PCIexpress_x2_half/PCIexpress_x2_half.kicad_pcb diff --git a/Templates/PCIexpress_x2_half/PCIexpress_x2_half.kicad_pro b/Templates/PCIe x2 Templates/PCIexpress_x2_half/PCIexpress_x2_half.kicad_pro similarity index 100% rename from Templates/PCIexpress_x2_half/PCIexpress_x2_half.kicad_pro rename to Templates/PCIe x2 Templates/PCIexpress_x2_half/PCIexpress_x2_half.kicad_pro diff --git a/Templates/PCIexpress_x2_half/PCIexpress_x2_half.kicad_sch b/Templates/PCIe x2 Templates/PCIexpress_x2_half/PCIexpress_x2_half.kicad_sch similarity index 100% rename from Templates/PCIexpress_x2_half/PCIexpress_x2_half.kicad_sch rename to Templates/PCIe x2 Templates/PCIexpress_x2_half/PCIexpress_x2_half.kicad_sch diff --git a/Templates/PCIexpress_x2_half/decap.kicad_sch b/Templates/PCIe x2 Templates/PCIexpress_x2_half/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x2_half/decap.kicad_sch rename to Templates/PCIe x2 Templates/PCIexpress_x2_half/decap.kicad_sch diff --git a/Templates/PCIexpress_x2_half/meta/info.html b/Templates/PCIe x2 Templates/PCIexpress_x2_half/meta/info.html similarity index 100% rename from Templates/PCIexpress_x2_half/meta/info.html rename to Templates/PCIe x2 Templates/PCIexpress_x2_half/meta/info.html diff --git a/Templates/PCIexpress_x2_half/term.kicad_sch b/Templates/PCIe x2 Templates/PCIexpress_x2_half/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x2_half/term.kicad_sch rename to Templates/PCIe x2 Templates/PCIexpress_x2_half/term.kicad_sch diff --git a/Templates/PCIe x2 Templates/PCIexpress_x2_low/.gitignore b/Templates/PCIe x2 Templates/PCIexpress_x2_low/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/PCIe x2 Templates/PCIexpress_x2_low/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/PCIexpress_x2_low/PCIexpress_connector.kicad_sch b/Templates/PCIe x2 Templates/PCIexpress_x2_low/PCIexpress_connector.kicad_sch similarity index 100% rename from Templates/PCIexpress_x2_low/PCIexpress_connector.kicad_sch rename to Templates/PCIe x2 Templates/PCIexpress_x2_low/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x2_low/PCIexpress_x2_low.kicad_pcb b/Templates/PCIe x2 Templates/PCIexpress_x2_low/PCIexpress_x2_low.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x2_low/PCIexpress_x2_low.kicad_pcb rename to Templates/PCIe x2 Templates/PCIexpress_x2_low/PCIexpress_x2_low.kicad_pcb diff --git a/Templates/PCIexpress_x2_low/PCIexpress_x2_low.kicad_pro b/Templates/PCIe x2 Templates/PCIexpress_x2_low/PCIexpress_x2_low.kicad_pro similarity index 100% rename from Templates/PCIexpress_x2_low/PCIexpress_x2_low.kicad_pro rename to Templates/PCIe x2 Templates/PCIexpress_x2_low/PCIexpress_x2_low.kicad_pro diff --git a/Templates/PCIexpress_x2_low/PCIexpress_x2_low.kicad_sch b/Templates/PCIe x2 Templates/PCIexpress_x2_low/PCIexpress_x2_low.kicad_sch similarity index 100% rename from Templates/PCIexpress_x2_low/PCIexpress_x2_low.kicad_sch rename to Templates/PCIe x2 Templates/PCIexpress_x2_low/PCIexpress_x2_low.kicad_sch diff --git a/Templates/PCIexpress_x2_low/decap.kicad_sch b/Templates/PCIe x2 Templates/PCIexpress_x2_low/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x2_low/decap.kicad_sch rename to Templates/PCIe x2 Templates/PCIexpress_x2_low/decap.kicad_sch diff --git a/Templates/PCIexpress_x2_low/meta/info.html b/Templates/PCIe x2 Templates/PCIexpress_x2_low/meta/info.html similarity index 100% rename from Templates/PCIexpress_x2_low/meta/info.html rename to Templates/PCIe x2 Templates/PCIexpress_x2_low/meta/info.html diff --git a/Templates/PCIexpress_x2_low/term.kicad_sch b/Templates/PCIe x2 Templates/PCIexpress_x2_low/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x2_low/term.kicad_sch rename to Templates/PCIe x2 Templates/PCIexpress_x2_low/term.kicad_sch diff --git a/Templates/PCIe x4 Templates/PCIexpress_x4_full/.gitignore b/Templates/PCIe x4 Templates/PCIexpress_x4_full/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/PCIe x4 Templates/PCIexpress_x4_full/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/PCIexpress_x4_full/PCIexpress_connector.kicad_sch b/Templates/PCIe x4 Templates/PCIexpress_x4_full/PCIexpress_connector.kicad_sch similarity index 100% rename from Templates/PCIexpress_x4_full/PCIexpress_connector.kicad_sch rename to Templates/PCIe x4 Templates/PCIexpress_x4_full/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x4_full/PCIexpress_x4_full.kicad_pcb b/Templates/PCIe x4 Templates/PCIexpress_x4_full/PCIexpress_x4_full.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x4_full/PCIexpress_x4_full.kicad_pcb rename to Templates/PCIe x4 Templates/PCIexpress_x4_full/PCIexpress_x4_full.kicad_pcb diff --git a/Templates/PCIexpress_x4_full/PCIexpress_x4_full.kicad_pro b/Templates/PCIe x4 Templates/PCIexpress_x4_full/PCIexpress_x4_full.kicad_pro similarity index 100% rename from Templates/PCIexpress_x4_full/PCIexpress_x4_full.kicad_pro rename to Templates/PCIe x4 Templates/PCIexpress_x4_full/PCIexpress_x4_full.kicad_pro diff --git a/Templates/PCIexpress_x4_full/PCIexpress_x4_full.kicad_sch b/Templates/PCIe x4 Templates/PCIexpress_x4_full/PCIexpress_x4_full.kicad_sch similarity index 100% rename from Templates/PCIexpress_x4_full/PCIexpress_x4_full.kicad_sch rename to Templates/PCIe x4 Templates/PCIexpress_x4_full/PCIexpress_x4_full.kicad_sch diff --git a/Templates/PCIexpress_x4_full/decap.kicad_sch b/Templates/PCIe x4 Templates/PCIexpress_x4_full/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x4_full/decap.kicad_sch rename to Templates/PCIe x4 Templates/PCIexpress_x4_full/decap.kicad_sch diff --git a/Templates/PCIexpress_x4_full/fp-lib-table b/Templates/PCIe x4 Templates/PCIexpress_x4_full/fp-lib-table similarity index 100% rename from Templates/PCIexpress_x4_full/fp-lib-table rename to Templates/PCIe x4 Templates/PCIexpress_x4_full/fp-lib-table diff --git a/Templates/PCIexpress_x4_full/meta/info.html b/Templates/PCIe x4 Templates/PCIexpress_x4_full/meta/info.html similarity index 100% rename from Templates/PCIexpress_x4_full/meta/info.html rename to Templates/PCIe x4 Templates/PCIexpress_x4_full/meta/info.html diff --git a/Templates/PCIexpress_x4_full/sym-lib-table b/Templates/PCIe x4 Templates/PCIexpress_x4_full/sym-lib-table similarity index 100% rename from Templates/PCIexpress_x4_full/sym-lib-table rename to Templates/PCIe x4 Templates/PCIexpress_x4_full/sym-lib-table diff --git a/Templates/PCIexpress_x4_full/term.kicad_sch b/Templates/PCIe x4 Templates/PCIexpress_x4_full/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x4_full/term.kicad_sch rename to Templates/PCIe x4 Templates/PCIexpress_x4_full/term.kicad_sch diff --git a/Templates/PCIe x4 Templates/PCIexpress_x4_half/.gitignore b/Templates/PCIe x4 Templates/PCIexpress_x4_half/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/PCIe x4 Templates/PCIexpress_x4_half/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/PCIexpress_x4_half/PCIexpress_connector.kicad_sch b/Templates/PCIe x4 Templates/PCIexpress_x4_half/PCIexpress_connector.kicad_sch similarity index 100% rename from Templates/PCIexpress_x4_half/PCIexpress_connector.kicad_sch rename to Templates/PCIe x4 Templates/PCIexpress_x4_half/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x4_half/PCIexpress_x4_half.kicad_pcb b/Templates/PCIe x4 Templates/PCIexpress_x4_half/PCIexpress_x4_half.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x4_half/PCIexpress_x4_half.kicad_pcb rename to Templates/PCIe x4 Templates/PCIexpress_x4_half/PCIexpress_x4_half.kicad_pcb diff --git a/Templates/PCIexpress_x4_half/PCIexpress_x4_half.kicad_pro b/Templates/PCIe x4 Templates/PCIexpress_x4_half/PCIexpress_x4_half.kicad_pro similarity index 100% rename from Templates/PCIexpress_x4_half/PCIexpress_x4_half.kicad_pro rename to Templates/PCIe x4 Templates/PCIexpress_x4_half/PCIexpress_x4_half.kicad_pro diff --git a/Templates/PCIexpress_x4_half/PCIexpress_x4_half.kicad_sch b/Templates/PCIe x4 Templates/PCIexpress_x4_half/PCIexpress_x4_half.kicad_sch similarity index 100% rename from Templates/PCIexpress_x4_half/PCIexpress_x4_half.kicad_sch rename to Templates/PCIe x4 Templates/PCIexpress_x4_half/PCIexpress_x4_half.kicad_sch diff --git a/Templates/PCIexpress_x4_half/decap.kicad_sch b/Templates/PCIe x4 Templates/PCIexpress_x4_half/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x4_half/decap.kicad_sch rename to Templates/PCIe x4 Templates/PCIexpress_x4_half/decap.kicad_sch diff --git a/Templates/PCIexpress_x4_half/fp-lib-table b/Templates/PCIe x4 Templates/PCIexpress_x4_half/fp-lib-table similarity index 100% rename from Templates/PCIexpress_x4_half/fp-lib-table rename to Templates/PCIe x4 Templates/PCIexpress_x4_half/fp-lib-table diff --git a/Templates/PCIexpress_x4_half/meta/info.html b/Templates/PCIe x4 Templates/PCIexpress_x4_half/meta/info.html similarity index 100% rename from Templates/PCIexpress_x4_half/meta/info.html rename to Templates/PCIe x4 Templates/PCIexpress_x4_half/meta/info.html diff --git a/Templates/PCIexpress_x4_half/sym-lib-table b/Templates/PCIe x4 Templates/PCIexpress_x4_half/sym-lib-table similarity index 100% rename from Templates/PCIexpress_x4_half/sym-lib-table rename to Templates/PCIe x4 Templates/PCIexpress_x4_half/sym-lib-table diff --git a/Templates/PCIexpress_x4_half/term.kicad_sch b/Templates/PCIe x4 Templates/PCIexpress_x4_half/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x4_half/term.kicad_sch rename to Templates/PCIe x4 Templates/PCIexpress_x4_half/term.kicad_sch diff --git a/Templates/PCIe x4 Templates/PCIexpress_x4_low/.gitignore b/Templates/PCIe x4 Templates/PCIexpress_x4_low/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/PCIe x4 Templates/PCIexpress_x4_low/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/PCIexpress_x4_low/PCIexpress_connector.kicad_sch b/Templates/PCIe x4 Templates/PCIexpress_x4_low/PCIexpress_connector.kicad_sch similarity index 100% rename from Templates/PCIexpress_x4_low/PCIexpress_connector.kicad_sch rename to Templates/PCIe x4 Templates/PCIexpress_x4_low/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x4_low/PCIexpress_x4_low.kicad_pcb b/Templates/PCIe x4 Templates/PCIexpress_x4_low/PCIexpress_x4_low.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x4_low/PCIexpress_x4_low.kicad_pcb rename to Templates/PCIe x4 Templates/PCIexpress_x4_low/PCIexpress_x4_low.kicad_pcb diff --git a/Templates/PCIexpress_x4_low/PCIexpress_x4_low.kicad_pro b/Templates/PCIe x4 Templates/PCIexpress_x4_low/PCIexpress_x4_low.kicad_pro similarity index 100% rename from Templates/PCIexpress_x4_low/PCIexpress_x4_low.kicad_pro rename to Templates/PCIe x4 Templates/PCIexpress_x4_low/PCIexpress_x4_low.kicad_pro diff --git a/Templates/PCIexpress_x4_low/PCIexpress_x4_low.kicad_sch b/Templates/PCIe x4 Templates/PCIexpress_x4_low/PCIexpress_x4_low.kicad_sch similarity index 100% rename from Templates/PCIexpress_x4_low/PCIexpress_x4_low.kicad_sch rename to Templates/PCIe x4 Templates/PCIexpress_x4_low/PCIexpress_x4_low.kicad_sch diff --git a/Templates/PCIexpress_x4_low/decap.kicad_sch b/Templates/PCIe x4 Templates/PCIexpress_x4_low/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x4_low/decap.kicad_sch rename to Templates/PCIe x4 Templates/PCIexpress_x4_low/decap.kicad_sch diff --git a/Templates/PCIexpress_x4_low/fp-lib-table b/Templates/PCIe x4 Templates/PCIexpress_x4_low/fp-lib-table similarity index 100% rename from Templates/PCIexpress_x4_low/fp-lib-table rename to Templates/PCIe x4 Templates/PCIexpress_x4_low/fp-lib-table diff --git a/Templates/PCIexpress_x4_low/meta/info.html b/Templates/PCIe x4 Templates/PCIexpress_x4_low/meta/info.html similarity index 100% rename from Templates/PCIexpress_x4_low/meta/info.html rename to Templates/PCIe x4 Templates/PCIexpress_x4_low/meta/info.html diff --git a/Templates/PCIexpress_x4_low/sym-lib-table b/Templates/PCIe x4 Templates/PCIexpress_x4_low/sym-lib-table similarity index 100% rename from Templates/PCIexpress_x4_low/sym-lib-table rename to Templates/PCIe x4 Templates/PCIexpress_x4_low/sym-lib-table diff --git a/Templates/PCIexpress_x4_low/term.kicad_sch b/Templates/PCIe x4 Templates/PCIexpress_x4_low/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x4_low/term.kicad_sch rename to Templates/PCIe x4 Templates/PCIexpress_x4_low/term.kicad_sch diff --git a/Templates/PCIe x8 Templates/PCIexpress_x8_full/.gitignore b/Templates/PCIe x8 Templates/PCIexpress_x8_full/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/PCIe x8 Templates/PCIexpress_x8_full/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/PCIexpress_x8_full/PCIexpress_connector.kicad_sch b/Templates/PCIe x8 Templates/PCIexpress_x8_full/PCIexpress_connector.kicad_sch similarity index 100% rename from Templates/PCIexpress_x8_full/PCIexpress_connector.kicad_sch rename to Templates/PCIe x8 Templates/PCIexpress_x8_full/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x8_full/PCIexpress_x8_full.kicad_pcb b/Templates/PCIe x8 Templates/PCIexpress_x8_full/PCIexpress_x8_full.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x8_full/PCIexpress_x8_full.kicad_pcb rename to Templates/PCIe x8 Templates/PCIexpress_x8_full/PCIexpress_x8_full.kicad_pcb diff --git a/Templates/PCIexpress_x8_full/PCIexpress_x8_full.kicad_pro b/Templates/PCIe x8 Templates/PCIexpress_x8_full/PCIexpress_x8_full.kicad_pro similarity index 100% rename from Templates/PCIexpress_x8_full/PCIexpress_x8_full.kicad_pro rename to Templates/PCIe x8 Templates/PCIexpress_x8_full/PCIexpress_x8_full.kicad_pro diff --git a/Templates/PCIexpress_x8_full/PCIexpress_x8_full.kicad_sch b/Templates/PCIe x8 Templates/PCIexpress_x8_full/PCIexpress_x8_full.kicad_sch similarity index 100% rename from Templates/PCIexpress_x8_full/PCIexpress_x8_full.kicad_sch rename to Templates/PCIe x8 Templates/PCIexpress_x8_full/PCIexpress_x8_full.kicad_sch diff --git a/Templates/PCIexpress_x8_full/decap.kicad_sch b/Templates/PCIe x8 Templates/PCIexpress_x8_full/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x8_full/decap.kicad_sch rename to Templates/PCIe x8 Templates/PCIexpress_x8_full/decap.kicad_sch diff --git a/Templates/PCIexpress_x8_full/fp-lib-table b/Templates/PCIe x8 Templates/PCIexpress_x8_full/fp-lib-table similarity index 100% rename from Templates/PCIexpress_x8_full/fp-lib-table rename to Templates/PCIe x8 Templates/PCIexpress_x8_full/fp-lib-table diff --git a/Templates/PCIexpress_x8_full/meta/info.html b/Templates/PCIe x8 Templates/PCIexpress_x8_full/meta/info.html similarity index 100% rename from Templates/PCIexpress_x8_full/meta/info.html rename to Templates/PCIe x8 Templates/PCIexpress_x8_full/meta/info.html diff --git a/Templates/PCIexpress_x8_full/sym-lib-table b/Templates/PCIe x8 Templates/PCIexpress_x8_full/sym-lib-table similarity index 100% rename from Templates/PCIexpress_x8_full/sym-lib-table rename to Templates/PCIe x8 Templates/PCIexpress_x8_full/sym-lib-table diff --git a/Templates/PCIexpress_x8_full/term.kicad_sch b/Templates/PCIe x8 Templates/PCIexpress_x8_full/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x8_full/term.kicad_sch rename to Templates/PCIe x8 Templates/PCIexpress_x8_full/term.kicad_sch diff --git a/Templates/PCIe x8 Templates/PCIexpress_x8_half/.gitignore b/Templates/PCIe x8 Templates/PCIexpress_x8_half/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/PCIe x8 Templates/PCIexpress_x8_half/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/PCIexpress_x8_half/PCIexpress_connector.kicad_sch b/Templates/PCIe x8 Templates/PCIexpress_x8_half/PCIexpress_connector.kicad_sch similarity index 100% rename from Templates/PCIexpress_x8_half/PCIexpress_connector.kicad_sch rename to Templates/PCIe x8 Templates/PCIexpress_x8_half/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x8_half/PCIexpress_x8_half.kicad_pcb b/Templates/PCIe x8 Templates/PCIexpress_x8_half/PCIexpress_x8_half.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x8_half/PCIexpress_x8_half.kicad_pcb rename to Templates/PCIe x8 Templates/PCIexpress_x8_half/PCIexpress_x8_half.kicad_pcb diff --git a/Templates/PCIexpress_x8_half/PCIexpress_x8_half.kicad_pro b/Templates/PCIe x8 Templates/PCIexpress_x8_half/PCIexpress_x8_half.kicad_pro similarity index 100% rename from Templates/PCIexpress_x8_half/PCIexpress_x8_half.kicad_pro rename to Templates/PCIe x8 Templates/PCIexpress_x8_half/PCIexpress_x8_half.kicad_pro diff --git a/Templates/PCIexpress_x8_half/PCIexpress_x8_half.kicad_sch b/Templates/PCIe x8 Templates/PCIexpress_x8_half/PCIexpress_x8_half.kicad_sch similarity index 100% rename from Templates/PCIexpress_x8_half/PCIexpress_x8_half.kicad_sch rename to Templates/PCIe x8 Templates/PCIexpress_x8_half/PCIexpress_x8_half.kicad_sch diff --git a/Templates/PCIexpress_x8_half/decap.kicad_sch b/Templates/PCIe x8 Templates/PCIexpress_x8_half/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x8_half/decap.kicad_sch rename to Templates/PCIe x8 Templates/PCIexpress_x8_half/decap.kicad_sch diff --git a/Templates/PCIexpress_x8_half/fp-lib-table b/Templates/PCIe x8 Templates/PCIexpress_x8_half/fp-lib-table similarity index 100% rename from Templates/PCIexpress_x8_half/fp-lib-table rename to Templates/PCIe x8 Templates/PCIexpress_x8_half/fp-lib-table diff --git a/Templates/PCIexpress_x8_half/meta/info.html b/Templates/PCIe x8 Templates/PCIexpress_x8_half/meta/info.html similarity index 100% rename from Templates/PCIexpress_x8_half/meta/info.html rename to Templates/PCIe x8 Templates/PCIexpress_x8_half/meta/info.html diff --git a/Templates/PCIexpress_x8_half/sym-lib-table b/Templates/PCIe x8 Templates/PCIexpress_x8_half/sym-lib-table similarity index 100% rename from Templates/PCIexpress_x8_half/sym-lib-table rename to Templates/PCIe x8 Templates/PCIexpress_x8_half/sym-lib-table diff --git a/Templates/PCIexpress_x8_half/term.kicad_sch b/Templates/PCIe x8 Templates/PCIexpress_x8_half/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x8_half/term.kicad_sch rename to Templates/PCIe x8 Templates/PCIexpress_x8_half/term.kicad_sch diff --git a/Templates/PCIe x8 Templates/PCIexpress_x8_low/.gitignore b/Templates/PCIe x8 Templates/PCIexpress_x8_low/.gitignore new file mode 100644 index 0000000..5cfb0c1 --- /dev/null +++ b/Templates/PCIe x8 Templates/PCIexpress_x8_low/.gitignore @@ -0,0 +1,25 @@ +# For PCBs designed using KiCad: http://www.kicad-pcb.org/ +# Format documentation: http://kicad-pcb.org/help/file-formats/ + +# Temporary files +*.000 +*.bak +*.bck +*.kicad_pcb-bak +*~ +_autosave-* +*.tmp +*-save.pro +*-save.kicad_pcb +fp-info-cache + +# Netlist files (exported from Eeschema) +*.net + +# Autorouter files (exported from Pcbnew) +*.dsn +*.ses + +# Exported BOM files +*.xml +*.csv diff --git a/Templates/PCIexpress_x8_low/PCIexpress_connector.kicad_sch b/Templates/PCIe x8 Templates/PCIexpress_x8_low/PCIexpress_connector.kicad_sch similarity index 100% rename from Templates/PCIexpress_x8_low/PCIexpress_connector.kicad_sch rename to Templates/PCIe x8 Templates/PCIexpress_x8_low/PCIexpress_connector.kicad_sch diff --git a/Templates/PCIexpress_x8_low/PCIexpress_x8_low.kicad_pcb b/Templates/PCIe x8 Templates/PCIexpress_x8_low/PCIexpress_x8_low.kicad_pcb similarity index 100% rename from Templates/PCIexpress_x8_low/PCIexpress_x8_low.kicad_pcb rename to Templates/PCIe x8 Templates/PCIexpress_x8_low/PCIexpress_x8_low.kicad_pcb diff --git a/Templates/PCIexpress_x8_low/PCIexpress_x8_low.kicad_pro b/Templates/PCIe x8 Templates/PCIexpress_x8_low/PCIexpress_x8_low.kicad_pro similarity index 100% rename from Templates/PCIexpress_x8_low/PCIexpress_x8_low.kicad_pro rename to Templates/PCIe x8 Templates/PCIexpress_x8_low/PCIexpress_x8_low.kicad_pro diff --git a/Templates/PCIexpress_x8_low/PCIexpress_x8_low.kicad_sch b/Templates/PCIe x8 Templates/PCIexpress_x8_low/PCIexpress_x8_low.kicad_sch similarity index 100% rename from Templates/PCIexpress_x8_low/PCIexpress_x8_low.kicad_sch rename to Templates/PCIe x8 Templates/PCIexpress_x8_low/PCIexpress_x8_low.kicad_sch diff --git a/Templates/PCIexpress_x8_low/decap.kicad_sch b/Templates/PCIe x8 Templates/PCIexpress_x8_low/decap.kicad_sch similarity index 100% rename from Templates/PCIexpress_x8_low/decap.kicad_sch rename to Templates/PCIe x8 Templates/PCIexpress_x8_low/decap.kicad_sch diff --git a/Templates/PCIexpress_x8_low/fp-lib-table b/Templates/PCIe x8 Templates/PCIexpress_x8_low/fp-lib-table similarity index 100% rename from Templates/PCIexpress_x8_low/fp-lib-table rename to Templates/PCIe x8 Templates/PCIexpress_x8_low/fp-lib-table diff --git a/Templates/PCIexpress_x8_low/meta/info.html b/Templates/PCIe x8 Templates/PCIexpress_x8_low/meta/info.html similarity index 100% rename from Templates/PCIexpress_x8_low/meta/info.html rename to Templates/PCIe x8 Templates/PCIexpress_x8_low/meta/info.html diff --git a/Templates/PCIexpress_x8_low/sym-lib-table b/Templates/PCIe x8 Templates/PCIexpress_x8_low/sym-lib-table similarity index 100% rename from Templates/PCIexpress_x8_low/sym-lib-table rename to Templates/PCIe x8 Templates/PCIexpress_x8_low/sym-lib-table diff --git a/Templates/PCIexpress_x8_low/term.kicad_sch b/Templates/PCIe x8 Templates/PCIexpress_x8_low/term.kicad_sch similarity index 100% rename from Templates/PCIexpress_x8_low/term.kicad_sch rename to Templates/PCIe x8 Templates/PCIexpress_x8_low/term.kicad_sch