mirror of
https://github.com/lucanastasio/PCIexpress-KiCad
synced 2025-04-10 00:16:34 +03:00
KiCad 6 update
This commit is contained in:
Luca Anastasio
parent
226fbabc61
commit
6498add9c1
1681
Library/PCIexpress.kicad_sym
Normal file
1681
Library/PCIexpress.kicad_sym
Normal file
File diff suppressed because it is too large
Load Diff
@ -1,452 +0,0 @@
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# PCIexpress_bracket
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#
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DEF PCIexpress_bracket J 0 40 Y Y 1 F N
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F0 "J" 0 0 50 H V C CNN
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F1 "PCIexpress_bracket" 0 0 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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PCIexpress_bracket_*
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$ENDFPLIST
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DRAW
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ENDDRAW
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ENDDEF
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#
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# PCIexpress_x1
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#
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DEF PCIexpress_x1 J 0 40 Y Y 1 F N
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F0 "J" 0 150 50 H V C CNN
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F1 "PCIexpress_x1" 0 50 50 H V C CNN
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F2 "PCIexpress:PCIexpress_x1" 0 -950 50 H I C CNN
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F3 "" 0 -950 50 H I C CNN
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DRAW
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T 0 0 -1150 50 0 0 0 notch Normal 0 C C
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T 0 0 -1950 50 0 0 0 x1 Normal 0 C C
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S 450 0 -450 -2000 1 1 10 f
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P 2 0 1 0 450 -1200 -450 -1200 N
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X ~PRSNT1 A1 600 -100 150 L 50 50 1 1 P
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X +3.3V A10 600 -1000 150 L 50 50 1 1 w
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X ~PERST A11 600 -1100 150 L 50 50 1 1 O
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X GND A12 600 -1300 150 L 50 50 1 1 w
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X REFCLK+ A13 600 -1400 150 L 50 50 1 1 O
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X REFCLK- A14 600 -1500 150 L 50 50 1 1 O
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X GND A15 600 -1600 150 L 50 50 1 1 w
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X PERp0 A16 600 -1700 150 L 50 50 1 1 I
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X PERn0 A17 600 -1800 150 L 50 50 1 1 I
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X GND A18 600 -1900 150 L 50 50 1 1 w
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X +12V A2 600 -200 150 L 50 50 1 1 w
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X +12V A3 600 -300 150 L 50 50 1 1 w
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X GND A4 600 -400 150 L 50 50 1 1 w
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X TCK A5 600 -500 150 L 50 50 1 1 O
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X TDI A6 600 -600 150 L 50 50 1 1 O
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X TDO A7 600 -700 150 L 50 50 1 1 I
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X TMS A8 600 -800 150 L 50 50 1 1 O
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X +3.3V A9 600 -900 150 L 50 50 1 1 w
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X +12V B1 -600 -100 150 R 50 50 1 1 w
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X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
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X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
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X RSVD B12 -600 -1300 150 R 50 50 1 1 N
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X GND B13 -600 -1400 150 R 50 50 1 1 w
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X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
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X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
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X GND B16 -600 -1700 150 R 50 50 1 1 w
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X ~PRSNT2 B17 -600 -1800 150 R 50 50 1 1 P
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X GND B18 -600 -1900 150 R 50 50 1 1 w
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X +12V B2 -600 -200 150 R 50 50 1 1 w
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X +12V B3 -600 -300 150 R 50 50 1 1 w
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X GND B4 -600 -400 150 R 50 50 1 1 w
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X SMCLK B5 -600 -500 150 R 50 50 1 1 C
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X SMDAT B6 -600 -600 150 R 50 50 1 1 C
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X GND B7 -600 -700 150 R 50 50 1 1 w
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X +3.3V B8 -600 -800 150 R 50 50 1 1 w
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X ~TRST B9 -600 -900 150 R 50 50 1 1 O
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ENDDRAW
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ENDDEF
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#
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# PCIexpress_x16
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#
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DEF PCIexpress_x16 J 0 40 Y Y 1 F N
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F0 "J" 0 150 50 H V C CNN
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F1 "PCIexpress_x16" 0 50 50 H V C CNN
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F2 "PCIexpress:PCIexpress_x16" 0 -950 50 H I C CNN
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F3 "" 0 -950 50 H I C CNN
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DRAW
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T 0 0 -8650 50 0 0 0 x16 Normal 0 C C
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T 0 0 -3450 50 0 0 0 x4 Normal 0 C C
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T 0 0 -5250 50 0 0 0 x8 Normal 0 C C
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T 0 0 -1150 50 0 1 1 notch Normal 0 C C
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T 0 0 -1950 50 0 1 1 x1 Normal 0 C C
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S 450 0 -450 -8700 1 1 10 f
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P 2 0 0 0 450 -5300 -450 -5300 N
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P 2 0 0 0 450 -3500 -450 -3500 N
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P 2 1 1 0 450 -2000 -450 -2000 N
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P 2 1 1 0 450 -1200 -450 -1200 N
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X ~PRSNT1 A1 600 -100 150 L 50 50 1 1 P
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X +3.3V A10 600 -1000 150 L 50 50 1 1 w
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X ~PERST A11 600 -1100 150 L 50 50 1 1 O
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X GND A12 600 -1300 150 L 50 50 1 1 w
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X REFCLK+ A13 600 -1400 150 L 50 50 1 1 O
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X REFCLK- A14 600 -1500 150 L 50 50 1 1 O
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X GND A15 600 -1600 150 L 50 50 1 1 w
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X PERp0 A16 600 -1700 150 L 50 50 1 1 I
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X PERn0 A17 600 -1800 150 L 50 50 1 1 I
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X GND A18 600 -1900 150 L 50 50 1 1 w
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X RSVD A19 600 -2100 150 L 50 50 1 1 N
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X +12V A2 600 -200 150 L 50 50 1 1 w
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X GND A20 600 -2200 150 L 50 50 1 1 w
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X PERp1 A21 600 -2300 150 L 50 50 1 1 I
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X PERn1 A22 600 -2400 150 L 50 50 1 1 I
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X GND A23 600 -2500 150 L 50 50 1 1 w
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X GND A24 600 -2600 150 L 50 50 1 1 w
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X PERp2 A25 600 -2700 150 L 50 50 1 1 I
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X PERn2 A26 600 -2800 150 L 50 50 1 1 I
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X GND A27 600 -2900 150 L 50 50 1 1 w
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X GND A28 600 -3000 150 L 50 50 1 1 w
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X PERp3 A29 600 -3100 150 L 50 50 1 1 I
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X +12V A3 600 -300 150 L 50 50 1 1 w
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X PERn3 A30 600 -3200 150 L 50 50 1 1 I
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X GND A31 600 -3300 150 L 50 50 1 1 w
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X RSVD A32 600 -3400 150 L 50 50 1 1 N
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X RSVD A33 600 -3600 150 L 50 50 1 1 N
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X GND A34 600 -3700 150 L 50 50 1 1 w
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X PERp4 A35 600 -3800 150 L 50 50 1 1 I
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X PERn4 A36 600 -3900 150 L 50 50 1 1 I
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X GND A37 600 -4000 150 L 50 50 1 1 w
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X GND A38 600 -4100 150 L 50 50 1 1 w
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X PERp5 A39 600 -4200 150 L 50 50 1 1 I
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X GND A4 600 -400 150 L 50 50 1 1 w
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X PERn5 A40 600 -4300 150 L 50 50 1 1 I
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X GND A41 600 -4400 150 L 50 50 1 1 w
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X GND A42 600 -4500 150 L 50 50 1 1 w
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X PERp6 A43 600 -4600 150 L 50 50 1 1 I
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X PERn6 A44 600 -4700 150 L 50 50 1 1 I
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X GND A45 600 -4800 150 L 50 50 1 1 w
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X GND A46 600 -4900 150 L 50 50 1 1 w
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X PERp7 A47 600 -5000 150 L 50 50 1 1 I
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X PERn7 A48 600 -5100 150 L 50 50 1 1 I
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X GND A49 600 -5200 150 L 50 50 1 1 w
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X TCK A5 600 -500 150 L 50 50 1 1 O
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X RSVD A50 600 -5400 150 L 50 50 1 1 N
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X GND A51 600 -5500 150 L 50 50 1 1 w
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X PERp8 A52 600 -5600 150 L 50 50 1 1 I
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X PERn8 A53 600 -5700 150 L 50 50 1 1 I
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X GND A54 600 -5800 150 L 50 50 1 1 w
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X GND A55 600 -5900 150 L 50 50 1 1 w
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X PERp9 A56 600 -6000 150 L 50 50 1 1 I
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X PERn9 A57 600 -6100 150 L 50 50 1 1 I
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X GND A58 600 -6200 150 L 50 50 1 1 w
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X GND A59 600 -6300 150 L 50 50 1 1 w
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X TDI A6 600 -600 150 L 50 50 1 1 O
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X PERp10 A60 600 -6400 150 L 50 50 1 1 I
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X PERn10 A61 600 -6500 150 L 50 50 1 1 I
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X GND A62 600 -6600 150 L 50 50 1 1 w
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X GND A63 600 -6700 150 L 50 50 1 1 w
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X PERp11 A64 600 -6800 150 L 50 50 1 1 I
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X PERn11 A65 600 -6900 150 L 50 50 1 1 I
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X GND A66 600 -7000 150 L 50 50 1 1 w
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X GND A67 600 -7100 150 L 50 50 1 1 w
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X PERp12 A68 600 -7200 150 L 50 50 1 1 I
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X PERn12 A69 600 -7300 150 L 50 50 1 1 I
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X TDO A7 600 -700 150 L 50 50 1 1 I
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X GND A70 600 -7400 150 L 50 50 1 1 w
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X GND A71 600 -7500 150 L 50 50 1 1 w
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X PERp13 A72 600 -7600 150 L 50 50 1 1 I
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X PERn13 A73 600 -7700 150 L 50 50 1 1 I
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X GND A74 600 -7800 150 L 50 50 1 1 w
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X GND A75 600 -7900 150 L 50 50 1 1 w
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X PERp14 A76 600 -8000 150 L 50 50 1 1 I
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X PERn14 A77 600 -8100 150 L 50 50 1 1 I
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X GND A78 600 -8200 150 L 50 50 1 1 w
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X GND A79 600 -8300 150 L 50 50 1 1 w
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X TMS A8 600 -800 150 L 50 50 1 1 O
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X PERp15 A80 600 -8400 150 L 50 50 1 1 I
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X PERn15 A81 600 -8500 150 L 50 50 1 1 I
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X GND A82 600 -8600 150 L 50 50 1 1 w
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X +3.3V A9 600 -900 150 L 50 50 1 1 w
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X +12V B1 -600 -100 150 R 50 50 1 1 w
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X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
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X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
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X RSVD B12 -600 -1300 150 R 50 50 1 1 N
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X GND B13 -600 -1400 150 R 50 50 1 1 w
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X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
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X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
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X GND B16 -600 -1700 150 R 50 50 1 1 w
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X ~PRSNT2 B17 -600 -1800 150 R 50 50 1 1 P
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X GND B18 -600 -1900 150 R 50 50 1 1 w
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X PETp1 B19 -600 -2100 150 R 50 50 1 1 O
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X +12V B2 -600 -200 150 R 50 50 1 1 w
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X PETn1 B20 -600 -2200 150 R 50 50 1 1 O
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X GND B21 -600 -2300 150 R 50 50 1 1 w
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X GND B22 -600 -2400 150 R 50 50 1 1 w
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X PETp2 B23 -600 -2500 150 R 50 50 1 1 O
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X PETn2 B24 -600 -2600 150 R 50 50 1 1 O
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X GND B25 -600 -2700 150 R 50 50 1 1 w
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X GND B26 -600 -2800 150 R 50 50 1 1 w
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X PETp3 B27 -600 -2900 150 R 50 50 1 1 O
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X PETn3 B28 -600 -3000 150 R 50 50 1 1 O
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X GND B29 -600 -3100 150 R 50 50 1 1 w
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X +12V B3 -600 -300 150 R 50 50 1 1 w
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X RSVD B30 -600 -3200 150 R 50 50 1 1 N
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X ~PRSNT2 B31 -600 -3300 150 R 50 50 1 1 P
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X GND B32 -600 -3400 150 R 50 50 1 1 w
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X PETp4 B33 -600 -3600 150 R 50 50 1 1 O
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X PETn4 B34 -600 -3700 150 R 50 50 1 1 O
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X GND B35 -600 -3800 150 R 50 50 1 1 w
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X GND B36 -600 -3900 150 R 50 50 1 1 w
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X PETp5 B37 -600 -4000 150 R 50 50 1 1 O
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X PETn5 B38 -600 -4100 150 R 50 50 1 1 O
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X GND B39 -600 -4200 150 R 50 50 1 1 w
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X GND B4 -600 -400 150 R 50 50 1 1 w
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X GND B40 -600 -4300 150 R 50 50 1 1 w
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X PETp6 B41 -600 -4400 150 R 50 50 1 1 O
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X PETn6 B42 -600 -4500 150 R 50 50 1 1 O
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X GND B43 -600 -4600 150 R 50 50 1 1 w
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X GND B44 -600 -4700 150 R 50 50 1 1 w
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X PETp7 B45 -600 -4800 150 R 50 50 1 1 O
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X PETn7 B46 -600 -4900 150 R 50 50 1 1 O
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X GND B47 -600 -5000 150 R 50 50 1 1 w
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X ~PRSNT2 B48 -600 -5100 150 R 50 50 1 1 P
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X GND B49 -600 -5200 150 R 50 50 1 1 w
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X SMCLK B5 -600 -500 150 R 50 50 1 1 C
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X PETp8 B50 -600 -5400 150 R 50 50 1 1 O
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X PETn8 B51 -600 -5500 150 R 50 50 1 1 O
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X GND B52 -600 -5600 150 R 50 50 1 1 w
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X GND B53 -600 -5700 150 R 50 50 1 1 w
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X PETp9 B54 -600 -5800 150 R 50 50 1 1 O
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X PETn9 B55 -600 -5900 150 R 50 50 1 1 O
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X GND B56 -600 -6000 150 R 50 50 1 1 w
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X GND B57 -600 -6100 150 R 50 50 1 1 w
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X PETp10 B58 -600 -6200 150 R 50 50 1 1 O
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X PETn10 B59 -600 -6300 150 R 50 50 1 1 O
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X SMDAT B6 -600 -600 150 R 50 50 1 1 C
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X GND B60 -600 -6400 150 R 50 50 1 1 w
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X GND B61 -600 -6500 150 R 50 50 1 1 w
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X PETp11 B62 -600 -6600 150 R 50 50 1 1 O
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X PETn11 B63 -600 -6700 150 R 50 50 1 1 O
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X GND B64 -600 -6800 150 R 50 50 1 1 w
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X GND B65 -600 -6900 150 R 50 50 1 1 w
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X PETp12 B66 -600 -7000 150 R 50 50 1 1 O
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X PETn12 B67 -600 -7100 150 R 50 50 1 1 O
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X GND B68 -600 -7200 150 R 50 50 1 1 w
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X GND B69 -600 -7300 150 R 50 50 1 1 w
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X GND B7 -600 -700 150 R 50 50 1 1 w
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X PETp13 B70 -600 -7400 150 R 50 50 1 1 O
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X PETn13 B71 -600 -7500 150 R 50 50 1 1 O
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X GND B72 -600 -7600 150 R 50 50 1 1 w
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X GND B73 -600 -7700 150 R 50 50 1 1 w
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X PETp14 B74 -600 -7800 150 R 50 50 1 1 O
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X PETn14 B75 -600 -7900 150 R 50 50 1 1 O
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X GND B76 -600 -8000 150 R 50 50 1 1 w
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X GND B77 -600 -8100 150 R 50 50 1 1 w
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X PETp15 B78 -600 -8200 150 R 50 50 1 1 O
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X PETn15 B79 -600 -8300 150 R 50 50 1 1 O
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X +3.3V B8 -600 -800 150 R 50 50 1 1 w
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X GND B80 -600 -8400 150 R 50 50 1 1 w
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X ~PRSNT2 B81 -600 -8500 150 R 50 50 1 1 P
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X RSVD B82 -600 -8600 150 R 50 50 1 1 N
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X ~TRST B9 -600 -900 150 R 50 50 1 1 O
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ENDDRAW
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ENDDEF
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#
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# PCIexpress_x4
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#
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DEF PCIexpress_x4 J 0 40 Y Y 1 F N
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F0 "J" 0 150 50 H V C CNN
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F1 "PCIexpress_x4" 0 50 50 H V C CNN
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F2 "PCIexpress:PCIexpress_x4" 0 -1050 50 H I C CNN
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F3 "" 0 -1050 50 H I C CNN
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DRAW
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T 0 0 -1150 50 0 0 0 notch Normal 0 C C
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T 0 0 -1950 50 0 0 0 x1 Normal 0 C C
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T 0 0 -3450 50 0 0 0 x4 Normal 0 C C
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S 450 0 -450 -3500 1 1 10 f
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P 2 0 1 0 450 -2000 -450 -2000 N
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P 2 0 1 0 450 -1200 -450 -1200 N
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X ~PRSNT1 A1 600 -100 150 L 50 50 1 1 P
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X +3.3V A10 600 -1000 150 L 50 50 1 1 w
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X ~PERST A11 600 -1100 150 L 50 50 1 1 O
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X GND A12 600 -1300 150 L 50 50 1 1 w
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X REFCLK+ A13 600 -1400 150 L 50 50 1 1 O
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X REFCLK- A14 600 -1500 150 L 50 50 1 1 O
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X GND A15 600 -1600 150 L 50 50 1 1 w
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X PERp0 A16 600 -1700 150 L 50 50 1 1 I
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X PERn0 A17 600 -1800 150 L 50 50 1 1 I
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X GND A18 600 -1900 150 L 50 50 1 1 w
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X RSVD A19 600 -2100 150 L 50 50 1 1 N
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X +12V A2 600 -200 150 L 50 50 1 1 w
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X GND A20 600 -2200 150 L 50 50 1 1 w
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X PERp1 A21 600 -2300 150 L 50 50 1 1 I
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X PERn1 A22 600 -2400 150 L 50 50 1 1 I
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X GND A23 600 -2500 150 L 50 50 1 1 w
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X GND A24 600 -2600 150 L 50 50 1 1 w
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X PERp2 A25 600 -2700 150 L 50 50 1 1 I
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X PERn2 A26 600 -2800 150 L 50 50 1 1 I
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X GND A27 600 -2900 150 L 50 50 1 1 w
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X GND A28 600 -3000 150 L 50 50 1 1 w
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X PERp3 A29 600 -3100 150 L 50 50 1 1 I
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||||
X +12V A3 600 -300 150 L 50 50 1 1 w
|
||||
X PERn3 A30 600 -3200 150 L 50 50 1 1 I
|
||||
X GND A31 600 -3300 150 L 50 50 1 1 w
|
||||
X RSVD A32 600 -3400 150 L 50 50 1 1 N
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X GND A4 600 -400 150 L 50 50 1 1 w
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||||
X TCK A5 600 -500 150 L 50 50 1 1 O
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||||
X TDI A6 600 -600 150 L 50 50 1 1 O
|
||||
X TDO A7 600 -700 150 L 50 50 1 1 I
|
||||
X TMS A8 600 -800 150 L 50 50 1 1 O
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||||
X +3.3V A9 600 -900 150 L 50 50 1 1 w
|
||||
X +12V B1 -600 -100 150 R 50 50 1 1 w
|
||||
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
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X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
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X RSVD B12 -600 -1300 150 R 50 50 1 1 N
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||||
X GND B13 -600 -1400 150 R 50 50 1 1 w
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X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
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X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
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X GND B16 -600 -1700 150 R 50 50 1 1 w
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||||
X ~PRSNT2 B17 -600 -1800 150 R 50 50 1 1 P
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X GND B18 -600 -1900 150 R 50 50 1 1 w
|
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X PETp1 B19 -600 -2100 150 R 50 50 1 1 O
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||||
X +12V B2 -600 -200 150 R 50 50 1 1 w
|
||||
X PETn1 B20 -600 -2200 150 R 50 50 1 1 O
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X GND B21 -600 -2300 150 R 50 50 1 1 w
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X GND B22 -600 -2400 150 R 50 50 1 1 w
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X PETp2 B23 -600 -2500 150 R 50 50 1 1 O
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X PETn2 B24 -600 -2600 150 R 50 50 1 1 O
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X GND B25 -600 -2700 150 R 50 50 1 1 w
|
||||
X GND B26 -600 -2800 150 R 50 50 1 1 w
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||||
X PETp3 B27 -600 -2900 150 R 50 50 1 1 O
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||||
X PETn3 B28 -600 -3000 150 R 50 50 1 1 O
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||||
X GND B29 -600 -3100 150 R 50 50 1 1 w
|
||||
X +12V B3 -600 -300 150 R 50 50 1 1 w
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||||
X RSVD B30 -600 -3200 150 R 50 50 1 1 N
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||||
X ~PRSNT2 B31 -600 -3300 150 R 50 50 1 1 P
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||||
X GND B32 -600 -3400 150 R 50 50 1 1 w
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||||
X GND B4 -600 -400 150 R 50 50 1 1 w
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||||
X SMCLK B5 -600 -500 150 R 50 50 1 1 C
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||||
X SMDAT B6 -600 -600 150 R 50 50 1 1 C
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||||
X GND B7 -600 -700 150 R 50 50 1 1 w
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||||
X +3.3V B8 -600 -800 150 R 50 50 1 1 w
|
||||
X ~TRST B9 -600 -900 150 R 50 50 1 1 O
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_x8
|
||||
#
|
||||
DEF PCIexpress_x8 J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 150 50 H V C CNN
|
||||
F1 "PCIexpress_x8" 0 50 50 H V C CNN
|
||||
F2 "PCIexpress:PCIexpress_x8" 0 -950 50 H I C CNN
|
||||
F3 "" 0 -950 50 H I C CNN
|
||||
DRAW
|
||||
T 0 0 -3450 50 0 0 0 x4 Normal 0 C C
|
||||
T 0 0 -5250 50 0 0 0 x8 Normal 0 C C
|
||||
T 0 0 -1150 50 0 1 1 notch Normal 0 C C
|
||||
T 0 0 -1950 50 0 1 1 x1 Normal 0 C C
|
||||
S 450 0 -450 -5300 1 1 10 f
|
||||
P 2 0 0 0 450 -3500 -450 -3500 N
|
||||
P 2 1 1 0 450 -2000 -450 -2000 N
|
||||
P 2 1 1 0 450 -1200 -450 -1200 N
|
||||
X ~PRSNT1 A1 600 -100 150 L 50 50 1 1 P
|
||||
X +3.3V A10 600 -1000 150 L 50 50 1 1 w
|
||||
X ~PERST A11 600 -1100 150 L 50 50 1 1 O
|
||||
X GND A12 600 -1300 150 L 50 50 1 1 w
|
||||
X REFCLK+ A13 600 -1400 150 L 50 50 1 1 O
|
||||
X REFCLK- A14 600 -1500 150 L 50 50 1 1 O
|
||||
X GND A15 600 -1600 150 L 50 50 1 1 w
|
||||
X PERp0 A16 600 -1700 150 L 50 50 1 1 I
|
||||
X PERn0 A17 600 -1800 150 L 50 50 1 1 I
|
||||
X GND A18 600 -1900 150 L 50 50 1 1 w
|
||||
X RSVD A19 600 -2100 150 L 50 50 1 1 N
|
||||
X +12V A2 600 -200 150 L 50 50 1 1 w
|
||||
X GND A20 600 -2200 150 L 50 50 1 1 w
|
||||
X PERp1 A21 600 -2300 150 L 50 50 1 1 I
|
||||
X PERn1 A22 600 -2400 150 L 50 50 1 1 I
|
||||
X GND A23 600 -2500 150 L 50 50 1 1 w
|
||||
X GND A24 600 -2600 150 L 50 50 1 1 w
|
||||
X PERp2 A25 600 -2700 150 L 50 50 1 1 I
|
||||
X PERn2 A26 600 -2800 150 L 50 50 1 1 I
|
||||
X GND A27 600 -2900 150 L 50 50 1 1 w
|
||||
X GND A28 600 -3000 150 L 50 50 1 1 w
|
||||
X PERp3 A29 600 -3100 150 L 50 50 1 1 I
|
||||
X +12V A3 600 -300 150 L 50 50 1 1 w
|
||||
X PERn3 A30 600 -3200 150 L 50 50 1 1 I
|
||||
X GND A31 600 -3300 150 L 50 50 1 1 w
|
||||
X RSVD A32 600 -3400 150 L 50 50 1 1 N
|
||||
X RSVD A33 600 -3600 150 L 50 50 1 1 N
|
||||
X GND A34 600 -3700 150 L 50 50 1 1 w
|
||||
X PERp4 A35 600 -3800 150 L 50 50 1 1 I
|
||||
X PERn4 A36 600 -3900 150 L 50 50 1 1 I
|
||||
X GND A37 600 -4000 150 L 50 50 1 1 w
|
||||
X GND A38 600 -4100 150 L 50 50 1 1 w
|
||||
X PERp5 A39 600 -4200 150 L 50 50 1 1 I
|
||||
X GND A4 600 -400 150 L 50 50 1 1 w
|
||||
X PERn5 A40 600 -4300 150 L 50 50 1 1 I
|
||||
X GND A41 600 -4400 150 L 50 50 1 1 w
|
||||
X GND A42 600 -4500 150 L 50 50 1 1 w
|
||||
X PERp6 A43 600 -4600 150 L 50 50 1 1 I
|
||||
X PERn6 A44 600 -4700 150 L 50 50 1 1 I
|
||||
X GND A45 600 -4800 150 L 50 50 1 1 w
|
||||
X GND A46 600 -4900 150 L 50 50 1 1 w
|
||||
X PERp7 A47 600 -5000 150 L 50 50 1 1 I
|
||||
X PERn7 A48 600 -5100 150 L 50 50 1 1 I
|
||||
X GND A49 600 -5200 150 L 50 50 1 1 w
|
||||
X TCK A5 600 -500 150 L 50 50 1 1 O
|
||||
X TDI A6 600 -600 150 L 50 50 1 1 O
|
||||
X TDO A7 600 -700 150 L 50 50 1 1 I
|
||||
X TMS A8 600 -800 150 L 50 50 1 1 O
|
||||
X +3.3V A9 600 -900 150 L 50 50 1 1 w
|
||||
X +12V B1 -600 -100 150 R 50 50 1 1 w
|
||||
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
|
||||
X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
|
||||
X RSVD B12 -600 -1300 150 R 50 50 1 1 N
|
||||
X GND B13 -600 -1400 150 R 50 50 1 1 w
|
||||
X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
|
||||
X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
|
||||
X GND B16 -600 -1700 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B17 -600 -1800 150 R 50 50 1 1 P
|
||||
X GND B18 -600 -1900 150 R 50 50 1 1 w
|
||||
X PETp1 B19 -600 -2100 150 R 50 50 1 1 O
|
||||
X +12V B2 -600 -200 150 R 50 50 1 1 w
|
||||
X PETn1 B20 -600 -2200 150 R 50 50 1 1 O
|
||||
X GND B21 -600 -2300 150 R 50 50 1 1 w
|
||||
X GND B22 -600 -2400 150 R 50 50 1 1 w
|
||||
X PETp2 B23 -600 -2500 150 R 50 50 1 1 O
|
||||
X PETn2 B24 -600 -2600 150 R 50 50 1 1 O
|
||||
X GND B25 -600 -2700 150 R 50 50 1 1 w
|
||||
X GND B26 -600 -2800 150 R 50 50 1 1 w
|
||||
X PETp3 B27 -600 -2900 150 R 50 50 1 1 O
|
||||
X PETn3 B28 -600 -3000 150 R 50 50 1 1 O
|
||||
X GND B29 -600 -3100 150 R 50 50 1 1 w
|
||||
X +12V B3 -600 -300 150 R 50 50 1 1 w
|
||||
X RSVD B30 -600 -3200 150 R 50 50 1 1 N
|
||||
X ~PRSNT2 B31 -600 -3300 150 R 50 50 1 1 P
|
||||
X GND B32 -600 -3400 150 R 50 50 1 1 w
|
||||
X PETp4 B33 -600 -3600 150 R 50 50 1 1 O
|
||||
X PETn4 B34 -600 -3700 150 R 50 50 1 1 O
|
||||
X GND B35 -600 -3800 150 R 50 50 1 1 w
|
||||
X GND B36 -600 -3900 150 R 50 50 1 1 w
|
||||
X PETp5 B37 -600 -4000 150 R 50 50 1 1 O
|
||||
X PETn5 B38 -600 -4100 150 R 50 50 1 1 O
|
||||
X GND B39 -600 -4200 150 R 50 50 1 1 w
|
||||
X GND B4 -600 -400 150 R 50 50 1 1 w
|
||||
X GND B40 -600 -4300 150 R 50 50 1 1 w
|
||||
X PETp6 B41 -600 -4400 150 R 50 50 1 1 O
|
||||
X PETn6 B42 -600 -4500 150 R 50 50 1 1 O
|
||||
X GND B43 -600 -4600 150 R 50 50 1 1 w
|
||||
X GND B44 -600 -4700 150 R 50 50 1 1 w
|
||||
X PETp7 B45 -600 -4800 150 R 50 50 1 1 O
|
||||
X PETn7 B46 -600 -4900 150 R 50 50 1 1 O
|
||||
X GND B47 -600 -5000 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B48 -600 -5100 150 R 50 50 1 1 P
|
||||
X GND B49 -600 -5200 150 R 50 50 1 1 w
|
||||
X SMCLK B5 -600 -500 150 R 50 50 1 1 C
|
||||
X SMDAT B6 -600 -600 150 R 50 50 1 1 C
|
||||
X GND B7 -600 -700 150 R 50 50 1 1 w
|
||||
X +3.3V B8 -600 -800 150 R 50 50 1 1 w
|
||||
X ~TRST B9 -600 -900 150 R 50 50 1 1 O
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
4018
PCIexpress_x16_full/PCIexpress_connector.kicad_sch
Normal file
4018
PCIexpress_x16_full/PCIexpress_connector.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,297 +0,0 @@
|
||||
EESchema-LIBRARY Version 2.4
|
||||
#encoding utf-8
|
||||
#
|
||||
# Device_C
|
||||
#
|
||||
DEF Device_C C 0 10 N Y 1 F N
|
||||
F0 "C" 25 100 50 H V L CNN
|
||||
F1 "Device_C" 25 -100 50 H V L CNN
|
||||
F2 "" 38 -150 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
C_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 20 -80 -30 80 -30 N
|
||||
P 2 0 1 20 -80 30 80 30 N
|
||||
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_R
|
||||
#
|
||||
DEF Device_R R 0 0 N Y 1 F N
|
||||
F0 "R" 80 0 50 V V C CNN
|
||||
F1 "Device_R" 0 0 50 V V C CNN
|
||||
F2 "" -70 0 50 V I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
R_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_PCIexpress_bracket
|
||||
#
|
||||
DEF PCIexpress_PCIexpress_bracket J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 0 50 H V C CNN
|
||||
F1 "PCIexpress_PCIexpress_bracket" 0 0 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
PCIexpress_bracket_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_PCIexpress_x16
|
||||
#
|
||||
DEF PCIexpress_PCIexpress_x16 J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 150 50 H V C CNN
|
||||
F1 "PCIexpress_PCIexpress_x16" 0 50 50 H V C CNN
|
||||
F2 "PCIexpress:PCIexpress_x16" 0 -950 50 H I C CNN
|
||||
F3 "" 0 -950 50 H I C CNN
|
||||
DRAW
|
||||
T 0 0 -8650 50 0 0 0 x16 Normal 0 C C
|
||||
T 0 0 -3450 50 0 0 0 x4 Normal 0 C C
|
||||
T 0 0 -5250 50 0 0 0 x8 Normal 0 C C
|
||||
T 0 0 -1150 50 0 1 1 notch Normal 0 C C
|
||||
T 0 0 -1950 50 0 1 1 x1 Normal 0 C C
|
||||
S 450 0 -450 -8700 1 1 10 f
|
||||
P 2 0 0 0 450 -5300 -450 -5300 N
|
||||
P 2 0 0 0 450 -3500 -450 -3500 N
|
||||
P 2 1 1 0 450 -2000 -450 -2000 N
|
||||
P 2 1 1 0 450 -1200 -450 -1200 N
|
||||
X ~PRSNT1 A1 600 -100 150 L 50 50 1 1 P
|
||||
X +3.3V A10 600 -1000 150 L 50 50 1 1 w
|
||||
X ~PERST A11 600 -1100 150 L 50 50 1 1 O
|
||||
X GND A12 600 -1300 150 L 50 50 1 1 w
|
||||
X REFCLK+ A13 600 -1400 150 L 50 50 1 1 O
|
||||
X REFCLK- A14 600 -1500 150 L 50 50 1 1 O
|
||||
X GND A15 600 -1600 150 L 50 50 1 1 w
|
||||
X PERp0 A16 600 -1700 150 L 50 50 1 1 I
|
||||
X PERn0 A17 600 -1800 150 L 50 50 1 1 I
|
||||
X GND A18 600 -1900 150 L 50 50 1 1 w
|
||||
X RSVD A19 600 -2100 150 L 50 50 1 1 N
|
||||
X +12V A2 600 -200 150 L 50 50 1 1 w
|
||||
X GND A20 600 -2200 150 L 50 50 1 1 w
|
||||
X PERp1 A21 600 -2300 150 L 50 50 1 1 I
|
||||
X PERn1 A22 600 -2400 150 L 50 50 1 1 I
|
||||
X GND A23 600 -2500 150 L 50 50 1 1 w
|
||||
X GND A24 600 -2600 150 L 50 50 1 1 w
|
||||
X PERp2 A25 600 -2700 150 L 50 50 1 1 I
|
||||
X PERn2 A26 600 -2800 150 L 50 50 1 1 I
|
||||
X GND A27 600 -2900 150 L 50 50 1 1 w
|
||||
X GND A28 600 -3000 150 L 50 50 1 1 w
|
||||
X PERp3 A29 600 -3100 150 L 50 50 1 1 I
|
||||
X +12V A3 600 -300 150 L 50 50 1 1 w
|
||||
X PERn3 A30 600 -3200 150 L 50 50 1 1 I
|
||||
X GND A31 600 -3300 150 L 50 50 1 1 w
|
||||
X RSVD A32 600 -3400 150 L 50 50 1 1 N
|
||||
X RSVD A33 600 -3600 150 L 50 50 1 1 N
|
||||
X GND A34 600 -3700 150 L 50 50 1 1 w
|
||||
X PERp4 A35 600 -3800 150 L 50 50 1 1 I
|
||||
X PERn4 A36 600 -3900 150 L 50 50 1 1 I
|
||||
X GND A37 600 -4000 150 L 50 50 1 1 w
|
||||
X GND A38 600 -4100 150 L 50 50 1 1 w
|
||||
X PERp5 A39 600 -4200 150 L 50 50 1 1 I
|
||||
X GND A4 600 -400 150 L 50 50 1 1 w
|
||||
X PERn5 A40 600 -4300 150 L 50 50 1 1 I
|
||||
X GND A41 600 -4400 150 L 50 50 1 1 w
|
||||
X GND A42 600 -4500 150 L 50 50 1 1 w
|
||||
X PERp6 A43 600 -4600 150 L 50 50 1 1 I
|
||||
X PERn6 A44 600 -4700 150 L 50 50 1 1 I
|
||||
X GND A45 600 -4800 150 L 50 50 1 1 w
|
||||
X GND A46 600 -4900 150 L 50 50 1 1 w
|
||||
X PERp7 A47 600 -5000 150 L 50 50 1 1 I
|
||||
X PERn7 A48 600 -5100 150 L 50 50 1 1 I
|
||||
X GND A49 600 -5200 150 L 50 50 1 1 w
|
||||
X TCK A5 600 -500 150 L 50 50 1 1 O
|
||||
X RSVD A50 600 -5400 150 L 50 50 1 1 N
|
||||
X GND A51 600 -5500 150 L 50 50 1 1 w
|
||||
X PERp8 A52 600 -5600 150 L 50 50 1 1 I
|
||||
X PERn8 A53 600 -5700 150 L 50 50 1 1 I
|
||||
X GND A54 600 -5800 150 L 50 50 1 1 w
|
||||
X GND A55 600 -5900 150 L 50 50 1 1 w
|
||||
X PERp9 A56 600 -6000 150 L 50 50 1 1 I
|
||||
X PERn9 A57 600 -6100 150 L 50 50 1 1 I
|
||||
X GND A58 600 -6200 150 L 50 50 1 1 w
|
||||
X GND A59 600 -6300 150 L 50 50 1 1 w
|
||||
X TDI A6 600 -600 150 L 50 50 1 1 O
|
||||
X PERp10 A60 600 -6400 150 L 50 50 1 1 I
|
||||
X PERn10 A61 600 -6500 150 L 50 50 1 1 I
|
||||
X GND A62 600 -6600 150 L 50 50 1 1 w
|
||||
X GND A63 600 -6700 150 L 50 50 1 1 w
|
||||
X PERp11 A64 600 -6800 150 L 50 50 1 1 I
|
||||
X PERn11 A65 600 -6900 150 L 50 50 1 1 I
|
||||
X GND A66 600 -7000 150 L 50 50 1 1 w
|
||||
X GND A67 600 -7100 150 L 50 50 1 1 w
|
||||
X PERp12 A68 600 -7200 150 L 50 50 1 1 I
|
||||
X PERn12 A69 600 -7300 150 L 50 50 1 1 I
|
||||
X TDO A7 600 -700 150 L 50 50 1 1 I
|
||||
X GND A70 600 -7400 150 L 50 50 1 1 w
|
||||
X GND A71 600 -7500 150 L 50 50 1 1 w
|
||||
X PERp13 A72 600 -7600 150 L 50 50 1 1 I
|
||||
X PERn13 A73 600 -7700 150 L 50 50 1 1 I
|
||||
X GND A74 600 -7800 150 L 50 50 1 1 w
|
||||
X GND A75 600 -7900 150 L 50 50 1 1 w
|
||||
X PERp14 A76 600 -8000 150 L 50 50 1 1 I
|
||||
X PERn14 A77 600 -8100 150 L 50 50 1 1 I
|
||||
X GND A78 600 -8200 150 L 50 50 1 1 w
|
||||
X GND A79 600 -8300 150 L 50 50 1 1 w
|
||||
X TMS A8 600 -800 150 L 50 50 1 1 O
|
||||
X PERp15 A80 600 -8400 150 L 50 50 1 1 I
|
||||
X PERn15 A81 600 -8500 150 L 50 50 1 1 I
|
||||
X GND A82 600 -8600 150 L 50 50 1 1 w
|
||||
X +3.3V A9 600 -900 150 L 50 50 1 1 w
|
||||
X +12V B1 -600 -100 150 R 50 50 1 1 w
|
||||
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
|
||||
X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
|
||||
X RSVD B12 -600 -1300 150 R 50 50 1 1 N
|
||||
X GND B13 -600 -1400 150 R 50 50 1 1 w
|
||||
X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
|
||||
X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
|
||||
X GND B16 -600 -1700 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B17 -600 -1800 150 R 50 50 1 1 P
|
||||
X GND B18 -600 -1900 150 R 50 50 1 1 w
|
||||
X PETp1 B19 -600 -2100 150 R 50 50 1 1 O
|
||||
X +12V B2 -600 -200 150 R 50 50 1 1 w
|
||||
X PETn1 B20 -600 -2200 150 R 50 50 1 1 O
|
||||
X GND B21 -600 -2300 150 R 50 50 1 1 w
|
||||
X GND B22 -600 -2400 150 R 50 50 1 1 w
|
||||
X PETp2 B23 -600 -2500 150 R 50 50 1 1 O
|
||||
X PETn2 B24 -600 -2600 150 R 50 50 1 1 O
|
||||
X GND B25 -600 -2700 150 R 50 50 1 1 w
|
||||
X GND B26 -600 -2800 150 R 50 50 1 1 w
|
||||
X PETp3 B27 -600 -2900 150 R 50 50 1 1 O
|
||||
X PETn3 B28 -600 -3000 150 R 50 50 1 1 O
|
||||
X GND B29 -600 -3100 150 R 50 50 1 1 w
|
||||
X +12V B3 -600 -300 150 R 50 50 1 1 w
|
||||
X RSVD B30 -600 -3200 150 R 50 50 1 1 N
|
||||
X ~PRSNT2 B31 -600 -3300 150 R 50 50 1 1 P
|
||||
X GND B32 -600 -3400 150 R 50 50 1 1 w
|
||||
X PETp4 B33 -600 -3600 150 R 50 50 1 1 O
|
||||
X PETn4 B34 -600 -3700 150 R 50 50 1 1 O
|
||||
X GND B35 -600 -3800 150 R 50 50 1 1 w
|
||||
X GND B36 -600 -3900 150 R 50 50 1 1 w
|
||||
X PETp5 B37 -600 -4000 150 R 50 50 1 1 O
|
||||
X PETn5 B38 -600 -4100 150 R 50 50 1 1 O
|
||||
X GND B39 -600 -4200 150 R 50 50 1 1 w
|
||||
X GND B4 -600 -400 150 R 50 50 1 1 w
|
||||
X GND B40 -600 -4300 150 R 50 50 1 1 w
|
||||
X PETp6 B41 -600 -4400 150 R 50 50 1 1 O
|
||||
X PETn6 B42 -600 -4500 150 R 50 50 1 1 O
|
||||
X GND B43 -600 -4600 150 R 50 50 1 1 w
|
||||
X GND B44 -600 -4700 150 R 50 50 1 1 w
|
||||
X PETp7 B45 -600 -4800 150 R 50 50 1 1 O
|
||||
X PETn7 B46 -600 -4900 150 R 50 50 1 1 O
|
||||
X GND B47 -600 -5000 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B48 -600 -5100 150 R 50 50 1 1 P
|
||||
X GND B49 -600 -5200 150 R 50 50 1 1 w
|
||||
X SMCLK B5 -600 -500 150 R 50 50 1 1 C
|
||||
X PETp8 B50 -600 -5400 150 R 50 50 1 1 O
|
||||
X PETn8 B51 -600 -5500 150 R 50 50 1 1 O
|
||||
X GND B52 -600 -5600 150 R 50 50 1 1 w
|
||||
X GND B53 -600 -5700 150 R 50 50 1 1 w
|
||||
X PETp9 B54 -600 -5800 150 R 50 50 1 1 O
|
||||
X PETn9 B55 -600 -5900 150 R 50 50 1 1 O
|
||||
X GND B56 -600 -6000 150 R 50 50 1 1 w
|
||||
X GND B57 -600 -6100 150 R 50 50 1 1 w
|
||||
X PETp10 B58 -600 -6200 150 R 50 50 1 1 O
|
||||
X PETn10 B59 -600 -6300 150 R 50 50 1 1 O
|
||||
X SMDAT B6 -600 -600 150 R 50 50 1 1 C
|
||||
X GND B60 -600 -6400 150 R 50 50 1 1 w
|
||||
X GND B61 -600 -6500 150 R 50 50 1 1 w
|
||||
X PETp11 B62 -600 -6600 150 R 50 50 1 1 O
|
||||
X PETn11 B63 -600 -6700 150 R 50 50 1 1 O
|
||||
X GND B64 -600 -6800 150 R 50 50 1 1 w
|
||||
X GND B65 -600 -6900 150 R 50 50 1 1 w
|
||||
X PETp12 B66 -600 -7000 150 R 50 50 1 1 O
|
||||
X PETn12 B67 -600 -7100 150 R 50 50 1 1 O
|
||||
X GND B68 -600 -7200 150 R 50 50 1 1 w
|
||||
X GND B69 -600 -7300 150 R 50 50 1 1 w
|
||||
X GND B7 -600 -700 150 R 50 50 1 1 w
|
||||
X PETp13 B70 -600 -7400 150 R 50 50 1 1 O
|
||||
X PETn13 B71 -600 -7500 150 R 50 50 1 1 O
|
||||
X GND B72 -600 -7600 150 R 50 50 1 1 w
|
||||
X GND B73 -600 -7700 150 R 50 50 1 1 w
|
||||
X PETp14 B74 -600 -7800 150 R 50 50 1 1 O
|
||||
X PETn14 B75 -600 -7900 150 R 50 50 1 1 O
|
||||
X GND B76 -600 -8000 150 R 50 50 1 1 w
|
||||
X GND B77 -600 -8100 150 R 50 50 1 1 w
|
||||
X PETp15 B78 -600 -8200 150 R 50 50 1 1 O
|
||||
X PETn15 B79 -600 -8300 150 R 50 50 1 1 O
|
||||
X +3.3V B8 -600 -800 150 R 50 50 1 1 w
|
||||
X GND B80 -600 -8400 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B81 -600 -8500 150 R 50 50 1 1 P
|
||||
X RSVD B82 -600 -8600 150 R 50 50 1 1 N
|
||||
X ~TRST B9 -600 -900 150 R 50 50 1 1 O
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+12V
|
||||
#
|
||||
DEF power_+12V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+12V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +12V 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3V
|
||||
#
|
||||
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS +3.3V
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3V3 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3VA
|
||||
#
|
||||
DEF power_+3.3VA #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3VA" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3.3VA 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GND
|
||||
#
|
||||
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GND" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
File diff suppressed because it is too large
Load Diff
746
PCIexpress_x16_full/PCIexpress_x16_full.kicad_pro
Normal file
746
PCIexpress_x16_full/PCIexpress_x16_full.kicad_pro
Normal file
@ -0,0 +1,746 @@
|
||||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.049999999999999996,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 0.762,
|
||||
"height": 1.524,
|
||||
"width": 1.524
|
||||
},
|
||||
"silk_line_width": 0.12,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.508
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"filename": "board_design_settings.json",
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint_type_mismatch": "error",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rule_severitieslegacy_courtyards_overlap": true,
|
||||
"rule_severitieslegacy_no_courtyard_defined": false,
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_copper_edge_clearance": 0.075,
|
||||
"min_hole_clearance": 0.25,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_through_hole_diameter": 0.19999999999999998,
|
||||
"min_track_width": 0.08889999999999999,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.44999999999999996,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [
|
||||
0.0,
|
||||
0.0889,
|
||||
0.127,
|
||||
0.2
|
||||
],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
},
|
||||
{
|
||||
"diameter": 0.45,
|
||||
"drill": 0.2
|
||||
},
|
||||
{
|
||||
"diameter": 0.5,
|
||||
"drill": 0.25
|
||||
},
|
||||
{
|
||||
"diameter": 0.55,
|
||||
"drill": 0.3
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"pin_map": [
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_label_syntax": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "PCIexpress_x16_full.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.0889,
|
||||
"diff_pair_gap": 0.2,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.0889,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.2,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.2,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Diff-100-PCIe",
|
||||
"nets": [
|
||||
"/PCIexpress_connector/_PER0_N",
|
||||
"/PCIexpress_connector/_PER0_P",
|
||||
"/PCIexpress_connector/_PER10_N",
|
||||
"/PCIexpress_connector/_PER10_P",
|
||||
"/PCIexpress_connector/_PER11_N",
|
||||
"/PCIexpress_connector/_PER11_P",
|
||||
"/PCIexpress_connector/_PER12_N",
|
||||
"/PCIexpress_connector/_PER12_P",
|
||||
"/PCIexpress_connector/_PER13_N",
|
||||
"/PCIexpress_connector/_PER13_P",
|
||||
"/PCIexpress_connector/_PER14_N",
|
||||
"/PCIexpress_connector/_PER14_P",
|
||||
"/PCIexpress_connector/_PER15_N",
|
||||
"/PCIexpress_connector/_PER15_P",
|
||||
"/PCIexpress_connector/_PER1_N",
|
||||
"/PCIexpress_connector/_PER1_P",
|
||||
"/PCIexpress_connector/_PER2_N",
|
||||
"/PCIexpress_connector/_PER2_P",
|
||||
"/PCIexpress_connector/_PER3_N",
|
||||
"/PCIexpress_connector/_PER3_P",
|
||||
"/PCIexpress_connector/_PER4_N",
|
||||
"/PCIexpress_connector/_PER4_P",
|
||||
"/PCIexpress_connector/_PER5_N",
|
||||
"/PCIexpress_connector/_PER5_P",
|
||||
"/PCIexpress_connector/_PER6_N",
|
||||
"/PCIexpress_connector/_PER6_P",
|
||||
"/PCIexpress_connector/_PER7_N",
|
||||
"/PCIexpress_connector/_PER7_P",
|
||||
"/PCIexpress_connector/_PER8_N",
|
||||
"/PCIexpress_connector/_PER8_P",
|
||||
"/PCIexpress_connector/_PER9_N",
|
||||
"/PCIexpress_connector/_PER9_P",
|
||||
"/PER0_N",
|
||||
"/PER0_P",
|
||||
"/PER10_N",
|
||||
"/PER10_P",
|
||||
"/PER11_N",
|
||||
"/PER11_P",
|
||||
"/PER12_N",
|
||||
"/PER12_P",
|
||||
"/PER13_N",
|
||||
"/PER13_P",
|
||||
"/PER14_N",
|
||||
"/PER14_P",
|
||||
"/PER15_N",
|
||||
"/PER15_P",
|
||||
"/PER1_N",
|
||||
"/PER1_P",
|
||||
"/PER2_N",
|
||||
"/PER2_P",
|
||||
"/PER3_N",
|
||||
"/PER3_P",
|
||||
"/PER4_N",
|
||||
"/PER4_P",
|
||||
"/PER5_N",
|
||||
"/PER5_P",
|
||||
"/PER6_N",
|
||||
"/PER6_P",
|
||||
"/PER7_N",
|
||||
"/PER7_P",
|
||||
"/PER8_N",
|
||||
"/PER8_P",
|
||||
"/PER9_N",
|
||||
"/PER9_P",
|
||||
"/PET0_N",
|
||||
"/PET0_P",
|
||||
"/PET10_N",
|
||||
"/PET10_P",
|
||||
"/PET11_N",
|
||||
"/PET11_P",
|
||||
"/PET12_N",
|
||||
"/PET12_P",
|
||||
"/PET13_N",
|
||||
"/PET13_P",
|
||||
"/PET14_N",
|
||||
"/PET14_P",
|
||||
"/PET15_N",
|
||||
"/PET15_P",
|
||||
"/PET1_N",
|
||||
"/PET1_P",
|
||||
"/PET2_N",
|
||||
"/PET2_P",
|
||||
"/PET3_N",
|
||||
"/PET3_P",
|
||||
"/PET4_N",
|
||||
"/PET4_P",
|
||||
"/PET5_N",
|
||||
"/PET5_P",
|
||||
"/PET6_N",
|
||||
"/PET6_P",
|
||||
"/PET7_N",
|
||||
"/PET7_P",
|
||||
"/PET8_N",
|
||||
"/PET8_P",
|
||||
"/PET9_N",
|
||||
"/PET9_P",
|
||||
"/REFCLK+",
|
||||
"/REFCLK-"
|
||||
],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.0889,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.2,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.1,
|
||||
"diff_pair_gap": 0.1016,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.0889,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "JLC2313-100d-3.5",
|
||||
"nets": [],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.0889,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.2,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.1,
|
||||
"diff_pair_gap": 0.127,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.1016,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "JLC2313-100d-4",
|
||||
"nets": [],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.0889,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.2,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.2032,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2032,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "JLC7628-100d-8",
|
||||
"nets": [],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.0889,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.2,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"drawing": {
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.25,
|
||||
"pin_symbol_size": 0.0,
|
||||
"text_offset_ratio": 0.08
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "",
|
||||
"ngspice": {
|
||||
"fix_include_paths": true,
|
||||
"fix_passive_vals": false,
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"model_mode": 0,
|
||||
"workbook_filename": ""
|
||||
},
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"5eb7d01e-d98e-46fe-bb93-6935aa8e716f",
|
||||
""
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d508b15",
|
||||
"PCIexpress_connector"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d516dfb",
|
||||
"term"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d5df906",
|
||||
"sheet5D5DF900"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d761049",
|
||||
"sheet5D761043"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d76cfc3",
|
||||
"sheet5D76CFBD"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d87b438",
|
||||
"sheet5D87B424"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d87b440",
|
||||
"sheet5D87B425"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d87b446",
|
||||
"sheet5D87B426"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d88a9fd",
|
||||
"sheet5D88A9F3"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9667f2",
|
||||
"sheet5D9667E9"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9667fa",
|
||||
"sheet5D9667EA"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9e5907",
|
||||
"sheet5D9E58F4"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9e590d",
|
||||
"sheet5D9E58F5"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9e5913",
|
||||
"sheet5D9E58F6"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9e5919",
|
||||
"sheet5D9E58F7"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9e5923",
|
||||
"sheet5D9E58F8"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9e5929",
|
||||
"sheet5D9E58F9"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dab5272",
|
||||
"decap"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005db8e95f",
|
||||
"sheet5DB8E955"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dba1257",
|
||||
"sheet5DBA124D"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbb44a0",
|
||||
"sheet5DBB4496"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbc901f",
|
||||
"sheet5DBC9013"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbc9029",
|
||||
"sheet5DBC9014"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbc9033",
|
||||
"sheet5DBC9015"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbde98a",
|
||||
"sheet5DBDE980"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbf611b",
|
||||
"sheet5DBF610E"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbf6125",
|
||||
"sheet5DBF610F"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbf612f",
|
||||
"sheet5DBF6110"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbf6139",
|
||||
"sheet5DBF6111"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dc10432",
|
||||
"sheet5DC10425"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dc1043c",
|
||||
"sheet5DC10426"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dc10446",
|
||||
"sheet5DC10427"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dc10450",
|
||||
"sheet5DC10428"
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
||||
1347
PCIexpress_x16_full/PCIexpress_x16_full.kicad_sch
Normal file
1347
PCIexpress_x16_full/PCIexpress_x16_full.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
@ -1,294 +0,0 @@
|
||||
update=ven 26 lug 2019 22:25:34 CEST
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=4
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.08889999999999999
|
||||
MinViaDiameter=0.45
|
||||
MinViaDrill=0.2
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.0889
|
||||
TrackWidth2=0.0889
|
||||
TrackWidth3=0.127
|
||||
TrackWidth4=0.2
|
||||
ViaDiameter1=0.45
|
||||
ViaDrill1=0.2
|
||||
ViaDiameter2=0.45
|
||||
ViaDrill2=0.2
|
||||
ViaDiameter3=0.5
|
||||
ViaDrill3=0.25
|
||||
ViaDiameter4=0.55
|
||||
ViaDrill4=0.3
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.2
|
||||
dPairViaGap1=0.25
|
||||
dPairWidth2=0.2
|
||||
dPairGap2=0.2
|
||||
dPairViaGap2=0.2
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.051
|
||||
SolderMaskMinWidth=0.25
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.0889
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.2
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/1]
|
||||
Name=Diff-100-PCIe
|
||||
Clearance=0.2
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.2
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/2]
|
||||
Name=JLC2313-100d-3.5
|
||||
Clearance=0.1
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.0889
|
||||
dPairGap=0.1016
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/3]
|
||||
Name=JLC2313-100d-4
|
||||
Clearance=0.1
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.1016
|
||||
dPairGap=0.127
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/4]
|
||||
Name=JLC7628-100d-8
|
||||
Clearance=0.2
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2032
|
||||
dPairGap=0.2032
|
||||
dPairViaGap=0.25
|
||||
@ -1,423 +0,0 @@
|
||||
EESchema Schematic File Version 4
|
||||
LIBS:PCIexpress_x16_full-cache
|
||||
EELAYER 29 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 34
|
||||
Title "PCIexpress_x16_full"
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp "Author: Luca Anastasio"
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Sheet
|
||||
S 1350 1050 900 5200
|
||||
U 5D508B15
|
||||
F0 "PCIexpress_connector" 50
|
||||
F1 "PCIexpress_connector.sch" 50
|
||||
F2 "PET0_P" O R 2250 2300 50
|
||||
F3 "PET0_N" O R 2250 2400 50
|
||||
F4 "REFCLK+" O R 2250 2000 50
|
||||
F5 "REFCLK-" O R 2250 2100 50
|
||||
F6 "~PRSNT2x16" U L 1350 1550 50
|
||||
F7 "TDO" I L 1350 1700 50
|
||||
F8 "TMS" O R 2250 1400 50
|
||||
F9 "TDI" O R 2250 1600 50
|
||||
F10 "TCK" O R 2250 1500 50
|
||||
F11 "PET1_P" O R 2250 2550 50
|
||||
F12 "PET1_N" O R 2250 2650 50
|
||||
F13 "PET2_P" O R 2250 2800 50
|
||||
F14 "PET2_N" O R 2250 2900 50
|
||||
F15 "PET3_P" O R 2250 3050 50
|
||||
F16 "PET3_N" O R 2250 3150 50
|
||||
F17 "PER1_P" I L 1350 2550 50
|
||||
F18 "PER1_N" I L 1350 2650 50
|
||||
F19 "PER2_P" I L 1350 2800 50
|
||||
F20 "PER2_N" I L 1350 2900 50
|
||||
F21 "PER3_P" I L 1350 3050 50
|
||||
F22 "PER3_N" I L 1350 3150 50
|
||||
F23 "PER4_P" I L 1350 3300 50
|
||||
F24 "PER4_N" I L 1350 3400 50
|
||||
F25 "PER5_P" I L 1350 3550 50
|
||||
F26 "PER5_N" I L 1350 3650 50
|
||||
F27 "PER6_P" I L 1350 3800 50
|
||||
F28 "PER6_N" I L 1350 3900 50
|
||||
F29 "PER7_P" I L 1350 4050 50
|
||||
F30 "PER7_N" I L 1350 4150 50
|
||||
F31 "~WAKE" I L 1350 1850 50
|
||||
F32 "~TRST" O R 2250 1700 50
|
||||
F33 "SMCLK" B L 1350 2000 50
|
||||
F34 "SMDAT" B L 1350 2100 50
|
||||
F35 "~PERST" O R 2250 1850 50
|
||||
F36 "~PRSNT1" U L 1350 1150 50
|
||||
F37 "~PRSNT2x8" U L 1350 1450 50
|
||||
F38 "~PRSNT2x4" U L 1350 1350 50
|
||||
F39 "~PRSNT2x1" U L 1350 1250 50
|
||||
F40 "PET4_P" O R 2250 3300 50
|
||||
F41 "PET4_N" O R 2250 3400 50
|
||||
F42 "PET5_P" O R 2250 3550 50
|
||||
F43 "PET5_N" O R 2250 3650 50
|
||||
F44 "PET6_P" O R 2250 3800 50
|
||||
F45 "PET6_N" O R 2250 3900 50
|
||||
F46 "PET7_P" O R 2250 4050 50
|
||||
F47 "PET7_N" O R 2250 4150 50
|
||||
F48 "PER0_N" I L 1350 2400 50
|
||||
F49 "PER0_P" I L 1350 2300 50
|
||||
F50 "PER8_P" I L 1350 4300 50
|
||||
F51 "PER8_N" I L 1350 4400 50
|
||||
F52 "PER9_P" I L 1350 4550 50
|
||||
F53 "PER9_N" I L 1350 4650 50
|
||||
F54 "PET8_P" O R 2250 4300 50
|
||||
F55 "PET8_N" O R 2250 4400 50
|
||||
F56 "PET9_P" O R 2250 4550 50
|
||||
F57 "PET9_N" O R 2250 4650 50
|
||||
F58 "PER11_P" I L 1350 5050 50
|
||||
F59 "PER11_N" I L 1350 5150 50
|
||||
F60 "PER12_P" I L 1350 5300 50
|
||||
F61 "PER12_N" I L 1350 5400 50
|
||||
F62 "PER13_P" I L 1350 5550 50
|
||||
F63 "PER13_N" I L 1350 5650 50
|
||||
F64 "PER14_P" I L 1350 5800 50
|
||||
F65 "PER14_N" I L 1350 5900 50
|
||||
F66 "PER15_P" I L 1350 6050 50
|
||||
F67 "PER15_N" I L 1350 6150 50
|
||||
F68 "PER10_N" I L 1350 4900 50
|
||||
F69 "PER10_P" I L 1350 4800 50
|
||||
F70 "PET10_P" O R 2250 4800 50
|
||||
F71 "PET10_N" O R 2250 4900 50
|
||||
F72 "PET11_P" O R 2250 5050 50
|
||||
F73 "PET11_N" O R 2250 5150 50
|
||||
F74 "PET12_P" O R 2250 5300 50
|
||||
F75 "PET12_N" O R 2250 5400 50
|
||||
F76 "PET13_P" O R 2250 5550 50
|
||||
F77 "PET13_N" O R 2250 5650 50
|
||||
F78 "PET14_P" O R 2250 5800 50
|
||||
F79 "PET14_N" O R 2250 5900 50
|
||||
F80 "PET15_P" O R 2250 6050 50
|
||||
F81 "PET15_N" O R 2250 6150 50
|
||||
$EndSheet
|
||||
Text Label 2350 2400 0 50 ~ 0
|
||||
PET0_N
|
||||
Text Label 2350 2300 0 50 ~ 0
|
||||
PET0_P
|
||||
Text Label 2350 2650 0 50 ~ 0
|
||||
PET1_N
|
||||
Text Label 2350 2550 0 50 ~ 0
|
||||
PET1_P
|
||||
Text Label 2350 2900 0 50 ~ 0
|
||||
PET2_N
|
||||
Text Label 2350 2800 0 50 ~ 0
|
||||
PET2_P
|
||||
Text Label 2350 3150 0 50 ~ 0
|
||||
PET3_N
|
||||
Text Label 2350 3050 0 50 ~ 0
|
||||
PET3_P
|
||||
Text Label 2350 3400 0 50 ~ 0
|
||||
PET4_N
|
||||
Text Label 2350 3300 0 50 ~ 0
|
||||
PET4_P
|
||||
Text Label 2350 3650 0 50 ~ 0
|
||||
PET5_N
|
||||
Text Label 2350 3550 0 50 ~ 0
|
||||
PET5_P
|
||||
Text Label 2350 3900 0 50 ~ 0
|
||||
PET6_N
|
||||
Text Label 2350 3800 0 50 ~ 0
|
||||
PET6_P
|
||||
Text Label 2350 4150 0 50 ~ 0
|
||||
PET7_N
|
||||
Text Label 2350 4050 0 50 ~ 0
|
||||
PET7_P
|
||||
Text Label 2350 4400 0 50 ~ 0
|
||||
PET8_N
|
||||
Text Label 2350 4300 0 50 ~ 0
|
||||
PET8_P
|
||||
Text Label 2350 4650 0 50 ~ 0
|
||||
PET9_N
|
||||
Text Label 2350 4550 0 50 ~ 0
|
||||
PET9_P
|
||||
Text Label 2350 4900 0 50 ~ 0
|
||||
PET10_N
|
||||
Text Label 2350 4800 0 50 ~ 0
|
||||
PET10_P
|
||||
Text Label 2350 5150 0 50 ~ 0
|
||||
PET11_N
|
||||
Text Label 2350 5050 0 50 ~ 0
|
||||
PET11_P
|
||||
Text Label 2350 5400 0 50 ~ 0
|
||||
PET12_N
|
||||
Text Label 2350 5300 0 50 ~ 0
|
||||
PET12_P
|
||||
Text Label 2350 5650 0 50 ~ 0
|
||||
PET13_N
|
||||
Text Label 2350 5550 0 50 ~ 0
|
||||
PET13_P
|
||||
Text Label 2350 5900 0 50 ~ 0
|
||||
PET14_N
|
||||
Text Label 2350 5800 0 50 ~ 0
|
||||
PET14_P
|
||||
Text Label 2350 6150 0 50 ~ 0
|
||||
PET15_N
|
||||
Text Label 2350 6050 0 50 ~ 0
|
||||
PET15_P
|
||||
Text Label 1250 2400 2 50 ~ 0
|
||||
PER0_N
|
||||
Text Label 1250 2300 2 50 ~ 0
|
||||
PER0_P
|
||||
Text Label 1250 2650 2 50 ~ 0
|
||||
PER1_N
|
||||
Text Label 1250 2550 2 50 ~ 0
|
||||
PER1_P
|
||||
Text Label 1250 2900 2 50 ~ 0
|
||||
PER2_N
|
||||
Text Label 1250 2800 2 50 ~ 0
|
||||
PER2_P
|
||||
Text Label 1250 3150 2 50 ~ 0
|
||||
PER3_N
|
||||
Text Label 1250 3050 2 50 ~ 0
|
||||
PER3_P
|
||||
Text Label 1250 3400 2 50 ~ 0
|
||||
PER4_N
|
||||
Text Label 1250 3300 2 50 ~ 0
|
||||
PER4_P
|
||||
Text Label 1250 3650 2 50 ~ 0
|
||||
PER5_N
|
||||
Text Label 1250 3550 2 50 ~ 0
|
||||
PER5_P
|
||||
Text Label 1250 3900 2 50 ~ 0
|
||||
PER6_N
|
||||
Text Label 1250 3800 2 50 ~ 0
|
||||
PER6_P
|
||||
Text Label 1250 4150 2 50 ~ 0
|
||||
PER7_N
|
||||
Text Label 1250 4050 2 50 ~ 0
|
||||
PER7_P
|
||||
Text Label 1250 4400 2 50 ~ 0
|
||||
PER8_N
|
||||
Text Label 1250 4300 2 50 ~ 0
|
||||
PER8_P
|
||||
Text Label 1250 4650 2 50 ~ 0
|
||||
PER9_N
|
||||
Text Label 1250 4550 2 50 ~ 0
|
||||
PER9_P
|
||||
Text Label 1250 4900 2 50 ~ 0
|
||||
PER10_N
|
||||
Text Label 1250 4800 2 50 ~ 0
|
||||
PER10_P
|
||||
Text Label 1250 5150 2 50 ~ 0
|
||||
PER11_N
|
||||
Text Label 1250 5050 2 50 ~ 0
|
||||
PER11_P
|
||||
Text Label 1250 5400 2 50 ~ 0
|
||||
PER12_N
|
||||
Text Label 1250 5300 2 50 ~ 0
|
||||
PER12_P
|
||||
Text Label 1250 5650 2 50 ~ 0
|
||||
PER13_N
|
||||
Text Label 1250 5550 2 50 ~ 0
|
||||
PER13_P
|
||||
Text Label 1250 5900 2 50 ~ 0
|
||||
PER14_N
|
||||
Text Label 1250 5800 2 50 ~ 0
|
||||
PER14_P
|
||||
Text Label 1250 6150 2 50 ~ 0
|
||||
PER15_N
|
||||
Text Label 1250 6050 2 50 ~ 0
|
||||
PER15_P
|
||||
Wire Wire Line
|
||||
1250 6150 1350 6150
|
||||
Wire Wire Line
|
||||
1250 6050 1350 6050
|
||||
Wire Wire Line
|
||||
1250 5900 1350 5900
|
||||
Wire Wire Line
|
||||
1250 5800 1350 5800
|
||||
Wire Wire Line
|
||||
1250 5650 1350 5650
|
||||
Wire Wire Line
|
||||
1250 5550 1350 5550
|
||||
Wire Wire Line
|
||||
1250 5400 1350 5400
|
||||
Wire Wire Line
|
||||
1250 5300 1350 5300
|
||||
Wire Wire Line
|
||||
2250 6150 2350 6150
|
||||
Wire Wire Line
|
||||
2250 6050 2350 6050
|
||||
Wire Wire Line
|
||||
2250 5900 2350 5900
|
||||
Wire Wire Line
|
||||
2250 5800 2350 5800
|
||||
Wire Wire Line
|
||||
2250 5650 2350 5650
|
||||
Wire Wire Line
|
||||
2250 5550 2350 5550
|
||||
Wire Wire Line
|
||||
2250 5400 2350 5400
|
||||
Wire Wire Line
|
||||
2250 5300 2350 5300
|
||||
Wire Wire Line
|
||||
2250 5150 2350 5150
|
||||
Wire Wire Line
|
||||
2250 5050 2350 5050
|
||||
Wire Wire Line
|
||||
2250 4900 2350 4900
|
||||
Wire Wire Line
|
||||
2250 4800 2350 4800
|
||||
Wire Wire Line
|
||||
1250 5150 1350 5150
|
||||
Wire Wire Line
|
||||
1250 5050 1350 5050
|
||||
Wire Wire Line
|
||||
1250 4900 1350 4900
|
||||
Wire Wire Line
|
||||
1250 4800 1350 4800
|
||||
Wire Wire Line
|
||||
1250 4650 1350 4650
|
||||
Wire Wire Line
|
||||
1250 4550 1350 4550
|
||||
Wire Wire Line
|
||||
1250 4400 1350 4400
|
||||
Wire Wire Line
|
||||
1250 4300 1350 4300
|
||||
Wire Wire Line
|
||||
2250 4650 2350 4650
|
||||
Wire Wire Line
|
||||
2250 4550 2350 4550
|
||||
Wire Wire Line
|
||||
2250 4400 2350 4400
|
||||
Wire Wire Line
|
||||
2250 4300 2350 4300
|
||||
Wire Wire Line
|
||||
2250 4150 2350 4150
|
||||
Wire Wire Line
|
||||
2250 4050 2350 4050
|
||||
Wire Wire Line
|
||||
2250 3900 2350 3900
|
||||
Wire Wire Line
|
||||
2250 3800 2350 3800
|
||||
Wire Wire Line
|
||||
2250 3650 2350 3650
|
||||
Wire Wire Line
|
||||
2250 3550 2350 3550
|
||||
Wire Wire Line
|
||||
2250 3400 2350 3400
|
||||
Wire Wire Line
|
||||
2250 3300 2350 3300
|
||||
Wire Wire Line
|
||||
2250 3150 2350 3150
|
||||
Wire Wire Line
|
||||
2250 3050 2350 3050
|
||||
Wire Wire Line
|
||||
2250 2900 2350 2900
|
||||
Wire Wire Line
|
||||
2250 2800 2350 2800
|
||||
Wire Wire Line
|
||||
1250 4150 1350 4150
|
||||
Wire Wire Line
|
||||
1250 4050 1350 4050
|
||||
Wire Wire Line
|
||||
1250 3900 1350 3900
|
||||
Wire Wire Line
|
||||
1250 3800 1350 3800
|
||||
Wire Wire Line
|
||||
1250 3650 1350 3650
|
||||
Wire Wire Line
|
||||
1250 3550 1350 3550
|
||||
Wire Wire Line
|
||||
1250 3400 1350 3400
|
||||
Wire Wire Line
|
||||
1250 3300 1350 3300
|
||||
Wire Wire Line
|
||||
1250 3150 1350 3150
|
||||
Wire Wire Line
|
||||
1250 3050 1350 3050
|
||||
Wire Wire Line
|
||||
1250 2900 1350 2900
|
||||
Wire Wire Line
|
||||
1250 2800 1350 2800
|
||||
Wire Wire Line
|
||||
1250 2650 1350 2650
|
||||
Wire Wire Line
|
||||
1250 2550 1350 2550
|
||||
Wire Wire Line
|
||||
1250 2400 1350 2400
|
||||
Wire Wire Line
|
||||
1250 2300 1350 2300
|
||||
Wire Wire Line
|
||||
2250 2650 2350 2650
|
||||
Wire Wire Line
|
||||
2250 2550 2350 2550
|
||||
Wire Wire Line
|
||||
2250 2400 2350 2400
|
||||
Wire Wire Line
|
||||
2250 2300 2350 2300
|
||||
Text Label 2350 2000 0 50 ~ 0
|
||||
REFCLK+
|
||||
Text Label 2350 2100 0 50 ~ 0
|
||||
REFCLK-
|
||||
Text Label 2350 1850 0 50 ~ 0
|
||||
~PERST
|
||||
Text Label 2350 1700 0 50 ~ 0
|
||||
~TRST
|
||||
Text Label 2350 1600 0 50 ~ 0
|
||||
TDI
|
||||
Text Label 2350 1500 0 50 ~ 0
|
||||
TCK
|
||||
Text Label 2350 1400 0 50 ~ 0
|
||||
TMS
|
||||
Text Label 1250 2000 2 50 ~ 0
|
||||
SMCLK
|
||||
Text Label 1250 2100 2 50 ~ 0
|
||||
SMDAT
|
||||
Text Label 1250 1850 2 50 ~ 0
|
||||
~WAKE
|
||||
Text Label 1250 1700 2 50 ~ 0
|
||||
TDO
|
||||
Text Label 1250 1150 2 50 ~ 0
|
||||
~PRSNT1
|
||||
Text Label 1250 1250 2 50 ~ 0
|
||||
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EESchema Schematic File Version 4
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LIBS:PCIexpress_x16_full-cache
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EELAYER 29 0
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EELAYER END
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220
PCIexpress_x16_full/term.kicad_sch
Normal file
220
PCIexpress_x16_full/term.kicad_sch
Normal file
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@ -1,155 +0,0 @@
|
||||
EESchema Schematic File Version 4
|
||||
LIBS:PCIexpress_x16_full-cache
|
||||
EELAYER 29 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 18 34
|
||||
Title "PCIexpress_x16_full"
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp "Author: Luca Anastasio"
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
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$Comp
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L Device:R R1
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U 1 1 5D52DCBC
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P 4750 3800
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AR Path="/5D508B15/5D516DFB/5D52DCBC" Ref="R1" Part="1"
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AR Path="/5D508B15/5D5D39ED/5D52DCBC" Ref="R?" Part="1"
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AR Path="/5D508B15/5D5DF906/5D52DCBC" Ref="R3" Part="1"
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AR Path="/5D508B15/5D761049/5D52DCBC" Ref="R5" Part="1"
|
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AR Path="/5D508B15/5D76CFC3/5D52DCBC" Ref="R7" Part="1"
|
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AR Path="/5D508B15/5D87B438/5D52DCBC" Ref="R9" Part="1"
|
||||
AR Path="/5D508B15/5D87B440/5D52DCBC" Ref="R11" Part="1"
|
||||
AR Path="/5D508B15/5D87B446/5D52DCBC" Ref="R13" Part="1"
|
||||
AR Path="/5D508B15/5D88A9FD/5D52DCBC" Ref="R15" Part="1"
|
||||
AR Path="/5D508B15/5D9667F2/5D52DCBC" Ref="R17" Part="1"
|
||||
AR Path="/5D508B15/5D9667FA/5D52DCBC" Ref="R19" Part="1"
|
||||
AR Path="/5D508B15/5D9E5907/5D52DCBC" Ref="R21" Part="1"
|
||||
AR Path="/5D508B15/5D9E590D/5D52DCBC" Ref="R23" Part="1"
|
||||
AR Path="/5D508B15/5D9E5913/5D52DCBC" Ref="R25" Part="1"
|
||||
AR Path="/5D508B15/5D9E5919/5D52DCBC" Ref="R27" Part="1"
|
||||
AR Path="/5D508B15/5D9E5923/5D52DCBC" Ref="R29" Part="1"
|
||||
AR Path="/5D508B15/5D9E5929/5D52DCBC" Ref="R31" Part="1"
|
||||
F 0 "R31" H 4820 3846 50 0000 L CNN
|
||||
F 1 "49.9" H 4820 3755 50 0000 L CNN
|
||||
F 2 "Resistor_SMD:R_0603_1608Metric" V 4680 3800 50 0001 C CNN
|
||||
F 3 "~" H 4750 3800 50 0001 C CNN
|
||||
1 4750 3800
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1 0 0 -1
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$EndComp
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$Comp
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L Device:R R2
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U 1 1 5D52E298
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P 5750 3800
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AR Path="/5D508B15/5D516DFB/5D52E298" Ref="R2" Part="1"
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AR Path="/5D508B15/5D5D39ED/5D52E298" Ref="R?" Part="1"
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||||
AR Path="/5D508B15/5D5DF906/5D52E298" Ref="R4" Part="1"
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AR Path="/5D508B15/5D761049/5D52E298" Ref="R6" Part="1"
|
||||
AR Path="/5D508B15/5D76CFC3/5D52E298" Ref="R8" Part="1"
|
||||
AR Path="/5D508B15/5D87B438/5D52E298" Ref="R10" Part="1"
|
||||
AR Path="/5D508B15/5D87B440/5D52E298" Ref="R12" Part="1"
|
||||
AR Path="/5D508B15/5D87B446/5D52E298" Ref="R14" Part="1"
|
||||
AR Path="/5D508B15/5D88A9FD/5D52E298" Ref="R16" Part="1"
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||||
AR Path="/5D508B15/5D9667F2/5D52E298" Ref="R18" Part="1"
|
||||
AR Path="/5D508B15/5D9667FA/5D52E298" Ref="R20" Part="1"
|
||||
AR Path="/5D508B15/5D9E5907/5D52E298" Ref="R22" Part="1"
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||||
AR Path="/5D508B15/5D9E590D/5D52E298" Ref="R24" Part="1"
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||||
AR Path="/5D508B15/5D9E5913/5D52E298" Ref="R26" Part="1"
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AR Path="/5D508B15/5D9E5919/5D52E298" Ref="R28" Part="1"
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||||
AR Path="/5D508B15/5D9E5923/5D52E298" Ref="R30" Part="1"
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AR Path="/5D508B15/5D9E5929/5D52E298" Ref="R32" Part="1"
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F 0 "R32" H 5820 3846 50 0000 L CNN
|
||||
F 1 "49.9" H 5820 3755 50 0000 L CNN
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F 2 "Resistor_SMD:R_0603_1608Metric" V 5680 3800 50 0001 C CNN
|
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F 3 "~" H 5750 3800 50 0001 C CNN
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||||
1 5750 3800
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1 0 0 -1
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$EndComp
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$Comp
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L power:GND #PWR0109
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P 4750 4050
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||||
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||||
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||||
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|
||||
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|
||||
AR Path="/5D508B15/5D88A9FD/5D52E619" Ref="#PWR0123" Part="1"
|
||||
AR Path="/5D508B15/5D9667F2/5D52E619" Ref="#PWR0125" Part="1"
|
||||
AR Path="/5D508B15/5D9667FA/5D52E619" Ref="#PWR0127" Part="1"
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||||
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||||
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||||
F 0 "#PWR0139" H 4750 3800 50 0001 C CNN
|
||||
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F 2 "" H 4750 4050 50 0001 C CNN
|
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F 3 "" H 4750 4050 50 0001 C CNN
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||||
1 4750 4050
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1 0 0 -1
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$EndComp
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$Comp
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L power:GND #PWR0110
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U 1 1 5D52EC15
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P 5750 4050
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||||
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|
||||
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||||
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|
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||||
AR Path="/5D508B15/5D87B440/5D52EC15" Ref="#PWR0120" Part="1"
|
||||
AR Path="/5D508B15/5D87B446/5D52EC15" Ref="#PWR0122" Part="1"
|
||||
AR Path="/5D508B15/5D88A9FD/5D52EC15" Ref="#PWR0124" Part="1"
|
||||
AR Path="/5D508B15/5D9667F2/5D52EC15" Ref="#PWR0126" Part="1"
|
||||
AR Path="/5D508B15/5D9667FA/5D52EC15" Ref="#PWR0128" Part="1"
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||||
AR Path="/5D508B15/5D9E5907/5D52EC15" Ref="#PWR0130" Part="1"
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||||
AR Path="/5D508B15/5D9E590D/5D52EC15" Ref="#PWR0132" Part="1"
|
||||
AR Path="/5D508B15/5D9E5913/5D52EC15" Ref="#PWR0134" Part="1"
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||||
AR Path="/5D508B15/5D9E5919/5D52EC15" Ref="#PWR0136" Part="1"
|
||||
AR Path="/5D508B15/5D9E5923/5D52EC15" Ref="#PWR0138" Part="1"
|
||||
AR Path="/5D508B15/5D9E5929/5D52EC15" Ref="#PWR0140" Part="1"
|
||||
F 0 "#PWR0140" H 5750 3800 50 0001 C CNN
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||||
F 1 "GND" H 5755 3877 50 0000 C CNN
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F 2 "" H 5750 4050 50 0001 C CNN
|
||||
F 3 "" H 5750 4050 50 0001 C CNN
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||||
1 5750 4050
|
||||
1 0 0 -1
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$EndComp
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Wire Wire Line
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||||
4750 3950 4750 4050
|
||||
Wire Wire Line
|
||||
5750 3950 5750 4050
|
||||
Text HLabel 5850 3550 2 50 Input ~ 0
|
||||
IN+
|
||||
Text HLabel 4850 3550 2 50 Input ~ 0
|
||||
IN-
|
||||
Text HLabel 5650 3550 0 50 Output ~ 0
|
||||
OUT+
|
||||
Text HLabel 4650 3550 0 50 Output ~ 0
|
||||
OUT-
|
||||
Wire Wire Line
|
||||
5750 3650 5750 3550
|
||||
Wire Wire Line
|
||||
5650 3550 5750 3550
|
||||
Connection ~ 5750 3550
|
||||
Wire Wire Line
|
||||
5750 3550 5850 3550
|
||||
Wire Wire Line
|
||||
4650 3550 4750 3550
|
||||
Wire Wire Line
|
||||
4750 3650 4750 3550
|
||||
Connection ~ 4750 3550
|
||||
Wire Wire Line
|
||||
4750 3550 4850 3550
|
||||
$EndSCHEMATC
|
||||
4018
PCIexpress_x16_half/PCIexpress_connector.kicad_sch
Normal file
4018
PCIexpress_x16_half/PCIexpress_connector.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,297 +0,0 @@
|
||||
EESchema-LIBRARY Version 2.4
|
||||
#encoding utf-8
|
||||
#
|
||||
# Device_C
|
||||
#
|
||||
DEF Device_C C 0 10 N Y 1 F N
|
||||
F0 "C" 25 100 50 H V L CNN
|
||||
F1 "Device_C" 25 -100 50 H V L CNN
|
||||
F2 "" 38 -150 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
C_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 20 -80 -30 80 -30 N
|
||||
P 2 0 1 20 -80 30 80 30 N
|
||||
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_R
|
||||
#
|
||||
DEF Device_R R 0 0 N Y 1 F N
|
||||
F0 "R" 80 0 50 V V C CNN
|
||||
F1 "Device_R" 0 0 50 V V C CNN
|
||||
F2 "" -70 0 50 V I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
R_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_PCIexpress_bracket
|
||||
#
|
||||
DEF PCIexpress_PCIexpress_bracket J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 0 50 H V C CNN
|
||||
F1 "PCIexpress_PCIexpress_bracket" 0 0 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
PCIexpress_bracket_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_PCIexpress_x16
|
||||
#
|
||||
DEF PCIexpress_PCIexpress_x16 J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 150 50 H V C CNN
|
||||
F1 "PCIexpress_PCIexpress_x16" 0 50 50 H V C CNN
|
||||
F2 "PCIexpress:PCIexpress_x16" 0 -950 50 H I C CNN
|
||||
F3 "" 0 -950 50 H I C CNN
|
||||
DRAW
|
||||
T 0 0 -8650 50 0 0 0 x16 Normal 0 C C
|
||||
T 0 0 -3450 50 0 0 0 x4 Normal 0 C C
|
||||
T 0 0 -5250 50 0 0 0 x8 Normal 0 C C
|
||||
T 0 0 -1150 50 0 1 1 notch Normal 0 C C
|
||||
T 0 0 -1950 50 0 1 1 x1 Normal 0 C C
|
||||
S 450 0 -450 -8700 1 1 10 f
|
||||
P 2 0 0 0 450 -5300 -450 -5300 N
|
||||
P 2 0 0 0 450 -3500 -450 -3500 N
|
||||
P 2 1 1 0 450 -2000 -450 -2000 N
|
||||
P 2 1 1 0 450 -1200 -450 -1200 N
|
||||
X ~PRSNT1 A1 600 -100 150 L 50 50 1 1 P
|
||||
X +3.3V A10 600 -1000 150 L 50 50 1 1 w
|
||||
X ~PERST A11 600 -1100 150 L 50 50 1 1 O
|
||||
X GND A12 600 -1300 150 L 50 50 1 1 w
|
||||
X REFCLK+ A13 600 -1400 150 L 50 50 1 1 O
|
||||
X REFCLK- A14 600 -1500 150 L 50 50 1 1 O
|
||||
X GND A15 600 -1600 150 L 50 50 1 1 w
|
||||
X PERp0 A16 600 -1700 150 L 50 50 1 1 I
|
||||
X PERn0 A17 600 -1800 150 L 50 50 1 1 I
|
||||
X GND A18 600 -1900 150 L 50 50 1 1 w
|
||||
X RSVD A19 600 -2100 150 L 50 50 1 1 N
|
||||
X +12V A2 600 -200 150 L 50 50 1 1 w
|
||||
X GND A20 600 -2200 150 L 50 50 1 1 w
|
||||
X PERp1 A21 600 -2300 150 L 50 50 1 1 I
|
||||
X PERn1 A22 600 -2400 150 L 50 50 1 1 I
|
||||
X GND A23 600 -2500 150 L 50 50 1 1 w
|
||||
X GND A24 600 -2600 150 L 50 50 1 1 w
|
||||
X PERp2 A25 600 -2700 150 L 50 50 1 1 I
|
||||
X PERn2 A26 600 -2800 150 L 50 50 1 1 I
|
||||
X GND A27 600 -2900 150 L 50 50 1 1 w
|
||||
X GND A28 600 -3000 150 L 50 50 1 1 w
|
||||
X PERp3 A29 600 -3100 150 L 50 50 1 1 I
|
||||
X +12V A3 600 -300 150 L 50 50 1 1 w
|
||||
X PERn3 A30 600 -3200 150 L 50 50 1 1 I
|
||||
X GND A31 600 -3300 150 L 50 50 1 1 w
|
||||
X RSVD A32 600 -3400 150 L 50 50 1 1 N
|
||||
X RSVD A33 600 -3600 150 L 50 50 1 1 N
|
||||
X GND A34 600 -3700 150 L 50 50 1 1 w
|
||||
X PERp4 A35 600 -3800 150 L 50 50 1 1 I
|
||||
X PERn4 A36 600 -3900 150 L 50 50 1 1 I
|
||||
X GND A37 600 -4000 150 L 50 50 1 1 w
|
||||
X GND A38 600 -4100 150 L 50 50 1 1 w
|
||||
X PERp5 A39 600 -4200 150 L 50 50 1 1 I
|
||||
X GND A4 600 -400 150 L 50 50 1 1 w
|
||||
X PERn5 A40 600 -4300 150 L 50 50 1 1 I
|
||||
X GND A41 600 -4400 150 L 50 50 1 1 w
|
||||
X GND A42 600 -4500 150 L 50 50 1 1 w
|
||||
X PERp6 A43 600 -4600 150 L 50 50 1 1 I
|
||||
X PERn6 A44 600 -4700 150 L 50 50 1 1 I
|
||||
X GND A45 600 -4800 150 L 50 50 1 1 w
|
||||
X GND A46 600 -4900 150 L 50 50 1 1 w
|
||||
X PERp7 A47 600 -5000 150 L 50 50 1 1 I
|
||||
X PERn7 A48 600 -5100 150 L 50 50 1 1 I
|
||||
X GND A49 600 -5200 150 L 50 50 1 1 w
|
||||
X TCK A5 600 -500 150 L 50 50 1 1 O
|
||||
X RSVD A50 600 -5400 150 L 50 50 1 1 N
|
||||
X GND A51 600 -5500 150 L 50 50 1 1 w
|
||||
X PERp8 A52 600 -5600 150 L 50 50 1 1 I
|
||||
X PERn8 A53 600 -5700 150 L 50 50 1 1 I
|
||||
X GND A54 600 -5800 150 L 50 50 1 1 w
|
||||
X GND A55 600 -5900 150 L 50 50 1 1 w
|
||||
X PERp9 A56 600 -6000 150 L 50 50 1 1 I
|
||||
X PERn9 A57 600 -6100 150 L 50 50 1 1 I
|
||||
X GND A58 600 -6200 150 L 50 50 1 1 w
|
||||
X GND A59 600 -6300 150 L 50 50 1 1 w
|
||||
X TDI A6 600 -600 150 L 50 50 1 1 O
|
||||
X PERp10 A60 600 -6400 150 L 50 50 1 1 I
|
||||
X PERn10 A61 600 -6500 150 L 50 50 1 1 I
|
||||
X GND A62 600 -6600 150 L 50 50 1 1 w
|
||||
X GND A63 600 -6700 150 L 50 50 1 1 w
|
||||
X PERp11 A64 600 -6800 150 L 50 50 1 1 I
|
||||
X PERn11 A65 600 -6900 150 L 50 50 1 1 I
|
||||
X GND A66 600 -7000 150 L 50 50 1 1 w
|
||||
X GND A67 600 -7100 150 L 50 50 1 1 w
|
||||
X PERp12 A68 600 -7200 150 L 50 50 1 1 I
|
||||
X PERn12 A69 600 -7300 150 L 50 50 1 1 I
|
||||
X TDO A7 600 -700 150 L 50 50 1 1 I
|
||||
X GND A70 600 -7400 150 L 50 50 1 1 w
|
||||
X GND A71 600 -7500 150 L 50 50 1 1 w
|
||||
X PERp13 A72 600 -7600 150 L 50 50 1 1 I
|
||||
X PERn13 A73 600 -7700 150 L 50 50 1 1 I
|
||||
X GND A74 600 -7800 150 L 50 50 1 1 w
|
||||
X GND A75 600 -7900 150 L 50 50 1 1 w
|
||||
X PERp14 A76 600 -8000 150 L 50 50 1 1 I
|
||||
X PERn14 A77 600 -8100 150 L 50 50 1 1 I
|
||||
X GND A78 600 -8200 150 L 50 50 1 1 w
|
||||
X GND A79 600 -8300 150 L 50 50 1 1 w
|
||||
X TMS A8 600 -800 150 L 50 50 1 1 O
|
||||
X PERp15 A80 600 -8400 150 L 50 50 1 1 I
|
||||
X PERn15 A81 600 -8500 150 L 50 50 1 1 I
|
||||
X GND A82 600 -8600 150 L 50 50 1 1 w
|
||||
X +3.3V A9 600 -900 150 L 50 50 1 1 w
|
||||
X +12V B1 -600 -100 150 R 50 50 1 1 w
|
||||
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
|
||||
X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
|
||||
X RSVD B12 -600 -1300 150 R 50 50 1 1 N
|
||||
X GND B13 -600 -1400 150 R 50 50 1 1 w
|
||||
X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
|
||||
X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
|
||||
X GND B16 -600 -1700 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B17 -600 -1800 150 R 50 50 1 1 P
|
||||
X GND B18 -600 -1900 150 R 50 50 1 1 w
|
||||
X PETp1 B19 -600 -2100 150 R 50 50 1 1 O
|
||||
X +12V B2 -600 -200 150 R 50 50 1 1 w
|
||||
X PETn1 B20 -600 -2200 150 R 50 50 1 1 O
|
||||
X GND B21 -600 -2300 150 R 50 50 1 1 w
|
||||
X GND B22 -600 -2400 150 R 50 50 1 1 w
|
||||
X PETp2 B23 -600 -2500 150 R 50 50 1 1 O
|
||||
X PETn2 B24 -600 -2600 150 R 50 50 1 1 O
|
||||
X GND B25 -600 -2700 150 R 50 50 1 1 w
|
||||
X GND B26 -600 -2800 150 R 50 50 1 1 w
|
||||
X PETp3 B27 -600 -2900 150 R 50 50 1 1 O
|
||||
X PETn3 B28 -600 -3000 150 R 50 50 1 1 O
|
||||
X GND B29 -600 -3100 150 R 50 50 1 1 w
|
||||
X +12V B3 -600 -300 150 R 50 50 1 1 w
|
||||
X RSVD B30 -600 -3200 150 R 50 50 1 1 N
|
||||
X ~PRSNT2 B31 -600 -3300 150 R 50 50 1 1 P
|
||||
X GND B32 -600 -3400 150 R 50 50 1 1 w
|
||||
X PETp4 B33 -600 -3600 150 R 50 50 1 1 O
|
||||
X PETn4 B34 -600 -3700 150 R 50 50 1 1 O
|
||||
X GND B35 -600 -3800 150 R 50 50 1 1 w
|
||||
X GND B36 -600 -3900 150 R 50 50 1 1 w
|
||||
X PETp5 B37 -600 -4000 150 R 50 50 1 1 O
|
||||
X PETn5 B38 -600 -4100 150 R 50 50 1 1 O
|
||||
X GND B39 -600 -4200 150 R 50 50 1 1 w
|
||||
X GND B4 -600 -400 150 R 50 50 1 1 w
|
||||
X GND B40 -600 -4300 150 R 50 50 1 1 w
|
||||
X PETp6 B41 -600 -4400 150 R 50 50 1 1 O
|
||||
X PETn6 B42 -600 -4500 150 R 50 50 1 1 O
|
||||
X GND B43 -600 -4600 150 R 50 50 1 1 w
|
||||
X GND B44 -600 -4700 150 R 50 50 1 1 w
|
||||
X PETp7 B45 -600 -4800 150 R 50 50 1 1 O
|
||||
X PETn7 B46 -600 -4900 150 R 50 50 1 1 O
|
||||
X GND B47 -600 -5000 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B48 -600 -5100 150 R 50 50 1 1 P
|
||||
X GND B49 -600 -5200 150 R 50 50 1 1 w
|
||||
X SMCLK B5 -600 -500 150 R 50 50 1 1 C
|
||||
X PETp8 B50 -600 -5400 150 R 50 50 1 1 O
|
||||
X PETn8 B51 -600 -5500 150 R 50 50 1 1 O
|
||||
X GND B52 -600 -5600 150 R 50 50 1 1 w
|
||||
X GND B53 -600 -5700 150 R 50 50 1 1 w
|
||||
X PETp9 B54 -600 -5800 150 R 50 50 1 1 O
|
||||
X PETn9 B55 -600 -5900 150 R 50 50 1 1 O
|
||||
X GND B56 -600 -6000 150 R 50 50 1 1 w
|
||||
X GND B57 -600 -6100 150 R 50 50 1 1 w
|
||||
X PETp10 B58 -600 -6200 150 R 50 50 1 1 O
|
||||
X PETn10 B59 -600 -6300 150 R 50 50 1 1 O
|
||||
X SMDAT B6 -600 -600 150 R 50 50 1 1 C
|
||||
X GND B60 -600 -6400 150 R 50 50 1 1 w
|
||||
X GND B61 -600 -6500 150 R 50 50 1 1 w
|
||||
X PETp11 B62 -600 -6600 150 R 50 50 1 1 O
|
||||
X PETn11 B63 -600 -6700 150 R 50 50 1 1 O
|
||||
X GND B64 -600 -6800 150 R 50 50 1 1 w
|
||||
X GND B65 -600 -6900 150 R 50 50 1 1 w
|
||||
X PETp12 B66 -600 -7000 150 R 50 50 1 1 O
|
||||
X PETn12 B67 -600 -7100 150 R 50 50 1 1 O
|
||||
X GND B68 -600 -7200 150 R 50 50 1 1 w
|
||||
X GND B69 -600 -7300 150 R 50 50 1 1 w
|
||||
X GND B7 -600 -700 150 R 50 50 1 1 w
|
||||
X PETp13 B70 -600 -7400 150 R 50 50 1 1 O
|
||||
X PETn13 B71 -600 -7500 150 R 50 50 1 1 O
|
||||
X GND B72 -600 -7600 150 R 50 50 1 1 w
|
||||
X GND B73 -600 -7700 150 R 50 50 1 1 w
|
||||
X PETp14 B74 -600 -7800 150 R 50 50 1 1 O
|
||||
X PETn14 B75 -600 -7900 150 R 50 50 1 1 O
|
||||
X GND B76 -600 -8000 150 R 50 50 1 1 w
|
||||
X GND B77 -600 -8100 150 R 50 50 1 1 w
|
||||
X PETp15 B78 -600 -8200 150 R 50 50 1 1 O
|
||||
X PETn15 B79 -600 -8300 150 R 50 50 1 1 O
|
||||
X +3.3V B8 -600 -800 150 R 50 50 1 1 w
|
||||
X GND B80 -600 -8400 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B81 -600 -8500 150 R 50 50 1 1 P
|
||||
X RSVD B82 -600 -8600 150 R 50 50 1 1 N
|
||||
X ~TRST B9 -600 -900 150 R 50 50 1 1 O
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+12V
|
||||
#
|
||||
DEF power_+12V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+12V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +12V 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3V
|
||||
#
|
||||
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS +3.3V
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3V3 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3VA
|
||||
#
|
||||
DEF power_+3.3VA #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3VA" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3.3VA 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GND
|
||||
#
|
||||
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GND" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
File diff suppressed because it is too large
Load Diff
746
PCIexpress_x16_half/PCIexpress_x16_half.kicad_pro
Normal file
746
PCIexpress_x16_half/PCIexpress_x16_half.kicad_pro
Normal file
@ -0,0 +1,746 @@
|
||||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.049999999999999996,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 0.762,
|
||||
"height": 1.524,
|
||||
"width": 1.524
|
||||
},
|
||||
"silk_line_width": 0.12,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.508
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"filename": "board_design_settings.json",
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint_type_mismatch": "error",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rule_severitieslegacy_courtyards_overlap": true,
|
||||
"rule_severitieslegacy_no_courtyard_defined": false,
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_copper_edge_clearance": 0.075,
|
||||
"min_hole_clearance": 0.25,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_through_hole_diameter": 0.19999999999999998,
|
||||
"min_track_width": 0.08889999999999999,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.44999999999999996,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [
|
||||
0.0,
|
||||
0.0889,
|
||||
0.127,
|
||||
0.2
|
||||
],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
},
|
||||
{
|
||||
"diameter": 0.45,
|
||||
"drill": 0.2
|
||||
},
|
||||
{
|
||||
"diameter": 0.5,
|
||||
"drill": 0.25
|
||||
},
|
||||
{
|
||||
"diameter": 0.55,
|
||||
"drill": 0.3
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
},
|
||||
"boards": [],
|
||||
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|
||||
"00000000-0000-0000-0000-00005dbb44a0",
|
||||
"sheet5DBB4496"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbc901f",
|
||||
"sheet5DBC9013"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbc9029",
|
||||
"sheet5DBC9014"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbc9033",
|
||||
"sheet5DBC9015"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbde98a",
|
||||
"sheet5DBDE980"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbf611b",
|
||||
"sheet5DBF610E"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbf6125",
|
||||
"sheet5DBF610F"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbf612f",
|
||||
"sheet5DBF6110"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbf6139",
|
||||
"sheet5DBF6111"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dc10432",
|
||||
"sheet5DC10425"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dc1043c",
|
||||
"sheet5DC10426"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dc10446",
|
||||
"sheet5DC10427"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dc10450",
|
||||
"sheet5DC10428"
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
||||
1347
PCIexpress_x16_half/PCIexpress_x16_half.kicad_sch
Normal file
1347
PCIexpress_x16_half/PCIexpress_x16_half.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
@ -1,294 +0,0 @@
|
||||
update=ven 26 lug 2019 22:25:34 CEST
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=4
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.08889999999999999
|
||||
MinViaDiameter=0.45
|
||||
MinViaDrill=0.2
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.0889
|
||||
TrackWidth2=0.0889
|
||||
TrackWidth3=0.127
|
||||
TrackWidth4=0.2
|
||||
ViaDiameter1=0.45
|
||||
ViaDrill1=0.2
|
||||
ViaDiameter2=0.45
|
||||
ViaDrill2=0.2
|
||||
ViaDiameter3=0.5
|
||||
ViaDrill3=0.25
|
||||
ViaDiameter4=0.55
|
||||
ViaDrill4=0.3
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.2
|
||||
dPairViaGap1=0.25
|
||||
dPairWidth2=0.2
|
||||
dPairGap2=0.2
|
||||
dPairViaGap2=0.2
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.051
|
||||
SolderMaskMinWidth=0.25
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.0889
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.2
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/1]
|
||||
Name=Diff-100-PCIe
|
||||
Clearance=0.2
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.2
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/2]
|
||||
Name=JLC2313-100d-3.5
|
||||
Clearance=0.1
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.0889
|
||||
dPairGap=0.1016
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/3]
|
||||
Name=JLC2313-100d-4
|
||||
Clearance=0.1
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.1016
|
||||
dPairGap=0.127
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/4]
|
||||
Name=JLC7628-100d-8
|
||||
Clearance=0.2
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2032
|
||||
dPairGap=0.2032
|
||||
dPairViaGap=0.25
|
||||
@ -1,423 +0,0 @@
|
||||
EESchema Schematic File Version 4
|
||||
LIBS:PCIexpress_x16_half-cache
|
||||
EELAYER 29 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 34
|
||||
Title "PCIexpress_x16_half"
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp "Author: Luca Anastasio"
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Sheet
|
||||
S 1350 1050 900 5200
|
||||
U 5D508B15
|
||||
F0 "PCIexpress_connector" 50
|
||||
F1 "PCIexpress_connector.sch" 50
|
||||
F2 "PET0_P" O R 2250 2300 50
|
||||
F3 "PET0_N" O R 2250 2400 50
|
||||
F4 "REFCLK+" O R 2250 2000 50
|
||||
F5 "REFCLK-" O R 2250 2100 50
|
||||
F6 "~PRSNT2x16" U L 1350 1550 50
|
||||
F7 "TDO" I L 1350 1700 50
|
||||
F8 "TMS" O R 2250 1400 50
|
||||
F9 "TDI" O R 2250 1600 50
|
||||
F10 "TCK" O R 2250 1500 50
|
||||
F11 "PET1_P" O R 2250 2550 50
|
||||
F12 "PET1_N" O R 2250 2650 50
|
||||
F13 "PET2_P" O R 2250 2800 50
|
||||
F14 "PET2_N" O R 2250 2900 50
|
||||
F15 "PET3_P" O R 2250 3050 50
|
||||
F16 "PET3_N" O R 2250 3150 50
|
||||
F17 "PER1_P" I L 1350 2550 50
|
||||
F18 "PER1_N" I L 1350 2650 50
|
||||
F19 "PER2_P" I L 1350 2800 50
|
||||
F20 "PER2_N" I L 1350 2900 50
|
||||
F21 "PER3_P" I L 1350 3050 50
|
||||
F22 "PER3_N" I L 1350 3150 50
|
||||
F23 "PER4_P" I L 1350 3300 50
|
||||
F24 "PER4_N" I L 1350 3400 50
|
||||
F25 "PER5_P" I L 1350 3550 50
|
||||
F26 "PER5_N" I L 1350 3650 50
|
||||
F27 "PER6_P" I L 1350 3800 50
|
||||
F28 "PER6_N" I L 1350 3900 50
|
||||
F29 "PER7_P" I L 1350 4050 50
|
||||
F30 "PER7_N" I L 1350 4150 50
|
||||
F31 "~WAKE" I L 1350 1850 50
|
||||
F32 "~TRST" O R 2250 1700 50
|
||||
F33 "SMCLK" B L 1350 2000 50
|
||||
F34 "SMDAT" B L 1350 2100 50
|
||||
F35 "~PERST" O R 2250 1850 50
|
||||
F36 "~PRSNT1" U L 1350 1150 50
|
||||
F37 "~PRSNT2x8" U L 1350 1450 50
|
||||
F38 "~PRSNT2x4" U L 1350 1350 50
|
||||
F39 "~PRSNT2x1" U L 1350 1250 50
|
||||
F40 "PET4_P" O R 2250 3300 50
|
||||
F41 "PET4_N" O R 2250 3400 50
|
||||
F42 "PET5_P" O R 2250 3550 50
|
||||
F43 "PET5_N" O R 2250 3650 50
|
||||
F44 "PET6_P" O R 2250 3800 50
|
||||
F45 "PET6_N" O R 2250 3900 50
|
||||
F46 "PET7_P" O R 2250 4050 50
|
||||
F47 "PET7_N" O R 2250 4150 50
|
||||
F48 "PER0_N" I L 1350 2400 50
|
||||
F49 "PER0_P" I L 1350 2300 50
|
||||
F50 "PER8_P" I L 1350 4300 50
|
||||
F51 "PER8_N" I L 1350 4400 50
|
||||
F52 "PER9_P" I L 1350 4550 50
|
||||
F53 "PER9_N" I L 1350 4650 50
|
||||
F54 "PET8_P" O R 2250 4300 50
|
||||
F55 "PET8_N" O R 2250 4400 50
|
||||
F56 "PET9_P" O R 2250 4550 50
|
||||
F57 "PET9_N" O R 2250 4650 50
|
||||
F58 "PER11_P" I L 1350 5050 50
|
||||
F59 "PER11_N" I L 1350 5150 50
|
||||
F60 "PER12_P" I L 1350 5300 50
|
||||
F61 "PER12_N" I L 1350 5400 50
|
||||
F62 "PER13_P" I L 1350 5550 50
|
||||
F63 "PER13_N" I L 1350 5650 50
|
||||
F64 "PER14_P" I L 1350 5800 50
|
||||
F65 "PER14_N" I L 1350 5900 50
|
||||
F66 "PER15_P" I L 1350 6050 50
|
||||
F67 "PER15_N" I L 1350 6150 50
|
||||
F68 "PER10_N" I L 1350 4900 50
|
||||
F69 "PER10_P" I L 1350 4800 50
|
||||
F70 "PET10_P" O R 2250 4800 50
|
||||
F71 "PET10_N" O R 2250 4900 50
|
||||
F72 "PET11_P" O R 2250 5050 50
|
||||
F73 "PET11_N" O R 2250 5150 50
|
||||
F74 "PET12_P" O R 2250 5300 50
|
||||
F75 "PET12_N" O R 2250 5400 50
|
||||
F76 "PET13_P" O R 2250 5550 50
|
||||
F77 "PET13_N" O R 2250 5650 50
|
||||
F78 "PET14_P" O R 2250 5800 50
|
||||
F79 "PET14_N" O R 2250 5900 50
|
||||
F80 "PET15_P" O R 2250 6050 50
|
||||
F81 "PET15_N" O R 2250 6150 50
|
||||
$EndSheet
|
||||
Text Label 2350 2400 0 50 ~ 0
|
||||
PET0_N
|
||||
Text Label 2350 2300 0 50 ~ 0
|
||||
PET0_P
|
||||
Text Label 2350 2650 0 50 ~ 0
|
||||
PET1_N
|
||||
Text Label 2350 2550 0 50 ~ 0
|
||||
PET1_P
|
||||
Text Label 2350 2900 0 50 ~ 0
|
||||
PET2_N
|
||||
Text Label 2350 2800 0 50 ~ 0
|
||||
PET2_P
|
||||
Text Label 2350 3150 0 50 ~ 0
|
||||
PET3_N
|
||||
Text Label 2350 3050 0 50 ~ 0
|
||||
PET3_P
|
||||
Text Label 2350 3400 0 50 ~ 0
|
||||
PET4_N
|
||||
Text Label 2350 3300 0 50 ~ 0
|
||||
PET4_P
|
||||
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130
PCIexpress_x16_half/decap.kicad_sch
Normal file
130
PCIexpress_x16_half/decap.kicad_sch
Normal file
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@ -1,89 +0,0 @@
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EESchema Schematic File Version 4
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LIBS:PCIexpress_x16_half-cache
|
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EELAYER 29 0
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EELAYER END
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$Descr A4 11693 8268
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encoding utf-8
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Sheet 19 34
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Title "PCIexpress_x16_half"
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Date ""
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$EndDescr
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L Device:C C?
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@ -1,155 +0,0 @@
|
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EESchema Schematic File Version 4
|
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LIBS:PCIexpress_x16_half-cache
|
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EELAYER 29 0
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||||
EELAYER END
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|
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encoding utf-8
|
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Sheet 18 34
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|
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|
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Comp "Author: Luca Anastasio"
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$EndDescr
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||||
AR Path="/5D508B15/5D87B440/5D52E298" Ref="R12" Part="1"
|
||||
AR Path="/5D508B15/5D87B446/5D52E298" Ref="R14" Part="1"
|
||||
AR Path="/5D508B15/5D88A9FD/5D52E298" Ref="R16" Part="1"
|
||||
AR Path="/5D508B15/5D9667F2/5D52E298" Ref="R18" Part="1"
|
||||
AR Path="/5D508B15/5D9667FA/5D52E298" Ref="R20" Part="1"
|
||||
AR Path="/5D508B15/5D9E5907/5D52E298" Ref="R22" Part="1"
|
||||
AR Path="/5D508B15/5D9E590D/5D52E298" Ref="R24" Part="1"
|
||||
AR Path="/5D508B15/5D9E5913/5D52E298" Ref="R26" Part="1"
|
||||
AR Path="/5D508B15/5D9E5919/5D52E298" Ref="R28" Part="1"
|
||||
AR Path="/5D508B15/5D9E5923/5D52E298" Ref="R30" Part="1"
|
||||
AR Path="/5D508B15/5D9E5929/5D52E298" Ref="R32" Part="1"
|
||||
F 0 "R32" H 5820 3846 50 0000 L CNN
|
||||
F 1 "49.9" H 5820 3755 50 0000 L CNN
|
||||
F 2 "Resistor_SMD:R_0603_1608Metric" V 5680 3800 50 0001 C CNN
|
||||
F 3 "~" H 5750 3800 50 0001 C CNN
|
||||
1 5750 3800
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:GND #PWR0109
|
||||
U 1 1 5D52E619
|
||||
P 4750 4050
|
||||
AR Path="/5D508B15/5D516DFB/5D52E619" Ref="#PWR0109" Part="1"
|
||||
AR Path="/5D508B15/5D5D39ED/5D52E619" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D508B15/5D5DF906/5D52E619" Ref="#PWR0111" Part="1"
|
||||
AR Path="/5D508B15/5D761049/5D52E619" Ref="#PWR0113" Part="1"
|
||||
AR Path="/5D508B15/5D76CFC3/5D52E619" Ref="#PWR0115" Part="1"
|
||||
AR Path="/5D508B15/5D87B438/5D52E619" Ref="#PWR0117" Part="1"
|
||||
AR Path="/5D508B15/5D87B440/5D52E619" Ref="#PWR0119" Part="1"
|
||||
AR Path="/5D508B15/5D87B446/5D52E619" Ref="#PWR0121" Part="1"
|
||||
AR Path="/5D508B15/5D88A9FD/5D52E619" Ref="#PWR0123" Part="1"
|
||||
AR Path="/5D508B15/5D9667F2/5D52E619" Ref="#PWR0125" Part="1"
|
||||
AR Path="/5D508B15/5D9667FA/5D52E619" Ref="#PWR0127" Part="1"
|
||||
AR Path="/5D508B15/5D9E5907/5D52E619" Ref="#PWR0129" Part="1"
|
||||
AR Path="/5D508B15/5D9E590D/5D52E619" Ref="#PWR0131" Part="1"
|
||||
AR Path="/5D508B15/5D9E5913/5D52E619" Ref="#PWR0133" Part="1"
|
||||
AR Path="/5D508B15/5D9E5919/5D52E619" Ref="#PWR0135" Part="1"
|
||||
AR Path="/5D508B15/5D9E5923/5D52E619" Ref="#PWR0137" Part="1"
|
||||
AR Path="/5D508B15/5D9E5929/5D52E619" Ref="#PWR0139" Part="1"
|
||||
F 0 "#PWR0139" H 4750 3800 50 0001 C CNN
|
||||
F 1 "GND" H 4755 3877 50 0000 C CNN
|
||||
F 2 "" H 4750 4050 50 0001 C CNN
|
||||
F 3 "" H 4750 4050 50 0001 C CNN
|
||||
1 4750 4050
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:GND #PWR0110
|
||||
U 1 1 5D52EC15
|
||||
P 5750 4050
|
||||
AR Path="/5D508B15/5D516DFB/5D52EC15" Ref="#PWR0110" Part="1"
|
||||
AR Path="/5D508B15/5D5D39ED/5D52EC15" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D508B15/5D5DF906/5D52EC15" Ref="#PWR0112" Part="1"
|
||||
AR Path="/5D508B15/5D761049/5D52EC15" Ref="#PWR0114" Part="1"
|
||||
AR Path="/5D508B15/5D76CFC3/5D52EC15" Ref="#PWR0116" Part="1"
|
||||
AR Path="/5D508B15/5D87B438/5D52EC15" Ref="#PWR0118" Part="1"
|
||||
AR Path="/5D508B15/5D87B440/5D52EC15" Ref="#PWR0120" Part="1"
|
||||
AR Path="/5D508B15/5D87B446/5D52EC15" Ref="#PWR0122" Part="1"
|
||||
AR Path="/5D508B15/5D88A9FD/5D52EC15" Ref="#PWR0124" Part="1"
|
||||
AR Path="/5D508B15/5D9667F2/5D52EC15" Ref="#PWR0126" Part="1"
|
||||
AR Path="/5D508B15/5D9667FA/5D52EC15" Ref="#PWR0128" Part="1"
|
||||
AR Path="/5D508B15/5D9E5907/5D52EC15" Ref="#PWR0130" Part="1"
|
||||
AR Path="/5D508B15/5D9E590D/5D52EC15" Ref="#PWR0132" Part="1"
|
||||
AR Path="/5D508B15/5D9E5913/5D52EC15" Ref="#PWR0134" Part="1"
|
||||
AR Path="/5D508B15/5D9E5919/5D52EC15" Ref="#PWR0136" Part="1"
|
||||
AR Path="/5D508B15/5D9E5923/5D52EC15" Ref="#PWR0138" Part="1"
|
||||
AR Path="/5D508B15/5D9E5929/5D52EC15" Ref="#PWR0140" Part="1"
|
||||
F 0 "#PWR0140" H 5750 3800 50 0001 C CNN
|
||||
F 1 "GND" H 5755 3877 50 0000 C CNN
|
||||
F 2 "" H 5750 4050 50 0001 C CNN
|
||||
F 3 "" H 5750 4050 50 0001 C CNN
|
||||
1 5750 4050
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
4750 3950 4750 4050
|
||||
Wire Wire Line
|
||||
5750 3950 5750 4050
|
||||
Text HLabel 5850 3550 2 50 Input ~ 0
|
||||
IN+
|
||||
Text HLabel 4850 3550 2 50 Input ~ 0
|
||||
IN-
|
||||
Text HLabel 5650 3550 0 50 Output ~ 0
|
||||
OUT+
|
||||
Text HLabel 4650 3550 0 50 Output ~ 0
|
||||
OUT-
|
||||
Wire Wire Line
|
||||
5750 3650 5750 3550
|
||||
Wire Wire Line
|
||||
5650 3550 5750 3550
|
||||
Connection ~ 5750 3550
|
||||
Wire Wire Line
|
||||
5750 3550 5850 3550
|
||||
Wire Wire Line
|
||||
4650 3550 4750 3550
|
||||
Wire Wire Line
|
||||
4750 3650 4750 3550
|
||||
Connection ~ 4750 3550
|
||||
Wire Wire Line
|
||||
4750 3550 4850 3550
|
||||
$EndSCHEMATC
|
||||
4018
PCIexpress_x16_low/PCIexpress_connector.kicad_sch
Normal file
4018
PCIexpress_x16_low/PCIexpress_connector.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
@ -1,33 +0,0 @@
|
||||
update=22/05/2015 07:44:53
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[pcbnew]
|
||||
version=1
|
||||
LastNetListRead=
|
||||
UseCmpFile=1
|
||||
PadDrill=0.600000000000
|
||||
PadDrillOvalY=0.600000000000
|
||||
PadSizeH=1.500000000000
|
||||
PadSizeV=1.500000000000
|
||||
PcbTextSizeV=1.500000000000
|
||||
PcbTextSizeH=1.500000000000
|
||||
PcbTextThickness=0.300000000000
|
||||
ModuleTextSizeV=1.000000000000
|
||||
ModuleTextSizeH=1.000000000000
|
||||
ModuleTextSizeThickness=0.150000000000
|
||||
SolderMaskClearance=0.000000000000
|
||||
SolderMaskMinWidth=0.000000000000
|
||||
DrawSegmentWidth=0.200000000000
|
||||
BoardOutlineThickness=0.100000000000
|
||||
ModuleOutlineThickness=0.150000000000
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,297 +0,0 @@
|
||||
EESchema-LIBRARY Version 2.4
|
||||
#encoding utf-8
|
||||
#
|
||||
# Device_C
|
||||
#
|
||||
DEF Device_C C 0 10 N Y 1 F N
|
||||
F0 "C" 25 100 50 H V L CNN
|
||||
F1 "Device_C" 25 -100 50 H V L CNN
|
||||
F2 "" 38 -150 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
C_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 20 -80 -30 80 -30 N
|
||||
P 2 0 1 20 -80 30 80 30 N
|
||||
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_R
|
||||
#
|
||||
DEF Device_R R 0 0 N Y 1 F N
|
||||
F0 "R" 80 0 50 V V C CNN
|
||||
F1 "Device_R" 0 0 50 V V C CNN
|
||||
F2 "" -70 0 50 V I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
R_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_PCIexpress_bracket
|
||||
#
|
||||
DEF PCIexpress_PCIexpress_bracket J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 0 50 H V C CNN
|
||||
F1 "PCIexpress_PCIexpress_bracket" 0 0 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
PCIexpress_bracket_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_PCIexpress_x16
|
||||
#
|
||||
DEF PCIexpress_PCIexpress_x16 J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 150 50 H V C CNN
|
||||
F1 "PCIexpress_PCIexpress_x16" 0 50 50 H V C CNN
|
||||
F2 "PCIexpress:PCIexpress_x16" 0 -950 50 H I C CNN
|
||||
F3 "" 0 -950 50 H I C CNN
|
||||
DRAW
|
||||
T 0 0 -8650 50 0 0 0 x16 Normal 0 C C
|
||||
T 0 0 -3450 50 0 0 0 x4 Normal 0 C C
|
||||
T 0 0 -5250 50 0 0 0 x8 Normal 0 C C
|
||||
T 0 0 -1150 50 0 1 1 notch Normal 0 C C
|
||||
T 0 0 -1950 50 0 1 1 x1 Normal 0 C C
|
||||
S 450 0 -450 -8700 1 1 10 f
|
||||
P 2 0 0 0 450 -5300 -450 -5300 N
|
||||
P 2 0 0 0 450 -3500 -450 -3500 N
|
||||
P 2 1 1 0 450 -2000 -450 -2000 N
|
||||
P 2 1 1 0 450 -1200 -450 -1200 N
|
||||
X ~PRSNT1 A1 600 -100 150 L 50 50 1 1 P
|
||||
X +3.3V A10 600 -1000 150 L 50 50 1 1 w
|
||||
X ~PERST A11 600 -1100 150 L 50 50 1 1 O
|
||||
X GND A12 600 -1300 150 L 50 50 1 1 w
|
||||
X REFCLK+ A13 600 -1400 150 L 50 50 1 1 O
|
||||
X REFCLK- A14 600 -1500 150 L 50 50 1 1 O
|
||||
X GND A15 600 -1600 150 L 50 50 1 1 w
|
||||
X PERp0 A16 600 -1700 150 L 50 50 1 1 I
|
||||
X PERn0 A17 600 -1800 150 L 50 50 1 1 I
|
||||
X GND A18 600 -1900 150 L 50 50 1 1 w
|
||||
X RSVD A19 600 -2100 150 L 50 50 1 1 N
|
||||
X +12V A2 600 -200 150 L 50 50 1 1 w
|
||||
X GND A20 600 -2200 150 L 50 50 1 1 w
|
||||
X PERp1 A21 600 -2300 150 L 50 50 1 1 I
|
||||
X PERn1 A22 600 -2400 150 L 50 50 1 1 I
|
||||
X GND A23 600 -2500 150 L 50 50 1 1 w
|
||||
X GND A24 600 -2600 150 L 50 50 1 1 w
|
||||
X PERp2 A25 600 -2700 150 L 50 50 1 1 I
|
||||
X PERn2 A26 600 -2800 150 L 50 50 1 1 I
|
||||
X GND A27 600 -2900 150 L 50 50 1 1 w
|
||||
X GND A28 600 -3000 150 L 50 50 1 1 w
|
||||
X PERp3 A29 600 -3100 150 L 50 50 1 1 I
|
||||
X +12V A3 600 -300 150 L 50 50 1 1 w
|
||||
X PERn3 A30 600 -3200 150 L 50 50 1 1 I
|
||||
X GND A31 600 -3300 150 L 50 50 1 1 w
|
||||
X RSVD A32 600 -3400 150 L 50 50 1 1 N
|
||||
X RSVD A33 600 -3600 150 L 50 50 1 1 N
|
||||
X GND A34 600 -3700 150 L 50 50 1 1 w
|
||||
X PERp4 A35 600 -3800 150 L 50 50 1 1 I
|
||||
X PERn4 A36 600 -3900 150 L 50 50 1 1 I
|
||||
X GND A37 600 -4000 150 L 50 50 1 1 w
|
||||
X GND A38 600 -4100 150 L 50 50 1 1 w
|
||||
X PERp5 A39 600 -4200 150 L 50 50 1 1 I
|
||||
X GND A4 600 -400 150 L 50 50 1 1 w
|
||||
X PERn5 A40 600 -4300 150 L 50 50 1 1 I
|
||||
X GND A41 600 -4400 150 L 50 50 1 1 w
|
||||
X GND A42 600 -4500 150 L 50 50 1 1 w
|
||||
X PERp6 A43 600 -4600 150 L 50 50 1 1 I
|
||||
X PERn6 A44 600 -4700 150 L 50 50 1 1 I
|
||||
X GND A45 600 -4800 150 L 50 50 1 1 w
|
||||
X GND A46 600 -4900 150 L 50 50 1 1 w
|
||||
X PERp7 A47 600 -5000 150 L 50 50 1 1 I
|
||||
X PERn7 A48 600 -5100 150 L 50 50 1 1 I
|
||||
X GND A49 600 -5200 150 L 50 50 1 1 w
|
||||
X TCK A5 600 -500 150 L 50 50 1 1 O
|
||||
X RSVD A50 600 -5400 150 L 50 50 1 1 N
|
||||
X GND A51 600 -5500 150 L 50 50 1 1 w
|
||||
X PERp8 A52 600 -5600 150 L 50 50 1 1 I
|
||||
X PERn8 A53 600 -5700 150 L 50 50 1 1 I
|
||||
X GND A54 600 -5800 150 L 50 50 1 1 w
|
||||
X GND A55 600 -5900 150 L 50 50 1 1 w
|
||||
X PERp9 A56 600 -6000 150 L 50 50 1 1 I
|
||||
X PERn9 A57 600 -6100 150 L 50 50 1 1 I
|
||||
X GND A58 600 -6200 150 L 50 50 1 1 w
|
||||
X GND A59 600 -6300 150 L 50 50 1 1 w
|
||||
X TDI A6 600 -600 150 L 50 50 1 1 O
|
||||
X PERp10 A60 600 -6400 150 L 50 50 1 1 I
|
||||
X PERn10 A61 600 -6500 150 L 50 50 1 1 I
|
||||
X GND A62 600 -6600 150 L 50 50 1 1 w
|
||||
X GND A63 600 -6700 150 L 50 50 1 1 w
|
||||
X PERp11 A64 600 -6800 150 L 50 50 1 1 I
|
||||
X PERn11 A65 600 -6900 150 L 50 50 1 1 I
|
||||
X GND A66 600 -7000 150 L 50 50 1 1 w
|
||||
X GND A67 600 -7100 150 L 50 50 1 1 w
|
||||
X PERp12 A68 600 -7200 150 L 50 50 1 1 I
|
||||
X PERn12 A69 600 -7300 150 L 50 50 1 1 I
|
||||
X TDO A7 600 -700 150 L 50 50 1 1 I
|
||||
X GND A70 600 -7400 150 L 50 50 1 1 w
|
||||
X GND A71 600 -7500 150 L 50 50 1 1 w
|
||||
X PERp13 A72 600 -7600 150 L 50 50 1 1 I
|
||||
X PERn13 A73 600 -7700 150 L 50 50 1 1 I
|
||||
X GND A74 600 -7800 150 L 50 50 1 1 w
|
||||
X GND A75 600 -7900 150 L 50 50 1 1 w
|
||||
X PERp14 A76 600 -8000 150 L 50 50 1 1 I
|
||||
X PERn14 A77 600 -8100 150 L 50 50 1 1 I
|
||||
X GND A78 600 -8200 150 L 50 50 1 1 w
|
||||
X GND A79 600 -8300 150 L 50 50 1 1 w
|
||||
X TMS A8 600 -800 150 L 50 50 1 1 O
|
||||
X PERp15 A80 600 -8400 150 L 50 50 1 1 I
|
||||
X PERn15 A81 600 -8500 150 L 50 50 1 1 I
|
||||
X GND A82 600 -8600 150 L 50 50 1 1 w
|
||||
X +3.3V A9 600 -900 150 L 50 50 1 1 w
|
||||
X +12V B1 -600 -100 150 R 50 50 1 1 w
|
||||
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
|
||||
X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
|
||||
X RSVD B12 -600 -1300 150 R 50 50 1 1 N
|
||||
X GND B13 -600 -1400 150 R 50 50 1 1 w
|
||||
X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
|
||||
X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
|
||||
X GND B16 -600 -1700 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B17 -600 -1800 150 R 50 50 1 1 P
|
||||
X GND B18 -600 -1900 150 R 50 50 1 1 w
|
||||
X PETp1 B19 -600 -2100 150 R 50 50 1 1 O
|
||||
X +12V B2 -600 -200 150 R 50 50 1 1 w
|
||||
X PETn1 B20 -600 -2200 150 R 50 50 1 1 O
|
||||
X GND B21 -600 -2300 150 R 50 50 1 1 w
|
||||
X GND B22 -600 -2400 150 R 50 50 1 1 w
|
||||
X PETp2 B23 -600 -2500 150 R 50 50 1 1 O
|
||||
X PETn2 B24 -600 -2600 150 R 50 50 1 1 O
|
||||
X GND B25 -600 -2700 150 R 50 50 1 1 w
|
||||
X GND B26 -600 -2800 150 R 50 50 1 1 w
|
||||
X PETp3 B27 -600 -2900 150 R 50 50 1 1 O
|
||||
X PETn3 B28 -600 -3000 150 R 50 50 1 1 O
|
||||
X GND B29 -600 -3100 150 R 50 50 1 1 w
|
||||
X +12V B3 -600 -300 150 R 50 50 1 1 w
|
||||
X RSVD B30 -600 -3200 150 R 50 50 1 1 N
|
||||
X ~PRSNT2 B31 -600 -3300 150 R 50 50 1 1 P
|
||||
X GND B32 -600 -3400 150 R 50 50 1 1 w
|
||||
X PETp4 B33 -600 -3600 150 R 50 50 1 1 O
|
||||
X PETn4 B34 -600 -3700 150 R 50 50 1 1 O
|
||||
X GND B35 -600 -3800 150 R 50 50 1 1 w
|
||||
X GND B36 -600 -3900 150 R 50 50 1 1 w
|
||||
X PETp5 B37 -600 -4000 150 R 50 50 1 1 O
|
||||
X PETn5 B38 -600 -4100 150 R 50 50 1 1 O
|
||||
X GND B39 -600 -4200 150 R 50 50 1 1 w
|
||||
X GND B4 -600 -400 150 R 50 50 1 1 w
|
||||
X GND B40 -600 -4300 150 R 50 50 1 1 w
|
||||
X PETp6 B41 -600 -4400 150 R 50 50 1 1 O
|
||||
X PETn6 B42 -600 -4500 150 R 50 50 1 1 O
|
||||
X GND B43 -600 -4600 150 R 50 50 1 1 w
|
||||
X GND B44 -600 -4700 150 R 50 50 1 1 w
|
||||
X PETp7 B45 -600 -4800 150 R 50 50 1 1 O
|
||||
X PETn7 B46 -600 -4900 150 R 50 50 1 1 O
|
||||
X GND B47 -600 -5000 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B48 -600 -5100 150 R 50 50 1 1 P
|
||||
X GND B49 -600 -5200 150 R 50 50 1 1 w
|
||||
X SMCLK B5 -600 -500 150 R 50 50 1 1 C
|
||||
X PETp8 B50 -600 -5400 150 R 50 50 1 1 O
|
||||
X PETn8 B51 -600 -5500 150 R 50 50 1 1 O
|
||||
X GND B52 -600 -5600 150 R 50 50 1 1 w
|
||||
X GND B53 -600 -5700 150 R 50 50 1 1 w
|
||||
X PETp9 B54 -600 -5800 150 R 50 50 1 1 O
|
||||
X PETn9 B55 -600 -5900 150 R 50 50 1 1 O
|
||||
X GND B56 -600 -6000 150 R 50 50 1 1 w
|
||||
X GND B57 -600 -6100 150 R 50 50 1 1 w
|
||||
X PETp10 B58 -600 -6200 150 R 50 50 1 1 O
|
||||
X PETn10 B59 -600 -6300 150 R 50 50 1 1 O
|
||||
X SMDAT B6 -600 -600 150 R 50 50 1 1 C
|
||||
X GND B60 -600 -6400 150 R 50 50 1 1 w
|
||||
X GND B61 -600 -6500 150 R 50 50 1 1 w
|
||||
X PETp11 B62 -600 -6600 150 R 50 50 1 1 O
|
||||
X PETn11 B63 -600 -6700 150 R 50 50 1 1 O
|
||||
X GND B64 -600 -6800 150 R 50 50 1 1 w
|
||||
X GND B65 -600 -6900 150 R 50 50 1 1 w
|
||||
X PETp12 B66 -600 -7000 150 R 50 50 1 1 O
|
||||
X PETn12 B67 -600 -7100 150 R 50 50 1 1 O
|
||||
X GND B68 -600 -7200 150 R 50 50 1 1 w
|
||||
X GND B69 -600 -7300 150 R 50 50 1 1 w
|
||||
X GND B7 -600 -700 150 R 50 50 1 1 w
|
||||
X PETp13 B70 -600 -7400 150 R 50 50 1 1 O
|
||||
X PETn13 B71 -600 -7500 150 R 50 50 1 1 O
|
||||
X GND B72 -600 -7600 150 R 50 50 1 1 w
|
||||
X GND B73 -600 -7700 150 R 50 50 1 1 w
|
||||
X PETp14 B74 -600 -7800 150 R 50 50 1 1 O
|
||||
X PETn14 B75 -600 -7900 150 R 50 50 1 1 O
|
||||
X GND B76 -600 -8000 150 R 50 50 1 1 w
|
||||
X GND B77 -600 -8100 150 R 50 50 1 1 w
|
||||
X PETp15 B78 -600 -8200 150 R 50 50 1 1 O
|
||||
X PETn15 B79 -600 -8300 150 R 50 50 1 1 O
|
||||
X +3.3V B8 -600 -800 150 R 50 50 1 1 w
|
||||
X GND B80 -600 -8400 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B81 -600 -8500 150 R 50 50 1 1 P
|
||||
X RSVD B82 -600 -8600 150 R 50 50 1 1 N
|
||||
X ~TRST B9 -600 -900 150 R 50 50 1 1 O
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+12V
|
||||
#
|
||||
DEF power_+12V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+12V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +12V 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3V
|
||||
#
|
||||
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS +3.3V
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3V3 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3VA
|
||||
#
|
||||
DEF power_+3.3VA #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3VA" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3.3VA 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GND
|
||||
#
|
||||
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GND" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
File diff suppressed because it is too large
Load Diff
746
PCIexpress_x16_low/PCIexpress_x16_low.kicad_pro
Normal file
746
PCIexpress_x16_low/PCIexpress_x16_low.kicad_pro
Normal file
@ -0,0 +1,746 @@
|
||||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.049999999999999996,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 0.762,
|
||||
"height": 1.524,
|
||||
"width": 1.524
|
||||
},
|
||||
"silk_line_width": 0.12,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.508
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"filename": "board_design_settings.json",
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint_type_mismatch": "error",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rule_severitieslegacy_courtyards_overlap": true,
|
||||
"rule_severitieslegacy_no_courtyard_defined": false,
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_copper_edge_clearance": 0.075,
|
||||
"min_hole_clearance": 0.25,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_through_hole_diameter": 0.19999999999999998,
|
||||
"min_track_width": 0.08889999999999999,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.44999999999999996,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [
|
||||
0.0,
|
||||
0.0889,
|
||||
0.127,
|
||||
0.2
|
||||
],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
},
|
||||
{
|
||||
"diameter": 0.45,
|
||||
"drill": 0.2
|
||||
},
|
||||
{
|
||||
"diameter": 0.5,
|
||||
"drill": 0.25
|
||||
},
|
||||
{
|
||||
"diameter": 0.55,
|
||||
"drill": 0.3
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"pin_map": [
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_label_syntax": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "PCIexpress_x16_low.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.0889,
|
||||
"diff_pair_gap": 0.2,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.0889,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.2,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.2,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Diff-100-PCIe",
|
||||
"nets": [
|
||||
"/PCIexpress_connector/_PER0_N",
|
||||
"/PCIexpress_connector/_PER0_P",
|
||||
"/PCIexpress_connector/_PER10_N",
|
||||
"/PCIexpress_connector/_PER10_P",
|
||||
"/PCIexpress_connector/_PER11_N",
|
||||
"/PCIexpress_connector/_PER11_P",
|
||||
"/PCIexpress_connector/_PER12_N",
|
||||
"/PCIexpress_connector/_PER12_P",
|
||||
"/PCIexpress_connector/_PER13_N",
|
||||
"/PCIexpress_connector/_PER13_P",
|
||||
"/PCIexpress_connector/_PER14_N",
|
||||
"/PCIexpress_connector/_PER14_P",
|
||||
"/PCIexpress_connector/_PER15_N",
|
||||
"/PCIexpress_connector/_PER15_P",
|
||||
"/PCIexpress_connector/_PER1_N",
|
||||
"/PCIexpress_connector/_PER1_P",
|
||||
"/PCIexpress_connector/_PER2_N",
|
||||
"/PCIexpress_connector/_PER2_P",
|
||||
"/PCIexpress_connector/_PER3_N",
|
||||
"/PCIexpress_connector/_PER3_P",
|
||||
"/PCIexpress_connector/_PER4_N",
|
||||
"/PCIexpress_connector/_PER4_P",
|
||||
"/PCIexpress_connector/_PER5_N",
|
||||
"/PCIexpress_connector/_PER5_P",
|
||||
"/PCIexpress_connector/_PER6_N",
|
||||
"/PCIexpress_connector/_PER6_P",
|
||||
"/PCIexpress_connector/_PER7_N",
|
||||
"/PCIexpress_connector/_PER7_P",
|
||||
"/PCIexpress_connector/_PER8_N",
|
||||
"/PCIexpress_connector/_PER8_P",
|
||||
"/PCIexpress_connector/_PER9_N",
|
||||
"/PCIexpress_connector/_PER9_P",
|
||||
"/PER0_N",
|
||||
"/PER0_P",
|
||||
"/PER10_N",
|
||||
"/PER10_P",
|
||||
"/PER11_N",
|
||||
"/PER11_P",
|
||||
"/PER12_N",
|
||||
"/PER12_P",
|
||||
"/PER13_N",
|
||||
"/PER13_P",
|
||||
"/PER14_N",
|
||||
"/PER14_P",
|
||||
"/PER15_N",
|
||||
"/PER15_P",
|
||||
"/PER1_N",
|
||||
"/PER1_P",
|
||||
"/PER2_N",
|
||||
"/PER2_P",
|
||||
"/PER3_N",
|
||||
"/PER3_P",
|
||||
"/PER4_N",
|
||||
"/PER4_P",
|
||||
"/PER5_N",
|
||||
"/PER5_P",
|
||||
"/PER6_N",
|
||||
"/PER6_P",
|
||||
"/PER7_N",
|
||||
"/PER7_P",
|
||||
"/PER8_N",
|
||||
"/PER8_P",
|
||||
"/PER9_N",
|
||||
"/PER9_P",
|
||||
"/PET0_N",
|
||||
"/PET0_P",
|
||||
"/PET10_N",
|
||||
"/PET10_P",
|
||||
"/PET11_N",
|
||||
"/PET11_P",
|
||||
"/PET12_N",
|
||||
"/PET12_P",
|
||||
"/PET13_N",
|
||||
"/PET13_P",
|
||||
"/PET14_N",
|
||||
"/PET14_P",
|
||||
"/PET15_N",
|
||||
"/PET15_P",
|
||||
"/PET1_N",
|
||||
"/PET1_P",
|
||||
"/PET2_N",
|
||||
"/PET2_P",
|
||||
"/PET3_N",
|
||||
"/PET3_P",
|
||||
"/PET4_N",
|
||||
"/PET4_P",
|
||||
"/PET5_N",
|
||||
"/PET5_P",
|
||||
"/PET6_N",
|
||||
"/PET6_P",
|
||||
"/PET7_N",
|
||||
"/PET7_P",
|
||||
"/PET8_N",
|
||||
"/PET8_P",
|
||||
"/PET9_N",
|
||||
"/PET9_P",
|
||||
"/REFCLK+",
|
||||
"/REFCLK-"
|
||||
],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.0889,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.2,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.1,
|
||||
"diff_pair_gap": 0.1016,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.0889,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "JLC2313-100d-3.5",
|
||||
"nets": [],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.0889,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.2,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.1,
|
||||
"diff_pair_gap": 0.127,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.1016,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "JLC2313-100d-4",
|
||||
"nets": [],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.0889,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.2,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.2032,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2032,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "JLC7628-100d-8",
|
||||
"nets": [],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.0889,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.2,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"drawing": {
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.25,
|
||||
"pin_symbol_size": 0.0,
|
||||
"text_offset_ratio": 0.08
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "",
|
||||
"ngspice": {
|
||||
"fix_include_paths": true,
|
||||
"fix_passive_vals": false,
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"model_mode": 0,
|
||||
"workbook_filename": ""
|
||||
},
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"471e4bd0-31ab-43fd-9948-a6786f2fab83",
|
||||
""
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d508b15",
|
||||
"PCIexpress_connector"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d516dfb",
|
||||
"term"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d5df906",
|
||||
"sheet5D5DF900"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d761049",
|
||||
"sheet5D761043"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d76cfc3",
|
||||
"sheet5D76CFBD"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d87b438",
|
||||
"sheet5D87B424"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d87b440",
|
||||
"sheet5D87B425"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d87b446",
|
||||
"sheet5D87B426"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d88a9fd",
|
||||
"sheet5D88A9F3"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9667f2",
|
||||
"sheet5D9667E9"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9667fa",
|
||||
"sheet5D9667EA"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9e5907",
|
||||
"sheet5D9E58F4"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9e590d",
|
||||
"sheet5D9E58F5"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9e5913",
|
||||
"sheet5D9E58F6"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9e5919",
|
||||
"sheet5D9E58F7"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9e5923",
|
||||
"sheet5D9E58F8"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d9e5929",
|
||||
"sheet5D9E58F9"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dab5272",
|
||||
"decap"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005db8e95f",
|
||||
"sheet5DB8E955"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dba1257",
|
||||
"sheet5DBA124D"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbb44a0",
|
||||
"sheet5DBB4496"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbc901f",
|
||||
"sheet5DBC9013"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbc9029",
|
||||
"sheet5DBC9014"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbc9033",
|
||||
"sheet5DBC9015"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbde98a",
|
||||
"sheet5DBDE980"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbf611b",
|
||||
"sheet5DBF610E"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbf6125",
|
||||
"sheet5DBF610F"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbf612f",
|
||||
"sheet5DBF6110"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dbf6139",
|
||||
"sheet5DBF6111"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dc10432",
|
||||
"sheet5DC10425"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dc1043c",
|
||||
"sheet5DC10426"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dc10446",
|
||||
"sheet5DC10427"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005dc10450",
|
||||
"sheet5DC10428"
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
||||
1347
PCIexpress_x16_low/PCIexpress_x16_low.kicad_sch
Normal file
1347
PCIexpress_x16_low/PCIexpress_x16_low.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
@ -1,294 +0,0 @@
|
||||
update=ven 26 lug 2019 22:25:34 CEST
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=4
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.08889999999999999
|
||||
MinViaDiameter=0.45
|
||||
MinViaDrill=0.2
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.0889
|
||||
TrackWidth2=0.0889
|
||||
TrackWidth3=0.127
|
||||
TrackWidth4=0.2
|
||||
ViaDiameter1=0.45
|
||||
ViaDrill1=0.2
|
||||
ViaDiameter2=0.45
|
||||
ViaDrill2=0.2
|
||||
ViaDiameter3=0.5
|
||||
ViaDrill3=0.25
|
||||
ViaDiameter4=0.55
|
||||
ViaDrill4=0.3
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.2
|
||||
dPairViaGap1=0.25
|
||||
dPairWidth2=0.2
|
||||
dPairGap2=0.2
|
||||
dPairViaGap2=0.2
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.051
|
||||
SolderMaskMinWidth=0.25
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.0889
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.2
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/1]
|
||||
Name=Diff-100-PCIe
|
||||
Clearance=0.2
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.2
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/2]
|
||||
Name=JLC2313-100d-3.5
|
||||
Clearance=0.1
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.0889
|
||||
dPairGap=0.1016
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/3]
|
||||
Name=JLC2313-100d-4
|
||||
Clearance=0.1
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.1016
|
||||
dPairGap=0.127
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/4]
|
||||
Name=JLC7628-100d-8
|
||||
Clearance=0.2
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2032
|
||||
dPairGap=0.2032
|
||||
dPairViaGap=0.25
|
||||
@ -1,423 +0,0 @@
|
||||
EESchema Schematic File Version 4
|
||||
LIBS:PCIexpress_x16_low-cache
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 34
|
||||
Title "PCIexpress_x16_low"
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp "Author: Luca Anastasio"
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Sheet
|
||||
S 1350 1050 900 5200
|
||||
U 5D508B15
|
||||
F0 "PCIexpress_connector" 50
|
||||
F1 "PCIexpress_connector.sch" 50
|
||||
F2 "PET0_P" O R 2250 2300 50
|
||||
F3 "PET0_N" O R 2250 2400 50
|
||||
F4 "REFCLK+" O R 2250 2000 50
|
||||
F5 "REFCLK-" O R 2250 2100 50
|
||||
F6 "~PRSNT2x16" U L 1350 1550 50
|
||||
F7 "TDO" I L 1350 1700 50
|
||||
F8 "TMS" O R 2250 1400 50
|
||||
F9 "TDI" O R 2250 1600 50
|
||||
F10 "TCK" O R 2250 1500 50
|
||||
F11 "PET1_P" O R 2250 2550 50
|
||||
F12 "PET1_N" O R 2250 2650 50
|
||||
F13 "PET2_P" O R 2250 2800 50
|
||||
F14 "PET2_N" O R 2250 2900 50
|
||||
F15 "PET3_P" O R 2250 3050 50
|
||||
F16 "PET3_N" O R 2250 3150 50
|
||||
F17 "PER1_P" I L 1350 2550 50
|
||||
F18 "PER1_N" I L 1350 2650 50
|
||||
F19 "PER2_P" I L 1350 2800 50
|
||||
F20 "PER2_N" I L 1350 2900 50
|
||||
F21 "PER3_P" I L 1350 3050 50
|
||||
F22 "PER3_N" I L 1350 3150 50
|
||||
F23 "PER4_P" I L 1350 3300 50
|
||||
F24 "PER4_N" I L 1350 3400 50
|
||||
F25 "PER5_P" I L 1350 3550 50
|
||||
F26 "PER5_N" I L 1350 3650 50
|
||||
F27 "PER6_P" I L 1350 3800 50
|
||||
F28 "PER6_N" I L 1350 3900 50
|
||||
F29 "PER7_P" I L 1350 4050 50
|
||||
F30 "PER7_N" I L 1350 4150 50
|
||||
F31 "~WAKE" I L 1350 1850 50
|
||||
F32 "~TRST" O R 2250 1700 50
|
||||
F33 "SMCLK" B L 1350 2000 50
|
||||
F34 "SMDAT" B L 1350 2100 50
|
||||
F35 "~PERST" O R 2250 1850 50
|
||||
F36 "~PRSNT1" U L 1350 1150 50
|
||||
F37 "~PRSNT2x8" U L 1350 1450 50
|
||||
F38 "~PRSNT2x4" U L 1350 1350 50
|
||||
F39 "~PRSNT2x1" U L 1350 1250 50
|
||||
F40 "PET4_P" O R 2250 3300 50
|
||||
F41 "PET4_N" O R 2250 3400 50
|
||||
F42 "PET5_P" O R 2250 3550 50
|
||||
F43 "PET5_N" O R 2250 3650 50
|
||||
F44 "PET6_P" O R 2250 3800 50
|
||||
F45 "PET6_N" O R 2250 3900 50
|
||||
F46 "PET7_P" O R 2250 4050 50
|
||||
F47 "PET7_N" O R 2250 4150 50
|
||||
F48 "PER0_N" I L 1350 2400 50
|
||||
F49 "PER0_P" I L 1350 2300 50
|
||||
F50 "PER8_P" I L 1350 4300 50
|
||||
F51 "PER8_N" I L 1350 4400 50
|
||||
F52 "PER9_P" I L 1350 4550 50
|
||||
F53 "PER9_N" I L 1350 4650 50
|
||||
F54 "PET8_P" O R 2250 4300 50
|
||||
F55 "PET8_N" O R 2250 4400 50
|
||||
F56 "PET9_P" O R 2250 4550 50
|
||||
F57 "PET9_N" O R 2250 4650 50
|
||||
F58 "PER11_P" I L 1350 5050 50
|
||||
F59 "PER11_N" I L 1350 5150 50
|
||||
F60 "PER12_P" I L 1350 5300 50
|
||||
F61 "PER12_N" I L 1350 5400 50
|
||||
F62 "PER13_P" I L 1350 5550 50
|
||||
F63 "PER13_N" I L 1350 5650 50
|
||||
F64 "PER14_P" I L 1350 5800 50
|
||||
F65 "PER14_N" I L 1350 5900 50
|
||||
F66 "PER15_P" I L 1350 6050 50
|
||||
F67 "PER15_N" I L 1350 6150 50
|
||||
F68 "PER10_N" I L 1350 4900 50
|
||||
F69 "PER10_P" I L 1350 4800 50
|
||||
F70 "PET10_P" O R 2250 4800 50
|
||||
F71 "PET10_N" O R 2250 4900 50
|
||||
F72 "PET11_P" O R 2250 5050 50
|
||||
F73 "PET11_N" O R 2250 5150 50
|
||||
F74 "PET12_P" O R 2250 5300 50
|
||||
F75 "PET12_N" O R 2250 5400 50
|
||||
F76 "PET13_P" O R 2250 5550 50
|
||||
F77 "PET13_N" O R 2250 5650 50
|
||||
F78 "PET14_P" O R 2250 5800 50
|
||||
F79 "PET14_N" O R 2250 5900 50
|
||||
F80 "PET15_P" O R 2250 6050 50
|
||||
F81 "PET15_N" O R 2250 6150 50
|
||||
$EndSheet
|
||||
Text Label 2350 2400 0 50 ~ 0
|
||||
PET0_N
|
||||
Text Label 2350 2300 0 50 ~ 0
|
||||
PET0_P
|
||||
Text Label 2350 2650 0 50 ~ 0
|
||||
PET1_N
|
||||
Text Label 2350 2550 0 50 ~ 0
|
||||
PET1_P
|
||||
Text Label 2350 2900 0 50 ~ 0
|
||||
PET2_N
|
||||
Text Label 2350 2800 0 50 ~ 0
|
||||
PET2_P
|
||||
Text Label 2350 3150 0 50 ~ 0
|
||||
PET3_N
|
||||
Text Label 2350 3050 0 50 ~ 0
|
||||
PET3_P
|
||||
Text Label 2350 3400 0 50 ~ 0
|
||||
PET4_N
|
||||
Text Label 2350 3300 0 50 ~ 0
|
||||
PET4_P
|
||||
Text Label 2350 3650 0 50 ~ 0
|
||||
PET5_N
|
||||
Text Label 2350 3550 0 50 ~ 0
|
||||
PET5_P
|
||||
Text Label 2350 3900 0 50 ~ 0
|
||||
PET6_N
|
||||
Text Label 2350 3800 0 50 ~ 0
|
||||
PET6_P
|
||||
Text Label 2350 4150 0 50 ~ 0
|
||||
PET7_N
|
||||
Text Label 2350 4050 0 50 ~ 0
|
||||
PET7_P
|
||||
Text Label 2350 4400 0 50 ~ 0
|
||||
PET8_N
|
||||
Text Label 2350 4300 0 50 ~ 0
|
||||
PET8_P
|
||||
Text Label 2350 4650 0 50 ~ 0
|
||||
PET9_N
|
||||
Text Label 2350 4550 0 50 ~ 0
|
||||
PET9_P
|
||||
Text Label 2350 4900 0 50 ~ 0
|
||||
PET10_N
|
||||
Text Label 2350 4800 0 50 ~ 0
|
||||
PET10_P
|
||||
Text Label 2350 5150 0 50 ~ 0
|
||||
PET11_N
|
||||
Text Label 2350 5050 0 50 ~ 0
|
||||
PET11_P
|
||||
Text Label 2350 5400 0 50 ~ 0
|
||||
PET12_N
|
||||
Text Label 2350 5300 0 50 ~ 0
|
||||
PET12_P
|
||||
Text Label 2350 5650 0 50 ~ 0
|
||||
PET13_N
|
||||
Text Label 2350 5550 0 50 ~ 0
|
||||
PET13_P
|
||||
Text Label 2350 5900 0 50 ~ 0
|
||||
PET14_N
|
||||
Text Label 2350 5800 0 50 ~ 0
|
||||
PET14_P
|
||||
Text Label 2350 6150 0 50 ~ 0
|
||||
PET15_N
|
||||
Text Label 2350 6050 0 50 ~ 0
|
||||
PET15_P
|
||||
Text Label 1250 2400 2 50 ~ 0
|
||||
PER0_N
|
||||
Text Label 1250 2300 2 50 ~ 0
|
||||
PER0_P
|
||||
Text Label 1250 2650 2 50 ~ 0
|
||||
PER1_N
|
||||
Text Label 1250 2550 2 50 ~ 0
|
||||
PER1_P
|
||||
Text Label 1250 2900 2 50 ~ 0
|
||||
PER2_N
|
||||
Text Label 1250 2800 2 50 ~ 0
|
||||
PER2_P
|
||||
Text Label 1250 3150 2 50 ~ 0
|
||||
PER3_N
|
||||
Text Label 1250 3050 2 50 ~ 0
|
||||
PER3_P
|
||||
Text Label 1250 3400 2 50 ~ 0
|
||||
PER4_N
|
||||
Text Label 1250 3300 2 50 ~ 0
|
||||
PER4_P
|
||||
Text Label 1250 3650 2 50 ~ 0
|
||||
PER5_N
|
||||
Text Label 1250 3550 2 50 ~ 0
|
||||
PER5_P
|
||||
Text Label 1250 3900 2 50 ~ 0
|
||||
PER6_N
|
||||
Text Label 1250 3800 2 50 ~ 0
|
||||
PER6_P
|
||||
Text Label 1250 4150 2 50 ~ 0
|
||||
PER7_N
|
||||
Text Label 1250 4050 2 50 ~ 0
|
||||
PER7_P
|
||||
Text Label 1250 4400 2 50 ~ 0
|
||||
PER8_N
|
||||
Text Label 1250 4300 2 50 ~ 0
|
||||
PER8_P
|
||||
Text Label 1250 4650 2 50 ~ 0
|
||||
PER9_N
|
||||
Text Label 1250 4550 2 50 ~ 0
|
||||
PER9_P
|
||||
Text Label 1250 4900 2 50 ~ 0
|
||||
PER10_N
|
||||
Text Label 1250 4800 2 50 ~ 0
|
||||
PER10_P
|
||||
Text Label 1250 5150 2 50 ~ 0
|
||||
PER11_N
|
||||
Text Label 1250 5050 2 50 ~ 0
|
||||
PER11_P
|
||||
Text Label 1250 5400 2 50 ~ 0
|
||||
PER12_N
|
||||
Text Label 1250 5300 2 50 ~ 0
|
||||
PER12_P
|
||||
Text Label 1250 5650 2 50 ~ 0
|
||||
PER13_N
|
||||
Text Label 1250 5550 2 50 ~ 0
|
||||
PER13_P
|
||||
Text Label 1250 5900 2 50 ~ 0
|
||||
PER14_N
|
||||
Text Label 1250 5800 2 50 ~ 0
|
||||
PER14_P
|
||||
Text Label 1250 6150 2 50 ~ 0
|
||||
PER15_N
|
||||
Text Label 1250 6050 2 50 ~ 0
|
||||
PER15_P
|
||||
Wire Wire Line
|
||||
1250 6150 1350 6150
|
||||
Wire Wire Line
|
||||
1250 6050 1350 6050
|
||||
Wire Wire Line
|
||||
1250 5900 1350 5900
|
||||
Wire Wire Line
|
||||
1250 5800 1350 5800
|
||||
Wire Wire Line
|
||||
1250 5650 1350 5650
|
||||
Wire Wire Line
|
||||
1250 5550 1350 5550
|
||||
Wire Wire Line
|
||||
1250 5400 1350 5400
|
||||
Wire Wire Line
|
||||
1250 5300 1350 5300
|
||||
Wire Wire Line
|
||||
2250 6150 2350 6150
|
||||
Wire Wire Line
|
||||
2250 6050 2350 6050
|
||||
Wire Wire Line
|
||||
2250 5900 2350 5900
|
||||
Wire Wire Line
|
||||
2250 5800 2350 5800
|
||||
Wire Wire Line
|
||||
2250 5650 2350 5650
|
||||
Wire Wire Line
|
||||
2250 5550 2350 5550
|
||||
Wire Wire Line
|
||||
2250 5400 2350 5400
|
||||
Wire Wire Line
|
||||
2250 5300 2350 5300
|
||||
Wire Wire Line
|
||||
2250 5150 2350 5150
|
||||
Wire Wire Line
|
||||
2250 5050 2350 5050
|
||||
Wire Wire Line
|
||||
2250 4900 2350 4900
|
||||
Wire Wire Line
|
||||
2250 4800 2350 4800
|
||||
Wire Wire Line
|
||||
1250 5150 1350 5150
|
||||
Wire Wire Line
|
||||
1250 5050 1350 5050
|
||||
Wire Wire Line
|
||||
1250 4900 1350 4900
|
||||
Wire Wire Line
|
||||
1250 4800 1350 4800
|
||||
Wire Wire Line
|
||||
1250 4650 1350 4650
|
||||
Wire Wire Line
|
||||
1250 4550 1350 4550
|
||||
Wire Wire Line
|
||||
1250 4400 1350 4400
|
||||
Wire Wire Line
|
||||
1250 4300 1350 4300
|
||||
Wire Wire Line
|
||||
2250 4650 2350 4650
|
||||
Wire Wire Line
|
||||
2250 4550 2350 4550
|
||||
Wire Wire Line
|
||||
2250 4400 2350 4400
|
||||
Wire Wire Line
|
||||
2250 4300 2350 4300
|
||||
Wire Wire Line
|
||||
2250 4150 2350 4150
|
||||
Wire Wire Line
|
||||
2250 4050 2350 4050
|
||||
Wire Wire Line
|
||||
2250 3900 2350 3900
|
||||
Wire Wire Line
|
||||
2250 3800 2350 3800
|
||||
Wire Wire Line
|
||||
2250 3650 2350 3650
|
||||
Wire Wire Line
|
||||
2250 3550 2350 3550
|
||||
Wire Wire Line
|
||||
2250 3400 2350 3400
|
||||
Wire Wire Line
|
||||
2250 3300 2350 3300
|
||||
Wire Wire Line
|
||||
2250 3150 2350 3150
|
||||
Wire Wire Line
|
||||
2250 3050 2350 3050
|
||||
Wire Wire Line
|
||||
2250 2900 2350 2900
|
||||
Wire Wire Line
|
||||
2250 2800 2350 2800
|
||||
Wire Wire Line
|
||||
1250 4150 1350 4150
|
||||
Wire Wire Line
|
||||
1250 4050 1350 4050
|
||||
Wire Wire Line
|
||||
1250 3900 1350 3900
|
||||
Wire Wire Line
|
||||
1250 3800 1350 3800
|
||||
Wire Wire Line
|
||||
1250 3650 1350 3650
|
||||
Wire Wire Line
|
||||
1250 3550 1350 3550
|
||||
Wire Wire Line
|
||||
1250 3400 1350 3400
|
||||
Wire Wire Line
|
||||
1250 3300 1350 3300
|
||||
Wire Wire Line
|
||||
1250 3150 1350 3150
|
||||
Wire Wire Line
|
||||
1250 3050 1350 3050
|
||||
Wire Wire Line
|
||||
1250 2900 1350 2900
|
||||
Wire Wire Line
|
||||
1250 2800 1350 2800
|
||||
Wire Wire Line
|
||||
1250 2650 1350 2650
|
||||
Wire Wire Line
|
||||
1250 2550 1350 2550
|
||||
Wire Wire Line
|
||||
1250 2400 1350 2400
|
||||
Wire Wire Line
|
||||
1250 2300 1350 2300
|
||||
Wire Wire Line
|
||||
2250 2650 2350 2650
|
||||
Wire Wire Line
|
||||
2250 2550 2350 2550
|
||||
Wire Wire Line
|
||||
2250 2400 2350 2400
|
||||
Wire Wire Line
|
||||
2250 2300 2350 2300
|
||||
Text Label 2350 2000 0 50 ~ 0
|
||||
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130
PCIexpress_x16_low/decap.kicad_sch
Normal file
130
PCIexpress_x16_low/decap.kicad_sch
Normal file
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@ -1,89 +0,0 @@
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EESchema Schematic File Version 4
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LIBS:PCIexpress_x16_low-cache
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EELAYER 30 0
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EELAYER END
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@ -1,3 +1,3 @@
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|
||||
220
PCIexpress_x16_low/term.kicad_sch
Normal file
220
PCIexpress_x16_low/term.kicad_sch
Normal file
@ -0,0 +1,220 @@
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994
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994
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|
||||
F 3 "" H 4950 1900 50 0001 C CNN
|
||||
1 4950 1900
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+3.3VA #PWR?
|
||||
U 1 1 5D51AE9C
|
||||
P 3350 1900
|
||||
AR Path="/5D51AE9C" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D508B15/5D51AE9C" Ref="#PWR0106" Part="1"
|
||||
F 0 "#PWR0106" H 3350 1750 50 0001 C CNN
|
||||
F 1 "+3.3VA" V 3365 2027 50 0000 L CNN
|
||||
F 2 "" H 3350 1900 50 0001 C CNN
|
||||
F 3 "" H 3350 1900 50 0001 C CNN
|
||||
1 3350 1900
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+12V #PWR?
|
||||
U 1 1 5D51AEA2
|
||||
P 3450 900
|
||||
AR Path="/5D51AEA2" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D508B15/5D51AEA2" Ref="#PWR0107" Part="1"
|
||||
F 0 "#PWR0107" H 3450 750 50 0001 C CNN
|
||||
F 1 "+12V" H 3465 1073 50 0000 C CNN
|
||||
F 2 "" H 3450 900 50 0001 C CNN
|
||||
F 3 "" H 3450 900 50 0001 C CNN
|
||||
1 3450 900
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+12V #PWR?
|
||||
U 1 1 5D51AEA8
|
||||
P 4850 900
|
||||
AR Path="/5D51AEA8" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D508B15/5D51AEA8" Ref="#PWR0108" Part="1"
|
||||
F 0 "#PWR0108" H 4850 750 50 0001 C CNN
|
||||
F 1 "+12V" H 4865 1073 50 0000 C CNN
|
||||
F 2 "" H 4850 900 50 0001 C CNN
|
||||
F 3 "" H 4850 900 50 0001 C CNN
|
||||
1 4850 900
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text HLabel 2000 2400 0 50 Output ~ 0
|
||||
PET0_P
|
||||
Text HLabel 2000 2500 0 50 Output ~ 0
|
||||
PET0_N
|
||||
Text HLabel 4950 2300 2 50 Output ~ 0
|
||||
REFCLK+
|
||||
Text HLabel 4950 2400 2 50 Output ~ 0
|
||||
REFCLK-
|
||||
Text Notes 2800 2150 2 50 ~ 0
|
||||
From mainboard transmitter to add-in card receiver\nPlace termination resistors here if necessary
|
||||
Text HLabel 4950 1600 2 50 Input ~ 0
|
||||
TDO
|
||||
Text HLabel 4950 1700 2 50 Output ~ 0
|
||||
TMS
|
||||
Text HLabel 4950 1500 2 50 Output ~ 0
|
||||
TDI
|
||||
Text HLabel 4950 1400 2 50 Output ~ 0
|
||||
TCK
|
||||
Text HLabel 3350 2000 0 50 Input ~ 0
|
||||
~WAKE
|
||||
Text HLabel 3350 1800 0 50 Output ~ 0
|
||||
~TRST
|
||||
Text HLabel 3350 1400 0 50 BiDi ~ 0
|
||||
SMCLK
|
||||
Text HLabel 3350 1500 0 50 BiDi ~ 0
|
||||
SMDAT
|
||||
Text HLabel 4950 2000 2 50 Output ~ 0
|
||||
~PERST
|
||||
Text HLabel 4950 1000 2 50 UnSpc ~ 0
|
||||
~PRSNT1
|
||||
Text HLabel 3350 2700 0 50 UnSpc ~ 0
|
||||
~PRSNT2x1
|
||||
$Sheet
|
||||
S 2100 2350 500 200
|
||||
U 5D516DFB
|
||||
F0 "term" 50
|
||||
F1 "term.sch" 50
|
||||
F2 "IN+" I R 2600 2400 50
|
||||
F3 "IN-" I R 2600 2500 50
|
||||
F4 "OUT+" O L 2100 2400 50
|
||||
F5 "OUT-" O L 2100 2500 50
|
||||
$EndSheet
|
||||
Wire Wire Line
|
||||
3450 1300 3550 1300
|
||||
Wire Wire Line
|
||||
3550 1600 3450 1600
|
||||
Connection ~ 3450 1600
|
||||
Wire Wire Line
|
||||
3450 1600 3450 1300
|
||||
Wire Wire Line
|
||||
3550 2300 3450 2300
|
||||
Connection ~ 3450 2300
|
||||
Wire Wire Line
|
||||
3450 2300 3450 1600
|
||||
Wire Wire Line
|
||||
3550 2600 3450 2600
|
||||
Connection ~ 3450 2600
|
||||
Wire Wire Line
|
||||
3450 2600 3450 2300
|
||||
Wire Wire Line
|
||||
3550 2800 3450 2800
|
||||
Wire Wire Line
|
||||
3450 2800 3450 2600
|
||||
Wire Wire Line
|
||||
4850 1300 4750 1300
|
||||
Wire Wire Line
|
||||
4850 1300 4850 2200
|
||||
Wire Wire Line
|
||||
4750 2200 4850 2200
|
||||
Connection ~ 4850 2200
|
||||
Wire Wire Line
|
||||
4850 2200 4850 2500
|
||||
Wire Wire Line
|
||||
4750 2500 4850 2500
|
||||
Connection ~ 4850 2500
|
||||
Wire Wire Line
|
||||
4850 2500 4850 2800
|
||||
Wire Wire Line
|
||||
4750 2800 4850 2800
|
||||
Wire Wire Line
|
||||
4750 1000 4950 1000
|
||||
Wire Wire Line
|
||||
4850 900 4850 1100
|
||||
Wire Wire Line
|
||||
4850 1100 4750 1100
|
||||
Wire Wire Line
|
||||
4750 1200 4850 1200
|
||||
Wire Wire Line
|
||||
4850 1200 4850 1100
|
||||
Connection ~ 4850 1100
|
||||
Wire Wire Line
|
||||
3550 1200 3450 1200
|
||||
Wire Wire Line
|
||||
3450 1200 3450 1100
|
||||
Wire Wire Line
|
||||
3550 1000 3450 1000
|
||||
Connection ~ 3450 1000
|
||||
Wire Wire Line
|
||||
3450 1000 3450 900
|
||||
Connection ~ 3450 1100
|
||||
Wire Wire Line
|
||||
3450 1100 3450 1000
|
||||
Wire Wire Line
|
||||
3450 1100 3550 1100
|
||||
Wire Wire Line
|
||||
3350 1700 3550 1700
|
||||
Wire Wire Line
|
||||
4750 1800 4950 1800
|
||||
Wire Wire Line
|
||||
4750 1900 4950 1900
|
||||
Wire Wire Line
|
||||
3350 1900 3550 1900
|
||||
Wire Wire Line
|
||||
2000 2400 2100 2400
|
||||
Wire Wire Line
|
||||
2000 2500 2100 2500
|
||||
Wire Wire Line
|
||||
4750 2300 4950 2300
|
||||
Wire Wire Line
|
||||
4750 2400 4950 2400
|
||||
Wire Wire Line
|
||||
4750 2600 5600 2600
|
||||
Wire Wire Line
|
||||
4750 2700 5600 2700
|
||||
Wire Wire Line
|
||||
4750 2000 4950 2000
|
||||
Wire Wire Line
|
||||
4750 1700 4950 1700
|
||||
Wire Wire Line
|
||||
4750 1600 4950 1600
|
||||
Wire Wire Line
|
||||
4750 1500 4950 1500
|
||||
Wire Wire Line
|
||||
4750 1400 4950 1400
|
||||
Wire Wire Line
|
||||
3350 1400 3550 1400
|
||||
Wire Wire Line
|
||||
3350 1500 3550 1500
|
||||
Wire Wire Line
|
||||
3350 1800 3550 1800
|
||||
Wire Wire Line
|
||||
3350 2000 3550 2000
|
||||
Wire Wire Line
|
||||
3550 2700 3350 2700
|
||||
Wire Wire Line
|
||||
2600 2400 3550 2400
|
||||
Wire Wire Line
|
||||
2600 2500 3550 2500
|
||||
Wire Wire Line
|
||||
6100 2700 6200 2700
|
||||
Wire Wire Line
|
||||
6100 2600 6200 2600
|
||||
Text HLabel 6200 2700 2 50 Input ~ 0
|
||||
PER0_N
|
||||
Text HLabel 6200 2600 2 50 Input ~ 0
|
||||
PER0_P
|
||||
$Sheet
|
||||
S 5600 2550 500 200
|
||||
U 5DAB5272
|
||||
F0 "decap" 50
|
||||
F1 "decap.sch" 50
|
||||
F2 "IN+" I R 6100 2600 50
|
||||
F3 "OUT+" O L 5600 2600 50
|
||||
F4 "OUT-" O L 5600 2700 50
|
||||
F5 "IN-" I R 6100 2700 50
|
||||
$EndSheet
|
||||
Text Notes 5500 2200 0 50 ~ 0
|
||||
From add-in card transmitter to mainboard receiver\nPlace AC coupling capacitors here if necessary
|
||||
Text Label 4950 2700 0 50 ~ 0
|
||||
_PER0_N
|
||||
Text Label 4950 2600 0 50 ~ 0
|
||||
_PER0_P
|
||||
$Comp
|
||||
L PCIexpress:PCIexpress_x1 J2
|
||||
U 1 1 5D4FEBD7
|
||||
P 4150 900
|
||||
F 0 "J2" H 4150 1067 50 0000 C CNN
|
||||
F 1 "PCIexpress_x1" H 4150 976 50 0000 C CNN
|
||||
F 2 "PCIexpress:PCIexpress_x1" H 4150 -50 50 0001 C CNN
|
||||
F 3 "" H 4150 -50 50 0001 C CNN
|
||||
1 4150 900
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
3450 2900 3450 2800
|
||||
Connection ~ 3450 2800
|
||||
Wire Wire Line
|
||||
4850 2900 4850 2800
|
||||
Connection ~ 4850 2800
|
||||
$EndSCHEMATC
|
||||
@ -1,163 +0,0 @@
|
||||
EESchema-LIBRARY Version 2.4
|
||||
#encoding utf-8
|
||||
#
|
||||
# Device_C
|
||||
#
|
||||
DEF Device_C C 0 10 N Y 1 F N
|
||||
F0 "C" 25 100 50 H V L CNN
|
||||
F1 "Device_C" 25 -100 50 H V L CNN
|
||||
F2 "" 38 -150 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
C_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 20 -80 -30 80 -30 N
|
||||
P 2 0 1 20 -80 30 80 30 N
|
||||
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_R
|
||||
#
|
||||
DEF Device_R R 0 0 N Y 1 F N
|
||||
F0 "R" 80 0 50 V V C CNN
|
||||
F1 "Device_R" 0 0 50 V V C CNN
|
||||
F2 "" -70 0 50 V I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
R_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_PCIexpress_bracket
|
||||
#
|
||||
DEF PCIexpress_PCIexpress_bracket J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 0 50 H V C CNN
|
||||
F1 "PCIexpress_PCIexpress_bracket" 0 0 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
PCIexpress_bracket_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_PCIexpress_x1
|
||||
#
|
||||
DEF PCIexpress_PCIexpress_x1 J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 150 50 H V C CNN
|
||||
F1 "PCIexpress_PCIexpress_x1" 0 50 50 H V C CNN
|
||||
F2 "PCIexpress:PCIexpress_x1" 0 -950 50 H I C CNN
|
||||
F3 "" 0 -950 50 H I C CNN
|
||||
DRAW
|
||||
T 0 0 -1150 50 0 0 0 notch Normal 0 C C
|
||||
T 0 0 -1950 50 0 0 0 x1 Normal 0 C C
|
||||
S 450 0 -450 -2000 1 1 10 f
|
||||
P 2 0 1 0 450 -1200 -450 -1200 N
|
||||
X ~PRSNT1 A1 600 -100 150 L 50 50 1 1 P
|
||||
X +3.3V A10 600 -1000 150 L 50 50 1 1 w
|
||||
X ~PERST A11 600 -1100 150 L 50 50 1 1 O
|
||||
X GND A12 600 -1300 150 L 50 50 1 1 w
|
||||
X REFCLK+ A13 600 -1400 150 L 50 50 1 1 O
|
||||
X REFCLK- A14 600 -1500 150 L 50 50 1 1 O
|
||||
X GND A15 600 -1600 150 L 50 50 1 1 w
|
||||
X PERp0 A16 600 -1700 150 L 50 50 1 1 I
|
||||
X PERn0 A17 600 -1800 150 L 50 50 1 1 I
|
||||
X GND A18 600 -1900 150 L 50 50 1 1 w
|
||||
X +12V A2 600 -200 150 L 50 50 1 1 w
|
||||
X +12V A3 600 -300 150 L 50 50 1 1 w
|
||||
X GND A4 600 -400 150 L 50 50 1 1 w
|
||||
X TCK A5 600 -500 150 L 50 50 1 1 O
|
||||
X TDI A6 600 -600 150 L 50 50 1 1 O
|
||||
X TDO A7 600 -700 150 L 50 50 1 1 I
|
||||
X TMS A8 600 -800 150 L 50 50 1 1 O
|
||||
X +3.3V A9 600 -900 150 L 50 50 1 1 w
|
||||
X +12V B1 -600 -100 150 R 50 50 1 1 w
|
||||
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
|
||||
X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
|
||||
X RSVD B12 -600 -1300 150 R 50 50 1 1 N
|
||||
X GND B13 -600 -1400 150 R 50 50 1 1 w
|
||||
X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
|
||||
X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
|
||||
X GND B16 -600 -1700 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B17 -600 -1800 150 R 50 50 1 1 P
|
||||
X GND B18 -600 -1900 150 R 50 50 1 1 w
|
||||
X +12V B2 -600 -200 150 R 50 50 1 1 w
|
||||
X +12V B3 -600 -300 150 R 50 50 1 1 w
|
||||
X GND B4 -600 -400 150 R 50 50 1 1 w
|
||||
X SMCLK B5 -600 -500 150 R 50 50 1 1 C
|
||||
X SMDAT B6 -600 -600 150 R 50 50 1 1 C
|
||||
X GND B7 -600 -700 150 R 50 50 1 1 w
|
||||
X +3.3V B8 -600 -800 150 R 50 50 1 1 w
|
||||
X ~TRST B9 -600 -900 150 R 50 50 1 1 O
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+12V
|
||||
#
|
||||
DEF power_+12V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+12V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +12V 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3V
|
||||
#
|
||||
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS +3.3V
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3V3 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3VA
|
||||
#
|
||||
DEF power_+3.3VA #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3VA" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3.3VA 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GND
|
||||
#
|
||||
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GND" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
File diff suppressed because it is too large
Load Diff
536
PCIexpress_x1_full/PCIexpress_x1_full.kicad_pro
Normal file
536
PCIexpress_x1_full/PCIexpress_x1_full.kicad_pro
Normal file
@ -0,0 +1,536 @@
|
||||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.049999999999999996,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 0.762,
|
||||
"height": 1.524,
|
||||
"width": 1.524
|
||||
},
|
||||
"silk_line_width": 0.12,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.0
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"filename": "board_design_settings.json",
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint_type_mismatch": "error",
|
||||
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327
PCIexpress_x1_full/PCIexpress_x1_full.kicad_sch
Normal file
327
PCIexpress_x1_full/PCIexpress_x1_full.kicad_sch
Normal file
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(uuid ff1ee705-4f35-4536-bb33-415c90bdb100)
|
||||
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|
||||
|
||||
(label "PET0_N" (at 59.69 60.96 0)
|
||||
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|
||||
(uuid 0168ecad-0129-4424-9311-986b89e08bd5)
|
||||
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|
||||
(label "PET0_P" (at 59.69 58.42 0)
|
||||
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|
||||
(uuid 2f214c7a-c42f-4fbe-b2aa-0d7ece5d8d36)
|
||||
)
|
||||
(label "TMS" (at 59.69 35.56 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
(uuid 2fadd9ea-d4e1-47dc-b6bf-1af4e769a555)
|
||||
)
|
||||
(label "~{PERST}" (at 59.69 46.99 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
(uuid 40713700-fbe7-4cdb-bc53-a4df14bf8f4b)
|
||||
)
|
||||
(label "~{PRSNT2x1}" (at 31.75 31.75 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid 4858407a-1914-49db-b05b-a9b3eeedddc1)
|
||||
)
|
||||
(label "~{WAKE}" (at 31.75 46.99 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid 4e66c552-20df-49ea-bc44-11ea6f81cd38)
|
||||
)
|
||||
(label "~{PRSNT2x4}" (at 31.75 34.29 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid 60cc8097-ebbc-4763-b63d-d0bd67598485)
|
||||
)
|
||||
(label "~{PRSNT2x16}" (at 31.75 39.37 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid 618601ca-bf1b-4401-8247-0c4e53ba7555)
|
||||
)
|
||||
(label "TDI" (at 59.69 40.64 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
(uuid 63bcb181-a590-4b98-ae9a-e2138427cd83)
|
||||
)
|
||||
(label "SMCLK" (at 31.75 50.8 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid 65652056-1e3c-46d1-9202-6ba9352227f5)
|
||||
)
|
||||
(label "~{PRSNT1}" (at 31.75 29.21 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid 78b913a2-cf5c-44b4-abd3-5754a0bb9798)
|
||||
)
|
||||
(label "PER0_N" (at 31.75 60.96 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid a988ab83-123a-421e-bacd-47bad1a1e675)
|
||||
)
|
||||
(label "~{TRST}" (at 59.69 43.18 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
(uuid d0a7f899-f33e-4038-9c55-4ebbc825adbb)
|
||||
)
|
||||
(label "PER0_P" (at 31.75 58.42 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid e256ac3d-e0e3-4806-adde-f74997ca41cc)
|
||||
)
|
||||
(label "REFCLK-" (at 59.69 53.34 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
(uuid ec05b6b1-4de6-4609-9f88-7228a27bd165)
|
||||
)
|
||||
(label "SMDAT" (at 31.75 53.34 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid edc3d80f-b5ae-4324-9a41-88ef38e90eb1)
|
||||
)
|
||||
(label "~{PRSNT2x8}" (at 31.75 36.83 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid f59a59f6-cc7a-42c0-b395-eb1c18c8d6ae)
|
||||
)
|
||||
(label "TDO" (at 31.75 43.18 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid f73251a4-dc55-4d04-9a21-101502707e8c)
|
||||
)
|
||||
(label "TCK" (at 59.69 38.1 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
(uuid f840c45c-f5ee-4071-8130-ff464a1c1d68)
|
||||
)
|
||||
(label "REFCLK+" (at 59.69 50.8 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
(uuid f8e88a2f-b08d-470b-a2d8-982cbc823dd0)
|
||||
)
|
||||
|
||||
(sheet (at 34.29 26.67) (size 22.86 36.83) (fields_autoplaced)
|
||||
(stroke (width 0) (type solid) (color 0 0 0 0))
|
||||
(fill (color 0 0 0 0.0000))
|
||||
(uuid 00000000-0000-0000-0000-00005d508b15)
|
||||
(property "Sheet name" "PCIexpress_connector" (id 0) (at 34.29 25.9584 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
)
|
||||
(property "Sheet file" "PCIexpress_connector.kicad_sch" (id 1) (at 34.29 64.0846 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left top))
|
||||
)
|
||||
(pin "PET0_P" output (at 57.15 58.42 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 7a635df3-f0c0-4000-ad70-04241df838f6)
|
||||
)
|
||||
(pin "PET0_N" output (at 57.15 60.96 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 368b71d7-67e2-4111-8fab-b913cafc437b)
|
||||
)
|
||||
(pin "REFCLK+" output (at 57.15 50.8 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 25300d1c-30fd-43c0-b86f-01c5c303f87f)
|
||||
)
|
||||
(pin "REFCLK-" output (at 57.15 53.34 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 6e2c9bd3-5e6a-47dd-a5a0-66a21cf1e9e7)
|
||||
)
|
||||
(pin "~{PRSNT2x16}" passive (at 34.29 39.37 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid a39fd1aa-7ace-46aa-abda-e176b8b43e04)
|
||||
)
|
||||
(pin "TDO" input (at 34.29 43.18 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid b4634079-c0a4-49f4-9267-a955de24a118)
|
||||
)
|
||||
(pin "TMS" output (at 57.15 35.56 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid d0b407c7-a702-4b84-86b6-c8df420a4eb0)
|
||||
)
|
||||
(pin "TDI" output (at 57.15 40.64 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 16f46a70-fd46-4fa8-951e-0cafd1b9b740)
|
||||
)
|
||||
(pin "TCK" output (at 57.15 38.1 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid dd53c7dd-d47f-4626-a1e1-28ba1c3fdf00)
|
||||
)
|
||||
(pin "~{WAKE}" input (at 34.29 46.99 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 3fd626ba-c2fb-4262-a50e-40f3bfbca7f8)
|
||||
)
|
||||
(pin "~{TRST}" output (at 57.15 43.18 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 1b00d53f-be5a-4757-80e7-4540281528d2)
|
||||
)
|
||||
(pin "SMCLK" bidirectional (at 34.29 50.8 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid ce3a7856-0510-4980-a175-41100aaa4da0)
|
||||
)
|
||||
(pin "SMDAT" bidirectional (at 34.29 53.34 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 84cd8c5e-49c2-4683-8ac6-ebf20735e0f6)
|
||||
)
|
||||
(pin "~{PERST}" output (at 57.15 46.99 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 75caa1e5-a5a9-48ba-a826-5627ea75e2e6)
|
||||
)
|
||||
(pin "~{PRSNT1}" passive (at 34.29 29.21 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 8cbb47c0-5873-461f-b1a7-c3487dbc11b2)
|
||||
)
|
||||
(pin "~{PRSNT2x8}" passive (at 34.29 36.83 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 180a7bef-2575-4107-bad1-ccbbea3125a2)
|
||||
)
|
||||
(pin "~{PRSNT2x4}" passive (at 34.29 34.29 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid e0e002e4-7cb1-45ac-acb6-ec3914881145)
|
||||
)
|
||||
(pin "~{PRSNT2x1}" passive (at 34.29 31.75 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid a9f67e17-a054-4cb2-bafc-31f6f8c3bc61)
|
||||
)
|
||||
(pin "PER0_N" input (at 34.29 60.96 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid fba4c78b-87e5-4e09-9982-a01f92e0787e)
|
||||
)
|
||||
(pin "PER0_P" input (at 34.29 58.42 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 3b120228-f7d5-4317-819b-53ec2d23c20e)
|
||||
)
|
||||
)
|
||||
|
||||
(sheet_instances
|
||||
(path "/" (page "1"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15" (page "2"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb" (page "3"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dab5272" (page "4"))
|
||||
)
|
||||
|
||||
(symbol_instances
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51adb3"
|
||||
(reference "#PWR0101") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51adb9"
|
||||
(reference "#PWR0102") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ae8a"
|
||||
(reference "#PWR0103") (unit 1) (value "+3.3V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ae90"
|
||||
(reference "#PWR0104") (unit 1) (value "+3.3V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ae96"
|
||||
(reference "#PWR0105") (unit 1) (value "+3.3V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ae9c"
|
||||
(reference "#PWR0106") (unit 1) (value "+3.3VA") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51aea2"
|
||||
(reference "#PWR0107") (unit 1) (value "+12V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51aea8"
|
||||
(reference "#PWR0108") (unit 1) (value "+12V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb/00000000-0000-0000-0000-00005d52e619"
|
||||
(reference "#PWR0109") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb/00000000-0000-0000-0000-00005d52ec15"
|
||||
(reference "#PWR0110") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dab5272/00000000-0000-0000-0000-00005dab6859"
|
||||
(reference "C1") (unit 1) (value "100n") (footprint "Capacitor_SMD:C_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dab5272/00000000-0000-0000-0000-00005dab685f"
|
||||
(reference "C2") (unit 1) (value "100n") (footprint "Capacitor_SMD:C_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ada7"
|
||||
(reference "J1") (unit 1) (value "PCIexpress_bracket") (footprint "PCIexpress:PCIexpress_bracket_full")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d4febd7"
|
||||
(reference "J2") (unit 1) (value "PCIexpress_x1") (footprint "PCIexpress:PCIexpress_x1")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb/00000000-0000-0000-0000-00005d52dcbc"
|
||||
(reference "R1") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb/00000000-0000-0000-0000-00005d52e298"
|
||||
(reference "R2") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
)
|
||||
)
|
||||
@ -1,294 +0,0 @@
|
||||
update=ven 26 lug 2019 22:25:34 CEST
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=4
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.08889999999999999
|
||||
MinViaDiameter=0.45
|
||||
MinViaDrill=0.2
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.0889
|
||||
TrackWidth2=0.0889
|
||||
TrackWidth3=0.127
|
||||
TrackWidth4=0.2
|
||||
ViaDiameter1=0.45
|
||||
ViaDrill1=0.2
|
||||
ViaDiameter2=0.45
|
||||
ViaDrill2=0.2
|
||||
ViaDiameter3=0.5
|
||||
ViaDrill3=0.25
|
||||
ViaDiameter4=0.55
|
||||
ViaDrill4=0.3
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.2
|
||||
dPairViaGap1=0.25
|
||||
dPairWidth2=0.2
|
||||
dPairGap2=0.2
|
||||
dPairViaGap2=0.2
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
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||||
OthersTextItalic=0
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||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.051
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||||
SolderMaskMinWidth=0.25
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
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||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
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||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
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||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
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|
||||
Enabled=1
|
||||
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||||
Enabled=1
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||||
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Enabled=1
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|
||||
Enabled=1
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||||
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||||
Enabled=1
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||||
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|
||||
Enabled=1
|
||||
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Enabled=1
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||||
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|
||||
Enabled=1
|
||||
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|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
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||||
Enabled=1
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||||
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Enabled=1
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||||
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||||
Enabled=1
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||||
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Enabled=1
|
||||
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||||
Enabled=1
|
||||
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||||
Enabled=1
|
||||
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|
||||
Enabled=1
|
||||
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|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
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||||
[pcbnew/Netclasses/Default]
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Name=Default
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Clearance=0.0889
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TrackWidth=0.0889
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ViaDiameter=0.45
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ViaDrill=0.2
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uViaDiameter=0.3
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uViaDrill=0.1
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dPairWidth=0.2
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||||
dPairGap=0.2
|
||||
dPairViaGap=0.25
|
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[pcbnew/Netclasses/1]
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Name=Diff-100-PCIe
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Clearance=0.2
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ViaDiameter=0.45
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[pcbnew/Netclasses/2]
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Name=JLC2313-100d-3.5
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Clearance=0.1
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ViaDiameter=0.45
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||||
dPairWidth=0.0889
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|
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[pcbnew/Netclasses/3]
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Name=JLC2313-100d-4
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ViaDiameter=0.45
|
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|
||||
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|
||||
dPairWidth=0.1016
|
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|
||||
dPairViaGap=0.25
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||||
[pcbnew/Netclasses/4]
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||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2032
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||||
dPairGap=0.2032
|
||||
dPairViaGap=0.25
|
||||
@ -1,122 +0,0 @@
|
||||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 4
|
||||
Title "PCIexpress_x1_full"
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp "Author: Luca Anastasio"
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
Text Label 2350 2400 0 50 ~ 0
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PET0_N
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Text Label 2350 2300 0 50 ~ 0
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PET0_P
|
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Wire Wire Line
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|
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|
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|
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REFCLK+
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TCK
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
|
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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PER0_P
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PER0_N
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U 5D508B15
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F0 "PCIexpress_connector" 50
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F2 "PET0_P" O R 2250 2300 50
|
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|
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|
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|
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|
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|
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|
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|
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|
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$EndSheet
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$EndSCHEMATC
|
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130
PCIexpress_x1_full/decap.kicad_sch
Normal file
130
PCIexpress_x1_full/decap.kicad_sch
Normal file
@ -0,0 +1,130 @@
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@ -1,316 +0,0 @@
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EESchema Schematic File Version 4
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||||
EELAYER 30 0
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||||
EELAYER END
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||||
$Descr A4 8268 11693 portrait
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||||
encoding utf-8
|
||||
Sheet 2 4
|
||||
Title "PCIexpress_x1_half"
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp "Author: Luca Anastasio"
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
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||||
$EndDescr
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L PCIexpress:PCIexpress_bracket J1
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||||
U 1 1 5D51ADA7
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||||
P 2200 10750
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F 0 "J1" H 2225 10796 50 0000 L CNN
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||||
F 1 "PCIexpress_bracket" H 2225 10705 50 0000 L CNN
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||||
F 2 "PCIexpress:PCIexpress_bracket_full" H 2200 10750 50 0001 C CNN
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||||
F 3 "" H 2200 10750 50 0001 C CNN
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1 2200 10750
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1 0 0 -1
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$EndComp
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$Comp
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L power:GND #PWR0101
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U 1 1 5D51ADB3
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P 3450 2900
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F 0 "#PWR0101" H 3450 2650 50 0001 C CNN
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F 1 "GND" H 3455 2727 50 0000 C CNN
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F 2 "" H 3450 2900 50 0001 C CNN
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||||
F 3 "" H 3450 2900 50 0001 C CNN
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||||
1 3450 2900
|
||||
-1 0 0 -1
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||||
$EndComp
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$Comp
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L power:GND #PWR0102
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U 1 1 5D51ADB9
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||||
P 4850 2900
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||||
F 0 "#PWR0102" H 4850 2650 50 0001 C CNN
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||||
F 1 "GND" H 4855 2727 50 0000 C CNN
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||||
F 2 "" H 4850 2900 50 0001 C CNN
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||||
F 3 "" H 4850 2900 50 0001 C CNN
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||||
1 4850 2900
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||||
-1 0 0 -1
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$EndComp
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$Comp
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L power:+3.3V #PWR?
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U 1 1 5D51AE8A
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P 3350 1700
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AR Path="/5D51AE8A" Ref="#PWR?" Part="1"
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AR Path="/5D508B15/5D51AE8A" Ref="#PWR0103" Part="1"
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||||
F 0 "#PWR0103" H 3350 1550 50 0001 C CNN
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||||
F 1 "+3.3V" V 3365 1828 50 0000 L CNN
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||||
F 2 "" H 3350 1700 50 0001 C CNN
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||||
F 3 "" H 3350 1700 50 0001 C CNN
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||||
1 3350 1700
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0 -1 -1 0
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$Comp
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L power:+3.3V #PWR?
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AR Path="/5D51AE90" Ref="#PWR?" Part="1"
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||||
AR Path="/5D508B15/5D51AE90" Ref="#PWR0104" Part="1"
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||||
F 0 "#PWR0104" H 4950 1650 50 0001 C CNN
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||||
F 1 "+3.3V" V 4965 1928 50 0000 L CNN
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||||
F 2 "" H 4950 1800 50 0001 C CNN
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||||
F 3 "" H 4950 1800 50 0001 C CNN
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||||
1 4950 1800
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0 1 1 0
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$Comp
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AR Path="/5D51AE96" Ref="#PWR?" Part="1"
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||||
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F 0 "#PWR0105" H 4950 1750 50 0001 C CNN
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F 1 "+3.3V" V 4965 2028 50 0000 L CNN
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F 3 "" H 4950 1900 50 0001 C CNN
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||||
1 4950 1900
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0 1 1 0
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$Comp
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L power:+3.3VA #PWR?
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||||
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||||
F 1 "+3.3VA" V 3365 2027 50 0000 L CNN
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||||
1 3350 1900
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0 -1 -1 0
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$EndComp
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$Comp
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L power:+12V #PWR?
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P 3450 900
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AR Path="/5D51AEA2" Ref="#PWR?" Part="1"
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AR Path="/5D508B15/5D51AEA2" Ref="#PWR0107" Part="1"
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F 0 "#PWR0107" H 3450 750 50 0001 C CNN
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||||
F 1 "+12V" H 3465 1073 50 0000 C CNN
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||||
F 2 "" H 3450 900 50 0001 C CNN
|
||||
F 3 "" H 3450 900 50 0001 C CNN
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||||
1 3450 900
|
||||
1 0 0 -1
|
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$EndComp
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$Comp
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L power:+12V #PWR?
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U 1 1 5D51AEA8
|
||||
P 4850 900
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AR Path="/5D51AEA8" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D508B15/5D51AEA8" Ref="#PWR0108" Part="1"
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||||
F 0 "#PWR0108" H 4850 750 50 0001 C CNN
|
||||
F 1 "+12V" H 4865 1073 50 0000 C CNN
|
||||
F 2 "" H 4850 900 50 0001 C CNN
|
||||
F 3 "" H 4850 900 50 0001 C CNN
|
||||
1 4850 900
|
||||
1 0 0 -1
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$EndComp
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Text HLabel 2000 2400 0 50 Output ~ 0
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PET0_P
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||||
Text HLabel 2000 2500 0 50 Output ~ 0
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PET0_N
|
||||
Text HLabel 4950 2300 2 50 Output ~ 0
|
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REFCLK+
|
||||
Text HLabel 4950 2400 2 50 Output ~ 0
|
||||
REFCLK-
|
||||
Text Notes 2800 2150 2 50 ~ 0
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||||
From mainboard transmitter to add-in card receiver\nPlace termination resistors here if necessary
|
||||
Text HLabel 4950 1600 2 50 Input ~ 0
|
||||
TDO
|
||||
Text HLabel 4950 1700 2 50 Output ~ 0
|
||||
TMS
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||||
Text HLabel 4950 1500 2 50 Output ~ 0
|
||||
TDI
|
||||
Text HLabel 4950 1400 2 50 Output ~ 0
|
||||
TCK
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||||
Text HLabel 3350 2000 0 50 Input ~ 0
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~WAKE
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||||
Text HLabel 3350 1800 0 50 Output ~ 0
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~TRST
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||||
Text HLabel 3350 1400 0 50 BiDi ~ 0
|
||||
SMCLK
|
||||
Text HLabel 3350 1500 0 50 BiDi ~ 0
|
||||
SMDAT
|
||||
Text HLabel 4950 2000 2 50 Output ~ 0
|
||||
~PERST
|
||||
Text HLabel 4950 1000 2 50 UnSpc ~ 0
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~PRSNT1
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||||
Text HLabel 3350 2700 0 50 UnSpc ~ 0
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~PRSNT2x1
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U 5D516DFB
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||||
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||||
F5 "OUT-" O L 2100 2500 50
|
||||
$EndSheet
|
||||
Wire Wire Line
|
||||
3450 1300 3550 1300
|
||||
Wire Wire Line
|
||||
3550 1600 3450 1600
|
||||
Connection ~ 3450 1600
|
||||
Wire Wire Line
|
||||
3450 1600 3450 1300
|
||||
Wire Wire Line
|
||||
3550 2300 3450 2300
|
||||
Connection ~ 3450 2300
|
||||
Wire Wire Line
|
||||
3450 2300 3450 1600
|
||||
Wire Wire Line
|
||||
3550 2600 3450 2600
|
||||
Connection ~ 3450 2600
|
||||
Wire Wire Line
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||||
3450 2600 3450 2300
|
||||
Wire Wire Line
|
||||
3550 2800 3450 2800
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||||
Wire Wire Line
|
||||
3450 2800 3450 2600
|
||||
Wire Wire Line
|
||||
4850 1300 4750 1300
|
||||
Wire Wire Line
|
||||
4850 1300 4850 2200
|
||||
Wire Wire Line
|
||||
4750 2200 4850 2200
|
||||
Connection ~ 4850 2200
|
||||
Wire Wire Line
|
||||
4850 2200 4850 2500
|
||||
Wire Wire Line
|
||||
4750 2500 4850 2500
|
||||
Connection ~ 4850 2500
|
||||
Wire Wire Line
|
||||
4850 2500 4850 2800
|
||||
Wire Wire Line
|
||||
4750 2800 4850 2800
|
||||
Wire Wire Line
|
||||
4750 1000 4950 1000
|
||||
Wire Wire Line
|
||||
4850 900 4850 1100
|
||||
Wire Wire Line
|
||||
4850 1100 4750 1100
|
||||
Wire Wire Line
|
||||
4750 1200 4850 1200
|
||||
Wire Wire Line
|
||||
4850 1200 4850 1100
|
||||
Connection ~ 4850 1100
|
||||
Wire Wire Line
|
||||
3550 1200 3450 1200
|
||||
Wire Wire Line
|
||||
3450 1200 3450 1100
|
||||
Wire Wire Line
|
||||
3550 1000 3450 1000
|
||||
Connection ~ 3450 1000
|
||||
Wire Wire Line
|
||||
3450 1000 3450 900
|
||||
Connection ~ 3450 1100
|
||||
Wire Wire Line
|
||||
3450 1100 3450 1000
|
||||
Wire Wire Line
|
||||
3450 1100 3550 1100
|
||||
Wire Wire Line
|
||||
3350 1700 3550 1700
|
||||
Wire Wire Line
|
||||
4750 1800 4950 1800
|
||||
Wire Wire Line
|
||||
4750 1900 4950 1900
|
||||
Wire Wire Line
|
||||
3350 1900 3550 1900
|
||||
Wire Wire Line
|
||||
2000 2400 2100 2400
|
||||
Wire Wire Line
|
||||
2000 2500 2100 2500
|
||||
Wire Wire Line
|
||||
4750 2300 4950 2300
|
||||
Wire Wire Line
|
||||
4750 2400 4950 2400
|
||||
Wire Wire Line
|
||||
4750 2600 5600 2600
|
||||
Wire Wire Line
|
||||
4750 2700 5600 2700
|
||||
Wire Wire Line
|
||||
4750 2000 4950 2000
|
||||
Wire Wire Line
|
||||
4750 1700 4950 1700
|
||||
Wire Wire Line
|
||||
4750 1600 4950 1600
|
||||
Wire Wire Line
|
||||
4750 1500 4950 1500
|
||||
Wire Wire Line
|
||||
4750 1400 4950 1400
|
||||
Wire Wire Line
|
||||
3350 1400 3550 1400
|
||||
Wire Wire Line
|
||||
3350 1500 3550 1500
|
||||
Wire Wire Line
|
||||
3350 1800 3550 1800
|
||||
Wire Wire Line
|
||||
3350 2000 3550 2000
|
||||
Wire Wire Line
|
||||
3550 2700 3350 2700
|
||||
Wire Wire Line
|
||||
2600 2400 3550 2400
|
||||
Wire Wire Line
|
||||
2600 2500 3550 2500
|
||||
Wire Wire Line
|
||||
6100 2700 6200 2700
|
||||
Wire Wire Line
|
||||
6100 2600 6200 2600
|
||||
Text HLabel 6200 2700 2 50 Input ~ 0
|
||||
PER0_N
|
||||
Text HLabel 6200 2600 2 50 Input ~ 0
|
||||
PER0_P
|
||||
$Sheet
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||||
S 5600 2550 500 200
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||||
U 5DAB5272
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||||
F0 "decap" 50
|
||||
F1 "decap.sch" 50
|
||||
F2 "IN+" I R 6100 2600 50
|
||||
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|
||||
F4 "OUT-" O L 5600 2700 50
|
||||
F5 "IN-" I R 6100 2700 50
|
||||
$EndSheet
|
||||
Text Notes 5500 2200 0 50 ~ 0
|
||||
From add-in card transmitter to mainboard receiver\nPlace AC coupling capacitors here if necessary
|
||||
Text Label 4950 2700 0 50 ~ 0
|
||||
_PER0_N
|
||||
Text Label 4950 2600 0 50 ~ 0
|
||||
_PER0_P
|
||||
$Comp
|
||||
L PCIexpress:PCIexpress_x1 J2
|
||||
U 1 1 5D4FEBD7
|
||||
P 4150 900
|
||||
F 0 "J2" H 4150 1067 50 0000 C CNN
|
||||
F 1 "PCIexpress_x1" H 4150 976 50 0000 C CNN
|
||||
F 2 "PCIexpress:PCIexpress_x1" H 4150 -50 50 0001 C CNN
|
||||
F 3 "" H 4150 -50 50 0001 C CNN
|
||||
1 4150 900
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
3450 2900 3450 2800
|
||||
Connection ~ 3450 2800
|
||||
Wire Wire Line
|
||||
4850 2900 4850 2800
|
||||
Connection ~ 4850 2800
|
||||
$EndSCHEMATC
|
||||
@ -1,163 +0,0 @@
|
||||
EESchema-LIBRARY Version 2.4
|
||||
#encoding utf-8
|
||||
#
|
||||
# Device_C
|
||||
#
|
||||
DEF Device_C C 0 10 N Y 1 F N
|
||||
F0 "C" 25 100 50 H V L CNN
|
||||
F1 "Device_C" 25 -100 50 H V L CNN
|
||||
F2 "" 38 -150 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
C_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 20 -80 -30 80 -30 N
|
||||
P 2 0 1 20 -80 30 80 30 N
|
||||
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_R
|
||||
#
|
||||
DEF Device_R R 0 0 N Y 1 F N
|
||||
F0 "R" 80 0 50 V V C CNN
|
||||
F1 "Device_R" 0 0 50 V V C CNN
|
||||
F2 "" -70 0 50 V I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
R_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_PCIexpress_bracket
|
||||
#
|
||||
DEF PCIexpress_PCIexpress_bracket J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 0 50 H V C CNN
|
||||
F1 "PCIexpress_PCIexpress_bracket" 0 0 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
PCIexpress_bracket_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_PCIexpress_x1
|
||||
#
|
||||
DEF PCIexpress_PCIexpress_x1 J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 150 50 H V C CNN
|
||||
F1 "PCIexpress_PCIexpress_x1" 0 50 50 H V C CNN
|
||||
F2 "PCIexpress:PCIexpress_x1" 0 -950 50 H I C CNN
|
||||
F3 "" 0 -950 50 H I C CNN
|
||||
DRAW
|
||||
T 0 0 -1150 50 0 0 0 notch Normal 0 C C
|
||||
T 0 0 -1950 50 0 0 0 x1 Normal 0 C C
|
||||
S 450 0 -450 -2000 1 1 10 f
|
||||
P 2 0 1 0 450 -1200 -450 -1200 N
|
||||
X ~PRSNT1 A1 600 -100 150 L 50 50 1 1 P
|
||||
X +3.3V A10 600 -1000 150 L 50 50 1 1 w
|
||||
X ~PERST A11 600 -1100 150 L 50 50 1 1 O
|
||||
X GND A12 600 -1300 150 L 50 50 1 1 w
|
||||
X REFCLK+ A13 600 -1400 150 L 50 50 1 1 O
|
||||
X REFCLK- A14 600 -1500 150 L 50 50 1 1 O
|
||||
X GND A15 600 -1600 150 L 50 50 1 1 w
|
||||
X PERp0 A16 600 -1700 150 L 50 50 1 1 I
|
||||
X PERn0 A17 600 -1800 150 L 50 50 1 1 I
|
||||
X GND A18 600 -1900 150 L 50 50 1 1 w
|
||||
X +12V A2 600 -200 150 L 50 50 1 1 w
|
||||
X +12V A3 600 -300 150 L 50 50 1 1 w
|
||||
X GND A4 600 -400 150 L 50 50 1 1 w
|
||||
X TCK A5 600 -500 150 L 50 50 1 1 O
|
||||
X TDI A6 600 -600 150 L 50 50 1 1 O
|
||||
X TDO A7 600 -700 150 L 50 50 1 1 I
|
||||
X TMS A8 600 -800 150 L 50 50 1 1 O
|
||||
X +3.3V A9 600 -900 150 L 50 50 1 1 w
|
||||
X +12V B1 -600 -100 150 R 50 50 1 1 w
|
||||
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
|
||||
X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
|
||||
X RSVD B12 -600 -1300 150 R 50 50 1 1 N
|
||||
X GND B13 -600 -1400 150 R 50 50 1 1 w
|
||||
X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
|
||||
X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
|
||||
X GND B16 -600 -1700 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B17 -600 -1800 150 R 50 50 1 1 P
|
||||
X GND B18 -600 -1900 150 R 50 50 1 1 w
|
||||
X +12V B2 -600 -200 150 R 50 50 1 1 w
|
||||
X +12V B3 -600 -300 150 R 50 50 1 1 w
|
||||
X GND B4 -600 -400 150 R 50 50 1 1 w
|
||||
X SMCLK B5 -600 -500 150 R 50 50 1 1 C
|
||||
X SMDAT B6 -600 -600 150 R 50 50 1 1 C
|
||||
X GND B7 -600 -700 150 R 50 50 1 1 w
|
||||
X +3.3V B8 -600 -800 150 R 50 50 1 1 w
|
||||
X ~TRST B9 -600 -900 150 R 50 50 1 1 O
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+12V
|
||||
#
|
||||
DEF power_+12V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+12V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +12V 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3V
|
||||
#
|
||||
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS +3.3V
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3V3 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3VA
|
||||
#
|
||||
DEF power_+3.3VA #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3VA" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3.3VA 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GND
|
||||
#
|
||||
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GND" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
File diff suppressed because it is too large
Load Diff
536
PCIexpress_x1_half/PCIexpress_x1_half.kicad_pro
Normal file
536
PCIexpress_x1_half/PCIexpress_x1_half.kicad_pro
Normal file
@ -0,0 +1,536 @@
|
||||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.049999999999999996,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 0.762,
|
||||
"height": 1.524,
|
||||
"width": 1.524
|
||||
},
|
||||
"silk_line_width": 0.12,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.508
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"filename": "board_design_settings.json",
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint_type_mismatch": "error",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rule_severitieslegacy_courtyards_overlap": true,
|
||||
"rule_severitieslegacy_no_courtyard_defined": false,
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_copper_edge_clearance": 0.075,
|
||||
"min_hole_clearance": 0.25,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_through_hole_diameter": 0.19999999999999998,
|
||||
"min_track_width": 0.08889999999999999,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.44999999999999996,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [
|
||||
0.0,
|
||||
0.0889,
|
||||
0.127,
|
||||
0.2
|
||||
],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
},
|
||||
{
|
||||
"diameter": 0.45,
|
||||
"drill": 0.2
|
||||
},
|
||||
{
|
||||
"diameter": 0.5,
|
||||
"drill": 0.25
|
||||
},
|
||||
{
|
||||
"diameter": 0.55,
|
||||
"drill": 0.3
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"pin_map": [
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_label_syntax": "error",
|
||||
"bus_to_bus_conflict": "error",
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327
PCIexpress_x1_half/PCIexpress_x1_half.kicad_sch
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327
PCIexpress_x1_half/PCIexpress_x1_half.kicad_sch
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|
||||
(property "Sheet file" "PCIexpress_connector.kicad_sch" (id 1) (at 34.29 64.0846 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left top))
|
||||
)
|
||||
(pin "PET0_P" output (at 57.15 58.42 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 76830ede-664d-42d5-8aa9-035c32400b0e)
|
||||
)
|
||||
(pin "PET0_N" output (at 57.15 60.96 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 8a7dcd8b-09dc-43a2-86f2-f2879e989f2c)
|
||||
)
|
||||
(pin "REFCLK+" output (at 57.15 50.8 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid dce4d429-e17b-43d0-9d63-226047e97c59)
|
||||
)
|
||||
(pin "REFCLK-" output (at 57.15 53.34 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 29d9344c-95ce-4fbe-9123-d2aeae3e2b44)
|
||||
)
|
||||
(pin "~{PRSNT2x16}" passive (at 34.29 39.37 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 0ff82afd-b218-42ea-92ad-ba589c84f9e6)
|
||||
)
|
||||
(pin "TDO" input (at 34.29 43.18 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 34abed96-d1b9-478c-9660-48bf833cd79e)
|
||||
)
|
||||
(pin "TMS" output (at 57.15 35.56 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 2c9cb917-a9f0-45ce-9bf6-ddeef55d69b5)
|
||||
)
|
||||
(pin "TDI" output (at 57.15 40.64 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid f5f633da-2744-45d9-a81c-4b9a1d13b26a)
|
||||
)
|
||||
(pin "TCK" output (at 57.15 38.1 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 4db98597-3abe-44c5-ad8e-e4fcbb498530)
|
||||
)
|
||||
(pin "~{WAKE}" input (at 34.29 46.99 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 6ca3d1e5-9ea1-4e6c-bd2c-23836e3c3acc)
|
||||
)
|
||||
(pin "~{TRST}" output (at 57.15 43.18 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 0d9960d6-9ec8-494e-858b-053698aaea94)
|
||||
)
|
||||
(pin "SMCLK" bidirectional (at 34.29 50.8 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 133f1b69-fb96-4db9-80a9-c41137613ef1)
|
||||
)
|
||||
(pin "SMDAT" bidirectional (at 34.29 53.34 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid a100fb31-0004-496c-8474-f23b7e416fdf)
|
||||
)
|
||||
(pin "~{PERST}" output (at 57.15 46.99 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid fb9dcf4c-a8b8-4432-a525-47302b9bc668)
|
||||
)
|
||||
(pin "~{PRSNT1}" passive (at 34.29 29.21 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 48772c73-5804-4974-9b75-0d98ed2cf12f)
|
||||
)
|
||||
(pin "~{PRSNT2x8}" passive (at 34.29 36.83 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 606a3556-c104-4c10-80cb-d9f5273b1434)
|
||||
)
|
||||
(pin "~{PRSNT2x4}" passive (at 34.29 34.29 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 0d1f4c01-5c5b-4afe-b680-2dcd35c8967d)
|
||||
)
|
||||
(pin "~{PRSNT2x1}" passive (at 34.29 31.75 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 0b0cd856-6b71-41c1-9b58-084dc613b5e3)
|
||||
)
|
||||
(pin "PER0_N" input (at 34.29 60.96 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid d00303a5-8e70-4801-a0fe-1301273c62d9)
|
||||
)
|
||||
(pin "PER0_P" input (at 34.29 58.42 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid d80bb940-ec1e-48d9-9a4a-2710db5ac34f)
|
||||
)
|
||||
)
|
||||
|
||||
(sheet_instances
|
||||
(path "/" (page "1"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15" (page "2"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb" (page "3"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dab5272" (page "4"))
|
||||
)
|
||||
|
||||
(symbol_instances
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51adb3"
|
||||
(reference "#PWR0101") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51adb9"
|
||||
(reference "#PWR0102") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ae8a"
|
||||
(reference "#PWR0103") (unit 1) (value "+3.3V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ae90"
|
||||
(reference "#PWR0104") (unit 1) (value "+3.3V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ae96"
|
||||
(reference "#PWR0105") (unit 1) (value "+3.3V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ae9c"
|
||||
(reference "#PWR0106") (unit 1) (value "+3.3VA") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51aea2"
|
||||
(reference "#PWR0107") (unit 1) (value "+12V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51aea8"
|
||||
(reference "#PWR0108") (unit 1) (value "+12V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb/00000000-0000-0000-0000-00005d52e619"
|
||||
(reference "#PWR0109") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb/00000000-0000-0000-0000-00005d52ec15"
|
||||
(reference "#PWR0110") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dab5272/00000000-0000-0000-0000-00005dab6859"
|
||||
(reference "C1") (unit 1) (value "100n") (footprint "Capacitor_SMD:C_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dab5272/00000000-0000-0000-0000-00005dab685f"
|
||||
(reference "C2") (unit 1) (value "100n") (footprint "Capacitor_SMD:C_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ada7"
|
||||
(reference "J1") (unit 1) (value "PCIexpress_bracket") (footprint "PCIexpress:PCIexpress_bracket_full")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d4febd7"
|
||||
(reference "J2") (unit 1) (value "PCIexpress_x1") (footprint "PCIexpress:PCIexpress_x1")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb/00000000-0000-0000-0000-00005d52dcbc"
|
||||
(reference "R1") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb/00000000-0000-0000-0000-00005d52e298"
|
||||
(reference "R2") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
)
|
||||
)
|
||||
@ -1,294 +0,0 @@
|
||||
update=ven 26 lug 2019 22:25:34 CEST
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=4
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.08889999999999999
|
||||
MinViaDiameter=0.45
|
||||
MinViaDrill=0.2
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.0889
|
||||
TrackWidth2=0.0889
|
||||
TrackWidth3=0.127
|
||||
TrackWidth4=0.2
|
||||
ViaDiameter1=0.45
|
||||
ViaDrill1=0.2
|
||||
ViaDiameter2=0.45
|
||||
ViaDrill2=0.2
|
||||
ViaDiameter3=0.5
|
||||
ViaDrill3=0.25
|
||||
ViaDiameter4=0.55
|
||||
ViaDrill4=0.3
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.2
|
||||
dPairViaGap1=0.25
|
||||
dPairWidth2=0.2
|
||||
dPairGap2=0.2
|
||||
dPairViaGap2=0.2
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.051
|
||||
SolderMaskMinWidth=0.25
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.0889
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.2
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/1]
|
||||
Name=Diff-100-PCIe
|
||||
Clearance=0.2
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.2
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/2]
|
||||
Name=JLC2313-100d-3.5
|
||||
Clearance=0.1
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.0889
|
||||
dPairGap=0.1016
|
||||
dPairViaGap=0.25
|
||||
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130
PCIexpress_x1_half/decap.kicad_sch
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EESchema Schematic File Version 4
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220
PCIexpress_x1_half/term.kicad_sch
Normal file
220
PCIexpress_x1_half/term.kicad_sch
Normal file
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994
PCIexpress_x1_low/PCIexpress_connector.kicad_sch
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994
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EESchema Schematic File Version 4
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EELAYER 30 0
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EELAYER END
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$Descr A4 8268 11693 portrait
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encoding utf-8
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Sheet 2 4
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Title "PCIexpress_x1_low"
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Date ""
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Comp "Author: Luca Anastasio"
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Comment1 ""
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Comment4 ""
|
||||
$EndDescr
|
||||
$Comp
|
||||
L PCIexpress:PCIexpress_bracket J1
|
||||
U 1 1 5D51ADA7
|
||||
P 2200 10750
|
||||
F 0 "J1" H 2225 10796 50 0000 L CNN
|
||||
F 1 "PCIexpress_bracket" H 2225 10705 50 0000 L CNN
|
||||
F 2 "PCIexpress:PCIexpress_bracket_low" H 2200 10750 50 0001 C CNN
|
||||
F 3 "" H 2200 10750 50 0001 C CNN
|
||||
1 2200 10750
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:GND #PWR0101
|
||||
U 1 1 5D51ADB3
|
||||
P 3450 2900
|
||||
F 0 "#PWR0101" H 3450 2650 50 0001 C CNN
|
||||
F 1 "GND" H 3455 2727 50 0000 C CNN
|
||||
F 2 "" H 3450 2900 50 0001 C CNN
|
||||
F 3 "" H 3450 2900 50 0001 C CNN
|
||||
1 3450 2900
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:GND #PWR0102
|
||||
U 1 1 5D51ADB9
|
||||
P 4850 2900
|
||||
F 0 "#PWR0102" H 4850 2650 50 0001 C CNN
|
||||
F 1 "GND" H 4855 2727 50 0000 C CNN
|
||||
F 2 "" H 4850 2900 50 0001 C CNN
|
||||
F 3 "" H 4850 2900 50 0001 C CNN
|
||||
1 4850 2900
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+3.3V #PWR?
|
||||
U 1 1 5D51AE8A
|
||||
P 3350 1700
|
||||
AR Path="/5D51AE8A" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D508B15/5D51AE8A" Ref="#PWR0103" Part="1"
|
||||
F 0 "#PWR0103" H 3350 1550 50 0001 C CNN
|
||||
F 1 "+3.3V" V 3365 1828 50 0000 L CNN
|
||||
F 2 "" H 3350 1700 50 0001 C CNN
|
||||
F 3 "" H 3350 1700 50 0001 C CNN
|
||||
1 3350 1700
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+3.3V #PWR?
|
||||
U 1 1 5D51AE90
|
||||
P 4950 1800
|
||||
AR Path="/5D51AE90" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D508B15/5D51AE90" Ref="#PWR0104" Part="1"
|
||||
F 0 "#PWR0104" H 4950 1650 50 0001 C CNN
|
||||
F 1 "+3.3V" V 4965 1928 50 0000 L CNN
|
||||
F 2 "" H 4950 1800 50 0001 C CNN
|
||||
F 3 "" H 4950 1800 50 0001 C CNN
|
||||
1 4950 1800
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+3.3V #PWR?
|
||||
U 1 1 5D51AE96
|
||||
P 4950 1900
|
||||
AR Path="/5D51AE96" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D508B15/5D51AE96" Ref="#PWR0105" Part="1"
|
||||
F 0 "#PWR0105" H 4950 1750 50 0001 C CNN
|
||||
F 1 "+3.3V" V 4965 2028 50 0000 L CNN
|
||||
F 2 "" H 4950 1900 50 0001 C CNN
|
||||
F 3 "" H 4950 1900 50 0001 C CNN
|
||||
1 4950 1900
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+3.3VA #PWR?
|
||||
U 1 1 5D51AE9C
|
||||
P 3350 1900
|
||||
AR Path="/5D51AE9C" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D508B15/5D51AE9C" Ref="#PWR0106" Part="1"
|
||||
F 0 "#PWR0106" H 3350 1750 50 0001 C CNN
|
||||
F 1 "+3.3VA" V 3365 2027 50 0000 L CNN
|
||||
F 2 "" H 3350 1900 50 0001 C CNN
|
||||
F 3 "" H 3350 1900 50 0001 C CNN
|
||||
1 3350 1900
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+12V #PWR?
|
||||
U 1 1 5D51AEA2
|
||||
P 3450 900
|
||||
AR Path="/5D51AEA2" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D508B15/5D51AEA2" Ref="#PWR0107" Part="1"
|
||||
F 0 "#PWR0107" H 3450 750 50 0001 C CNN
|
||||
F 1 "+12V" H 3465 1073 50 0000 C CNN
|
||||
F 2 "" H 3450 900 50 0001 C CNN
|
||||
F 3 "" H 3450 900 50 0001 C CNN
|
||||
1 3450 900
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+12V #PWR?
|
||||
U 1 1 5D51AEA8
|
||||
P 4850 900
|
||||
AR Path="/5D51AEA8" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D508B15/5D51AEA8" Ref="#PWR0108" Part="1"
|
||||
F 0 "#PWR0108" H 4850 750 50 0001 C CNN
|
||||
F 1 "+12V" H 4865 1073 50 0000 C CNN
|
||||
F 2 "" H 4850 900 50 0001 C CNN
|
||||
F 3 "" H 4850 900 50 0001 C CNN
|
||||
1 4850 900
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text HLabel 2000 2400 0 50 Output ~ 0
|
||||
PET0_P
|
||||
Text HLabel 2000 2500 0 50 Output ~ 0
|
||||
PET0_N
|
||||
Text HLabel 4950 2300 2 50 Output ~ 0
|
||||
REFCLK+
|
||||
Text HLabel 4950 2400 2 50 Output ~ 0
|
||||
REFCLK-
|
||||
Text Notes 2800 2150 2 50 ~ 0
|
||||
From mainboard transmitter to add-in card receiver\nPlace termination resistors here if necessary
|
||||
Text HLabel 4950 1600 2 50 Input ~ 0
|
||||
TDO
|
||||
Text HLabel 4950 1700 2 50 Output ~ 0
|
||||
TMS
|
||||
Text HLabel 4950 1500 2 50 Output ~ 0
|
||||
TDI
|
||||
Text HLabel 4950 1400 2 50 Output ~ 0
|
||||
TCK
|
||||
Text HLabel 3350 2000 0 50 Input ~ 0
|
||||
~WAKE
|
||||
Text HLabel 3350 1800 0 50 Output ~ 0
|
||||
~TRST
|
||||
Text HLabel 3350 1400 0 50 BiDi ~ 0
|
||||
SMCLK
|
||||
Text HLabel 3350 1500 0 50 BiDi ~ 0
|
||||
SMDAT
|
||||
Text HLabel 4950 2000 2 50 Output ~ 0
|
||||
~PERST
|
||||
Text HLabel 4950 1000 2 50 UnSpc ~ 0
|
||||
~PRSNT1
|
||||
Text HLabel 3350 2700 0 50 UnSpc ~ 0
|
||||
~PRSNT2x1
|
||||
$Sheet
|
||||
S 2100 2350 500 200
|
||||
U 5D516DFB
|
||||
F0 "term" 50
|
||||
F1 "term.sch" 50
|
||||
F2 "IN+" I R 2600 2400 50
|
||||
F3 "IN-" I R 2600 2500 50
|
||||
F4 "OUT+" O L 2100 2400 50
|
||||
F5 "OUT-" O L 2100 2500 50
|
||||
$EndSheet
|
||||
Wire Wire Line
|
||||
3450 1300 3550 1300
|
||||
Wire Wire Line
|
||||
3550 1600 3450 1600
|
||||
Connection ~ 3450 1600
|
||||
Wire Wire Line
|
||||
3450 1600 3450 1300
|
||||
Wire Wire Line
|
||||
3550 2300 3450 2300
|
||||
Connection ~ 3450 2300
|
||||
Wire Wire Line
|
||||
3450 2300 3450 1600
|
||||
Wire Wire Line
|
||||
3550 2600 3450 2600
|
||||
Connection ~ 3450 2600
|
||||
Wire Wire Line
|
||||
3450 2600 3450 2300
|
||||
Wire Wire Line
|
||||
3550 2800 3450 2800
|
||||
Wire Wire Line
|
||||
3450 2800 3450 2600
|
||||
Wire Wire Line
|
||||
4850 1300 4750 1300
|
||||
Wire Wire Line
|
||||
4850 1300 4850 2200
|
||||
Wire Wire Line
|
||||
4750 2200 4850 2200
|
||||
Connection ~ 4850 2200
|
||||
Wire Wire Line
|
||||
4850 2200 4850 2500
|
||||
Wire Wire Line
|
||||
4750 2500 4850 2500
|
||||
Connection ~ 4850 2500
|
||||
Wire Wire Line
|
||||
4850 2500 4850 2800
|
||||
Wire Wire Line
|
||||
4750 2800 4850 2800
|
||||
Wire Wire Line
|
||||
4750 1000 4950 1000
|
||||
Wire Wire Line
|
||||
4850 900 4850 1100
|
||||
Wire Wire Line
|
||||
4850 1100 4750 1100
|
||||
Wire Wire Line
|
||||
4750 1200 4850 1200
|
||||
Wire Wire Line
|
||||
4850 1200 4850 1100
|
||||
Connection ~ 4850 1100
|
||||
Wire Wire Line
|
||||
3550 1200 3450 1200
|
||||
Wire Wire Line
|
||||
3450 1200 3450 1100
|
||||
Wire Wire Line
|
||||
3550 1000 3450 1000
|
||||
Connection ~ 3450 1000
|
||||
Wire Wire Line
|
||||
3450 1000 3450 900
|
||||
Connection ~ 3450 1100
|
||||
Wire Wire Line
|
||||
3450 1100 3450 1000
|
||||
Wire Wire Line
|
||||
3450 1100 3550 1100
|
||||
Wire Wire Line
|
||||
3350 1700 3550 1700
|
||||
Wire Wire Line
|
||||
4750 1800 4950 1800
|
||||
Wire Wire Line
|
||||
4750 1900 4950 1900
|
||||
Wire Wire Line
|
||||
3350 1900 3550 1900
|
||||
Wire Wire Line
|
||||
2000 2400 2100 2400
|
||||
Wire Wire Line
|
||||
2000 2500 2100 2500
|
||||
Wire Wire Line
|
||||
4750 2300 4950 2300
|
||||
Wire Wire Line
|
||||
4750 2400 4950 2400
|
||||
Wire Wire Line
|
||||
4750 2600 5600 2600
|
||||
Wire Wire Line
|
||||
4750 2700 5600 2700
|
||||
Wire Wire Line
|
||||
4750 2000 4950 2000
|
||||
Wire Wire Line
|
||||
4750 1700 4950 1700
|
||||
Wire Wire Line
|
||||
4750 1600 4950 1600
|
||||
Wire Wire Line
|
||||
4750 1500 4950 1500
|
||||
Wire Wire Line
|
||||
4750 1400 4950 1400
|
||||
Wire Wire Line
|
||||
3350 1400 3550 1400
|
||||
Wire Wire Line
|
||||
3350 1500 3550 1500
|
||||
Wire Wire Line
|
||||
3350 1800 3550 1800
|
||||
Wire Wire Line
|
||||
3350 2000 3550 2000
|
||||
Wire Wire Line
|
||||
3550 2700 3350 2700
|
||||
Wire Wire Line
|
||||
2600 2400 3550 2400
|
||||
Wire Wire Line
|
||||
2600 2500 3550 2500
|
||||
Wire Wire Line
|
||||
6100 2700 6200 2700
|
||||
Wire Wire Line
|
||||
6100 2600 6200 2600
|
||||
Text HLabel 6200 2700 2 50 Input ~ 0
|
||||
PER0_N
|
||||
Text HLabel 6200 2600 2 50 Input ~ 0
|
||||
PER0_P
|
||||
$Sheet
|
||||
S 5600 2550 500 200
|
||||
U 5DAB5272
|
||||
F0 "decap" 50
|
||||
F1 "decap.sch" 50
|
||||
F2 "IN+" I R 6100 2600 50
|
||||
F3 "OUT+" O L 5600 2600 50
|
||||
F4 "OUT-" O L 5600 2700 50
|
||||
F5 "IN-" I R 6100 2700 50
|
||||
$EndSheet
|
||||
Text Notes 5500 2200 0 50 ~ 0
|
||||
From add-in card transmitter to mainboard receiver\nPlace AC coupling capacitors here if necessary
|
||||
Text Label 4950 2700 0 50 ~ 0
|
||||
_PER0_N
|
||||
Text Label 4950 2600 0 50 ~ 0
|
||||
_PER0_P
|
||||
$Comp
|
||||
L PCIexpress:PCIexpress_x1 J2
|
||||
U 1 1 5D4FEBD7
|
||||
P 4150 900
|
||||
F 0 "J2" H 4150 1067 50 0000 C CNN
|
||||
F 1 "PCIexpress_x1" H 4150 976 50 0000 C CNN
|
||||
F 2 "PCIexpress:PCIexpress_x1" H 4150 -50 50 0001 C CNN
|
||||
F 3 "" H 4150 -50 50 0001 C CNN
|
||||
1 4150 900
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
3450 2900 3450 2800
|
||||
Connection ~ 3450 2800
|
||||
Wire Wire Line
|
||||
4850 2900 4850 2800
|
||||
Connection ~ 4850 2800
|
||||
$EndSCHEMATC
|
||||
@ -1,163 +0,0 @@
|
||||
EESchema-LIBRARY Version 2.4
|
||||
#encoding utf-8
|
||||
#
|
||||
# Device_C
|
||||
#
|
||||
DEF Device_C C 0 10 N Y 1 F N
|
||||
F0 "C" 25 100 50 H V L CNN
|
||||
F1 "Device_C" 25 -100 50 H V L CNN
|
||||
F2 "" 38 -150 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
C_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 20 -80 -30 80 -30 N
|
||||
P 2 0 1 20 -80 30 80 30 N
|
||||
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_R
|
||||
#
|
||||
DEF Device_R R 0 0 N Y 1 F N
|
||||
F0 "R" 80 0 50 V V C CNN
|
||||
F1 "Device_R" 0 0 50 V V C CNN
|
||||
F2 "" -70 0 50 V I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
R_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_PCIexpress_bracket
|
||||
#
|
||||
DEF PCIexpress_PCIexpress_bracket J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 0 50 H V C CNN
|
||||
F1 "PCIexpress_PCIexpress_bracket" 0 0 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
PCIexpress_bracket_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_PCIexpress_x1
|
||||
#
|
||||
DEF PCIexpress_PCIexpress_x1 J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 150 50 H V C CNN
|
||||
F1 "PCIexpress_PCIexpress_x1" 0 50 50 H V C CNN
|
||||
F2 "PCIexpress:PCIexpress_x1" 0 -950 50 H I C CNN
|
||||
F3 "" 0 -950 50 H I C CNN
|
||||
DRAW
|
||||
T 0 0 -1150 50 0 0 0 notch Normal 0 C C
|
||||
T 0 0 -1950 50 0 0 0 x1 Normal 0 C C
|
||||
S 450 0 -450 -2000 1 1 10 f
|
||||
P 2 0 1 0 450 -1200 -450 -1200 N
|
||||
X ~PRSNT1 A1 600 -100 150 L 50 50 1 1 P
|
||||
X +3.3V A10 600 -1000 150 L 50 50 1 1 w
|
||||
X ~PERST A11 600 -1100 150 L 50 50 1 1 O
|
||||
X GND A12 600 -1300 150 L 50 50 1 1 w
|
||||
X REFCLK+ A13 600 -1400 150 L 50 50 1 1 O
|
||||
X REFCLK- A14 600 -1500 150 L 50 50 1 1 O
|
||||
X GND A15 600 -1600 150 L 50 50 1 1 w
|
||||
X PERp0 A16 600 -1700 150 L 50 50 1 1 I
|
||||
X PERn0 A17 600 -1800 150 L 50 50 1 1 I
|
||||
X GND A18 600 -1900 150 L 50 50 1 1 w
|
||||
X +12V A2 600 -200 150 L 50 50 1 1 w
|
||||
X +12V A3 600 -300 150 L 50 50 1 1 w
|
||||
X GND A4 600 -400 150 L 50 50 1 1 w
|
||||
X TCK A5 600 -500 150 L 50 50 1 1 O
|
||||
X TDI A6 600 -600 150 L 50 50 1 1 O
|
||||
X TDO A7 600 -700 150 L 50 50 1 1 I
|
||||
X TMS A8 600 -800 150 L 50 50 1 1 O
|
||||
X +3.3V A9 600 -900 150 L 50 50 1 1 w
|
||||
X +12V B1 -600 -100 150 R 50 50 1 1 w
|
||||
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
|
||||
X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
|
||||
X RSVD B12 -600 -1300 150 R 50 50 1 1 N
|
||||
X GND B13 -600 -1400 150 R 50 50 1 1 w
|
||||
X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
|
||||
X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
|
||||
X GND B16 -600 -1700 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B17 -600 -1800 150 R 50 50 1 1 P
|
||||
X GND B18 -600 -1900 150 R 50 50 1 1 w
|
||||
X +12V B2 -600 -200 150 R 50 50 1 1 w
|
||||
X +12V B3 -600 -300 150 R 50 50 1 1 w
|
||||
X GND B4 -600 -400 150 R 50 50 1 1 w
|
||||
X SMCLK B5 -600 -500 150 R 50 50 1 1 C
|
||||
X SMDAT B6 -600 -600 150 R 50 50 1 1 C
|
||||
X GND B7 -600 -700 150 R 50 50 1 1 w
|
||||
X +3.3V B8 -600 -800 150 R 50 50 1 1 w
|
||||
X ~TRST B9 -600 -900 150 R 50 50 1 1 O
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+12V
|
||||
#
|
||||
DEF power_+12V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+12V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +12V 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3V
|
||||
#
|
||||
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS +3.3V
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3V3 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3VA
|
||||
#
|
||||
DEF power_+3.3VA #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3VA" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3.3VA 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GND
|
||||
#
|
||||
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GND" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
File diff suppressed because it is too large
Load Diff
536
PCIexpress_x1_low/PCIexpress_x1_low.kicad_pro
Normal file
536
PCIexpress_x1_low/PCIexpress_x1_low.kicad_pro
Normal file
@ -0,0 +1,536 @@
|
||||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.049999999999999996,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"pads": {
|
||||
"drill": 0.762,
|
||||
"height": 1.524,
|
||||
"width": 1.524
|
||||
},
|
||||
"silk_line_width": 0.12,
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"45_degree_only": false,
|
||||
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|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
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|
||||
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|
||||
"filename": "board_design_settings.json",
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "error",
|
||||
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|
||||
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|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint_type_mismatch": "error",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
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|
||||
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|
||||
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|
||||
"zone_has_empty_net": "error",
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
],
|
||||
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|
||||
{
|
||||
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|
||||
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|
||||
},
|
||||
{
|
||||
"diameter": 0.45,
|
||||
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|
||||
},
|
||||
{
|
||||
"diameter": 0.5,
|
||||
"drill": 0.25
|
||||
},
|
||||
{
|
||||
"diameter": 0.55,
|
||||
"drill": 0.3
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
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|
||||
},
|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
],
|
||||
"rule_severities": {
|
||||
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|
||||
"bus_entry_needed": "error",
|
||||
"bus_label_syntax": "error",
|
||||
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|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
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|
||||
},
|
||||
"meta": {
|
||||
"filename": "PCIexpress_x1_low.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.0889,
|
||||
"diff_pair_gap": 0.2,
|
||||
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|
||||
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|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
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|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"name": "Diff-100-PCIe",
|
||||
"nets": [
|
||||
"/PCIexpress_connector/_PER0_N",
|
||||
"/PCIexpress_connector/_PER0_P",
|
||||
"/PER0_N",
|
||||
"/PER0_P",
|
||||
"/PET0_N",
|
||||
"/PET0_P",
|
||||
"/REFCLK+",
|
||||
"/REFCLK-"
|
||||
],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.1,
|
||||
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|
||||
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|
||||
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|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "JLC2313-100d-3.5",
|
||||
"nets": [],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"name": "JLC2313-100d-4",
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
{
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"name": "JLC7628-100d-8",
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"drawing": {
|
||||
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|
||||
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|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.25,
|
||||
"pin_symbol_size": 0.0,
|
||||
"text_offset_ratio": 0.08
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "",
|
||||
"ngspice": {
|
||||
"fix_include_paths": true,
|
||||
"fix_passive_vals": false,
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"model_mode": 0,
|
||||
"workbook_filename": ""
|
||||
},
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"b58173cd-28d5-49a4-a789-299fbf6f5cc2",
|
||||
""
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00005d508b15",
|
||||
"PCIexpress_connector"
|
||||
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327
PCIexpress_x1_low/PCIexpress_x1_low.kicad_sch
Normal file
327
PCIexpress_x1_low/PCIexpress_x1_low.kicad_sch
Normal file
@ -0,0 +1,327 @@
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(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ada7"
|
||||
(reference "J1") (unit 1) (value "PCIexpress_bracket") (footprint "PCIexpress:PCIexpress_bracket_low")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d4febd7"
|
||||
(reference "J2") (unit 1) (value "PCIexpress_x1") (footprint "PCIexpress:PCIexpress_x1")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb/00000000-0000-0000-0000-00005d52dcbc"
|
||||
(reference "R1") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb/00000000-0000-0000-0000-00005d52e298"
|
||||
(reference "R2") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
)
|
||||
)
|
||||
@ -1,294 +0,0 @@
|
||||
update=ven 26 lug 2019 22:25:34 CEST
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=4
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.08889999999999999
|
||||
MinViaDiameter=0.45
|
||||
MinViaDrill=0.2
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.0889
|
||||
TrackWidth2=0.0889
|
||||
TrackWidth3=0.127
|
||||
TrackWidth4=0.2
|
||||
ViaDiameter1=0.45
|
||||
ViaDrill1=0.2
|
||||
ViaDiameter2=0.45
|
||||
ViaDrill2=0.2
|
||||
ViaDiameter3=0.5
|
||||
ViaDrill3=0.25
|
||||
ViaDiameter4=0.55
|
||||
ViaDrill4=0.3
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.2
|
||||
dPairViaGap1=0.25
|
||||
dPairWidth2=0.2
|
||||
dPairGap2=0.2
|
||||
dPairViaGap2=0.2
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.051
|
||||
SolderMaskMinWidth=0.25
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.0889
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.2
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/1]
|
||||
Name=Diff-100-PCIe
|
||||
Clearance=0.2
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.2
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/2]
|
||||
Name=JLC2313-100d-3.5
|
||||
Clearance=0.1
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.0889
|
||||
dPairGap=0.1016
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/3]
|
||||
Name=JLC2313-100d-4
|
||||
Clearance=0.1
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.1016
|
||||
dPairGap=0.127
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/4]
|
||||
Name=JLC7628-100d-8
|
||||
Clearance=0.2
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2032
|
||||
dPairGap=0.2032
|
||||
dPairViaGap=0.25
|
||||
@ -1,122 +0,0 @@
|
||||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 4
|
||||
Title "PCIexpress_x1_low"
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp "Author: Luca Anastasio"
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
Text Label 2350 2400 0 50 ~ 0
|
||||
PET0_N
|
||||
Text Label 2350 2300 0 50 ~ 0
|
||||
PET0_P
|
||||
Wire Wire Line
|
||||
2250 2400 2350 2400
|
||||
Wire Wire Line
|
||||
2250 2300 2350 2300
|
||||
Text Label 2350 2000 0 50 ~ 0
|
||||
REFCLK+
|
||||
Text Label 2350 2100 0 50 ~ 0
|
||||
REFCLK-
|
||||
Text Label 2350 1850 0 50 ~ 0
|
||||
~PERST
|
||||
Text Label 2350 1700 0 50 ~ 0
|
||||
~TRST
|
||||
Text Label 2350 1600 0 50 ~ 0
|
||||
TDI
|
||||
Text Label 2350 1500 0 50 ~ 0
|
||||
TCK
|
||||
Text Label 2350 1400 0 50 ~ 0
|
||||
TMS
|
||||
Text Label 1250 2000 2 50 ~ 0
|
||||
SMCLK
|
||||
Text Label 1250 2100 2 50 ~ 0
|
||||
SMDAT
|
||||
Text Label 1250 1850 2 50 ~ 0
|
||||
~WAKE
|
||||
Text Label 1250 1700 2 50 ~ 0
|
||||
TDO
|
||||
Text Label 1250 1150 2 50 ~ 0
|
||||
~PRSNT1
|
||||
Text Label 1250 1250 2 50 ~ 0
|
||||
~PRSNT2x1
|
||||
Text Label 1250 1350 2 50 ~ 0
|
||||
~PRSNT2x4
|
||||
Text Label 1250 1450 2 50 ~ 0
|
||||
~PRSNT2x8
|
||||
Text Label 1250 1550 2 50 ~ 0
|
||||
~PRSNT2x16
|
||||
Wire Wire Line
|
||||
1250 2100 1350 2100
|
||||
Wire Wire Line
|
||||
1250 2000 1350 2000
|
||||
Wire Wire Line
|
||||
2250 2100 2350 2100
|
||||
Wire Wire Line
|
||||
2250 2000 2350 2000
|
||||
Wire Wire Line
|
||||
2250 1700 2350 1700
|
||||
Wire Wire Line
|
||||
2250 1600 2350 1600
|
||||
Wire Wire Line
|
||||
2250 1500 2350 1500
|
||||
Wire Wire Line
|
||||
2250 1400 2350 1400
|
||||
Wire Wire Line
|
||||
1250 1550 1350 1550
|
||||
Wire Wire Line
|
||||
1250 1450 1350 1450
|
||||
Wire Wire Line
|
||||
1250 1350 1350 1350
|
||||
Wire Wire Line
|
||||
1250 1250 1350 1250
|
||||
Wire Wire Line
|
||||
1250 1700 1350 1700
|
||||
Wire Wire Line
|
||||
1250 1850 1350 1850
|
||||
Wire Wire Line
|
||||
1250 1150 1350 1150
|
||||
Wire Wire Line
|
||||
2250 1850 2350 1850
|
||||
Wire Wire Line
|
||||
1250 2300 1350 2300
|
||||
Wire Wire Line
|
||||
1250 2400 1350 2400
|
||||
Text Label 1250 2300 2 50 ~ 0
|
||||
PER0_P
|
||||
Text Label 1250 2400 2 50 ~ 0
|
||||
PER0_N
|
||||
$Sheet
|
||||
S 1350 1050 900 1450
|
||||
U 5D508B15
|
||||
F0 "PCIexpress_connector" 50
|
||||
F1 "PCIexpress_connector.sch" 50
|
||||
F2 "PET0_P" O R 2250 2300 50
|
||||
F3 "PET0_N" O R 2250 2400 50
|
||||
F4 "REFCLK+" O R 2250 2000 50
|
||||
F5 "REFCLK-" O R 2250 2100 50
|
||||
F6 "~PRSNT2x16" U L 1350 1550 50
|
||||
F7 "TDO" I L 1350 1700 50
|
||||
F8 "TMS" O R 2250 1400 50
|
||||
F9 "TDI" O R 2250 1600 50
|
||||
F10 "TCK" O R 2250 1500 50
|
||||
F11 "~WAKE" I L 1350 1850 50
|
||||
F12 "~TRST" O R 2250 1700 50
|
||||
F13 "SMCLK" B L 1350 2000 50
|
||||
F14 "SMDAT" B L 1350 2100 50
|
||||
F15 "~PERST" O R 2250 1850 50
|
||||
F16 "~PRSNT1" U L 1350 1150 50
|
||||
F17 "~PRSNT2x8" U L 1350 1450 50
|
||||
F18 "~PRSNT2x4" U L 1350 1350 50
|
||||
F19 "~PRSNT2x1" U L 1350 1250 50
|
||||
F20 "PER0_N" I L 1350 2400 50
|
||||
F21 "PER0_P" I L 1350 2300 50
|
||||
$EndSheet
|
||||
$EndSCHEMATC
|
||||
130
PCIexpress_x1_low/decap.kicad_sch
Normal file
130
PCIexpress_x1_low/decap.kicad_sch
Normal file
@ -0,0 +1,130 @@
|
||||
(kicad_sch (version 20211123) (generator eeschema)
|
||||
|
||||
(uuid 91db1474-9ebd-4d2b-9803-9aca68c8aac3)
|
||||
|
||||
(paper "A4")
|
||||
|
||||
(title_block
|
||||
(title "PCIexpress_x1_low")
|
||||
(company "Author: Luca Anastasio")
|
||||
)
|
||||
|
||||
(lib_symbols
|
||||
(symbol "Device:C" (pin_numbers hide) (pin_names (offset 0.254)) (in_bom yes) (on_board yes)
|
||||
(property "Reference" "C" (id 0) (at 0.635 2.54 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
)
|
||||
(property "Value" "C" (id 1) (at 0.635 -2.54 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
)
|
||||
(property "Footprint" "" (id 2) (at 0.9652 -3.81 0)
|
||||
(effects (font (size 1.27 1.27)) hide)
|
||||
)
|
||||
(property "Datasheet" "~" (id 3) (at 0 0 0)
|
||||
(effects (font (size 1.27 1.27)) hide)
|
||||
)
|
||||
(property "ki_keywords" "cap capacitor" (id 4) (at 0 0 0)
|
||||
(effects (font (size 1.27 1.27)) hide)
|
||||
)
|
||||
(property "ki_description" "Unpolarized capacitor" (id 5) (at 0 0 0)
|
||||
(effects (font (size 1.27 1.27)) hide)
|
||||
)
|
||||
(property "ki_fp_filters" "C_*" (id 6) (at 0 0 0)
|
||||
(effects (font (size 1.27 1.27)) hide)
|
||||
)
|
||||
(symbol "C_0_1"
|
||||
(polyline
|
||||
(pts
|
||||
(xy -2.032 -0.762)
|
||||
(xy 2.032 -0.762)
|
||||
)
|
||||
(stroke (width 0.508) (type default) (color 0 0 0 0))
|
||||
(fill (type none))
|
||||
)
|
||||
(polyline
|
||||
(pts
|
||||
(xy -2.032 0.762)
|
||||
(xy 2.032 0.762)
|
||||
)
|
||||
(stroke (width 0.508) (type default) (color 0 0 0 0))
|
||||
(fill (type none))
|
||||
)
|
||||
)
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EESchema Schematic File Version 4
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EELAYER END
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$Descr A4 11693 8268
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encoding utf-8
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Sheet 3 4
|
||||
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|
||||
Date ""
|
||||
Rev ""
|
||||
Comp "Author: Luca Anastasio"
|
||||
Comment1 ""
|
||||
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|
||||
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|
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F 0 "R1" H 4820 3846 50 0000 L CNN
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F 2 "Resistor_SMD:R_0603_1608Metric" V 4680 3800 50 0001 C CNN
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F 3 "~" H 4750 3800 50 0001 C CNN
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||||
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AR Path="/5D508B15/5D9667F2/5D52E298" Ref="R18" Part="1"
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1 5750 3800
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||||
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|
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|
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|
||||
1 5750 4050
|
||||
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4750 3950 4750 4050
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Wire Wire Line
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5750 3950 5750 4050
|
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|
||||
IN+
|
||||
Text HLabel 4850 3550 2 50 Input ~ 0
|
||||
IN-
|
||||
Text HLabel 5650 3550 0 50 Output ~ 0
|
||||
OUT+
|
||||
Text HLabel 4650 3550 0 50 Output ~ 0
|
||||
OUT-
|
||||
Wire Wire Line
|
||||
5750 3650 5750 3550
|
||||
Wire Wire Line
|
||||
5650 3550 5750 3550
|
||||
Connection ~ 5750 3550
|
||||
Wire Wire Line
|
||||
5750 3550 5850 3550
|
||||
Wire Wire Line
|
||||
4650 3550 4750 3550
|
||||
Wire Wire Line
|
||||
4750 3650 4750 3550
|
||||
Connection ~ 4750 3550
|
||||
Wire Wire Line
|
||||
4750 3550 4850 3550
|
||||
$EndSCHEMATC
|
||||
1621
PCIexpress_x4_full/PCIexpress_connector.kicad_sch
Normal file
1621
PCIexpress_x4_full/PCIexpress_connector.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
@ -1,524 +0,0 @@
|
||||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
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EELAYER END
|
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$Descr A4 8268 11693 portrait
|
||||
encoding utf-8
|
||||
Sheet 2 10
|
||||
Title "PCIexpress_x4_full"
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp "Author: Luca Anastasio"
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Comp
|
||||
L PCIexpress:PCIexpress_bracket J1
|
||||
U 1 1 5D51ADA7
|
||||
P 2200 10750
|
||||
F 0 "J1" H 2225 10796 50 0000 L CNN
|
||||
F 1 "PCIexpress_bracket" H 2225 10705 50 0000 L CNN
|
||||
F 2 "PCIexpress:PCIexpress_bracket_full" H 2200 10750 50 0001 C CNN
|
||||
F 3 "" H 2200 10750 50 0001 C CNN
|
||||
1 2200 10750
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:GND #PWR0101
|
||||
U 1 1 5D51ADB3
|
||||
P 3450 4400
|
||||
F 0 "#PWR0101" H 3450 4150 50 0001 C CNN
|
||||
F 1 "GND" H 3455 4227 50 0000 C CNN
|
||||
F 2 "" H 3450 4400 50 0001 C CNN
|
||||
F 3 "" H 3450 4400 50 0001 C CNN
|
||||
1 3450 4400
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:GND #PWR0102
|
||||
U 1 1 5D51ADB9
|
||||
P 4850 4400
|
||||
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|
||||
F 1 "GND" H 4855 4227 50 0000 C CNN
|
||||
F 2 "" H 4850 4400 50 0001 C CNN
|
||||
F 3 "" H 4850 4400 50 0001 C CNN
|
||||
1 4850 4400
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
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|
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U 1 1 5D51AE8A
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P 3350 1700
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|
||||
AR Path="/5D508B15/5D51AE8A" Ref="#PWR0103" Part="1"
|
||||
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|
||||
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|
||||
F 2 "" H 3350 1700 50 0001 C CNN
|
||||
F 3 "" H 3350 1700 50 0001 C CNN
|
||||
1 3350 1700
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0 -1 -1 0
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L power:+3.3V #PWR?
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P 4950 1800
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||||
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|
||||
AR Path="/5D508B15/5D51AE90" Ref="#PWR0104" Part="1"
|
||||
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|
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|
||||
F 2 "" H 4950 1800 50 0001 C CNN
|
||||
F 3 "" H 4950 1800 50 0001 C CNN
|
||||
1 4950 1800
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0 1 1 0
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$EndComp
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$Comp
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L power:+3.3V #PWR?
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P 4950 1900
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|
||||
AR Path="/5D508B15/5D51AE96" Ref="#PWR0105" Part="1"
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||||
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|
||||
F 2 "" H 4950 1900 50 0001 C CNN
|
||||
F 3 "" H 4950 1900 50 0001 C CNN
|
||||
1 4950 1900
|
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0 1 1 0
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$EndComp
|
||||
$Comp
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||||
L power:+3.3VA #PWR?
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||||
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||||
P 3350 1900
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|
||||
AR Path="/5D508B15/5D51AE9C" Ref="#PWR0106" Part="1"
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||||
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|
||||
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|
||||
F 2 "" H 3350 1900 50 0001 C CNN
|
||||
F 3 "" H 3350 1900 50 0001 C CNN
|
||||
1 3350 1900
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||||
0 -1 -1 0
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||||
$EndComp
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$Comp
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||||
L power:+12V #PWR?
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||||
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||||
P 3450 900
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||||
AR Path="/5D51AEA2" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D508B15/5D51AEA2" Ref="#PWR0107" Part="1"
|
||||
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|
||||
F 1 "+12V" H 3465 1073 50 0000 C CNN
|
||||
F 2 "" H 3450 900 50 0001 C CNN
|
||||
F 3 "" H 3450 900 50 0001 C CNN
|
||||
1 3450 900
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||||
1 0 0 -1
|
||||
$EndComp
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||||
$Comp
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||||
L power:+12V #PWR?
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||||
U 1 1 5D51AEA8
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P 4850 900
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||||
AR Path="/5D51AEA8" Ref="#PWR?" Part="1"
|
||||
AR Path="/5D508B15/5D51AEA8" Ref="#PWR0108" Part="1"
|
||||
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|
||||
F 1 "+12V" H 4865 1073 50 0000 C CNN
|
||||
F 2 "" H 4850 900 50 0001 C CNN
|
||||
F 3 "" H 4850 900 50 0001 C CNN
|
||||
1 4850 900
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||||
1 0 0 -1
|
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$EndComp
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||||
Text HLabel 2000 2400 0 50 Output ~ 0
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PET0_P
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||||
Text HLabel 2000 2500 0 50 Output ~ 0
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||||
PET0_N
|
||||
Text HLabel 4950 2300 2 50 Output ~ 0
|
||||
REFCLK+
|
||||
Text HLabel 4950 2400 2 50 Output ~ 0
|
||||
REFCLK-
|
||||
Text Notes 2800 2150 2 50 ~ 0
|
||||
From mainboard transmitter to add-in card receiver\nPlace termination resistors here if necessary
|
||||
Text HLabel 4950 1600 2 50 Input ~ 0
|
||||
TDO
|
||||
Text HLabel 4950 1700 2 50 Output ~ 0
|
||||
TMS
|
||||
Text HLabel 4950 1500 2 50 Output ~ 0
|
||||
TDI
|
||||
Text HLabel 4950 1400 2 50 Output ~ 0
|
||||
TCK
|
||||
Text HLabel 2000 3000 0 50 Output ~ 0
|
||||
PET1_P
|
||||
Text HLabel 2000 3100 0 50 Output ~ 0
|
||||
PET1_N
|
||||
Text HLabel 2000 3400 0 50 Output ~ 0
|
||||
PET2_P
|
||||
Text HLabel 2000 3500 0 50 Output ~ 0
|
||||
PET2_N
|
||||
Text HLabel 2000 3800 0 50 Output ~ 0
|
||||
PET3_P
|
||||
Text HLabel 2000 3900 0 50 Output ~ 0
|
||||
PET3_N
|
||||
Text HLabel 6200 3200 2 50 Input ~ 0
|
||||
PER1_P
|
||||
Text HLabel 6200 3300 2 50 Input ~ 0
|
||||
PER1_N
|
||||
Text HLabel 6200 3600 2 50 Input ~ 0
|
||||
PER2_P
|
||||
Text HLabel 6200 3700 2 50 Input ~ 0
|
||||
PER2_N
|
||||
Text HLabel 6200 4000 2 50 Input ~ 0
|
||||
PER3_P
|
||||
Text HLabel 6200 4100 2 50 Input ~ 0
|
||||
PER3_N
|
||||
Text HLabel 3350 2000 0 50 Input ~ 0
|
||||
~WAKE
|
||||
Text HLabel 3350 1800 0 50 Output ~ 0
|
||||
~TRST
|
||||
Text HLabel 3350 1400 0 50 BiDi ~ 0
|
||||
SMCLK
|
||||
Text HLabel 3350 1500 0 50 BiDi ~ 0
|
||||
SMDAT
|
||||
Text HLabel 4950 2000 2 50 Output ~ 0
|
||||
~PERST
|
||||
Text HLabel 4950 1000 2 50 UnSpc ~ 0
|
||||
~PRSNT1
|
||||
Text HLabel 3350 4200 0 50 UnSpc ~ 0
|
||||
~PRSNT2x4
|
||||
Text HLabel 3350 2700 0 50 UnSpc ~ 0
|
||||
~PRSNT2x1
|
||||
$Sheet
|
||||
S 2100 2350 500 200
|
||||
U 5D516DFB
|
||||
F0 "term" 50
|
||||
F1 "term.sch" 50
|
||||
F2 "IN+" I R 2600 2400 50
|
||||
F3 "IN-" I R 2600 2500 50
|
||||
F4 "OUT+" O L 2100 2400 50
|
||||
F5 "OUT-" O L 2100 2500 50
|
||||
$EndSheet
|
||||
$Sheet
|
||||
S 2100 2950 500 200
|
||||
U 5D5DF906
|
||||
F0 "sheet5D5DF900" 50
|
||||
F1 "term.sch" 50
|
||||
F2 "IN+" I R 2600 3000 50
|
||||
F3 "IN-" I R 2600 3100 50
|
||||
F4 "OUT+" O L 2100 3000 50
|
||||
F5 "OUT-" O L 2100 3100 50
|
||||
$EndSheet
|
||||
$Sheet
|
||||
S 2100 3350 500 200
|
||||
U 5D761049
|
||||
F0 "sheet5D761043" 50
|
||||
F1 "term.sch" 50
|
||||
F2 "IN+" I R 2600 3400 50
|
||||
F3 "IN-" I R 2600 3500 50
|
||||
F4 "OUT+" O L 2100 3400 50
|
||||
F5 "OUT-" O L 2100 3500 50
|
||||
$EndSheet
|
||||
$Sheet
|
||||
S 2100 3750 500 200
|
||||
U 5D76CFC3
|
||||
F0 "sheet5D76CFBD" 50
|
||||
F1 "term.sch" 50
|
||||
F2 "IN+" I R 2600 3800 50
|
||||
F3 "IN-" I R 2600 3900 50
|
||||
F4 "OUT+" O L 2100 3800 50
|
||||
F5 "OUT-" O L 2100 3900 50
|
||||
$EndSheet
|
||||
Wire Wire Line
|
||||
3450 1300 3550 1300
|
||||
Wire Wire Line
|
||||
3550 1600 3450 1600
|
||||
Connection ~ 3450 1600
|
||||
Wire Wire Line
|
||||
3450 1600 3450 1300
|
||||
Wire Wire Line
|
||||
3550 2300 3450 2300
|
||||
Connection ~ 3450 2300
|
||||
Wire Wire Line
|
||||
3450 2300 3450 1600
|
||||
Wire Wire Line
|
||||
3550 2600 3450 2600
|
||||
Connection ~ 3450 2600
|
||||
Wire Wire Line
|
||||
3450 2600 3450 2300
|
||||
Wire Wire Line
|
||||
3550 2800 3450 2800
|
||||
Connection ~ 3450 2800
|
||||
Wire Wire Line
|
||||
3450 2800 3450 2600
|
||||
Wire Wire Line
|
||||
3550 3200 3450 3200
|
||||
Connection ~ 3450 3200
|
||||
Wire Wire Line
|
||||
3450 3200 3450 2800
|
||||
Wire Wire Line
|
||||
3550 3300 3450 3300
|
||||
Connection ~ 3450 3300
|
||||
Wire Wire Line
|
||||
3450 3300 3450 3200
|
||||
Wire Wire Line
|
||||
3550 3600 3450 3600
|
||||
Connection ~ 3450 3600
|
||||
Wire Wire Line
|
||||
3450 3600 3450 3300
|
||||
Wire Wire Line
|
||||
3550 3700 3450 3700
|
||||
Connection ~ 3450 3700
|
||||
Wire Wire Line
|
||||
3450 3700 3450 3600
|
||||
Wire Wire Line
|
||||
3550 4000 3450 4000
|
||||
Connection ~ 3450 4000
|
||||
Wire Wire Line
|
||||
3450 4000 3450 3700
|
||||
Wire Wire Line
|
||||
3550 4300 3450 4300
|
||||
Wire Wire Line
|
||||
3450 4300 3450 4000
|
||||
Wire Wire Line
|
||||
4850 1300 4750 1300
|
||||
Wire Wire Line
|
||||
4850 1300 4850 2200
|
||||
Wire Wire Line
|
||||
4750 2200 4850 2200
|
||||
Connection ~ 4850 2200
|
||||
Wire Wire Line
|
||||
4850 2200 4850 2500
|
||||
Wire Wire Line
|
||||
4750 2500 4850 2500
|
||||
Connection ~ 4850 2500
|
||||
Wire Wire Line
|
||||
4850 2500 4850 2800
|
||||
Wire Wire Line
|
||||
4750 2800 4850 2800
|
||||
Connection ~ 4850 2800
|
||||
Wire Wire Line
|
||||
4850 2800 4850 3100
|
||||
Wire Wire Line
|
||||
4750 3100 4850 3100
|
||||
Connection ~ 4850 3100
|
||||
Wire Wire Line
|
||||
4850 3100 4850 3400
|
||||
Wire Wire Line
|
||||
4750 3400 4850 3400
|
||||
Connection ~ 4850 3400
|
||||
Wire Wire Line
|
||||
4850 3400 4850 3500
|
||||
Wire Wire Line
|
||||
4750 3500 4850 3500
|
||||
Connection ~ 4850 3500
|
||||
Wire Wire Line
|
||||
4850 3500 4850 3800
|
||||
Wire Wire Line
|
||||
4750 3800 4850 3800
|
||||
Connection ~ 4850 3800
|
||||
Wire Wire Line
|
||||
4850 3800 4850 3900
|
||||
Wire Wire Line
|
||||
4750 3900 4850 3900
|
||||
Connection ~ 4850 3900
|
||||
Wire Wire Line
|
||||
4850 3900 4850 4200
|
||||
Wire Wire Line
|
||||
4750 4200 4850 4200
|
||||
Wire Wire Line
|
||||
4750 1000 4950 1000
|
||||
Wire Wire Line
|
||||
4850 900 4850 1100
|
||||
Wire Wire Line
|
||||
4850 1100 4750 1100
|
||||
Wire Wire Line
|
||||
4750 1200 4850 1200
|
||||
Wire Wire Line
|
||||
4850 1200 4850 1100
|
||||
Connection ~ 4850 1100
|
||||
Wire Wire Line
|
||||
3550 1200 3450 1200
|
||||
Wire Wire Line
|
||||
3450 1200 3450 1100
|
||||
Wire Wire Line
|
||||
3550 1000 3450 1000
|
||||
Connection ~ 3450 1000
|
||||
Wire Wire Line
|
||||
3450 1000 3450 900
|
||||
Connection ~ 3450 1100
|
||||
Wire Wire Line
|
||||
3450 1100 3450 1000
|
||||
Wire Wire Line
|
||||
3450 1100 3550 1100
|
||||
Wire Wire Line
|
||||
3350 1700 3550 1700
|
||||
Wire Wire Line
|
||||
4750 1800 4950 1800
|
||||
Wire Wire Line
|
||||
4750 1900 4950 1900
|
||||
Wire Wire Line
|
||||
3350 1900 3550 1900
|
||||
Wire Wire Line
|
||||
2000 2400 2100 2400
|
||||
Wire Wire Line
|
||||
2000 2500 2100 2500
|
||||
Wire Wire Line
|
||||
2000 3000 2100 3000
|
||||
Wire Wire Line
|
||||
2000 3100 2100 3100
|
||||
Wire Wire Line
|
||||
4750 2300 4950 2300
|
||||
Wire Wire Line
|
||||
4750 2400 4950 2400
|
||||
Wire Wire Line
|
||||
4750 2600 5600 2600
|
||||
Wire Wire Line
|
||||
4750 2700 5600 2700
|
||||
Wire Wire Line
|
||||
2600 3400 3550 3400
|
||||
Wire Wire Line
|
||||
2600 3500 3550 3500
|
||||
Wire Wire Line
|
||||
2600 3800 3550 3800
|
||||
Wire Wire Line
|
||||
2600 3900 3550 3900
|
||||
Wire Wire Line
|
||||
4750 2000 4950 2000
|
||||
Wire Wire Line
|
||||
4750 1700 4950 1700
|
||||
Wire Wire Line
|
||||
4750 1600 4950 1600
|
||||
Wire Wire Line
|
||||
4750 1500 4950 1500
|
||||
Wire Wire Line
|
||||
4750 1400 4950 1400
|
||||
Wire Wire Line
|
||||
3350 1400 3550 1400
|
||||
Wire Wire Line
|
||||
3350 1500 3550 1500
|
||||
Wire Wire Line
|
||||
3350 1800 3550 1800
|
||||
Wire Wire Line
|
||||
3350 2000 3550 2000
|
||||
Wire Wire Line
|
||||
3350 4200 3550 4200
|
||||
Wire Wire Line
|
||||
3550 2700 3350 2700
|
||||
Wire Wire Line
|
||||
2600 2400 3550 2400
|
||||
Wire Wire Line
|
||||
2600 2500 3550 2500
|
||||
Wire Wire Line
|
||||
2600 3000 3550 3000
|
||||
Wire Wire Line
|
||||
2600 3100 3550 3100
|
||||
Wire Wire Line
|
||||
2000 3400 2100 3400
|
||||
Wire Wire Line
|
||||
2000 3500 2100 3500
|
||||
Wire Wire Line
|
||||
2000 3800 2100 3800
|
||||
Wire Wire Line
|
||||
2000 3900 2100 3900
|
||||
Wire Wire Line
|
||||
6100 2700 6200 2700
|
||||
Wire Wire Line
|
||||
6100 2600 6200 2600
|
||||
Text HLabel 6200 2700 2 50 Input ~ 0
|
||||
PER0_N
|
||||
Text HLabel 6200 2600 2 50 Input ~ 0
|
||||
PER0_P
|
||||
$Sheet
|
||||
S 5600 2550 500 200
|
||||
U 5DAB5272
|
||||
F0 "decap" 50
|
||||
F1 "decap.sch" 50
|
||||
F2 "IN+" I R 6100 2600 50
|
||||
F3 "OUT+" O L 5600 2600 50
|
||||
F4 "OUT-" O L 5600 2700 50
|
||||
F5 "IN-" I R 6100 2700 50
|
||||
$EndSheet
|
||||
Wire Wire Line
|
||||
4750 3200 5600 3200
|
||||
Wire Wire Line
|
||||
4750 3300 5600 3300
|
||||
Wire Wire Line
|
||||
6100 3300 6200 3300
|
||||
Wire Wire Line
|
||||
6100 3200 6200 3200
|
||||
$Sheet
|
||||
S 5600 3150 500 200
|
||||
U 5DB8E95F
|
||||
F0 "sheet5DB8E955" 50
|
||||
F1 "decap.sch" 50
|
||||
F2 "IN+" I R 6100 3200 50
|
||||
F3 "OUT+" O L 5600 3200 50
|
||||
F4 "OUT-" O L 5600 3300 50
|
||||
F5 "IN-" I R 6100 3300 50
|
||||
$EndSheet
|
||||
Wire Wire Line
|
||||
4750 3600 5600 3600
|
||||
Wire Wire Line
|
||||
4750 3700 5600 3700
|
||||
Wire Wire Line
|
||||
6100 3700 6200 3700
|
||||
Wire Wire Line
|
||||
6100 3600 6200 3600
|
||||
$Sheet
|
||||
S 5600 3550 500 200
|
||||
U 5DBA1257
|
||||
F0 "sheet5DBA124D" 50
|
||||
F1 "decap.sch" 50
|
||||
F2 "IN+" I R 6100 3600 50
|
||||
F3 "OUT+" O L 5600 3600 50
|
||||
F4 "OUT-" O L 5600 3700 50
|
||||
F5 "IN-" I R 6100 3700 50
|
||||
$EndSheet
|
||||
Wire Wire Line
|
||||
4750 4100 5600 4100
|
||||
Wire Wire Line
|
||||
6100 4100 6200 4100
|
||||
Wire Wire Line
|
||||
6100 4000 6200 4000
|
||||
$Sheet
|
||||
S 5600 3950 500 200
|
||||
U 5DBB44A0
|
||||
F0 "sheet5DBB4496" 50
|
||||
F1 "decap.sch" 50
|
||||
F2 "IN+" I R 6100 4000 50
|
||||
F3 "OUT+" O L 5600 4000 50
|
||||
F4 "OUT-" O L 5600 4100 50
|
||||
F5 "IN-" I R 6100 4100 50
|
||||
$EndSheet
|
||||
Wire Wire Line
|
||||
4750 4000 5600 4000
|
||||
Text Label 4950 4100 0 50 ~ 0
|
||||
_PER3_N
|
||||
Text Label 4950 4000 0 50 ~ 0
|
||||
_PER3_P
|
||||
Text Label 4950 3700 0 50 ~ 0
|
||||
_PER2_N
|
||||
Text Label 4950 3600 0 50 ~ 0
|
||||
_PER2_P
|
||||
Text Notes 5500 2200 0 50 ~ 0
|
||||
From add-in card transmitter to mainboard receiver\nPlace AC coupling capacitors here if necessary
|
||||
Text Label 4950 3300 0 50 ~ 0
|
||||
_PER1_N
|
||||
Text Label 4950 3200 0 50 ~ 0
|
||||
_PER1_P
|
||||
Text Label 4950 2700 0 50 ~ 0
|
||||
_PER0_N
|
||||
Text Label 4950 2600 0 50 ~ 0
|
||||
_PER0_P
|
||||
$Comp
|
||||
L PCIexpress:PCIexpress_x4 J2
|
||||
U 1 1 5D51070F
|
||||
P 4150 900
|
||||
F 0 "J2" H 4150 1067 50 0000 C CNN
|
||||
F 1 "PCIexpress_x4" H 4150 976 50 0000 C CNN
|
||||
F 2 "PCIexpress:PCIexpress_x4" H 4150 -150 50 0001 C CNN
|
||||
F 3 "" H 4150 -150 50 0001 C CNN
|
||||
1 4150 900
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
3450 4400 3450 4300
|
||||
Connection ~ 3450 4300
|
||||
Wire Wire Line
|
||||
4850 4400 4850 4200
|
||||
Connection ~ 4850 4200
|
||||
$EndSCHEMATC
|
||||
@ -1,193 +0,0 @@
|
||||
EESchema-LIBRARY Version 2.4
|
||||
#encoding utf-8
|
||||
#
|
||||
# Device_C
|
||||
#
|
||||
DEF Device_C C 0 10 N Y 1 F N
|
||||
F0 "C" 25 100 50 H V L CNN
|
||||
F1 "Device_C" 25 -100 50 H V L CNN
|
||||
F2 "" 38 -150 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
C_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 20 -80 -30 80 -30 N
|
||||
P 2 0 1 20 -80 30 80 30 N
|
||||
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_R
|
||||
#
|
||||
DEF Device_R R 0 0 N Y 1 F N
|
||||
F0 "R" 80 0 50 V V C CNN
|
||||
F1 "Device_R" 0 0 50 V V C CNN
|
||||
F2 "" -70 0 50 V I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
R_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_PCIexpress_bracket
|
||||
#
|
||||
DEF PCIexpress_PCIexpress_bracket J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 0 50 H V C CNN
|
||||
F1 "PCIexpress_PCIexpress_bracket" 0 0 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
PCIexpress_bracket_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PCIexpress_PCIexpress_x4
|
||||
#
|
||||
DEF PCIexpress_PCIexpress_x4 J 0 40 Y Y 1 F N
|
||||
F0 "J" 0 150 50 H V C CNN
|
||||
F1 "PCIexpress_PCIexpress_x4" 0 50 50 H V C CNN
|
||||
F2 "PCIexpress:PCIexpress_x4" 0 -1050 50 H I C CNN
|
||||
F3 "" 0 -1050 50 H I C CNN
|
||||
DRAW
|
||||
T 0 0 -1150 50 0 0 0 notch Normal 0 C C
|
||||
T 0 0 -1950 50 0 0 0 x1 Normal 0 C C
|
||||
T 0 0 -3450 50 0 0 0 x4 Normal 0 C C
|
||||
S 450 0 -450 -3500 1 1 10 f
|
||||
P 2 0 1 0 450 -2000 -450 -2000 N
|
||||
P 2 0 1 0 450 -1200 -450 -1200 N
|
||||
X ~PRSNT1 A1 600 -100 150 L 50 50 1 1 P
|
||||
X +3.3V A10 600 -1000 150 L 50 50 1 1 w
|
||||
X ~PERST A11 600 -1100 150 L 50 50 1 1 O
|
||||
X GND A12 600 -1300 150 L 50 50 1 1 w
|
||||
X REFCLK+ A13 600 -1400 150 L 50 50 1 1 O
|
||||
X REFCLK- A14 600 -1500 150 L 50 50 1 1 O
|
||||
X GND A15 600 -1600 150 L 50 50 1 1 w
|
||||
X PERp0 A16 600 -1700 150 L 50 50 1 1 I
|
||||
X PERn0 A17 600 -1800 150 L 50 50 1 1 I
|
||||
X GND A18 600 -1900 150 L 50 50 1 1 w
|
||||
X RSVD A19 600 -2100 150 L 50 50 1 1 N
|
||||
X +12V A2 600 -200 150 L 50 50 1 1 w
|
||||
X GND A20 600 -2200 150 L 50 50 1 1 w
|
||||
X PERp1 A21 600 -2300 150 L 50 50 1 1 I
|
||||
X PERn1 A22 600 -2400 150 L 50 50 1 1 I
|
||||
X GND A23 600 -2500 150 L 50 50 1 1 w
|
||||
X GND A24 600 -2600 150 L 50 50 1 1 w
|
||||
X PERp2 A25 600 -2700 150 L 50 50 1 1 I
|
||||
X PERn2 A26 600 -2800 150 L 50 50 1 1 I
|
||||
X GND A27 600 -2900 150 L 50 50 1 1 w
|
||||
X GND A28 600 -3000 150 L 50 50 1 1 w
|
||||
X PERp3 A29 600 -3100 150 L 50 50 1 1 I
|
||||
X +12V A3 600 -300 150 L 50 50 1 1 w
|
||||
X PERn3 A30 600 -3200 150 L 50 50 1 1 I
|
||||
X GND A31 600 -3300 150 L 50 50 1 1 w
|
||||
X RSVD A32 600 -3400 150 L 50 50 1 1 N
|
||||
X GND A4 600 -400 150 L 50 50 1 1 w
|
||||
X TCK A5 600 -500 150 L 50 50 1 1 O
|
||||
X TDI A6 600 -600 150 L 50 50 1 1 O
|
||||
X TDO A7 600 -700 150 L 50 50 1 1 I
|
||||
X TMS A8 600 -800 150 L 50 50 1 1 O
|
||||
X +3.3V A9 600 -900 150 L 50 50 1 1 w
|
||||
X +12V B1 -600 -100 150 R 50 50 1 1 w
|
||||
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
|
||||
X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
|
||||
X RSVD B12 -600 -1300 150 R 50 50 1 1 N
|
||||
X GND B13 -600 -1400 150 R 50 50 1 1 w
|
||||
X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
|
||||
X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
|
||||
X GND B16 -600 -1700 150 R 50 50 1 1 w
|
||||
X ~PRSNT2 B17 -600 -1800 150 R 50 50 1 1 P
|
||||
X GND B18 -600 -1900 150 R 50 50 1 1 w
|
||||
X PETp1 B19 -600 -2100 150 R 50 50 1 1 O
|
||||
X +12V B2 -600 -200 150 R 50 50 1 1 w
|
||||
X PETn1 B20 -600 -2200 150 R 50 50 1 1 O
|
||||
X GND B21 -600 -2300 150 R 50 50 1 1 w
|
||||
X GND B22 -600 -2400 150 R 50 50 1 1 w
|
||||
X PETp2 B23 -600 -2500 150 R 50 50 1 1 O
|
||||
X PETn2 B24 -600 -2600 150 R 50 50 1 1 O
|
||||
X GND B25 -600 -2700 150 R 50 50 1 1 w
|
||||
X GND B26 -600 -2800 150 R 50 50 1 1 w
|
||||
X PETp3 B27 -600 -2900 150 R 50 50 1 1 O
|
||||
X PETn3 B28 -600 -3000 150 R 50 50 1 1 O
|
||||
X GND B29 -600 -3100 150 R 50 50 1 1 w
|
||||
X +12V B3 -600 -300 150 R 50 50 1 1 w
|
||||
X RSVD B30 -600 -3200 150 R 50 50 1 1 N
|
||||
X ~PRSNT2 B31 -600 -3300 150 R 50 50 1 1 P
|
||||
X GND B32 -600 -3400 150 R 50 50 1 1 w
|
||||
X GND B4 -600 -400 150 R 50 50 1 1 w
|
||||
X SMCLK B5 -600 -500 150 R 50 50 1 1 C
|
||||
X SMDAT B6 -600 -600 150 R 50 50 1 1 C
|
||||
X GND B7 -600 -700 150 R 50 50 1 1 w
|
||||
X +3.3V B8 -600 -800 150 R 50 50 1 1 w
|
||||
X ~TRST B9 -600 -900 150 R 50 50 1 1 O
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+12V
|
||||
#
|
||||
DEF power_+12V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+12V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +12V 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3V
|
||||
#
|
||||
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS +3.3V
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3V3 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3VA
|
||||
#
|
||||
DEF power_+3.3VA #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3VA" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3.3VA 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GND
|
||||
#
|
||||
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GND" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
File diff suppressed because it is too large
Load Diff
578
PCIexpress_x4_full/PCIexpress_x4_full.kicad_pro
Normal file
578
PCIexpress_x4_full/PCIexpress_x4_full.kicad_pro
Normal file
@ -0,0 +1,578 @@
|
||||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.049999999999999996,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 0.762,
|
||||
"height": 1.524,
|
||||
"width": 1.524
|
||||
},
|
||||
"silk_line_width": 0.12,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.508
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"filename": "board_design_settings.json",
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint_type_mismatch": "error",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rule_severitieslegacy_courtyards_overlap": true,
|
||||
"rule_severitieslegacy_no_courtyard_defined": false,
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_copper_edge_clearance": 0.075,
|
||||
"min_hole_clearance": 0.25,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_through_hole_diameter": 0.19999999999999998,
|
||||
"min_track_width": 0.08889999999999999,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.44999999999999996,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [
|
||||
0.0,
|
||||
0.0889,
|
||||
0.127,
|
||||
0.2
|
||||
],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
},
|
||||
{
|
||||
"diameter": 0.45,
|
||||
"drill": 0.2
|
||||
},
|
||||
{
|
||||
"diameter": 0.5,
|
||||
"drill": 0.25
|
||||
},
|
||||
{
|
||||
"diameter": 0.55,
|
||||
"drill": 0.3
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"pin_map": [
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_label_syntax": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "PCIexpress_x4_full.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.0889,
|
||||
"diff_pair_gap": 0.2,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.0889,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.2,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.2,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Diff-100-PCIe",
|
||||
"nets": [
|
||||
"/PCIexpress_connector/_PER0_N",
|
||||
"/PCIexpress_connector/_PER0_P",
|
||||
"/PCIexpress_connector/_PER1_N",
|
||||
"/PCIexpress_connector/_PER1_P",
|
||||
"/PCIexpress_connector/_PER2_N",
|
||||
"/PCIexpress_connector/_PER2_P",
|
||||
"/PCIexpress_connector/_PER3_N",
|
||||
"/PCIexpress_connector/_PER3_P",
|
||||
"/PER0_N",
|
||||
"/PER0_P",
|
||||
"/PER1_N",
|
||||
"/PER1_P",
|
||||
"/PER2_N",
|
||||
"/PER2_P",
|
||||
"/PER3_N",
|
||||
"/PER3_P",
|
||||
"/PET0_N",
|
||||
"/PET0_P",
|
||||
"/PET1_N",
|
||||
"/PET1_P",
|
||||
"/PET2_N",
|
||||
"/PET2_P",
|
||||
"/PET3_N",
|
||||
"/PET3_P",
|
||||
"/REFCLK+",
|
||||
"/REFCLK-"
|
||||
],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.0889,
|
||||
"via_diameter": 0.45,
|
||||
"via_drill": 0.2,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.1,
|
||||
"diff_pair_gap": 0.1016,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.0889,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "JLC2313-100d-3.5",
|
||||
"nets": [],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
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531
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(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
(uuid c616b147-6b16-47ae-aad3-cfd629eadea7)
|
||||
)
|
||||
(label "PET2_N" (at 59.69 73.66 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
(uuid caa99ec0-fb12-47e7-9ec9-427302ddc63e)
|
||||
)
|
||||
(label "TMS" (at 59.69 35.56 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
(uuid ce9be9e8-f41a-4ab8-9451-77080e470e12)
|
||||
)
|
||||
(label "~{TRST}" (at 59.69 43.18 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
(uuid db939158-6e32-4c57-8197-2121e5849d01)
|
||||
)
|
||||
(label "PET0_N" (at 59.69 60.96 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
(uuid e9feebcc-bee8-46be-9175-af91d779e297)
|
||||
)
|
||||
(label "~{PRSNT2x1}" (at 31.75 31.75 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid ea867777-c158-4622-8fbb-e6f406c21bd6)
|
||||
)
|
||||
(label "~{PRSNT2x16}" (at 31.75 39.37 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid f817c338-4891-405f-8f5a-824ddd077d52)
|
||||
)
|
||||
(label "PER0_N" (at 31.75 60.96 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid fc66f628-d2b5-4900-bb72-3153a8b3a687)
|
||||
)
|
||||
(label "SMCLK" (at 31.75 50.8 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid fe4a9aa0-5f84-4f10-b326-ecc5ab3a9b08)
|
||||
)
|
||||
(label "PER3_N" (at 31.75 80.01 180)
|
||||
(effects (font (size 1.27 1.27)) (justify right bottom))
|
||||
(uuid ffc97a3f-3905-4a95-918f-4c11e86953b1)
|
||||
)
|
||||
|
||||
(sheet (at 34.29 26.67) (size 22.86 55.88) (fields_autoplaced)
|
||||
(stroke (width 0) (type solid) (color 0 0 0 0))
|
||||
(fill (color 0 0 0 0.0000))
|
||||
(uuid 00000000-0000-0000-0000-00005d508b15)
|
||||
(property "Sheet name" "PCIexpress_connector" (id 0) (at 34.29 25.9584 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
)
|
||||
(property "Sheet file" "PCIexpress_connector.kicad_sch" (id 1) (at 34.29 83.1346 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left top))
|
||||
)
|
||||
(pin "PET0_P" output (at 57.15 58.42 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid ad9575f7-0f8a-4903-abac-85bf78b77bae)
|
||||
)
|
||||
(pin "PET0_N" output (at 57.15 60.96 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 7cf3800d-bd15-41a1-92d9-d43c74af71fb)
|
||||
)
|
||||
(pin "REFCLK+" output (at 57.15 50.8 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 11c61cde-446f-4e8a-b46c-befae2e268e7)
|
||||
)
|
||||
(pin "REFCLK-" output (at 57.15 53.34 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 04deffd4-95ac-40ea-b7a7-6dca7c04063f)
|
||||
)
|
||||
(pin "~{PRSNT2x16}" passive (at 34.29 39.37 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid d145ad00-e106-4be0-b4da-6fe4e49ad8b5)
|
||||
)
|
||||
(pin "TDO" input (at 34.29 43.18 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid d5adc5c4-aa99-4616-83cd-f2cf000e9307)
|
||||
)
|
||||
(pin "TMS" output (at 57.15 35.56 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 1664a5cf-f8d2-42e0-9723-3072d829f38d)
|
||||
)
|
||||
(pin "TDI" output (at 57.15 40.64 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid d1c962b2-48bb-4b3e-9f6b-23e9b42ab632)
|
||||
)
|
||||
(pin "TCK" output (at 57.15 38.1 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 67cd7249-115f-4464-97e5-980282b1ff7a)
|
||||
)
|
||||
(pin "PET1_P" output (at 57.15 64.77 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid c357be69-2a5f-4a49-80b8-f867a74fd52f)
|
||||
)
|
||||
(pin "PET1_N" output (at 57.15 67.31 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 49729ddc-4ae8-4c8f-aeda-93161689358b)
|
||||
)
|
||||
(pin "PET2_P" output (at 57.15 71.12 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid c704ff2a-76a1-4038-a25a-f4b6a2b1cecb)
|
||||
)
|
||||
(pin "PET2_N" output (at 57.15 73.66 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 450ce2f8-7481-440c-b6bb-9f990139edc1)
|
||||
)
|
||||
(pin "PET3_P" output (at 57.15 77.47 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid a9f3d3b2-2102-4e87-8463-606276f91192)
|
||||
)
|
||||
(pin "PET3_N" output (at 57.15 80.01 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 0bd94a1f-dc2a-43f7-89d7-5bfeb89a72ce)
|
||||
)
|
||||
(pin "PER1_P" input (at 34.29 64.77 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid c4cae37d-c1f3-4868-bb5f-720ffe116b23)
|
||||
)
|
||||
(pin "PER1_N" input (at 34.29 67.31 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 5b665f71-a20a-499c-8aca-8300eb7f5a89)
|
||||
)
|
||||
(pin "PER2_P" input (at 34.29 71.12 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid f1a7d8f1-347e-438e-bdf5-c172df27a7a5)
|
||||
)
|
||||
(pin "PER2_N" input (at 34.29 73.66 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid faf1e3d6-e5b4-4cb3-8912-4d10c7083174)
|
||||
)
|
||||
(pin "PER3_P" input (at 34.29 77.47 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid fb5ddc30-4e60-428c-89c4-fbce2f2ffad7)
|
||||
)
|
||||
(pin "PER3_N" input (at 34.29 80.01 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid aa368244-6b2a-4007-af3d-15d4ed56b4ca)
|
||||
)
|
||||
(pin "~{WAKE}" input (at 34.29 46.99 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 2f628eca-4a0a-4e8c-849c-9c88b0d1663d)
|
||||
)
|
||||
(pin "~{TRST}" output (at 57.15 43.18 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid ff1f45b2-4492-430c-b736-d4a2eba96d27)
|
||||
)
|
||||
(pin "SMCLK" bidirectional (at 34.29 50.8 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 144946c9-51d1-4e33-afc9-312a707db726)
|
||||
)
|
||||
(pin "SMDAT" bidirectional (at 34.29 53.34 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 795e033d-521d-4908-b12f-4bbccab782f4)
|
||||
)
|
||||
(pin "~{PERST}" output (at 57.15 46.99 0)
|
||||
(effects (font (size 1.27 1.27)) (justify right))
|
||||
(uuid 34ea377e-fffd-4881-9e51-0d218b457aef)
|
||||
)
|
||||
(pin "~{PRSNT1}" passive (at 34.29 29.21 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 27e593d4-ff21-4632-9642-4472a5661f7f)
|
||||
)
|
||||
(pin "~{PRSNT2x8}" passive (at 34.29 36.83 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 9c648eae-6a43-41d9-b09c-e3ad1f7f6df2)
|
||||
)
|
||||
(pin "~{PRSNT2x4}" passive (at 34.29 34.29 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid be50094d-edb9-484b-9b39-ad6aa351df74)
|
||||
)
|
||||
(pin "~{PRSNT2x1}" passive (at 34.29 31.75 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid debb6a05-61b2-477c-9119-e0c33e680ccd)
|
||||
)
|
||||
(pin "PER0_N" input (at 34.29 60.96 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 0eecacc1-5a5b-4ca3-89a4-3c0466f319c6)
|
||||
)
|
||||
(pin "PER0_P" input (at 34.29 58.42 180)
|
||||
(effects (font (size 1.27 1.27)) (justify left))
|
||||
(uuid 12352cc2-39ef-418f-8191-54ad27dc6019)
|
||||
)
|
||||
)
|
||||
|
||||
(sheet_instances
|
||||
(path "/" (page "1"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15" (page "2"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb" (page "3"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d5df906" (page "4"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d761049" (page "5"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d76cfc3" (page "6"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dab5272" (page "7"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005db8e95f" (page "8"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dba1257" (page "9"))
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dbb44a0" (page "10"))
|
||||
)
|
||||
|
||||
(symbol_instances
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51adb3"
|
||||
(reference "#PWR0101") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51adb9"
|
||||
(reference "#PWR0102") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ae8a"
|
||||
(reference "#PWR0103") (unit 1) (value "+3.3V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ae90"
|
||||
(reference "#PWR0104") (unit 1) (value "+3.3V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ae96"
|
||||
(reference "#PWR0105") (unit 1) (value "+3.3V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ae9c"
|
||||
(reference "#PWR0106") (unit 1) (value "+3.3VA") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51aea2"
|
||||
(reference "#PWR0107") (unit 1) (value "+12V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51aea8"
|
||||
(reference "#PWR0108") (unit 1) (value "+12V") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb/00000000-0000-0000-0000-00005d52e619"
|
||||
(reference "#PWR0109") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb/00000000-0000-0000-0000-00005d52ec15"
|
||||
(reference "#PWR0110") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d5df906/00000000-0000-0000-0000-00005d52e619"
|
||||
(reference "#PWR0111") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d5df906/00000000-0000-0000-0000-00005d52ec15"
|
||||
(reference "#PWR0112") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d761049/00000000-0000-0000-0000-00005d52e619"
|
||||
(reference "#PWR0113") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d761049/00000000-0000-0000-0000-00005d52ec15"
|
||||
(reference "#PWR0114") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d76cfc3/00000000-0000-0000-0000-00005d52e619"
|
||||
(reference "#PWR0115") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d76cfc3/00000000-0000-0000-0000-00005d52ec15"
|
||||
(reference "#PWR0116") (unit 1) (value "GND") (footprint "")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dab5272/00000000-0000-0000-0000-00005dab6859"
|
||||
(reference "C1") (unit 1) (value "100n") (footprint "Capacitor_SMD:C_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dab5272/00000000-0000-0000-0000-00005dab685f"
|
||||
(reference "C2") (unit 1) (value "100n") (footprint "Capacitor_SMD:C_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005db8e95f/00000000-0000-0000-0000-00005dab6859"
|
||||
(reference "C3") (unit 1) (value "100n") (footprint "Capacitor_SMD:C_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005db8e95f/00000000-0000-0000-0000-00005dab685f"
|
||||
(reference "C4") (unit 1) (value "100n") (footprint "Capacitor_SMD:C_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dba1257/00000000-0000-0000-0000-00005dab6859"
|
||||
(reference "C5") (unit 1) (value "100n") (footprint "Capacitor_SMD:C_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dba1257/00000000-0000-0000-0000-00005dab685f"
|
||||
(reference "C6") (unit 1) (value "100n") (footprint "Capacitor_SMD:C_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dbb44a0/00000000-0000-0000-0000-00005dab6859"
|
||||
(reference "C7") (unit 1) (value "100n") (footprint "Capacitor_SMD:C_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005dbb44a0/00000000-0000-0000-0000-00005dab685f"
|
||||
(reference "C8") (unit 1) (value "100n") (footprint "Capacitor_SMD:C_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51ada7"
|
||||
(reference "J1") (unit 1) (value "PCIexpress_bracket") (footprint "PCIexpress:PCIexpress_bracket_full")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d51070f"
|
||||
(reference "J2") (unit 1) (value "PCIexpress_x4") (footprint "PCIexpress:PCIexpress_x4")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb/00000000-0000-0000-0000-00005d52dcbc"
|
||||
(reference "R1") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d516dfb/00000000-0000-0000-0000-00005d52e298"
|
||||
(reference "R2") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d5df906/00000000-0000-0000-0000-00005d52dcbc"
|
||||
(reference "R3") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d5df906/00000000-0000-0000-0000-00005d52e298"
|
||||
(reference "R4") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d761049/00000000-0000-0000-0000-00005d52dcbc"
|
||||
(reference "R5") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d761049/00000000-0000-0000-0000-00005d52e298"
|
||||
(reference "R6") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d76cfc3/00000000-0000-0000-0000-00005d52dcbc"
|
||||
(reference "R7") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005d508b15/00000000-0000-0000-0000-00005d76cfc3/00000000-0000-0000-0000-00005d52e298"
|
||||
(reference "R8") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
)
|
||||
)
|
||||
@ -1,294 +0,0 @@
|
||||
update=ven 26 lug 2019 22:25:34 CEST
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=4
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.08889999999999999
|
||||
MinViaDiameter=0.45
|
||||
MinViaDrill=0.2
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.0889
|
||||
TrackWidth2=0.0889
|
||||
TrackWidth3=0.127
|
||||
TrackWidth4=0.2
|
||||
ViaDiameter1=0.45
|
||||
ViaDrill1=0.2
|
||||
ViaDiameter2=0.45
|
||||
ViaDrill2=0.2
|
||||
ViaDiameter3=0.5
|
||||
ViaDrill3=0.25
|
||||
ViaDiameter4=0.55
|
||||
ViaDrill4=0.3
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.2
|
||||
dPairViaGap1=0.25
|
||||
dPairWidth2=0.2
|
||||
dPairGap2=0.2
|
||||
dPairViaGap2=0.2
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.051
|
||||
SolderMaskMinWidth=0.25
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.0889
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.2
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/1]
|
||||
Name=Diff-100-PCIe
|
||||
Clearance=0.2
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.2
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/2]
|
||||
Name=JLC2313-100d-3.5
|
||||
Clearance=0.1
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.0889
|
||||
dPairGap=0.1016
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/3]
|
||||
Name=JLC2313-100d-4
|
||||
Clearance=0.1
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.1016
|
||||
dPairGap=0.127
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/4]
|
||||
Name=JLC7628-100d-8
|
||||
Clearance=0.2
|
||||
TrackWidth=0.0889
|
||||
ViaDiameter=0.45
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2032
|
||||
dPairGap=0.2032
|
||||
dPairViaGap=0.25
|
||||
@ -1,182 +0,0 @@
|
||||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 10
|
||||
Title "PCIexpress_x4_full"
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp "Author: Luca Anastasio"
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
Text Label 2350 2400 0 50 ~ 0
|
||||
PET0_N
|
||||
Text Label 2350 2300 0 50 ~ 0
|
||||
PET0_P
|
||||
Text Label 2350 2650 0 50 ~ 0
|
||||
PET1_N
|
||||
Text Label 2350 2550 0 50 ~ 0
|
||||
PET1_P
|
||||
Text Label 2350 2900 0 50 ~ 0
|
||||
PET2_N
|
||||
Text Label 2350 2800 0 50 ~ 0
|
||||
PET2_P
|
||||
Text Label 2350 3150 0 50 ~ 0
|
||||
PET3_N
|
||||
Text Label 2350 3050 0 50 ~ 0
|
||||
PET3_P
|
||||
Text Label 1250 2400 2 50 ~ 0
|
||||
PER0_N
|
||||
Text Label 1250 2300 2 50 ~ 0
|
||||
PER0_P
|
||||
Text Label 1250 2650 2 50 ~ 0
|
||||
PER1_N
|
||||
Text Label 1250 2550 2 50 ~ 0
|
||||
PER1_P
|
||||
Text Label 1250 2900 2 50 ~ 0
|
||||
PER2_N
|
||||
Text Label 1250 2800 2 50 ~ 0
|
||||
PER2_P
|
||||
Text Label 1250 3150 2 50 ~ 0
|
||||
PER3_N
|
||||
Text Label 1250 3050 2 50 ~ 0
|
||||
PER3_P
|
||||
Wire Wire Line
|
||||
2250 3150 2350 3150
|
||||
Wire Wire Line
|
||||
2250 3050 2350 3050
|
||||
Wire Wire Line
|
||||
2250 2900 2350 2900
|
||||
Wire Wire Line
|
||||
2250 2800 2350 2800
|
||||
Wire Wire Line
|
||||
1250 3150 1350 3150
|
||||
Wire Wire Line
|
||||
1250 3050 1350 3050
|
||||
Wire Wire Line
|
||||
1250 2900 1350 2900
|
||||
Wire Wire Line
|
||||
1250 2800 1350 2800
|
||||
Wire Wire Line
|
||||
1250 2650 1350 2650
|
||||
Wire Wire Line
|
||||
1250 2550 1350 2550
|
||||
Wire Wire Line
|
||||
1250 2400 1350 2400
|
||||
Wire Wire Line
|
||||
1250 2300 1350 2300
|
||||
Wire Wire Line
|
||||
2250 2650 2350 2650
|
||||
Wire Wire Line
|
||||
2250 2550 2350 2550
|
||||
Wire Wire Line
|
||||
2250 2400 2350 2400
|
||||
Wire Wire Line
|
||||
2250 2300 2350 2300
|
||||
Text Label 2350 2000 0 50 ~ 0
|
||||
REFCLK+
|
||||
Text Label 2350 2100 0 50 ~ 0
|
||||
REFCLK-
|
||||
Text Label 2350 1850 0 50 ~ 0
|
||||
~PERST
|
||||
Text Label 2350 1700 0 50 ~ 0
|
||||
~TRST
|
||||
Text Label 2350 1600 0 50 ~ 0
|
||||
TDI
|
||||
Text Label 2350 1500 0 50 ~ 0
|
||||
TCK
|
||||
Text Label 2350 1400 0 50 ~ 0
|
||||
TMS
|
||||
Text Label 1250 2000 2 50 ~ 0
|
||||
SMCLK
|
||||
Text Label 1250 2100 2 50 ~ 0
|
||||
SMDAT
|
||||
Text Label 1250 1850 2 50 ~ 0
|
||||
~WAKE
|
||||
Text Label 1250 1700 2 50 ~ 0
|
||||
TDO
|
||||
Text Label 1250 1150 2 50 ~ 0
|
||||
~PRSNT1
|
||||
Text Label 1250 1250 2 50 ~ 0
|
||||
~PRSNT2x1
|
||||
Text Label 1250 1350 2 50 ~ 0
|
||||
~PRSNT2x4
|
||||
Text Label 1250 1450 2 50 ~ 0
|
||||
~PRSNT2x8
|
||||
Text Label 1250 1550 2 50 ~ 0
|
||||
~PRSNT2x16
|
||||
Wire Wire Line
|
||||
1250 2100 1350 2100
|
||||
Wire Wire Line
|
||||
1250 2000 1350 2000
|
||||
Wire Wire Line
|
||||
2250 2100 2350 2100
|
||||
Wire Wire Line
|
||||
2250 2000 2350 2000
|
||||
Wire Wire Line
|
||||
2250 1700 2350 1700
|
||||
Wire Wire Line
|
||||
2250 1600 2350 1600
|
||||
Wire Wire Line
|
||||
2250 1500 2350 1500
|
||||
Wire Wire Line
|
||||
2250 1400 2350 1400
|
||||
Wire Wire Line
|
||||
1250 1550 1350 1550
|
||||
Wire Wire Line
|
||||
1250 1450 1350 1450
|
||||
Wire Wire Line
|
||||
1250 1350 1350 1350
|
||||
Wire Wire Line
|
||||
1250 1250 1350 1250
|
||||
Wire Wire Line
|
||||
1250 1700 1350 1700
|
||||
Wire Wire Line
|
||||
1250 1850 1350 1850
|
||||
Wire Wire Line
|
||||
1250 1150 1350 1150
|
||||
Wire Wire Line
|
||||
2250 1850 2350 1850
|
||||
$Sheet
|
||||
S 1350 1050 900 2200
|
||||
U 5D508B15
|
||||
F0 "PCIexpress_connector" 50
|
||||
F1 "PCIexpress_connector.sch" 50
|
||||
F2 "PET0_P" O R 2250 2300 50
|
||||
F3 "PET0_N" O R 2250 2400 50
|
||||
F4 "REFCLK+" O R 2250 2000 50
|
||||
F5 "REFCLK-" O R 2250 2100 50
|
||||
F6 "~PRSNT2x16" U L 1350 1550 50
|
||||
F7 "TDO" I L 1350 1700 50
|
||||
F8 "TMS" O R 2250 1400 50
|
||||
F9 "TDI" O R 2250 1600 50
|
||||
F10 "TCK" O R 2250 1500 50
|
||||
F11 "PET1_P" O R 2250 2550 50
|
||||
F12 "PET1_N" O R 2250 2650 50
|
||||
F13 "PET2_P" O R 2250 2800 50
|
||||
F14 "PET2_N" O R 2250 2900 50
|
||||
F15 "PET3_P" O R 2250 3050 50
|
||||
F16 "PET3_N" O R 2250 3150 50
|
||||
F17 "PER1_P" I L 1350 2550 50
|
||||
F18 "PER1_N" I L 1350 2650 50
|
||||
F19 "PER2_P" I L 1350 2800 50
|
||||
F20 "PER2_N" I L 1350 2900 50
|
||||
F21 "PER3_P" I L 1350 3050 50
|
||||
F22 "PER3_N" I L 1350 3150 50
|
||||
F23 "~WAKE" I L 1350 1850 50
|
||||
F24 "~TRST" O R 2250 1700 50
|
||||
F25 "SMCLK" B L 1350 2000 50
|
||||
F26 "SMDAT" B L 1350 2100 50
|
||||
F27 "~PERST" O R 2250 1850 50
|
||||
F28 "~PRSNT1" U L 1350 1150 50
|
||||
F29 "~PRSNT2x8" U L 1350 1450 50
|
||||
F30 "~PRSNT2x4" U L 1350 1350 50
|
||||
F31 "~PRSNT2x1" U L 1350 1250 50
|
||||
F32 "PER0_N" I L 1350 2400 50
|
||||
F33 "PER0_P" I L 1350 2300 50
|
||||
$EndSheet
|
||||
$EndSCHEMATC
|
||||
130
PCIexpress_x4_full/decap.kicad_sch
Normal file
130
PCIexpress_x4_full/decap.kicad_sch
Normal file
@ -0,0 +1,130 @@
|
||||
(kicad_sch (version 20211123) (generator eeschema)
|
||||
|
||||
(uuid b79346eb-94bb-4a19-bc85-af2de30d0880)
|
||||
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Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user