commit 16760a5cc0ace700d87d75bb94e2f4ed17d3c568 Author: Roman Krupnin Date: Thu Feb 27 14:24:20 2025 +0300 init repo diff --git a/2000/docs/ISPR_03.gif b/2000/docs/ISPR_03.gif new file mode 100644 index 0000000..aba53a0 Binary files /dev/null and b/2000/docs/ISPR_03.gif differ diff --git a/2000/docs/SPRINT_3.pdf b/2000/docs/SPRINT_3.pdf new file mode 100644 index 0000000..8058e7a Binary files /dev/null and b/2000/docs/SPRINT_3.pdf differ diff --git a/2000/docs/Sp2_ISA.jpg b/2000/docs/Sp2_ISA.jpg new file mode 100644 index 0000000..4778243 Binary files /dev/null and b/2000/docs/Sp2_ISA.jpg differ diff --git a/2000/docs/Sp2_TM9.jpg b/2000/docs/Sp2_TM9.jpg new file mode 100644 index 0000000..46c79cf Binary files /dev/null and b/2000/docs/Sp2_TM9.jpg differ diff --git a/2000/docs/Sp2_vid.jpg b/2000/docs/Sp2_vid.jpg new file mode 100644 index 0000000..7a8091e Binary files /dev/null and b/2000/docs/Sp2_vid.jpg differ diff --git a/2000/docs/Sp_4_d11.jpg b/2000/docs/Sp_4_d11.jpg new file mode 100644 index 0000000..e0ba022 Binary files /dev/null and b/2000/docs/Sp_4_d11.jpg differ diff --git a/2000/docs/Sp_4_d21.jpg b/2000/docs/Sp_4_d21.jpg new file mode 100644 index 0000000..1aabcf5 Binary files /dev/null and b/2000/docs/Sp_4_d21.jpg differ diff --git a/2000/docs/orcad_pcb.png b/2000/docs/orcad_pcb.png new file mode 100644 index 0000000..8eac860 Binary files /dev/null and b/2000/docs/orcad_pcb.png differ diff --git a/2000/fw/bios/BIOS_REV.txt b/2000/fw/bios/BIOS_REV.txt new file mode 100644 index 0000000..718e1e0 --- /dev/null +++ b/2000/fw/bios/BIOS_REV.txt @@ -0,0 +1,121 @@ +;--------------------------------------------------------------- +;Rev Date Name Description +;--------------------------------------------------------------- +;Версия 3.04 +;R0046 16.06.2003 IM Исправления для совместимости video с Sp2000 +;R0046 13.06.2003 IM Исправления глюков в режиме ZX +;R0046 02.06.2003 IM Исправления для видео-ОЗУ AS7C1024A-JC12 +;Версия 3.03 +;R0045 05.02.2003 IM Исправления для видео-ОЗУ AS7C1024-JC12 +;Версия 3.02 +;R0044 01.10.2002 IM Добавления в прошивке +;Версия 3.00.253 (10.04.2002) UPDATE01 +;R0043 01.04.2002 IM Перекомпилена прошивка для ПЛМ для SIMM +;R0042 10.03.2002 DNS Setup 253 +;Версия 2.17.252 (03.03.2002) UPDATE-beta-version +;R0041 03-03-2002 IM Подправлены цвета в функции CGA палитры +;R0040 02-03-2002 IM Исправлен глюк функции выдачи портов +;R0039 02-03-2002 IM Добавлены чтение палитры и текстовая CGA палитра +;Версия 2.16.252 (27.02.2002) WORK +;R0038 27-02-2002 IM Сообщение об отсутствии Spectrum-ROM +;R0037 26-02-2002 IM Жестко закреплены страницы 41h..47h за Spectrum.ROM +;R0036 25-02-2002 IM Добавлен внутренний порт для возврата в ZX/FN +;R0035 22-02-2002 IM В BIOS добавлена функция установки Original-INT +;R0034 21-02-2002 IM Добавлена функция BIOS, переключающая 720/1.44 +;Версия 2.15.252 (18.02.2002) WORK +;R0033 18-02-2002 IM Исправление для ISA +;R0032 12-02-2002 IM Добавлена функция чтения ROM-Disk-а +;R0031 12-02-2002 IM Исправлена функция BIOS чтения/записи RAM-Disk-ов +;R0030 12-02-2002 IM Исправлена схема COVOX-Blaster-а +;R0029 08-02-2002 IM Полностью измененa схема доступа к ПЗУ/Fast-RAM/ISA +;Версия 2.14.252 (01.02.2002) WORK +;R0028 01-02-2002 DNS Добавлен сдвиг экрана в setup +;Версия 2.13.251 (10.11.2002) WORK +;R0027 23-01-2002 IM COVOX-Blaster 16bit, 110khz, stereo +;R0026 17-01-2002 IM Исправлена ошибка в функции FN_PIC1 +;Версия 2.12.251 (10.11.2002) RELEASE +;R0025 10-01-2002 IM Смещен экран на 1 знакоместо влево +;Версия 2.11.251 (08.01.2002) WORK +;R0024 10-01-2002 IM Исправление предыдущего исправления +;R0023 08-01-2002 IM Исправления в BIOS-е (перезагрузка ПЛМ) +;R0022 08-01-2002 IM разборки с FDD +;Версия 2.10.251 (25.12.2001) RELEASE +;R0020 23-12-2001 IM коррекция синхронизации в ПЛМ +;R0019 20-12-2001 IM убрано R0018 - NMI +;Версия 2.09.251 (18.12.2001) WORK (for Denis only!) +;R0018 18-12-2001 IM изменена прошивка ПЛМ (добавлен NMI) +;R0017 17-12-2001 IM изменена прошивка ПЛМ (исправления для SIMM) +;R0016 15-12-2001 IM изменена прошивка ПЛМ (исправления SINC) +;R0015 14-12-2001 IM добавлен пункт "L" в Post +;R0014 19-11-2001 IM обезглюченая прошивка для Winbond +;R0013 18-11-2001 IM возвращен старый copyright в Basic128 +;Версия 2.08.251 (17.11.2001) WORK +;R0012 17-11-2001 IM изменена прошивка ПЛМ от 17-ноя-2001 +;Версия 2.07.251 (11.11.2001) WORK +;R0011 11-11-2001 IM изменена прошивка ПЛМ от 11-ноя-2001 +;Версия 2.06.251 (07.11.2001) WORK +;R0010 07-11-2001 IM изменена прошивка ПЛМ от 07-ноя-2001 +;Версия 2.06.251 (05.11.2001) WORK +;R0009 05-11-2001 IM изменена прошивка ПЛМ от 05-ноя-2001 +;Версия 2.05.251 (xx.xx.2001) WORK +;R0008 xx-xx-2001 IM -- описание изменений -- +;Версия 2.04.251 (27.10.2001) RELEASE +;R0007 27-10-2001 IM изменена прошивка ПЛМ от 27-окт-2001 +;R0006 12-10-2001 IM перекопана прошивка ПЛМ от 12-окт-2001 +;Версия 2.04.250 (04.10.2001) WORK +;R0005 04-10-2001 DNS вставлен новый ROM.BIN от 4-окт-2001 +;Версия 2.04.249 (22.09.2001) WORK +;R0004 22-09-2001 DNS вставлен новый ROM.BIN от ...хм.. не помню.. +;R0003 22-09-2001 IM исправление названий в меню "Hardware" +;R0002 22-09-2001 IM вставлен номер ПЗУ и функция биоса для него 0EDh +;R0001 22-09-2001 IM добавлена функция GOTO Spectrum 0FBh +;Версия 2.03.248 (08.06.2001) WORK +;--------------------------------------------------------------- +;Revisions: +;R0044 - Введены биты порта управления управления: +; бит выключения RESET +; бит включения NMI по + +; бит отключения ZX-screen (совмещен с битом Sprinter/Spectrum) +;R0036 - Спец-функция для sprinter.exe Установка внутреннего порта EE +; в не 0 приводит к переходу в установленную страницу и продолжению +; работы программы, установившей перехват +;R0033 - В режиме Sprinter введен старый доступ к ISA через порт 1FFD и +; PAGE3=D0..DF +;R0031 - В функции чтения/записи RAM-Disk-ов был жестокий глюк... +; она вообще не работала +;R0030 - Убраны сбои при проигрывании в режиме с прерываниями, когда +; в CBL записываются лишние или недозаписываются байты... +; по прерыванию CBL внутренний счетчик устанавливается на 00h или 80h +;R0029 - Введено разделение Sprinter и Spectrum режимов. +; В режиме Spectrum и Sprinter-ZX все ПЗУ находятся в ОЗУ +; Изменен доступ к ПЗУ и Fast-RAM доступ стал быстрее. Изменилась +; адресация страниц Fast-RAM и ROM. Адресуются через порт 5F в режиме +; SYSTEM-on. Введен полный запрет доступа к RAM во время работы с ПЗУ +; ОЗУ в этот момент свободно для других функций (потребуется для DMA) +; Скорость работы в Fast-RAM выведена на максимум (без вайтов). +; Выкинуты ПЗУ Spectrum-а из BIOS. +;R0026 - Исправлена ошибка в функции FN_PIC1. Были неверная отработка +; номера окна и несохранение порта RGADR. +;R0024 - последствия R0023, в Турбо возникло занижение скорости из-за +; переключения управляющего регистра на boundary вместо wait +;R0023 - обнаружена и устранена ошибка в программе перезагрузки ПЛМ извне +; (через КЭШ) был неверно инициализирован boundary-регистр Z84C15 +;R0022 - убран глюк работы с FDD, возникший после корректировки работы с +; SIMM-ами (подаваемые на FDD данные обрывались раньше времени) +;R0020 - убран глюк несовместимости прошивки "старой" и "новой" партий плат +;R0018 - "дикий" NMI - по alt+F12 просто подается NMI, ничего более не +; отслеживается +;R0017 - введены задержки (input delay in MAX+) для ввода данных с SIMM-а, +; изменена времянка сигнала /WE на SIMM +;R0016 - Добавлена схема подавления джиттера строчной синхронизации +; давится джиттер +/- 0.25мкс +;R0015 - Перед загрузкой ПЛМ зажигается "L" на индикаторе Post-Tester-a +;R0014 - убран глюк под меню help на Winbond-ах (проверить!) +;R0012 - закреплено исправление для ISA, видео-ОЗУ улучшение для UMC +;R0011 - закреплено исправление для ISA, по видео-ОЗУ откат до 2.04 версии +;R0010 - дополнительное удаление глюков с видео-ОЗУ +;R0009 - частичное удаление глюков с видео-ОЗУ +;R0007 - исправление множественных глюков при работе с SIMM методом +; перекомпиляции с новыми опциями MAX-Plus. +;R0006 - дополнительное исправление глюков при работе с SIMM. +; diff --git a/2000/fw/bios/SETUP_REV.txt b/2000/fw/bios/SETUP_REV.txt new file mode 100644 index 0000000..f14ed3b --- /dev/null +++ b/2000/fw/bios/SETUP_REV.txt @@ -0,0 +1,30 @@ +;--------------------------------------------------------------- +;Rev Date Name Description +;--------------------------------------------------------------- +;╚чьхэхэш  т build'e 2.53 +;R06 16-02-2002 DNS Add CMOS install routine. Disabled TRDOS install routine. +;╚чьхэхэш  т build'e 2.52 +;R05 28-01-2002 DNS Add new items to SETUP Utility for screen position. +;╚чьхэхэш  т build'e 2.51 +;R04 14-09-2001 DNS Added procedure GET_BOARD_NUMBER and + Removed 2 IDE (if with_2ide) +;╚чьхэхэш  т build'e 2.50 +;R03a 02-08-2001 DNS ADD BUILD-IN CD DRIVER (Not release) +;R03 30-07-2001 DNS Developed a new IDE DETECT routine and fixied any bugs +;R02 25-07-2001 DNS Add Secondary IDE +;╚чьхэхэш  т build'e 2.48 +;R01 23-04-2001 DNS Removed procedure GET_ID and make new which +; will be take Model Name. +;R00 xx-xx-2000 DNS New BIOS for Sp2000 build 2.48 +;--------------------------------------------------------------- +;Revisions: +;R01 - ╘єэъЎш  GET_ID эр яырЄрї Sprinter97, яюыєўрыр фрЄ√ ёючфрэш  ш +; яЁю°штъш ╧╟╙, эр яырЄрї Sp2000 с√ыю ттхфшэю яюэ Єшх ьюфхыш. +;R02 - └тЄюфхЄхъЄ 4ї єёЄЁющёЄт +;R03 - ─юсртыхэр ЁрсюЄр тёхї ЇєэъЎшщ ёю тЄюЁ√ь IDE ърэрырь, ЁрсюЄрхЄ +; эхёЄрсшы№эю, тючьюцэю цхыхчю, эрўрЄр ЁрсюЄр эрф ўЄхэшхь ё CD, +; шёяЁртыхэр ю°шсър (яЁш юяЁхфхыхэшш CDROMр эх єърч√трыё  яЁшчэръ +; MASTER/SLAVE т ярЁрьхЄЁрї IDE(#FE:#C1C0-#C1CF). +;R04 - ─юсртыхэ т√тюф эюьхЁр яырЄ√ (ЇєэъЎш  #ED) яЁш ёЄрЁЄх ъюья№■ЄхЁр, +; ЁрсюЄр ёю тЄюЁ√ь IDE яхЁхэхёхэр т єёыютэє■ ъюьяшы Ўш■ (if with_2ide) +;---------------------------------------------------------------- \ No newline at end of file diff --git a/2000/fw/bios/readme.md b/2000/fw/bios/readme.md new file mode 100644 index 0000000..7eaefa9 --- /dev/null +++ b/2000/fw/bios/readme.md @@ -0,0 +1,11 @@ +# sp2k-3.00.253.bin + +╬ЇшЎшры№эр  фрЄр т√яєёър 07.04.2002, яръхЄ юсэютыхэш  SU1 (Sprinter Update 1) + +# sp2k-3.03.253.bin + +─рЄр ёсюЁъш 13.05.2003, юЇшЎшры№эю эх т√яєёърырё№. ╬яєсышъютрэр ё юЄъЁ√Єшхь яЁюхъЄр. + +# sp2k-3.04.253.bin + +─рЄр ёсюЁъш 17.06.2003, юЇшЎшры№эю эх т√яєёърырё№. ╬яєсышъютрэр ё юЄъЁ√Єшхь яЁюхъЄр. \ No newline at end of file diff --git a/2000/fw/bios/sp2k-3.00.253.bin b/2000/fw/bios/sp2k-3.00.253.bin new file mode 100644 index 0000000..263bb2b Binary files /dev/null and b/2000/fw/bios/sp2k-3.00.253.bin differ diff --git a/2000/fw/bios/sp2k-3.03.253.bin b/2000/fw/bios/sp2k-3.03.253.bin new file mode 100644 index 0000000..2546503 Binary files /dev/null and b/2000/fw/bios/sp2k-3.03.253.bin differ diff --git a/2000/fw/bios/sp2k-3.04.253.bin b/2000/fw/bios/sp2k-3.04.253.bin new file mode 100644 index 0000000..fa8bb7a Binary files /dev/null and b/2000/fw/bios/sp2k-3.04.253.bin differ diff --git a/2000/fw/max/readme.md b/2000/fw/max/readme.md new file mode 100644 index 0000000..3b6a791 --- /dev/null +++ b/2000/fw/max/readme.md @@ -0,0 +1,7 @@ +# sp2k-7064stc100-10.pof + +─рЄр ёсюЁъш 21.08.2002, Їрщы ш хую шёїюфэшъ юяєсышъютрэ√ ё юЄъЁ√Єшхь яЁюхъЄр. + +# sp2k-7128stc100-10.pof + +─рЄр ёсюЁъш 06.06.2021, ёюсЁрэю шч Єхї цх шёїюфэшъют. diff --git a/2000/fw/max/sp2k-7064stc100-10.pof b/2000/fw/max/sp2k-7064stc100-10.pof new file mode 100644 index 0000000..70047b3 Binary files /dev/null and b/2000/fw/max/sp2k-7064stc100-10.pof differ diff --git a/2000/fw/max/sp2k-7128stc100-10.pof b/2000/fw/max/sp2k-7128stc100-10.pof new file mode 100644 index 0000000..875e82f Binary files /dev/null and b/2000/fw/max/sp2k-7128stc100-10.pof differ diff --git a/2000/orcad/SPRINT_3.DBK b/2000/orcad/SPRINT_3.DBK new file mode 100644 index 0000000..750ae53 Binary files /dev/null and b/2000/orcad/SPRINT_3.DBK differ diff --git a/2000/orcad/SPRINT_3.DSN b/2000/orcad/SPRINT_3.DSN new file mode 100644 index 0000000..901f9ba Binary files /dev/null and b/2000/orcad/SPRINT_3.DSN differ diff --git a/2000/orcad/SPRINT_3.MAX b/2000/orcad/SPRINT_3.MAX new file mode 100644 index 0000000..a4d6d34 Binary files /dev/null and b/2000/orcad/SPRINT_3.MAX differ diff --git a/2000/orcad/SPRINT_3.SWP b/2000/orcad/SPRINT_3.SWP new file mode 100644 index 0000000..db1397a --- /dev/null +++ b/2000/orcad/SPRINT_3.SWP @@ -0,0 +1,886 @@ +;*************************************** +; * +; OrCAD Backannotation File * +; * +; C:\COPY_D\ORCAD\SP2003\SPRINT_3.MAX * +; Thu Dec 05 13:18:07 2002 * +; * +;*************************************** + +.Section1 Flags +View=Physical +DesignName=C:\COPY_D\ORCAD\SPRINTER\SPRINT_2.DSN +.End + +.Section3 UpdateProperties Parts +"{Reference}" "PCB Footprint" "FPLIST" "COMPSIDE" "COMPLOC" "COMPROT" "COMPGROUP" "COMPFIXED" "COMPLOCKED" "COMPKEY" "DECOUPLER" "MEMORY" "COMPHEIGHT" +"C1" "SM/C_1206" "" "TOP" "[3750.000,-1150.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C2" "SM/C_1206" "" "TOP" "[3950.000,-1150.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C3" "SM/C_1206" "DISC/.350X.175/LS.200X.050/.034" "TOP" "[4600.000,-5300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C4" "SM/C_1206" "" "BOT" "[7700.000,-2650.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C6" "SM/C_1206" "" "TOP" "[7800.000,-3850.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C7" "SM/C_1206" "" "TOP" "[7800.000,-4250.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C8" "SM/C_1206" "" "BOT" "[7750.000,-6700.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C9" "SM/C_1206" "" "BOT" "[7880.000,-5700.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C10" "SM/C_1206" "" "TOP" "[4400.000,-4800.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C11" "SM/C_1206" "" "TOP" "[4250.000,-5200.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C12" "SM/C_1206" "" "TOP" "[4360.000,-5450.000]" "180" "0" "NO" "YES" "NO" "NO" "NO" "0.000" +"C13" "SM/C_1206" "" "TOP" "[5250.000,-5450.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C14" "SM/C_1206" "" "BOT" "[7400.000,-6200.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C15" "SM/C_1206" "" "BOT" "[7400.000,-6550.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C16" "SM/C_1206" "" "BOT" "[7400.000,-5650.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C17" "SM/C_1206" "" "TOP" "[2235.000,-965.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C18" "CYL/D.275/LS.100/.037" "SM/C_1206" "TOP" "[7900.000,-2000.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C19" "CYL/D.275/LS.100/.037" "SM/C_1206" "TOP" "[7550.000,-2000.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C20" "SM/C_1206" "" "BOT" "[8200.000,-6130.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C21" "CYL/D.275/LS.100/.037" "SM/C_1206" "TOP" "[7650.000,-1600.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C22" "SM/C_1206" "" "BOT" "[8100.000,-6000.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C23" "SM/C_1206" "" "BOT" "[700.000,-4950.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C24" "SM/C_1206" "" "BOT" "[750.000,-1550.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C25" "SM/C_1206" "" "BOT" "[720.000,-6850.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C26" "SM/C_1206" "" "BOT" "[2350.000,-6850.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C27" "CYL/D.275/LS.100/.037" "SM/C_1206" "TOP" "[8000.000,-1600.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C28" "SM/C_1206" "" "BOT" "[1400.000,-3600.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C29" "SM/C_1206" "" "BOT" "[4235.000,-2285.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C30" "SM/C_1206" "" "BOT" "[2300.000,-4900.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C31" "SM/C_1206" "" "BOT" "[3400.000,-1850.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C32" "SM/C_1206" "" "BOT" "[4100.000,-4900.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C33" "SM/C_1206" "" "BOT" "[8250.000,-5750.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C34" "SM/C_1206" "" "BOT" "[5400.000,-5150.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C35" "SM/C_1206" "" "BOT" "[5760.000,-2650.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C36" "SM/C_1206" "" "BOT" "[4700.000,-1000.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C37" "SM/C_1206" "" "BOT" "[6430.000,-900.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C38" "SM/C_1206" "" "BOT" "[1450.000,-1200.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C39" "SM/C_1206" "" "BOT" "[5700.000,-4050.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C40" "SM/C_1206" "" "BOT" "[3880.000,-4300.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C41" "SM/C_1206" "" "BOT" "[3850.000,-3750.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C42" "SM/C_1206" "" "BOT" "[5750.000,-3200.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C43" "SM/C_1206" "" "BOT" "[7280.000,-3950.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C44" "SM/C_1206" "" "BOT" "[7150.000,-4300.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C45" "SM/C_1206" "" "BOT" "[8330.000,-4050.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C46" "SM/C_1206" "" "BOT" "[8365.000,-3665.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C47" "SM/C_1206" "" "BOT" "[3800.000,-3600.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C48" "SM/C_1206" "" "BOT" "[3880.000,-4150.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C49" "SM/C_1206" "" "BOT" "[750.000,-1800.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C51" "SM/C_1206" "" "BOT" "[750.000,-2050.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C52" "SM/C_1206" "" "BOT" "[750.000,-2300.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"C53" "SM/C_1206" "" "BOT" "[5050.000,-4750.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD1" "DIP.100/14/W.300/L.850" "" "TOP" "[2650.000,-1300.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD2" "DIP.100/14/W.300/L.850" "" "TOP" "[1400.000,-1050.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD3" "DIP.100/16/W.300/L.950" "" "TOP" "[6200.000,-1100.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD4" "DIP.100/20/W.300/L1.050" "" "TOP" "[6600.000,-2750.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD5" "DIP.100/20/W.300/L1.050" "DIP.100/20/W.400/L1.050" "TOP" "[3650.000,-2050.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD6" "DIP.100/20/W.300/L1.050" "" "TOP" "[2400.000,-2100.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD7" "DIP.100/16/W.300/L.950" "" "TOP" "[2150.000,-2800.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD8" "DIP.100/20/W.300/L1.050" "" "TOP" "[4350.000,-5850.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD9" "DIP.100/20/W.300/L1.050" "" "TOP" "[4350.000,-6300.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD10" "DIP.100/20/W.300/L1.050" "" "TOP" "[4350.000,-6750.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD11" "DIP.100/16/W.300/L.950" "" "TOP" "[6350.000,-3850.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD12" "DIP.100/16/W.300/L.950" "" "TOP" "[6350.000,-4250.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD13" "DIP.100/16/W.300/L.950" "" "TOP" "[5150.000,-2050.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD14" "DIP.100/16/W.300/L.950" "" "TOP" "[5150.000,-1150.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD15" "DIP.100/20/W.300/L1.050" "" "TOP" "[5900.000,-2050.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD16" "DIP.100/16/W.300/L.950" "" "TOP" "[6350.000,-3450.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD17" "DIP.100/14/W.300/L.850" "" "TOP" "[5750.000,-2750.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD18" "DIP.100/16/W.300/L.950" "" "TOP" "[6350.000,-3050.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"DD19" "DIP.100/14/W.300/L.850" "" "TOP" "[6250.000,-5900.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"J2" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7700.000,-4550.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"J3" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8000.000,-4550.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"J4" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8100.000,-4550.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"J5" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8400.000,-4550.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"J6" "XT/SOCKET" "" "TOP" "[1750.000,-1400.000]" "270" "0" "NO" "YES" "NO" "NO" "NO" "0.000" +"J7" "XT/SOCKET" "" "TOP" "[950.000,-1400.000]" "270" "0" "NO" "YES" "NO" "NO" "NO" "0.000" +"J8" "MAIN-HOLE" "MTHOLE1" "TOP" "[8250.000,-800.000]" "0" "0" "NO" "YES" "NO" "NO" "NO" "0.000" +"J9" "MAIN-HOLE_REV1" "MTHOLE1" "TOP" "[5415.350,-800.000]" "0" "0" "NO" "YES" "NO" "NO" "NO" "0.000" +"J10" "MAIN-HOLE_REV1" "MTHOLE1" "TOP" "[4037.400,-800.000]" "0" "0" "NO" "YES" "NO" "NO" "NO" "0.000" +"J11" "MAIN-HOLE_REV1" "MTHOLE1" "TOP" "[900.000,-800.000]" "0" "0" "NO" "YES" "NO" "NO" "NO" "0.000" +"J12" "MAIN-HOLE_REV1" "MTHOLE1" "TOP" "[8250.000,-6390.550]" "0" "0" "NO" "YES" "NO" "NO" "NO" "0.000" +"J13" "MAIN-HOLE_REV1" "MTHOLE1" "TOP" "[1450.000,-4850.000]" "0" "0" "NO" "YES" "NO" "NO" "NO" "0.000" +"J14" "MAIN-HOLE_REV1" "MTHOLE1" "TOP" "[4037.400,-6390.550]" "0" "0" "NO" "YES" "NO" "NO" "NO" "0.000" +"J15" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8400.000,-4450.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"JF1" "WALCON.100/VH/TM2OE/W.325/10" "" "TOP" "[7850.000,-3700.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"JP1" "BLKCON.156/VH/TM1SQS/W.312/6" "BLKCON.100/VH/TM1SQ/W.100/6" "TOP" "[8300.000,-1950.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"JP2" "BLKCON.156/VH/TM1SQS/W.312/6" "BLKCON.100/VH/TM1SQ/W.100/6" "TOP" "[8300.000,-2900.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"JR1" "ONC-5" "POLCON.100/RH/TM1SQS/W.440/5,DINC/STD_TM/5" "TOP" "[7050.000,-1100.000]" "0" "0" "NO" "YES" "NO" "NO" "NO" "0.000" +"R1" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2250.000,-1050.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R2" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[3400.000,-850.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R3" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2250.000,-850.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R4" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[3550.000,-1200.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R5" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5050.000,-5400.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R6" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[3650.000,-1300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R7" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[3450.000,-1300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R8" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[3850.000,-1300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R9" "SM/C_0402" "" "BOT" "[6500.000,-4500.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R10" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6975.000,-1625.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R11" "SM/C_0402" "" "BOT" "[6500.000,-4450.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R12" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4050.000,-1200.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R13" "SM/C_0402" "" "BOT" "[6500.000,-4550.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R14" "SM/C_0402" "" "BOT" "[6600.000,-4500.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R15" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6975.000,-1525.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R16" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6975.000,-1825.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R17" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7400.000,-6650.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R18" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6975.000,-1975.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R19" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7350.000,-3050.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R20" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5550.000,-2650.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R21" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5550.000,-2350.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R22" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7750.000,-3050.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R23" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7250.000,-3050.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R24" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7650.000,-3050.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R25" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6950.000,-3050.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R26" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7950.000,-3050.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R27" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6950.000,-5050.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R28" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7150.000,-5050.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R29" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2850.000,-3000.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R30" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7900.000,-4950.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R31" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7900.000,-4750.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R32" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4650.000,-1150.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R33" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4000.000,-3000.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R34" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4650.000,-1250.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R35" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4200.000,-3000.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R36" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4650.000,-1350.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R37" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4000.000,-2700.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R38" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8000.000,-2600.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R39" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4650.000,-1450.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R40" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4000.000,-2900.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R41" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4650.000,-1550.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R42" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4000.000,-2800.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R43" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4200.000,-2800.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R44" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4650.000,-1650.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R45" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4000.000,-2600.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R46" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4200.000,-3200.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R47" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4550.000,-1050.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R48" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2700.000,-2300.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R49" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2100.000,-2300.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R50" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2800.000,-2300.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R51" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2200.000,-2300.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R52" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2600.000,-2300.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R53" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4000.000,-3100.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R54" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4300.000,-2900.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R55" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4300.000,-3100.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R56" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4400.000,-3100.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R57" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2300.000,-2300.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R58" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2500.000,-2300.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R59" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2400.000,-2300.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R60" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2700.000,-2200.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R62" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6500.000,-3350.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R63" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6500.000,-3700.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R64" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6500.000,-3800.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R65" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6500.000,-4100.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R66" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4650.000,-2400.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R67" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4650.000,-2300.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R68" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4650.000,-2800.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R69" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4650.000,-2600.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R70" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4650.000,-2700.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R71" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4650.000,-2500.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R72" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4650.000,-2200.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R73" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4600.000,-3100.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R74" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4650.000,-2900.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R75" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4600.000,-3000.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R76" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7800.000,-4350.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R77" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4450.000,-4000.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R78" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7700.000,-4350.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R79" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8000.000,-4350.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R80" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8100.000,-4350.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R81" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8300.000,-4350.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R82" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7750.000,-4000.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R83" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7500.000,-6450.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R84" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2150.000,-2900.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R85" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2350.000,-2900.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R86" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4500.000,-4900.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R87" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2450.000,-2900.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R88" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2650.000,-2900.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R89" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6850.000,-6750.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R90" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7500.000,-6000.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R91" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4450.000,-5200.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R92" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4350.000,-5200.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R93" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6100.000,-5850.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R94" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6100.000,-5650.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R95" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7700.000,-6300.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R96" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6000.000,-5850.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R97" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6000.000,-5650.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R98" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6250.000,-6100.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R99" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5900.000,-5850.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R100" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5900.000,-5650.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R101" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5800.000,-5850.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R102" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5800.000,-5650.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R103" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6750.000,-6150.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R104" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7700.000,-6200.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R105" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5700.000,-5850.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R106" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5700.000,-5650.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R107" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5600.000,-5850.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R108" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5600.000,-5650.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R109" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6850.000,-6150.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R110" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7500.000,-6300.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R111" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5500.000,-5850.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R112" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5500.000,-5650.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R113" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5400.000,-5850.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R114" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5400.000,-5650.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R115" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6100.000,-6300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R116" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6100.000,-6100.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R117" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6000.000,-6300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R118" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6000.000,-6100.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R119" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6250.000,-6350.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R120" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7400.000,-6750.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R121" "BLKCON.100/VH/TM1SQ/W.100/2" "AX/.400X.100/.034" "TOP" "[4400.000,-4300.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R122" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5900.000,-6300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R123" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5900.000,-6100.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R124" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[3300.000,-6550.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R125" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[1700.000,-6550.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R126" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5800.000,-6300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R127" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5800.000,-6100.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R128" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6750.000,-6450.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R129" "AX/.400X.100/.034" "" "TOP" "[8150.000,-4250.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R130" "BLKCON.100/VH/TM1SQ/W.100/2" "AX/.400X.100/.034" "TOP" "[950.000,-7200.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R131" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5700.000,-6300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R132" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5700.000,-6100.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R133" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5600.000,-6300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R134" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5600.000,-6100.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R135" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6850.000,-6450.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R136" "BLKCON.100/VH/TM1SQ/W.100/2" "AX/.400X.100/.034" "TOP" "[1350.000,-7250.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R138" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5500.000,-6300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R139" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5500.000,-6100.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R140" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5400.000,-6300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R141" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5400.000,-6100.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R142" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6100.000,-6750.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R143" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6100.000,-6550.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R144" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6000.000,-6750.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R145" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6000.000,-6550.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R146" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6250.000,-6600.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R147" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5900.000,-6750.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R148" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5900.000,-6550.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R149" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5800.000,-6750.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R150" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5800.000,-6550.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R151" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6750.000,-6650.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R152" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5700.000,-6750.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R153" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5700.000,-6550.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R154" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5600.000,-6750.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R155" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5600.000,-6550.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R156" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6850.000,-6650.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R157" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5500.000,-6750.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R158" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5500.000,-6550.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R159" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5400.000,-6750.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R160" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[5400.000,-6550.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R161" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[1000.000,-5200.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R162" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[1000.000,-5650.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R163" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[1000.000,-6100.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R164" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[1000.000,-6550.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R165" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[1750.000,-4700.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R166" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[950.000,-4800.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R167" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[1950.000,-4700.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R168" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[1150.000,-4800.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R169" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[1850.000,-4700.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R170" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[1050.000,-4800.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R171" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6950.000,-5500.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R172" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7150.000,-5500.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R173" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7900.000,-5350.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R174" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7900.000,-5150.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R175" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7400.000,-6100.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R176" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2750.000,-2900.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R177" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2550.000,-3000.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R178" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6850.000,-1800.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R179" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6850.000,-2100.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R180" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4000.000,-2300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R181" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4150.000,-2300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R182" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4300.000,-2300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R183" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4400.000,-2300.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R184" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2900.000,-2200.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R185" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6750.000,-6250.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R190" "BLKCON.100/VH/TM1SQ/W.100/2" "AX/.400X.100/.034" "TOP" "[8100.000,-2750.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R191" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6550.000,-3050.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R192" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8250.000,-3100.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R193" "SM/C_1206" "BLKCON.100/VH/TM1SQ/W.100/2" "BOT" "[2550.000,-1450.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R194" "SM/C_1206" "BLKCON.100/VH/TM1SQ/W.100/2" "TOP" "[2150.000,-850.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R195" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2500.000,-850.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R196" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8300.000,-5850.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R197" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[7950.000,-3900.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R198" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8050.000,-3900.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R199" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8250.000,-3900.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"R200" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8350.000,-3900.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U1" "DIP.100/40/W.600/L2.100" "" "TOP" "[7650.000,-2300.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U3" "QUAD.65M/100/WG18.15X24.15" "" "TOP" "[3700.000,-3100.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U4" "DIP.100/24/W.600/L1.300" "" "TOP" "[6050.000,-900.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U5" "DIP.100/20/W.300/L1.050" "" "TOP" "[1600.000,-2400.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U6" "DIP.100/20/W.300/L1.050" "" "TOP" "[5200.000,-4300.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U7" "DIP.100/20/W.300/L1.050" "" "TOP" "[2550.000,-2000.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U8" "DIP.100/20/W.300/L1.050" "" "TOP" "[1600.000,-4600.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U9" "DIP.100/20/W.300/L1.050" "" "TOP" "[5200.000,-2950.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U10" "SIMM.050/VS_LP/TM/72" "" "TOP" "[4850.000,-4800.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U11" "DIP.100/20/W.300/L1.050" "" "TOP" "[1600.000,-3500.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U12" "QUAD.50M/208/WG30.60" "" "TOP" "[4150.000,-3450.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U13" "QUAD.50M/100/WG16.60" "QUAD.025/100/WG.885" "TOP" "[7350.000,-3800.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U14" "DIP.100/32/W.600/L1.700" "" "TOP" "[2150.000,-3200.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U15" "DIP.100/20/W.300/L1.050" "DIP.100/20/W.400/L1.050" "TOP" "[8400.000,-5700.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U16" "DIP.100/32/W.300/L1.625" "" "TOP" "[2300.000,-3200.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U17" "DIP.100/8/W.300/L.475" "" "TOP" "[7300.000,-6450.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U18" "DIP.100/8/W.300/L.475" "" "TOP" "[7300.000,-6000.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U19" "DIP.100/32/W.300/L1.625" "" "TOP" "[2300.000,-5400.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U20" "DIP.100/32/W.300/L1.625" "" "TOP" "[2300.000,-5850.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U21" "DIP.100/32/W.300/L1.625" "" "TOP" "[2300.000,-6300.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U22" "DIP.100/32/W.300/L1.625" "" "TOP" "[2300.000,-6750.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U23" "DIP.100/32/W.300/L1.625" "" "TOP" "[700.000,-5400.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U24" "DIP.100/32/W.300/L1.625" "" "TOP" "[700.000,-5850.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U25" "DIP.100/32/W.300/L1.625" "" "TOP" "[700.000,-6300.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U26" "DIP.100/32/W.300/L1.625" "" "TOP" "[700.000,-6750.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"U27" "DIP.100/8/W.300/L.475" "" "TOP" "[7300.000,-5550.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VD1" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[3500.000,-750.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VD3" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6975.000,-1425.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VD4" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6975.000,-1725.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VD5" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[6750.000,-3050.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VD6" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8000.000,-2750.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VD7" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4100.000,-3200.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VD8" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[8000.000,-2400.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VD9" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[2500.000,-2200.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VD11" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4500.000,-4700.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VD12" "BLKCON.100/VH/TM1SQ/W.100/2" "" "TOP" "[4900.000,-5300.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VT1" "TO225AA" "" "TOP" "[4900.000,-5400.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VT2" "TO225AA" "" "TOP" "[7850.000,-2650.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VT3" "TO225AA" "" "TOP" "[7850.000,-2300.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VT6" "TO225AA" "" "TOP" "[6400.000,-6150.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VT8" "TO225AA" "" "TOP" "[6400.000,-6400.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VT11" "TO225AA" "" "TOP" "[6400.000,-6650.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VT12" "TO225AA" "" "TOP" "[4450.000,-5300.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"VT14" "TO225AA" "" "TOP" "[2200.000,-750.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"X1" "WALCON.100/VH/TM2OES/W.325/10" "" "TOP" "[4300.000,-1100.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"X2" "WALCON.100/VH/TM2OES/W.325/10" "" "TOP" "[3100.000,-750.000]" "180" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"X4" "WALCON.100/VH/TM2OES/W.325/26" "" "TOP" "[2700.000,-1550.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"X5" "WALCON.100/VH/TM2OES/W.325/34" "" "TOP" "[6650.000,-3400.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"X6" "WALCON.100/VH/TM2OES/W.325/40" "" "TOP" "[5800.000,-4900.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"X7" "WALCON.100/VH/TM2OES/W.325/10" "" "TOP" "[7900.000,-6400.000]" "90" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"X8" "WALCON.100/VH/TM2OE/W.325/16" "" "TOP" "[7050.000,-5850.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"X9" "WALCON.100/VH/TM2OES/W.325/40" "" "TOP" "[5800.000,-5300.000]" "0" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +"Y1" "RAD/.400X.150/LS.200/.034" "" "TOP" "[7850.000,-3950.000]" "270" "0" "NO" "NO" "NO" "NO" "NO" "0.000" +.End + +.Section4 UpdateProperties Nets +"{Net Name}" "ROUTELAYERS" "PLANELAYERS" "NETWEIGHT" "VIAPERNET" "MINWIDTH" "MAXWIDTH" "WIDTHBYLAYER" "SPACINGBYLAYER" "CONNWIDTH" "RECONNTYPE" "TESTPOINT" "HIGHLIGHT" "NETGROUP" +"/BSTB" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/BUSAK" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/BUSRQ1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/CS0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/CS1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/CTSA" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/CTSB" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/DCDA" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/DCDB" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/DTRA" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/DTRB" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/HALT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/HD_RD" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/HD_WR" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/INIT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/INT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/INT_X" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/IO" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/IORD1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/IORD2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/IOWR1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/IOWR2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/M1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/MEMR1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/MEMR2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/MEMW1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/MEMW2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/MR" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/NMI" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/NMI_X" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/RD" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/RESET" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/RF" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/RTSA" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/RTSB" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/SINCA" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/SINCB" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/W/RDYA" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/W/RDYB" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/WAIT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/WDTOUT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/WE" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/WG_RD" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/WG_WR" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"/WR" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"0WS" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"10K_CLK" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"10K_CNFD" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"10K_D0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A4" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A5" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A6" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A7" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A7RF" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A8" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A9" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A10" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A11" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A12" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A13" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A14" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"A15" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"ACK" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"AEN" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"ARDY" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"AUD" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"AUTO_LF" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA4" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA5" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA6" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA7" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA8" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA9" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA10" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA11" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA12" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA13" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA14" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA15" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA16" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA17" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA18" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BA19" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BALE" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BCLK14" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BD0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BD1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BD2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BD3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BD4" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BD5" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BD6" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BD7" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BEEP" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BLUE" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BRDY" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BSINC" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"BUSY" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CAS_0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CAS_1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CAS_2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CAS_3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CLK14" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CLKOUT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CLKZ1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CLKZZ" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CLK_COM1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CLK_WG" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CLK_Z80" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CMOS_AS" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CMOS_DRD" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CMOS_DWR" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CS_CASH" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"CS_ROM" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"D0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"D1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"D2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"D3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"D4" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"D5" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"D6" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"D7" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"DACK1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"DACK2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"DAC_BCK" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"DAC_DATA" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"DAC_WS" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"DDEN" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"DENS" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"DENS_X" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"DIR" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"DIRC" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"DRQ" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"DRQ1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"DRQ2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"EPM_RES" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"FD0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"FD1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"FD2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"FD3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"FD4" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"FD5" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"FD6" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"FD7" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"FDAT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"FDD_C0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"FDD_C1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"FDD_C2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"FDD_CH" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"FDD_W" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"GND" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"GREEN" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HD1_CS1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HD1_CS2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HD2_CS1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HD2_CS2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HDD_C0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HDD_C1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HDD_C2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HDD_C3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HD_A0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HD_A1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HD_A2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HD_CS" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HD_DIR" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HD_RDY" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HD_RES" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HOLD" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"HRDY" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"IEO" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"INTRQ" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"IOCH" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"IOCHRDY" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"IP" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"IRQ1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"IRQ2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"ISARF" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"ISA_A20" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"ISA_CS" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"ISA_RES" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"JK0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"JK1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"JK2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"JK3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"JK4" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"JK5" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"J_VCC" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"KBD_CC" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"KBD_CLK" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"KBD_CLKR" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"KBD_CX" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"KBD_DAT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"KBD_DATR" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"KBD_DD" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"KBD_DX" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"L_CH" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA4" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA5" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA6" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA7" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA8" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA9" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA10" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA11" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA12" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA13" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MA14" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD4" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD5" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD6" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD7" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD8" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD9" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD10" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD11" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD12" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD13" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD14" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MD15" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MOUSE_D" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MOUSE_O" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MS-5" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MS12" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"MSDAT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N000852" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N001537" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N18931" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N18939" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N18943" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N18947" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N18955" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N18967" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N18975" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N19003" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N19011" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N19023" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N19035" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N19043" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N19075" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N19083" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N19103" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N19115" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20168" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20176" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20180" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20184" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20188" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20192" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20200" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20208" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20216" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20248" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20252" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20284" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20296" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20312" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20332" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N20356" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21094" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21102" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21106" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21110" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21114" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21118" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21126" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21134" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21142" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21174" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21178" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21210" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21222" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21238" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21258" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N21282" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N33253" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N33364" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N34348" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N36505" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N36531" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N44513" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N61648" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N65526" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N76897" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N76900" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N76918" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N76982" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N110634" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N122177" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N122400" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N122582" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N126955" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N127336" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N127697" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N181658" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N248340" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N248348" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N248452" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N248476" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N319967" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N320007" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N320216" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N324759" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N331430" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N353831" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N353834" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N353837" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N353840" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N356354" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N365717" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N462657" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N462669" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N526390" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N527236" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N641382" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N643352" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N643651" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N1669281" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N1669301" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N1669321" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"N1669341" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"NCONFIG" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"NCONF_X" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"NSTATUS" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PA0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PA1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PA2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PA3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PA4" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PA5" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PA6" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PA7" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PB6" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PB7" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PDIAG" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PE" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PPA0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PPA1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PPA2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PPA3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PPA4" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PPA5" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PPA6" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PPA7" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PW_GOOD" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"PW_GOODR" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"QDAT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"RA14" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"RA15" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"RA16" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"RA17" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"RAS_0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"RAS_1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"RDAT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"RD_KMPS" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"RD_XA" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"RED" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"RES_WG" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"ROM_W" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"RSTB" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"RT_IRQ" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"R_CH" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SE0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SE1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SEL0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SEL1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SELECT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SIDE" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SINC_1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SINC_2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SK" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SL" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SLCT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SQW" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SR" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SS" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"START" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"STE" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"STEP" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"STROBE" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SXA" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SYNC" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SYNC_H" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SYNC_IN" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"SYNC_V" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"S_IN" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"T/C" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TAPE_IN" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TAPE_OUT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TCK" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TDI" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TDO" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TG42" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TG42_BUF" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TG42_IN" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TG42_OUT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TMS" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TR00" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TR43" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TURBO" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TXDA" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"TXDB" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"T_IN" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"T_OUT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA4" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA5" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA6" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA7" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA8" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA9" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA10" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA11" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA12" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA13" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA14" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VA15" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VCC" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VCC-5" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VCC-12" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VCC12" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VCC12WG" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VCCINT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VCCINT_E" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VCCIO" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VCCIO_E" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD00" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD01" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD02" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD03" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD04" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD05" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD06" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD07" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD10" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD11" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD12" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD13" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD14" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD15" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD16" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD17" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD20" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD21" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD22" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD23" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD24" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD25" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD26" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD27" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD30" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD31" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD32" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD33" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD34" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD35" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD36" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VD37" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VGA_IN" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VGA_OUT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"VX2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"V_CS0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"V_WR0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"V_WR1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"V_WR2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"V_WR3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD4" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD5" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD6" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD7" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD8" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD9" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD10" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD11" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD12" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD13" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD14" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WD15" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WDAT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WDATA" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WF/DE" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WGA0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WGA1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WPRT" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WRITE" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WR_AWG" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WR_CNF" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WR_COL" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WR_DWG" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WR_PDOS" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"WSTB" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"XA0" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"XA1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"XA2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"XA3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"XHD1_CS1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"XHD1_CS2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"XHD2_CS1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"XHD2_CS2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"XHD_RD" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"XHD_RDY" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"XHD_RES" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"XHD_WR" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"ZC/TO1" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"ZC/TO2" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +"ZC/TO3" "" "" "50" "" "8.000" "40.000" "" "" "10.000" "STD" "NO" "NO" "0" +.End + diff --git a/2000/orcad/sprint_3.MNL b/2000/orcad/sprint_3.MNL new file mode 100644 index 0000000..f5987ac Binary files /dev/null and b/2000/orcad/sprint_3.MNL differ diff --git a/2000/orcad/sprint_3.OPJ b/2000/orcad/sprint_3.OPJ new file mode 100644 index 0000000..58248c5 --- /dev/null +++ b/2000/orcad/sprint_3.OPJ @@ -0,0 +1,194 @@ +(ExpressProject "" + (ProjectVersion "19981106") + (ProjectType "PCB") + (Folder "Design Resources" + (Folder "Library") + (File ".\sprint_3.dsn" + (Type "Schematic Design")) + (BuildFileAddedOrDeleted "x") + (CompileFileAddedOrDeleted "x") + (NoModify) + (DRC_Scope "0") + (DRC_Action "1") + (DRC_Create_Warnings "TRUE") + (DRC_Check_Ports "FALSE") + (DRC_Check_Off-Page_Connectors "FALSE") + (DRC_Identical_References "TRUE") + (DRC_Type_Mismatch "TRUE") + (DRC_Report_Ports_and_Off-page_Connectors "FALSE") + (DRC_SDT_Compatibility "FALSE") + (DRC_Report_Off-grid_Objects "FALSE") + (DRC_Check_Unconnected_Nets "TRUE") + (DRC_Report_Netnames "FALSE") + (DRC_View_Output "FALSE") + (DRC_Report_File "C:\COPY_D\ORCAD\SPRINTER\SPRINT_2.DRC") + (ANNOTATE_Scope "0") + (ANNOTATE_Mode "1") + (ANNOTATE_Action "0") + (ANNOTATE_Reset_References_to_1 "FALSE") + (ANNOTATE_No_Page_Number_Change "FALSE") + (ANNOTATE_Property_Combine "{Value}{Source Package}") + (Netlist_TAB "5") + (LAYOUT_Netlist_File "C:\COPY_D\ORCAD\sp2003\sprint_3.MNL") + (LAYOUT_PCB_Footprint "{PCB Footprint}") + (TRUE) + (LAYOUT_Units "0") + (TRUE) + (GATE_&_PIN_SWAP_Scope "0") + (GATE_&_PIN_SWAP_File_Name "C:\COPY_D\ORCAD\sp2003\Sprint_3.swp") + (TRUE) + (TRUE) + (TRUE) + (TRUE) + (TRUE) + (TRUE) + (TRUE) + (TRUE) + (TRUE) + (TRUE) + (TRUE) + (TRUE) + (TRUE) + (TRUE) + (TRUE) + (BOM_Scope "0") + (BOM_Mode "0") + (BOM_Report_File "C:\COPY_D\ORCAD\sp2003\Sprin_3m.bom") + (BOM_Merge_Include "FALSE") + (BOM_Property_Combine_7.0 "{Item}\t{Quantity}\t{Reference}\t{Value}") + (BOM_Header "Item\tQuantity\tReference\tPart") + (BOM_Include_File "C:\COPY_D\ORCAD\SPRINTER\SPRINT_2.INC") + (BOM_Include_File_Combine_7.0 "{Item}\t{Quantity}\t{Reference}\t{Value}") + (BOM_One_Part_Per_Line "FALSE") + (BOM_View_Output "TRUE") + (TRUE) + (TRUE) + (TRUE) + (TRUE)) + (Folder "Outputs" + (File "..\sprinter\sprint_2.drc" + (Type "Report")) + (File "..\sprinter\sprint_2.mnl" + (Type "LAYOUT Netlist File")) + (File "..\sprinter\sprint_2.bom" + (Type "Report")) + (File ".\sprint_3.mnl" + (Type "LAYOUT Netlist File")) + (File "..\sprinter\sprint_3.bom" + (Type "Report")) + (File ".\sprin_3m.bom" + (Type "Report"))) + (Folder "Referenced Projects") + (PartMRUSelector + (RES + (FullPartName "RES.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\ELSY1.OLB") + (DeviceIndex "0")) + (CAP + (FullPartName "CAP.Normal") + (LibraryName "C:\ORCAD\CAPTURE\LIBRARY\DISCRETE.OLB") + (DeviceIndex "0")) + (CON2 + (FullPartName "CON2.Normal") + (LibraryName "C:\ORCAD\CAPTURE\LIBRARY\CONNECTOR.OLB") + (DeviceIndex "0")) + (LN1 + (FullPartName "LN1.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\NEW.OLB") + (DeviceIndex "0")) + (AP6 + (FullPartName "AP6.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\NEW.OLB") + (DeviceIndex "0")) + (LA8 + (FullPartName "LA8.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\NEW.OLB") + (DeviceIndex "0")) + (LE1 + (FullPartName "LE1.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\NEW.OLB") + (DeviceIndex "0")) + (KT361 + (FullPartName "KT361.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\ELSY1.OLB") + (DeviceIndex "0")) + (HM628128A + (FullPartName "HM628128A.Normal") + (LibraryName "C:\ORCAD\CAPTURE\LIBRARY\SRAM.OLB") + (DeviceIndex "0")) + (KT315 + (FullPartName "KT315.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\ELSY1.OLB") + (DeviceIndex "0")) + (C + (FullPartName "C.Normal") + (LibraryName "C:\ORCAD\CAPTURE\LIBRARY\DISCRETE.OLB") + (DeviceIndex "0")) + (KD522 + (FullPartName "KD522.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\ELSY1.OLB") + (DeviceIndex "0")) + (TDA1543 + (FullPartName "TDA1543.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\ELSY1.OLB") + (DeviceIndex "0")) + (PIN + (FullPartName "PIN.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\NEW.OLB") + (DeviceIndex "0")) + ("HEADER 6" + (FullPartName "HEADER 6.Normal") + (LibraryName "C:\ORCAD\CAPTURE\LIBRARY\CONNECTOR.OLB") + (DeviceIndex "0")) + (AP5 + (FullPartName "AP5.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\NEW.OLB") + (DeviceIndex "0")) + (IR22 + (FullPartName "IR22.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\NEW.OLB") + (DeviceIndex "0")) + (KP11 + (FullPartName "KP11.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\NEW.OLB") + (DeviceIndex "0")) + (TM9 + (FullPartName "TM9.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\NEW.OLB") + (DeviceIndex "0")) + (HD20X2_0 + (FullPartName "HD20X2_0.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\NEW.OLB") + (DeviceIndex "0")) + (KC133 + (FullPartName "KC133.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\ELSY1.OLB") + (DeviceIndex "0")) + (EPM3064ATC100 + (FullPartName "EPM3064ATC100.Normal") + (LibraryName "C:\COPY_D\ORCAD\LIBS\ELSY1.OLB") + (DeviceIndex "0"))) + (GlobalState + (FileView + (Path "Design Resources") + (Path "Design Resources" ".\sprint_3.dsn") + (Path "Design Resources" ".\sprint_3.dsn" "SCHEMATIC1") + (Path "Outputs") + (Select "Design Resources" ".\sprint_3.dsn" "SCHEMATIC1" "PAGE1")) + (HierarchyView) + (Doc + (Type "COrCapturePMDoc") + (Frame + (Placement "44 0 1 0 486 -4 -23 0 223 0 351")) + (Tab 0)) + (Doc + (Type "COrSchematicDoc") + (Frame + (Placement "44 2 3 -1 -1 -8 -31 52 1736 52 832") + (Scroll "0 1530") + (Zoom "100") + (Occurrence "/")) + (Path "Z:\SHARE\0\2002-12-05-1322\SPRINT_3.DSN") + (Schematic "SCHEMATIC1") + (Page "PAGE1"))) + (LastUsedLibraryBrowseDirectory "C:\OrCAD\CAPTURE\LIBRARY")) diff --git a/2000/pcad_import/PAGE1.pdf b/2000/pcad_import/PAGE1.pdf new file mode 100644 index 0000000..640e294 Binary files /dev/null and b/2000/pcad_import/PAGE1.pdf differ diff --git a/2000/pcad_import/PAGE1.sch b/2000/pcad_import/PAGE1.sch new file mode 100644 index 0000000..22aafab Binary files /dev/null and b/2000/pcad_import/PAGE1.sch differ diff --git a/2000/pcad_import/SPRINT_3.PCB b/2000/pcad_import/SPRINT_3.PCB new file mode 100644 index 0000000..056d45d Binary files /dev/null and b/2000/pcad_import/SPRINT_3.PCB differ diff --git a/2000/photos/sp2000-big.jpg b/2000/photos/sp2000-big.jpg new file mode 100644 index 0000000..1d10731 Binary files /dev/null and b/2000/photos/sp2000-big.jpg differ diff --git a/2000/photos/sp2000-pcb.png b/2000/photos/sp2000-pcb.png new file mode 100644 index 0000000..59b61f1 Binary files /dev/null and b/2000/photos/sp2000-pcb.png differ diff --git a/2000/photos/sp2000.jpg b/2000/photos/sp2000.jpg new file mode 100644 index 0000000..7df0efb Binary files /dev/null and b/2000/photos/sp2000.jpg differ diff --git a/2000light/readme.md b/2000light/readme.md new file mode 100644 index 0000000..81945bb --- /dev/null +++ b/2000light/readme.md @@ -0,0 +1,11 @@ +# ╬°шсъш т Ёрчтюфъх яырЄ√ sp2000 light + +1. ╨рч·хь√ ISA юЄчхЁърыхэ√, эх чрярштрЄ№! ╧ырЄ√ т эшї эх тёЄрты Є№! + +2. ┬ёхь шчтхёЄэр  91-р  эюцър ACEX (юЄЁхчрЄ№ юЄ чхьыш фю чрярщъш) + +3. ═хЄ ёюхфшэхэш  яю ёшуэрыє XA2 (EP1K30QC208 200-р  эюцър -> DD16 ╩╨1533╥╠9 14-р  эюцър -> DD18 ╩╨1533╩╧11 9-р  эюцър) + +4. ═хЄ ёюхфшэхэш  яю ёшуэрыє WR_COL, эх фюїюфшЄ фю 37 эюуш EPM7064ACT100 (DD8 74HC374 11-р  эюцър -> ЁхчшёЄюЁ R65) + +5. ╤шуэры FDD_C1 Ёрчтхфхэ эхяЁртшы№эю. ═хюсїюфшью юЄЁхчрЄ№ (ЁхчрЄ№ ёю ёЄюЁюэ√ ьюэЄрцр є юёэютрэш  ьшъЁюёїхь√ DD15) 1-є■ эюцъє DD15 74HC374 юЄ /WG_WR (1818┬├93 2-р  эюцър) ш ёюхфшэшЄ№ ё DD12 ╩╨1533╥╠9 ё 10-ющ эюцъющ diff --git a/2000light/sp2000light-1.jpg b/2000light/sp2000light-1.jpg new file mode 100644 index 0000000..640aea1 Binary files /dev/null and b/2000light/sp2000light-1.jpg differ diff --git a/2000light/sp2000light-2.jpg b/2000light/sp2000light-2.jpg new file mode 100644 index 0000000..b5fbd04 Binary files /dev/null and b/2000light/sp2000light-2.jpg differ diff --git a/2000s/Sp_5s_d11.jpg b/2000s/Sp_5s_d11.jpg new file mode 100644 index 0000000..6942393 Binary files /dev/null and b/2000s/Sp_5s_d11.jpg differ diff --git a/2000s/Sp_5s_d21.jpg b/2000s/Sp_5s_d21.jpg new file mode 100644 index 0000000..34f9410 Binary files /dev/null and b/2000s/Sp_5s_d21.jpg differ diff --git a/2000s/sp2000s-1.jpg b/2000s/sp2000s-1.jpg new file mode 100644 index 0000000..91c8291 Binary files /dev/null and b/2000s/sp2000s-1.jpg differ diff --git a/2000s/sp2000s-2.jpg b/2000s/sp2000s-2.jpg new file mode 100644 index 0000000..0692ddf Binary files /dev/null and b/2000s/sp2000s-2.jpg differ diff --git a/2000s/sp2000s-scan-top.jpg b/2000s/sp2000s-scan-top.jpg new file mode 100644 index 0000000..d16a418 Binary files /dev/null and b/2000s/sp2000s-scan-top.jpg differ diff --git a/2000s/sp2000s-top.png b/2000s/sp2000s-top.png new file mode 100644 index 0000000..fd675a8 Binary files /dev/null and b/2000s/sp2000s-top.png differ diff --git a/2003s/docs/Sp_3m_d11.jpg b/2003s/docs/Sp_3m_d11.jpg new file mode 100644 index 0000000..2c2cb6f Binary files /dev/null and b/2003s/docs/Sp_3m_d11.jpg differ diff --git a/2003s/docs/Sp_3m_d21.jpg b/2003s/docs/Sp_3m_d21.jpg new file mode 100644 index 0000000..c988b06 Binary files /dev/null and b/2003s/docs/Sp_3m_d21.jpg differ diff --git a/2003s/docs/Sprin_3m.bom b/2003s/docs/Sprin_3m.bom new file mode 100644 index 0000000..e3fd661 --- /dev/null +++ b/2003s/docs/Sprin_3m.bom @@ -0,0 +1,102 @@ +1 36 C1,C3,C4,C11,C12,C16,C17, 0.5 mkF + C20,C22,C23,C24,C25,C26, + C28,C29,C30,C31,C32,C33, + C34,C35,C36,C37,C38,C40, + C41,C43,C44,C45,C46,C47, + C48,C49,C51,C52,C53 +2 3 C2,C14,C15 3.3 nF +3 5 C6,C7,C13,C39,C42 22 pF +4 2 C8,C9 10 mkF +5 1 C10 330 pF +6 4 C18,C19,C21,C27 500 mkF +7 1 DD1 K561LN2 +8 1 DD2 KR1533LE1 +9 4 DD3,DD11,DD12,DD16 KR1533TM9 +10 2 DD4,DD5 K555AP3 +11 5 DD6,DD8,DD9,DD10,DD15 74HC374 +12 1 DD7 KR1533ID7 +13 3 DD13,DD14,DD18 KR1533KP11 +14 1 DD17 K155LA8 +15 1 DD19 K555LN1 +16 1 JF1 Header 2x5 pin +17 1 JP1 Header 6 pin (POWER P8) +18 1 JP2 Header 6 pin (POWER P9) +19 1 JR1 ONC-5 (Keyboard) +20 1 J2 Header 2 pin (Reset) +21 1 J3 Header 2 pin (TB LED) +22 3 J4,J5,J15 Header 2 pin +23 2 J7,J6 ISA Slot +24 7 J8,J9,J10,J11,J12,J13, HOLE (no elemens) + J14 +25 20 R1,R10,R18,R27,R28,R30, 150 + R31,R47,R76,R77,R103, + R109,R128,R135,R151,R156, + R171,R172,R173,R174 +26 33 R2,R19,R20,R21,R22,R23, 3.9k + R24,R25,R26,R48,R49,R50, + R51,R52,R57,R58,R59,R60, + R165,R166,R167,R168,R169, + R170,R180,R181,R182,R183, + R184,R191,R192,R193,R196 +27 10 R3,R29,R43,R79,R80,R81, 300 + R161,R162,R163,R164 +28 3 R4,R6,R7 100k +29 42 R5,R12,R32,R33,R34,R35, 1k + R36,R37,R38,R39,R41,R42, + R44,R45,R46,R53,R54,R55, + R56,R62,R63,R64,R65,R78, + R84,R85,R86,R87,R88,R95, + R98,R104,R110,R119,R120, + R146,R176,R177,R197,R198, + R199,R200 +30 3 R8,R91,R92 10k +31 4 R9,R11,R13,R14 jamper +32 4 R15,R16,R89,R186 51 +33 2 R175,R17 1.2k +34 9 R40,R72,R73,R74,R178, 2k + R179,R185,R190,R195 +35 2 R61,R137 150 Om +36 13 R66,R67,R68,R69,R70,R71, 510 + R75,R121,R124,R125,R130, + R136,R194 +37 1 R82 910 +38 2 R83,R90 1M +39 27 R93,R96,R99,R101,R105, 1k 1% + R107,R111,R113,R114,R115, + R117,R122,R126,R131,R133, + R138,R140,R141,R142,R144, + R147,R149,R152,R154,R157, + R159,R160 +40 21 R94,R97,R100,R102,R106, 499 1% + R108,R112,R116,R118,R123, + R127,R132,R134,R139,R143, + R145,R148,R150,R153,R155, + R158 +41 1 R129 for cristall +42 1 U1 KR1818WG93 +43 1 U3 Z84C1516PSC +44 1 U4 DS12887A (Dallas) +45 7 U5,U6,U7,U8,U9,U11,U15 K555AP6 +46 1 U10 SIMM72 4-64 Mbytes +47 1 U12 EP1K30QC208-3 +48 1 U13 EPM3064ATC100-10, EPM764STC100-10 +49 1 U14 SST39SF020 +50 9 U16,U19,U20,U21,U22,U23, W24512AK-15 + U24,U25,U26 +51 2 U18,U17 KR140UD1208 +52 1 U27 TDA1543 (DAC) +53 3 VD1,VD3,VD4 KC147 +54 6 VD5,VD6,VD7,VD9,VD11, KD522 + VD12 +55 1 VD8 KC133 +56 2 VT1,VT12 KT815A-G, KT817A-G +57 2 VT14,VT2 KT361B, G, E +58 4 VT3,VT6,VT8,VT11 KT315B, G, E +59 1 X1 Header 2x5 pin (Kempston) +60 1 X2 Header 2x5 pin (Mouse) +61 1 X4 Header 2x13 pin (Printer) +62 1 X5 Header 2x17 pin (FDD) +63 2 X9,X6 Header 2x20 pin (HDD) +64 1 X7 Header 2x5 pin (Sound) +65 1 X8 Header 2x8 pin (Video) +66 1 Y1 14.0 MHz diff --git a/2003s/docs/Sprinter_2000s_manual.pdf b/2003s/docs/Sprinter_2000s_manual.pdf new file mode 100644 index 0000000..ff27ae8 Binary files /dev/null and b/2003s/docs/Sprinter_2000s_manual.pdf differ diff --git a/2003s/docs/sprin_3m.png b/2003s/docs/sprin_3m.png new file mode 100644 index 0000000..7678797 Binary files /dev/null and b/2003s/docs/sprin_3m.png differ diff --git a/2003s/docs/sprint_3m.png b/2003s/docs/sprint_3m.png new file mode 100644 index 0000000..1fbc124 Binary files /dev/null and b/2003s/docs/sprint_3m.png differ diff --git a/2003s/fw/bios/BIOS_REV.txt b/2003s/fw/bios/BIOS_REV.txt new file mode 100644 index 0000000..718e1e0 --- /dev/null +++ b/2003s/fw/bios/BIOS_REV.txt @@ -0,0 +1,121 @@ +;--------------------------------------------------------------- +;Rev Date Name Description +;--------------------------------------------------------------- +;Версия 3.04 +;R0046 16.06.2003 IM Исправления для совместимости video с Sp2000 +;R0046 13.06.2003 IM Исправления глюков в режиме ZX +;R0046 02.06.2003 IM Исправления для видео-ОЗУ AS7C1024A-JC12 +;Версия 3.03 +;R0045 05.02.2003 IM Исправления для видео-ОЗУ AS7C1024-JC12 +;Версия 3.02 +;R0044 01.10.2002 IM Добавления в прошивке +;Версия 3.00.253 (10.04.2002) UPDATE01 +;R0043 01.04.2002 IM Перекомпилена прошивка для ПЛМ для SIMM +;R0042 10.03.2002 DNS Setup 253 +;Версия 2.17.252 (03.03.2002) UPDATE-beta-version +;R0041 03-03-2002 IM Подправлены цвета в функции CGA палитры +;R0040 02-03-2002 IM Исправлен глюк функции выдачи портов +;R0039 02-03-2002 IM Добавлены чтение палитры и текстовая CGA палитра +;Версия 2.16.252 (27.02.2002) WORK +;R0038 27-02-2002 IM Сообщение об отсутствии Spectrum-ROM +;R0037 26-02-2002 IM Жестко закреплены страницы 41h..47h за Spectrum.ROM +;R0036 25-02-2002 IM Добавлен внутренний порт для возврата в ZX/FN +;R0035 22-02-2002 IM В BIOS добавлена функция установки Original-INT +;R0034 21-02-2002 IM Добавлена функция BIOS, переключающая 720/1.44 +;Версия 2.15.252 (18.02.2002) WORK +;R0033 18-02-2002 IM Исправление для ISA +;R0032 12-02-2002 IM Добавлена функция чтения ROM-Disk-а +;R0031 12-02-2002 IM Исправлена функция BIOS чтения/записи RAM-Disk-ов +;R0030 12-02-2002 IM Исправлена схема COVOX-Blaster-а +;R0029 08-02-2002 IM Полностью измененa схема доступа к ПЗУ/Fast-RAM/ISA +;Версия 2.14.252 (01.02.2002) WORK +;R0028 01-02-2002 DNS Добавлен сдвиг экрана в setup +;Версия 2.13.251 (10.11.2002) WORK +;R0027 23-01-2002 IM COVOX-Blaster 16bit, 110khz, stereo +;R0026 17-01-2002 IM Исправлена ошибка в функции FN_PIC1 +;Версия 2.12.251 (10.11.2002) RELEASE +;R0025 10-01-2002 IM Смещен экран на 1 знакоместо влево +;Версия 2.11.251 (08.01.2002) WORK +;R0024 10-01-2002 IM Исправление предыдущего исправления +;R0023 08-01-2002 IM Исправления в BIOS-е (перезагрузка ПЛМ) +;R0022 08-01-2002 IM разборки с FDD +;Версия 2.10.251 (25.12.2001) RELEASE +;R0020 23-12-2001 IM коррекция синхронизации в ПЛМ +;R0019 20-12-2001 IM убрано R0018 - NMI +;Версия 2.09.251 (18.12.2001) WORK (for Denis only!) +;R0018 18-12-2001 IM изменена прошивка ПЛМ (добавлен NMI) +;R0017 17-12-2001 IM изменена прошивка ПЛМ (исправления для SIMM) +;R0016 15-12-2001 IM изменена прошивка ПЛМ (исправления SINC) +;R0015 14-12-2001 IM добавлен пункт "L" в Post +;R0014 19-11-2001 IM обезглюченая прошивка для Winbond +;R0013 18-11-2001 IM возвращен старый copyright в Basic128 +;Версия 2.08.251 (17.11.2001) WORK +;R0012 17-11-2001 IM изменена прошивка ПЛМ от 17-ноя-2001 +;Версия 2.07.251 (11.11.2001) WORK +;R0011 11-11-2001 IM изменена прошивка ПЛМ от 11-ноя-2001 +;Версия 2.06.251 (07.11.2001) WORK +;R0010 07-11-2001 IM изменена прошивка ПЛМ от 07-ноя-2001 +;Версия 2.06.251 (05.11.2001) WORK +;R0009 05-11-2001 IM изменена прошивка ПЛМ от 05-ноя-2001 +;Версия 2.05.251 (xx.xx.2001) WORK +;R0008 xx-xx-2001 IM -- описание изменений -- +;Версия 2.04.251 (27.10.2001) RELEASE +;R0007 27-10-2001 IM изменена прошивка ПЛМ от 27-окт-2001 +;R0006 12-10-2001 IM перекопана прошивка ПЛМ от 12-окт-2001 +;Версия 2.04.250 (04.10.2001) WORK +;R0005 04-10-2001 DNS вставлен новый ROM.BIN от 4-окт-2001 +;Версия 2.04.249 (22.09.2001) WORK +;R0004 22-09-2001 DNS вставлен новый ROM.BIN от ...хм.. не помню.. +;R0003 22-09-2001 IM исправление названий в меню "Hardware" +;R0002 22-09-2001 IM вставлен номер ПЗУ и функция биоса для него 0EDh +;R0001 22-09-2001 IM добавлена функция GOTO Spectrum 0FBh +;Версия 2.03.248 (08.06.2001) WORK +;--------------------------------------------------------------- +;Revisions: +;R0044 - Введены биты порта управления управления: +; бит выключения RESET +; бит включения NMI по + +; бит отключения ZX-screen (совмещен с битом Sprinter/Spectrum) +;R0036 - Спец-функция для sprinter.exe Установка внутреннего порта EE +; в не 0 приводит к переходу в установленную страницу и продолжению +; работы программы, установившей перехват +;R0033 - В режиме Sprinter введен старый доступ к ISA через порт 1FFD и +; PAGE3=D0..DF +;R0031 - В функции чтения/записи RAM-Disk-ов был жестокий глюк... +; она вообще не работала +;R0030 - Убраны сбои при проигрывании в режиме с прерываниями, когда +; в CBL записываются лишние или недозаписываются байты... +; по прерыванию CBL внутренний счетчик устанавливается на 00h или 80h +;R0029 - Введено разделение Sprinter и Spectrum режимов. +; В режиме Spectrum и Sprinter-ZX все ПЗУ находятся в ОЗУ +; Изменен доступ к ПЗУ и Fast-RAM доступ стал быстрее. Изменилась +; адресация страниц Fast-RAM и ROM. Адресуются через порт 5F в режиме +; SYSTEM-on. Введен полный запрет доступа к RAM во время работы с ПЗУ +; ОЗУ в этот момент свободно для других функций (потребуется для DMA) +; Скорость работы в Fast-RAM выведена на максимум (без вайтов). +; Выкинуты ПЗУ Spectrum-а из BIOS. +;R0026 - Исправлена ошибка в функции FN_PIC1. Были неверная отработка +; номера окна и несохранение порта RGADR. +;R0024 - последствия R0023, в Турбо возникло занижение скорости из-за +; переключения управляющего регистра на boundary вместо wait +;R0023 - обнаружена и устранена ошибка в программе перезагрузки ПЛМ извне +; (через КЭШ) был неверно инициализирован boundary-регистр Z84C15 +;R0022 - убран глюк работы с FDD, возникший после корректировки работы с +; SIMM-ами (подаваемые на FDD данные обрывались раньше времени) +;R0020 - убран глюк несовместимости прошивки "старой" и "новой" партий плат +;R0018 - "дикий" NMI - по alt+F12 просто подается NMI, ничего более не +; отслеживается +;R0017 - введены задержки (input delay in MAX+) для ввода данных с SIMM-а, +; изменена времянка сигнала /WE на SIMM +;R0016 - Добавлена схема подавления джиттера строчной синхронизации +; давится джиттер +/- 0.25мкс +;R0015 - Перед загрузкой ПЛМ зажигается "L" на индикаторе Post-Tester-a +;R0014 - убран глюк под меню help на Winbond-ах (проверить!) +;R0012 - закреплено исправление для ISA, видео-ОЗУ улучшение для UMC +;R0011 - закреплено исправление для ISA, по видео-ОЗУ откат до 2.04 версии +;R0010 - дополнительное удаление глюков с видео-ОЗУ +;R0009 - частичное удаление глюков с видео-ОЗУ +;R0007 - исправление множественных глюков при работе с SIMM методом +; перекомпиляции с новыми опциями MAX-Plus. +;R0006 - дополнительное исправление глюков при работе с SIMM. +; diff --git a/2003s/fw/bios/SETUP_REV.txt b/2003s/fw/bios/SETUP_REV.txt new file mode 100644 index 0000000..f14ed3b --- /dev/null +++ b/2003s/fw/bios/SETUP_REV.txt @@ -0,0 +1,30 @@ +;--------------------------------------------------------------- +;Rev Date Name Description +;--------------------------------------------------------------- +;╚чьхэхэш  т build'e 2.53 +;R06 16-02-2002 DNS Add CMOS install routine. Disabled TRDOS install routine. +;╚чьхэхэш  т build'e 2.52 +;R05 28-01-2002 DNS Add new items to SETUP Utility for screen position. +;╚чьхэхэш  т build'e 2.51 +;R04 14-09-2001 DNS Added procedure GET_BOARD_NUMBER and + Removed 2 IDE (if with_2ide) +;╚чьхэхэш  т build'e 2.50 +;R03a 02-08-2001 DNS ADD BUILD-IN CD DRIVER (Not release) +;R03 30-07-2001 DNS Developed a new IDE DETECT routine and fixied any bugs +;R02 25-07-2001 DNS Add Secondary IDE +;╚чьхэхэш  т build'e 2.48 +;R01 23-04-2001 DNS Removed procedure GET_ID and make new which +; will be take Model Name. +;R00 xx-xx-2000 DNS New BIOS for Sp2000 build 2.48 +;--------------------------------------------------------------- +;Revisions: +;R01 - ╘єэъЎш  GET_ID эр яырЄрї Sprinter97, яюыєўрыр фрЄ√ ёючфрэш  ш +; яЁю°штъш ╧╟╙, эр яырЄрї Sp2000 с√ыю ттхфшэю яюэ Єшх ьюфхыш. +;R02 - └тЄюфхЄхъЄ 4ї єёЄЁющёЄт +;R03 - ─юсртыхэр ЁрсюЄр тёхї ЇєэъЎшщ ёю тЄюЁ√ь IDE ърэрырь, ЁрсюЄрхЄ +; эхёЄрсшы№эю, тючьюцэю цхыхчю, эрўрЄр ЁрсюЄр эрф ўЄхэшхь ё CD, +; шёяЁртыхэр ю°шсър (яЁш юяЁхфхыхэшш CDROMр эх єърч√трыё  яЁшчэръ +; MASTER/SLAVE т ярЁрьхЄЁрї IDE(#FE:#C1C0-#C1CF). +;R04 - ─юсртыхэ т√тюф эюьхЁр яырЄ√ (ЇєэъЎш  #ED) яЁш ёЄрЁЄх ъюья№■ЄхЁр, +; ЁрсюЄр ёю тЄюЁ√ь IDE яхЁхэхёхэр т єёыютэє■ ъюьяшы Ўш■ (if with_2ide) +;---------------------------------------------------------------- \ No newline at end of file diff --git a/2003s/fw/bios/readme.md b/2003s/fw/bios/readme.md new file mode 100644 index 0000000..7eaefa9 --- /dev/null +++ b/2003s/fw/bios/readme.md @@ -0,0 +1,11 @@ +# sp2k-3.00.253.bin + +╬ЇшЎшры№эр  фрЄр т√яєёър 07.04.2002, яръхЄ юсэютыхэш  SU1 (Sprinter Update 1) + +# sp2k-3.03.253.bin + +─рЄр ёсюЁъш 13.05.2003, юЇшЎшры№эю эх т√яєёърырё№. ╬яєсышъютрэр ё юЄъЁ√Єшхь яЁюхъЄр. + +# sp2k-3.04.253.bin + +─рЄр ёсюЁъш 17.06.2003, юЇшЎшры№эю эх т√яєёърырё№. ╬яєсышъютрэр ё юЄъЁ√Єшхь яЁюхъЄр. \ No newline at end of file diff --git a/2003s/fw/bios/sp2k-3.00.253.bin b/2003s/fw/bios/sp2k-3.00.253.bin new file mode 100644 index 0000000..263bb2b Binary files /dev/null and b/2003s/fw/bios/sp2k-3.00.253.bin differ diff --git a/2003s/fw/bios/sp2k-3.03.253.bin b/2003s/fw/bios/sp2k-3.03.253.bin new file mode 100644 index 0000000..2546503 Binary files /dev/null and b/2003s/fw/bios/sp2k-3.03.253.bin differ diff --git a/2003s/fw/bios/sp2k-3.04.253.bin b/2003s/fw/bios/sp2k-3.04.253.bin new file mode 100644 index 0000000..fa8bb7a Binary files /dev/null and b/2003s/fw/bios/sp2k-3.04.253.bin differ diff --git a/2003s/fw/max/readme.md b/2003s/fw/max/readme.md new file mode 100644 index 0000000..3b6a791 --- /dev/null +++ b/2003s/fw/max/readme.md @@ -0,0 +1,7 @@ +# sp2k-7064stc100-10.pof + +─рЄр ёсюЁъш 21.08.2002, Їрщы ш хую шёїюфэшъ юяєсышъютрэ√ ё юЄъЁ√Єшхь яЁюхъЄр. + +# sp2k-7128stc100-10.pof + +─рЄр ёсюЁъш 06.06.2021, ёюсЁрэю шч Єхї цх шёїюфэшъют. diff --git a/2003s/fw/max/sp2k-7064stc100-10.pof b/2003s/fw/max/sp2k-7064stc100-10.pof new file mode 100644 index 0000000..70047b3 Binary files /dev/null and b/2003s/fw/max/sp2k-7064stc100-10.pof differ diff --git a/2003s/fw/max/sp2k-7128stc100-10.pof b/2003s/fw/max/sp2k-7128stc100-10.pof new file mode 100644 index 0000000..875e82f Binary files /dev/null and b/2003s/fw/max/sp2k-7128stc100-10.pof differ diff --git a/2003s/gerber/SPRINT_3M.zip b/2003s/gerber/SPRINT_3M.zip new file mode 100644 index 0000000..29644d9 Binary files /dev/null and b/2003s/gerber/SPRINT_3M.zip differ diff --git a/2003s/gerber/SPRIN_3M.zip b/2003s/gerber/SPRIN_3M.zip new file mode 100644 index 0000000..8e1b09d Binary files /dev/null and b/2003s/gerber/SPRIN_3M.zip differ diff --git a/2003s/gerber/╨С╨Ы╨Р╨Э╨Ъ ╨Ч╨Р╨Ъ╨Р╨Ч╨Р.rtf b/2003s/gerber/╨С╨Ы╨Р╨Э╨Ъ ╨Ч╨Р╨Ъ╨Р╨Ч╨Р.rtf new file mode 100644 index 0000000..3baffe0 --- /dev/null +++ b/2003s/gerber/╨С╨Ы╨Р╨Э╨Ъ ╨Ч╨Р╨Ъ╨Р╨Ч╨Р.rtf @@ -0,0 +1,166 @@ +{\rtf1\ansi\ansicpg1251\uc1 \deff0\deflang1033\deflangfe1049{\fonttbl{\f0\froman\fcharset0\fprq2{\*\panose 02020603050405020304}Times New Roman;}{\f1\fswiss\fcharset0\fprq2{\*\panose 020b0604020202020204}Arial;} +{\f2\fmodern\fcharset0\fprq1{\*\panose 02070309020205020404}Courier New;}{\f16\froman\fcharset238\fprq2 Times New Roman CE;}{\f17\froman\fcharset204\fprq2 Times New Roman Cyr;}{\f19\froman\fcharset161\fprq2 Times New Roman Greek;} +{\f20\froman\fcharset162\fprq2 Times New Roman Tur;}{\f21\froman\fcharset186\fprq2 Times New Roman Baltic;}{\f22\fswiss\fcharset238\fprq2 Arial CE;}{\f23\fswiss\fcharset204\fprq2 Arial Cyr;}{\f25\fswiss\fcharset161\fprq2 Arial Greek;} +{\f26\fswiss\fcharset162\fprq2 Arial Tur;}{\f27\fswiss\fcharset186\fprq2 Arial Baltic;}{\f28\fmodern\fcharset238\fprq1 Courier New CE;}{\f29\fmodern\fcharset204\fprq1 Courier New Cyr;}{\f31\fmodern\fcharset161\fprq1 Courier New Greek;} +{\f32\fmodern\fcharset162\fprq1 Courier New Tur;}{\f33\fmodern\fcharset186\fprq1 Courier New Baltic;}}{\colortbl;\red0\green0\blue0;\red0\green0\blue255;\red0\green255\blue255;\red0\green255\blue0;\red255\green0\blue255;\red255\green0\blue0; +\red255\green255\blue0;\red255\green255\blue255;\red0\green0\blue128;\red0\green128\blue128;\red0\green128\blue0;\red128\green0\blue128;\red128\green0\blue0;\red128\green128\blue0;\red128\green128\blue128;\red192\green192\blue192;}{\stylesheet{ +\widctlpar\adjustright \fs20\lang1049\cgrid \snext0 Normal;}{\*\cs10 \additive Default Paragraph Font;}{\s15\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs28\lang1049\kerning28\cgrid \sbasedon0 \snext0 \'e7\'e0\'e3\'ee\'eb\'ee\'e2\'ee\'ea 1;}{ +\s16\sb240\sa60\keepn\widctlpar\adjustright \b\i\f1\lang1049\cgrid \sbasedon0 \snext0 \'e7\'e0\'e3\'ee\'eb\'ee\'e2\'ee\'ea 2;}{\s17\keepn\widctlpar\outlinelevel2\adjustright \fs28\lang1049\cgrid \sbasedon0 \snext0 \'e7\'e0\'e3\'ee\'eb\'ee\'e2\'ee\'ea 3;}{ +\s18\keepn\widctlpar\outlinelevel3\adjustright \b\i\fs28\lang1049\cgrid \sbasedon0 \snext0 \'e7\'e0\'e3\'ee\'eb\'ee\'e2\'ee\'ea 4;}{\s19\fi567\keepn\widctlpar\outlinelevel5\adjustright \b\fs28\lang1049\cgrid \sbasedon0 \snext0 +\'e7\'e0\'e3\'ee\'eb\'ee\'e2\'ee\'ea 6;}{\s20\fi3119\keepn\widctlpar\outlinelevel6\adjustright \b\fs28\cf12\lang1049\cgrid \sbasedon0 \snext0 \'e7\'e0\'e3\'ee\'eb\'ee\'e2\'ee\'ea 7;}{\*\cs21 \additive +\'ce\'f1\'ed\'ee\'e2\'ed\'ee\'e9 \'f8\'f0\'e8\'f4\'f2;}{\s22\fi1276\widctlpar\adjustright \i\fs22\lang1049\cgrid \sbasedon0 \snext0 Title;}{\*\cs23 \additive \ul\cf2 \sbasedon10 Hyperlink;}}{\info{\title \'c1\'cb\'c0\'cd\'ca \'c7\'c0\'ca\'c0\'c7\'c0} +{\author Elena Solovjeva }{\operator Ivan Mak}{\creatim\yr2002\mo12\dy9\hr20\min5}{\revtim\yr2002\mo12\dy9\hr21\min1}{\version19}{\edmins47}{\nofpages2}{\nofwords536}{\nofchars3057}{\*\company }{\nofcharsws3754}{\vern89}} +\paperw11906\paperh16838\margl340\margr352\margt426\margb510 \widowctrl\ftnbj\aenddoc\hyphcaps0\formshade\viewkind1\viewscale100\pgbrdrhead\pgbrdrfoot \fet0\sectd \linex0\headery0\footery0\colsx709\endnhere\sectdefaultcl {\*\pnseclvl1 +\pnucrm\pnstart1\pnindent720\pnhang{\pntxta .}}{\*\pnseclvl2\pnucltr\pnstart1\pnindent720\pnhang{\pntxta .}}{\*\pnseclvl3\pndec\pnstart1\pnindent720\pnhang{\pntxta .}}{\*\pnseclvl4\pnlcltr\pnstart1\pnindent720\pnhang{\pntxta )}}{\*\pnseclvl5 +\pndec\pnstart1\pnindent720\pnhang{\pntxtb (}{\pntxta )}}{\*\pnseclvl6\pnlcltr\pnstart1\pnindent720\pnhang{\pntxtb (}{\pntxta )}}{\*\pnseclvl7\pnlcrm\pnstart1\pnindent720\pnhang{\pntxtb (}{\pntxta )}}{\*\pnseclvl8\pnlcltr\pnstart1\pnindent720\pnhang +{\pntxtb (}{\pntxta )}}{\*\pnseclvl9\pnlcrm\pnstart1\pnindent720\pnhang{\pntxtb (}{\pntxta )}}\pard\plain \s15\fi1668\li2160\sb240\sa60\keepn\widctlpar\outlinelevel0\adjustright \b\f1\fs28\lang1049\kerning28\cgrid {\f23 \'c1\'cb\'c0\'cd\'ca \'c7\'c0\'ca +\'c0\'c7\'c0 +\par }\pard\plain \widctlpar\adjustright \fs20\lang1049\cgrid { +\par }\pard \fi567\widctlpar\adjustright {\b\f17\fs28 \'c7\'c0\'ca\'c0\'c7\'d7\'c8\'ca:}{\b\f17\fs28\lang1033 \'93\'cf\'e5\'f2\'e5\'f0\'f1 \'cf\'eb\'fe\'f1\'94}{\b\fs28 +\par }{\b\f17\fs28 \tab \'c1\'ee\'f0\'e8\'f1\'ee\'e2 \'c8\'e3\'ee\'f0\'fc \'c0\'eb\'e5\'ea\'f1\'e0\'ed\'e4\'f0\'ee\'e2\'e8\'f7}{\b\fs28\lang1033 ,}{\b\f17\fs28 \'f2\'e5\'eb. 327-35-31, }{\b\fs28\lang1033 e-mail: }{\field{\*\fldinst {\b\fs28\lang1033 +HYPERLINK mailto:borisov@petersplus.ru }{\b\fs28\lang1033 {\*\datafield +00d0c9ea79f9bace118c8200aa004ba90b02000000170000001600000062006f007200690073006f007600400070006500740065007200730070006c00750073002e00720075000000e0c9ea79f9bace118c8200aa004ba90b3a0000006d00610069006c0074006f003a0062006f007200690073006f007600400070006500 +740065007200730070006c00750073002e00720075000000}}}{\fldrslt {\cs23\ul\cf2 borisov@petersplus.ru}}}{\b\fs28\lang1033 +\par }\pard \fi2268\widctlpar\adjustright {\cf12\lang1033 (}{\f17\cf12 \'cd\'e0\'e7\'e2\'e0\'ed\'e8\'e5 \'f4\'e8\'f0\'ec\'fb,}{\cf12\lang1033 }{\f17\cf12 \'f2\'e5\'eb\'e5\'f4\'ee\'ed, \'f4\'e0\'ea\'f1, }{\cf12\lang1033 e-mail}{\cf12 ,}{\cf12\lang1033 }{ +\f17\cf12 \'d4\'c8\'ce \'f0\'e0\'e7\'f0\'e0\'e1\'ee\'f2\'f7\'e8\'ea\'e0}{\cf12\lang1033 )}{\fs28\cf12\lang1033 +\par }\pard \fi567\widctlpar\adjustright {\b\f17\fs28 \'c4\'e0\'f2\'e0 \'ef\'f0\'e8\'e5\'ec\'e0 \'e7\'e0\'ea\'e0\'e7\'e0:}{\b\fs28\lang1033 10}{\b\f17\fs28 \'e4\'e5\'ea\'e0\'e1\'f0\'ff}{\b\fs28\lang1033 2002 +\par }\pard\plain \s20\fi567\keepn\widctlpar\outlinelevel6\adjustright \b\fs28\cf12\lang1049\cgrid {\f17\cf1 \'c4\'e0\'f2\'e0 \'e6\'e5\'eb\'e0\'e5\'ec\'ee\'e9 \'ef\'ee\'f1\'f2\'e0\'e2\'ea\'e8 \'ef\'eb\'e0\'f2: 20 \'e4\'e5\'ea\'e0\'e1\'f0\'ff 2002 +\par }\pard\plain \fi567\widctlpar\adjustright \fs20\lang1049\cgrid {\b\fs28\lang1033 +\par }{\b\f17\fs28 \'c8\'f1\'f5\'ee\'e4\'ed\'fb\'e9 \'f4\'e0\'e9\'eb: }{\b\fs28\lang1033 Sprin_3m (09.12.2002) +\par }\pard \fi2268\widctlpar\adjustright {\fs28\cf12\lang1033 (}{\f17\cf12 \'c8\'ec\'ff \'ef\'eb\'e0\'f2\'fb, \'f0\'e0\'e7\'ec\'e5\'f0, \'e4\'e0\'f2\'e0 \'f1\'ee\'e7\'e4\'e0\'ed\'e8\'ff \'f4\'e0\'e9\'eb\'e0}{\cf12\lang1033 ) +\par }\pard \widctlpar\adjustright {\lang1033 +\par }\trowd \trgaph108\trrh732\trleft567\trkeep\trbrdrt\brdrs\brdrw10 \trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 \trbrdrv\brdrs\brdrw10 \clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb +\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx2268\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx3261\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb +\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx5529\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx8460\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb +\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx9888\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx11057\pard \widctlpar\intbl\adjustright {\b\f17\fs28 \'c8\'ec\'ff \'ef\'eb\'e0 +\'f2\'fb +\par }{\b\i\f17\fs24\cf12\lang1033 (\'eb\'e0\'f2\'e8\'ed\'f1\'ea\'e8\'ec\'e8 \'e1\'f3\'ea\'e2\'e0\'ec\'e8, 8 \'f1\'e8\'ec\'e2\'ee\'eb\'ee\'e2}{\b\fs28\lang1033 \cell }{\b\f17\fs28 \'ca\'ee\'e4 }{\b\fs28\lang1033 +\par }{\b\f17\fs28 \'e8\'e7\'e4.}{\b\fs28\lang1033 \cell }{\b\f17\fs24 \'d0\'e0\'e7\'ec\'e5\'f0\'fb \'ef\'eb\'e0\'f2\'fb +\par \'ec\'ec +\par \'f1 \'e4\'ee\'ef\'f3\'f1\'ea\'e0\'ec\'e8}{\b\fs24\lang1033 \cell }{\b\f17\fs24 \'d0\'e0\'e7\'ec\'e5\'f0\'fb \'e7\'e0\'e3\'ee\'f2\'ee\'e2\'ea\'e8 +\par (\'e4\'eb\'ff \'ea\'ee\'ec\'ef\'eb\'e5\'ea\'f2\'e0) +\par \'f1 \'e4\'ee\'ef\'f3\'f1\'ea\'e0\'ec\'e8\cell }{\b\f17\fs28 \'ca\'ee\'eb-\'e2\'ee +\par \'e7\'e0\'e3\'ee\'f2.}{\b\fs28\lang1033 \cell }{\b\f17\fs28 \'ca\'ee\'eb-\'e2\'ee +\par \'ef\'eb\'e0\'f2 }{\b\fs28\lang1033 \cell }\pard \widctlpar\intbl\adjustright {\b\fs28 \row }\trowd \trgaph108\trrh402\trleft567\trbrdrt\brdrs\brdrw10 \trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 \trbrdrv +\brdrs\brdrw10 \clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx2268\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb +\cellx3261\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx4395\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx5529 +\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx6946\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx8460\clvertalt +\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx9888\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx11057\pard +\widctlpar\intbl\adjustright {\b\fs28\lang1033 Sprin_3m\cell 24000\cell 205 +-1\cell 163+-1\cell }{\b\fs28 235\cell 193\cell \cell \cell }\pard \widctlpar\intbl\adjustright {\b\fs28 \row }\trowd \trgaph108\trrh281\trleft567\trkeep\trbrdrt\brdrs\brdrw10 +\trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 \trbrdrv\brdrs\brdrw10 \clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx3544\clvertalt\clbrdrt +\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx11057\pard \widctlpar\intbl\adjustright {\b\f17\fs28 \'d1\'ee\'f1\'f2\'e0\'e2 \'e7\'e0\'e3\'ee\'f2\'ee\'e2\'ea\'e8 \cell }{\b\fs28 \cell }\pard +\widctlpar\intbl\adjustright {\b\fs28 \row }\pard \fi567\widctlpar\adjustright {\b\f17\fs24 2 \'f1\'eb\'ee\'ff, \'f1 \'ec\'e0\'f1\'ea\'ee\'e9, \'e1\'e5\'e7 \'ec\'e0\'f0\'ea\'e8\'f0\'ee\'e2\'ea\'e8, \'ee\'e1\'f0\'e5\'e7\'ea\'e0 \'e3\'e8\'eb\'fc\'ee\'f2\'e8 +\'ed\'ee\'e9}{\b\fs24 , }{\b\f17\fs24 \'e7\'e0\'f9\'e8\'f2\'e0 \'f0\'e0\'e7\'fa\'e5\'ec\'ee\'e2 \'ee\'f2 \'eb\'f3\'e6\'e5\'ed\'e8\'ff \'ed\'e5 \'f2\'f0\'e5\'e1\'f3\'e5\'f2\'f1\'ff}{\b\fs24 +\par }{\b\i\f17\fs24\ul\cf12 \'d0\'e0\'f1\'f8\'e8\'f4\'f0\'ee\'e2\'ea\'e0 \'ea\'ee\'e4\'e0:}{\fs24\ul\cf12 +\par }\pard \fi-1418\li1985\widctlpar\adjustright {\i\f17\cf12 1-\'f2\'e8\'ef \'ef\'eb\'e0\'f2\'fb (1-\'ee\'e4\'ed\'ee\'f1\'f2\'ee\'f0\'ee\'ed\'ed\'ff\'ff,2-\'e4\'e2\'f3\'f5\'f1\'f2\'ee\'f0\'ee\'ed\'ed\'ff\'ff, X-\'ec\'ed\'ee\'e3\'ee\'f1\'eb\'ee\'e9\'ed\'e0 +\'ff); +\par 2-\'f2\'e8\'ef \'ec\'e0\'f1\'ea\'e8 (0-\'e1\'e5\'e7 \'ec\'e0\'f1\'ea\'e8,4-\'f4\'ee\'f2\'ee\'ef\'f0\'ee\'ff\'e2.\'e8\'ec\'ef\'ee\'f0\'f2\'ed\'e0\'ff); +\par 3-\'ec\'e0\'f0\'ea\'e8\'f0\'ee\'e2\'ea\'e0 (0-\'e1\'e5\'e7 \'ec\'e0\'f0\'ea\'e8\'f0\'ee\'e2\'ea\'e8,1-\'f1 \'ee\'e4\'ed\'ee\'e9 \'f1\'f2\'ee\'f0\'ee\'ed\'fb,2-\'f1 \'e4\'e2\'f3\'f5 \'f1\'f2\'ee\'f0\'ee\'ed); +\par 4-\'ee\'e1\'f0\'e0\'e1\'ee\'f2\'ea\'e0 \'ea\'ee\'ed\'f2\'f3\'f0\'e0 +\par }\pard \fi-709\li1985\widctlpar\adjustright {\i\f17\cf12 (0-\'e3\'e8\'eb\'fc\'ee\'f2\'e8\'ed\'ee\'e9 \'f1 \'e4\'ee\'ef.+ -0.75\'ec\'ec, +\par 1-\'f8\'f2\'e0\'ec\'ef\'ee\'ec \'f1 \'e4\'ee\'ef. \endash 0,3 \'ec\'ec, +\par 2-\'f4\'f0\'e5\'e7\'ee\'e9 \'f1 \'e4\'ee\'ef.+ -0.2\'ec\'ec - \'ee\'e4\'ed\'e0 \'cf\'cf \'ed\'e0 \'e7\'e0\'e3\'ee\'f2\'ee\'e2\'ea\'e5, +\par 3-\'cf\'cf \'ef\'e5\'f0\'e5\'e4\'e0\'e5\'f2\'f1\'ff \'e2 \'ed\'e5\'ee\'e1\'f0\'e0\'e1\'ee\'f2\'e0\'ed\'ed\'ee\'e9 \'e7\'e0\'e3\'ee\'f2\'ee\'e2\'ea\'e5, +\par 4-\'e3\'e8\'eb\'fc\'ee\'f2\'e8\'ed\'ee\'e9 \'e1\'e5\'e7 \'f2\'e5\'f5.\'ef\'ee\'eb\'e5\'e9, \'e1\'e5\'e7 \'e2\'fb\'f0\'f3\'e1\'ea\'e8 \'ee\'f2\'e4\'e5\'eb\'fc\'ed\'fb\'f5 \'cf\'cf, +\par 5-\'e3\'e8\'eb\'fc\'ee\'f2\'e8\'ed\'ee\'e9 \'ea\'e0\'e6\'e4\'f3\'fe \'cf\'cf \'ed\'e0 \'e7\'e0\'e3\'ee\'f2\'ee\'e2\'ea\'e5, +\par 6-\'f4\'f0\'e5\'e7\'ee\'e9 \'f1 \'e4\'ee\'ef.+ -0.2\'ec\'ec \'ea\'e0\'e6\'e4\'f3\'fe \'cf\'cf \'ed\'e0 \'e7\'e0\'e3\'ee\'f2\'ee\'e2\'ea\'e5, +\par 7-\'f8\'f2\'e0\'ec\'ef\'ee\'ec - \'ea\'e0\'e6\'e4\'f3\'fe \'cf\'cf \'ed\'e0 \'e7\'e0\'e3\'ee\'f2\'ee\'e2\'ea\'e5, +\par 8-\'ea\'ee\'ec\'e1\'e8\'ed\'e8\'f0\'ee\'e2\'e0\'ed\'ed\'fb\'ec \'ec\'e5\'f2\'ee\'e4\'ee\'ec \'e3\'e8\'eb\'fc\'ee\'f2\'e8\'ed\'ee\'e9 \'e8 \'f4\'f0\'e5\'e7\'ee\'e9, +\par 9-\'cf\'cf \'ef\'e5\'f0\'e5\'e4\'e0\'e5\'f2\'f1\'ff \'e2 \'e2\'e8\'e4\'e5 \'ef\'e0\'ed\'e5\'eb\'e5\'e9 \'f1 \'ee\'f2\'f4\'f0\'e5\'e7\'e5\'f0\'ee\'e2\'e0\'ed\'ed\'fb\'ec \'ea\'ee\'ed\'f2\'f3\'f0\'ee\'ec +\par \'ea\'e0\'e6\'e4\'ee\'e9 \'ef\'eb\'e0\'f2\'fb c \'f2\'e5\'f5\'ed\'ee\'eb\'ee\'e3\'e8\'f7\'e5\'f1\'ea\'e8\'ec\'e8 \'ef\'e5\'f0\'e5\'ec\'fb\'f7\'ea\'e0\'ec\'e8); +\par }\pard \fi-1418\li1985\widctlpar\adjustright {\i\f17\cf12 5-\'e7\'e0\'f9\'e8\'f2\'e0 \'f0\'e0\'e7\'fa\'e5\'ec\'e0 \'ee\'f2 \'eb\'f3\'e6\'e5\'ed\'e8\'ff \'e4\'eb\'ff \'ef\'ee\'f1\'eb\'e5\'e4\'f3\'fe\'f9\'e5\'e9 \'ee\'e1\'f0\'e0\'e1\'ee\'f2\'ea\'e8 +\par }\pard \fi-709\li1985\widctlpar\adjustright {\i\f17\cf12 (0-\'ed\'e5 \'e7\'e0\'f9\'e8\'f9\'e0\'f2\'fc,1-\'e7\'e0\'f9\'e8\'f9\'e0\'f2\'fc)}{\i\cf12 +\par }{\i\cf12\lang1033 +\par }\pard \fi-1418\li1985\widctlpar\adjustright {\b\f17\fs28 S \'ef\'eb\'e0\'f2\'fb}{\fs28\lang1033 \tab 3.34 }{\f17\fs28 \'ea\'e2.\'e4\'ec}{\fs28\lang1033 +\par }{\b\fs28 S }{\b\f17\fs28\lang1033 \'ea\'ee\'ec\'ef\'eb\'e5\'ea\'f2\'e0}{\fs28\lang1033 ??? }{\f17\fs28 \'ea\'e2.\'e4\'ec}{\lang1033 +\par +\par }\pard\plain \s19\fi567\keepn\widctlpar\outlinelevel5\adjustright \b\fs28\lang1049\cgrid {\f17 \'cc\'e0\'f2\'e5\'f0\'e8\'e0\'eb}{\lang1033 \tab \tab ????? +\par }\pard\plain \fi2835\widctlpar\adjustright \fs20\lang1049\cgrid {\cf12\lang1033 (}{\f17\cf12 FR-4 \'f2\'ee\'eb\'f9\'e8\'ed\'e0 1.5 \'ec\'ec}{\cf12\lang1033 ; }{\f17\cf12 \'d1\'d42 - 35 - 1.5}{\cf12\lang1033 ; }{\f17\cf12 \'d1\'d42 - 35 - 2.0}{ +\cf12\lang1033 ; }{\f17\cf12 \'cc\'c812-22}{\cf12\lang1033 )}{\fs28\cf12\lang1033 +\par }\pard\plain \s19\fi567\keepn\widctlpar\outlinelevel5\adjustright \b\fs28\lang1049\cgrid {\f17 \'cf\'ee\'ea\'f0\'fb\'f2\'e8\'e5}{\lang1033 \tab \tab HAL +\par }\pard\plain \fi2835\widctlpar\adjustright \fs20\lang1049\cgrid {\cf12\lang1033 HAL (}{\f17\cf12 \'e3\'ee\'f0. \'eb\'f3\'e6\'e5\'ed\'e8\'e5}{\cf12\lang1033 ); }{\f17\cf12 Ni-Au (\'f5\'e8\'ec. \'e7\'ee\'eb\'ee\'f2\'ee ) Sn-Co}{\cf12\lang1033 (}{\f17\cf12 +\'f5\'e8\'ec. \'ee\'eb\'ee\'e2\'ee )}{\cf12\lang1033 ; ENTEK+(}{\f17\cf12 \'ee\'f0\'e3\'e0\'ed\'e8\'f7\'e5\'f1\'ea\'ee\'e5)}{ +\par }{\lang1033 +\par }\pard \fi567\widctlpar\adjustright {\b\f17\fs28 \'d2\'e0\'e1\'eb\'e8\'f6\'e0 \'f1\'ee\'ee\'f2\'e2\'e5\'f2\'f1\'f2\'e2\'e8\'ff \'ea\'ee\'ed\'f1\'f2\'f0\'f3\'ea\'f2\'ee\'f0\'f1\'ea\'e8\'f5 \'e8 \'f2\'e5\'f5\'ed\'ee\'eb\'ee\'e3\'e8\'f7\'e5\'f1\'ea\'e8\'f5 +\'ef\'f0\'e8\'ec\'e8\'f2\'e8\'e2\'ee\'e2.}{\b\fs28\lang1033 +\par }\trowd \trgaph108\trrh1065\trleft567\trkeep\trbrdrt\brdrs\brdrw10 \trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 \trbrdrv\brdrs\brdrw10 \clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb +\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx3119\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx5670\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb +\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx11057\pard \widctlpar\intbl\adjustright {\f17\fs28 \'ce\'f2\'e2\'e5\'f0\'f1\'f2\'e8\'e5 \'ef\'ee\'f1\'eb\'e5 \'ec\'e5\'f2\'e0\'eb\'eb\'e8\'e7\'e0\'f6\'e8\'e8 \'f1 \'e4\'ee\'ef\'f3\'f1\'ea\'ee\'ec, +\'ec\'ec \cell \'ca\'ee\'eb\'e8\'f7\'e5\'f1\'f2\'e2\'ee +\par \'ee\'f2\'e2\'e5\'f0\'f1\'f2\'e8\'e9\cell \'cf\'f0\'e8\'ec\'e5\'f7\'e0\'ed\'e8\'ff \cell }\pard \widctlpar\intbl\adjustright {\fs28 \row }\trowd \trgaph108\trleft567\trbrdrt\brdrs\brdrw10 \trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr +\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 \trbrdrv\brdrs\brdrw10 \clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx3119\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb +\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx5670\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx11057\pard \widctlpar\intbl\adjustright {\fs28\lang1033 0.7 +0.0 \endash 0.1 +\cell 648\cell }{\f17\fs28 \'cc\'e5\'f2\'e0\'eb\'eb\'e8\'e7\'e8\'f0\'ee\'e2\'e0\'f2\'fc}{\fs28 (}{\f17\fs28 \'ef\'e5\'f0\'e5\'f5\'ee\'e4\'ed\'fb\'e5 \'ee\'f2\'e2.}{\fs28 )\cell }\pard \widctlpar\intbl\adjustright {\fs28 \row }\pard +\widctlpar\intbl\adjustright {\fs28\lang1033 0.8 +\endash 0.05\cell 624\cell }{\f17\fs28 \'cc\'e5\'f2\'e0\'eb\'eb\'e8\'e7\'e8\'f0\'ee\'e2\'e0\'f2\'fc\cell }\pard \widctlpar\intbl\adjustright {\fs28 \row }\pard \widctlpar\intbl\adjustright {\fs28\lang1033 +0.9 +\endash 0.05 \cell 496\cell }{\f17\fs28 \'cc\'e5\'f2\'e0\'eb\'eb\'e8\'e7\'e8\'f0\'ee\'e2\'e0\'f2\'fc\cell }\pard \widctlpar\intbl\adjustright {\fs28 \row }\pard \widctlpar\intbl\adjustright {\fs28\lang1033 1.0 +\endash 0.05 \cell 196\cell }{ +\f17\fs28 \'cc\'e5\'f2\'e0\'eb\'eb\'e8\'e7\'e8\'f0\'ee\'e2\'e0\'f2\'fc\cell }\pard \widctlpar\intbl\adjustright {\fs28 \row }\pard \widctlpar\intbl\adjustright {\fs28\lang1033 1.1 +\endash 0.05\cell 186\cell }{\f17\fs28 \'cc\'e5\'f2\'e0\'eb\'eb\'e8\'e7 +\'e8\'f0\'ee\'e2\'e0\'f2\'fc\cell }\pard \widctlpar\intbl\adjustright {\fs28 \row }\pard \widctlpar\intbl\adjustright {\fs28\lang1033 1.3 +\endash 0.05 \cell 17\cell }{\f17\fs28 \'cc\'e5\'f2\'e0\'eb\'eb\'e8\'e7\'e8\'f0\'ee\'e2\'e0\'f2\'fc\cell }\pard +\widctlpar\intbl\adjustright {\fs28 \row }\pard \widctlpar\intbl\adjustright {\fs28\lang1033 1.8\cell 16\cell }{\f17\fs28 \'cc\'e5\'f2\'e0\'eb\'eb\'e8\'e7\'e8\'f0\'ee\'e2\'e0\'f2\'fc}{\fs28\lang1033 (4}{\f17\fs28 \'f8\'f2. \'ed\'e0 \'f2\'e5\'f5-\'ef\'ee +\'eb\'ff\'f5}{\fs28\lang1033 )\cell }\pard \widctlpar\intbl\adjustright {\fs28 \row }\pard \widctlpar\intbl\adjustright {\fs28\lang1033 2.0\cell 1\cell }{\f17\fs28 \'cc\'e5\'f2\'e0\'eb\'eb\'e8\'e7\'e8\'f0\'ee\'e2\'e0\'f2\'fc\cell }\pard +\widctlpar\intbl\adjustright {\fs28 \row }\pard \widctlpar\intbl\adjustright {\fs28\lang1033 2.4\cell 2\cell }{\f17\fs28 \'cc\'e5\'f2\'e0\'eb\'eb\'e8\'e7\'e8\'f0\'ee\'e2\'e0\'f2\'fc\cell }\pard \widctlpar\intbl\adjustright {\fs28 \row }\trowd +\trgaph108\trleft567\trbrdrt\brdrs\brdrw10 \trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 \trbrdrv\brdrs\brdrw10 \clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr +\brdrs\brdrw10 \cltxlrtb \cellx3119\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx5670\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr +\brdrs\brdrw10 \cltxlrtb \cellx11057\pard \widctlpar\intbl\adjustright {\fs28\lang1033 4.0\cell 7\cell }{\f17\fs28 \'cc\'e5\'f2\'e0\'eb\'eb\'e8\'e7\'e8\'f0\'ee\'e2\'e0\'f2\'fc\cell }\pard \widctlpar\intbl\adjustright {\fs28 \row }\pard +\widctlpar\adjustright { +\par }\pard\plain \s22\fi567\widctlpar\adjustright \i\fs22\lang1049\cgrid {\b\f17\fs28\cf12 \'c2 \'f1\'eb\'f3\'f7\'e0\'e5 \'ed\'e5\'f3\'ea\'e0\'e7\'e0\'ed\'e8\'ff \'e4\'ee\'ef\'f3\'f1\'ea\'e0 \'ed\'e0 \'ee\'f2\'e2\'e5\'f0\'f1\'f2\'e8\'ff \'e4\'ee\'ef\'f3\'f1 +\'ea \'f1\'ee\'f1\'f2\'e0\'e2\'eb\'ff\'e5\'f2}{\b\fs28\cf12\lang1033 +}{\b\fs28\cf12 }{\b\fs28\cf12\lang1033 - }{\b\f17\fs28\cf12 0.13 \'ec\'ec +\par }\pard\plain \widctlpar\adjustright \fs20\lang1049\cgrid { +\par }\pard \li567\widctlpar\adjustright {\b\f29\fs28\cgrid0 \'cf\'e5\'f0\'e5\'f7\'e5\'ed\'fc \'f2\'e5\'f5\'ed\'ee\'eb\'ee\'e3\'e8\'f7\'e5\'f1\'ea\'e8\'f5 \'f1\'eb\'ee\'e5\'e2: +\par }\trowd \trgaph108\trleft567\trbrdrt\brdrs\brdrw10 \trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 \trbrdrv\brdrs\brdrw10 \clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr +\brdrs\brdrw10 \cltxlrtb \cellx6237\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx11057\pard \widctlpar\intbl\adjustright {\b\f29\fs24\cf12\cgrid0 1. \'d2\'ce\'cf\'ce\'cb\'ce\'c3\'c8 +\'df\cell }{\b\f2\fs24\cf12\cgrid0 \cell }\pard \widctlpar\intbl\adjustright {\b\f2\fs24\cf12\cgrid0 \row }\trowd \trgaph108\trleft567\trbrdrt\brdrs\brdrw10 \trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 +\trbrdrv\brdrs\brdrw10 \clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx6237\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 +\cltxlrtb \cellx11057\pard \widctlpar\intbl\adjustright {\b\f29\fs24\cgrid0 1) \'d1\'f2\'ee\'f0\'ee\'ed\'e0 \'ec\'ee\'ed\'f2\'e0\'e6\'e0 - \'f1\'eb\'ee\'e8:\cell }{\b\f2\fs24\lang1033\cgrid0 Sprin_3m.top\cell }\pard \widctlpar\intbl\adjustright { +\b\f2\fs24\cgrid0 \row }\pard \widctlpar\intbl\adjustright {\b\f2\fs24\cgrid0 2) }{\b\f29\fs24\cgrid0 \'d1\'f2\'ee\'f0\'ee\'ed\'e0 \'ef\'e0\'e9\'ea\'e8 - \'f1\'eb\'ee\'e8:\cell }{\b\f2\fs24\lang1033\cgrid0 Sprin_3m.bot\cell }\pard +\widctlpar\intbl\adjustright {\b\f2\fs24\cgrid0 \row }\pard \widctlpar\intbl\adjustright {\b\f2\fs24\cf12\cgrid0 2.}{\b\f2\fs24\cf12\lang1033\cgrid0 }{\b\f29\fs24\cf12\cgrid0 \'cc\'e0\'f1\'ea\'e0\cell }{\b\f2\fs24\cgrid0 \cell }\pard +\widctlpar\intbl\adjustright {\b\f2\fs24\cgrid0 \row }\pard \widctlpar\intbl\adjustright {\b\f29\fs24\cgrid0 3) \'d1\'f2\'ee\'f0\'ee\'ed\'e0 \'ec\'ee\'ed\'f2\'e0\'e6\'e0:\cell }{\b\f2\fs24\lang1033\cgrid0 Sprin_3m.smt\cell }\pard +\widctlpar\intbl\adjustright {\b\f2\fs24\cgrid0 \row }\pard \widctlpar\intbl\adjustright {\b\f29\fs24\cgrid0 4) \'d1\'f2\'ee\'f0\'ee\'ed\'e0 \'ef\'e0\'e9\'ea\'e8:\cell }{\b\f2\fs24\lang1033\cgrid0 Sprin_3m.smb\cell }\pard \widctlpar\intbl\adjustright { +\b\f2\fs24\cgrid0 \row }\pard \widctlpar\intbl\adjustright {\b\f29\fs24\cf12\cgrid0 3. \'cc\'c0\'d0\'ca\'c8\'d0\'ce\'c2\'ca\'c0 (\'e1\'e5\'eb\'ee\'e9 \'ea\'f0\'e0\'f1\'ea\'ee\'e9)\cell }{\b\f29\fs24\cgrid0 \'cc\'e0\'f0\'ea\'e8\'f0\'ee\'e2\'ea\'e8 \'ed +\'e5\'f2\cell }\pard \widctlpar\intbl\adjustright {\b\f2\fs24\cgrid0 \row }\pard\plain \s18\keepn\widctlpar\intbl\outlinelevel3\adjustright \b\i\fs28\lang1049\cgrid {\i0\f17\cf6 \'ca\'ee\'eb\'e8\'f7\'e5\'f1\'f2\'e2\'ee \'f4\'ee\'f2\'ee\'f8\'e0\'e1\'eb +\'ee\'ed\'ee\'e2 }{\i0\cf6\lang1033 \cell }\pard\plain \widctlpar\intbl\adjustright \fs20\lang1049\cgrid {\b\f29\fs24\lang1033\cgrid0 4 (\'e4\'e2\'e5 \'f1\'f2\'ee\'f0\'ee\'ed\'fb, \'e4\'e2\'e5 \'ec\'e0\'f1\'ea\'e8)\cell }\pard +\widctlpar\intbl\adjustright {\b\f2\fs24\cgrid0 \row }\pard \widctlpar\intbl\adjustright {\b\f29\fs24\cf12\cgrid0 5. \'ca\'ce\'cd\'d2\'d3\'d0 \'cf\'cf\cell }{\b\f2\fs24\cf12\cgrid0 \cell }\pard \widctlpar\intbl\adjustright {\b\f2\fs24\cf12\cgrid0 \row +}\pard \widctlpar\intbl\adjustright {\b\f29\fs24\cgrid0 1) \'ca\'ee\'ed\'f2\'f3\'f0 \'ee\'e1\'f0\'e5\'e7\'ea\'e8 \'cf\'cf:\cell \'c2\'ed\'e5\'f8\'ed\'e8\'e9 \'ef\'f0\'ff\'ec\'ee\'f3\'e3\'ee\'eb\'fc\'ed\'e8\'ea \'ef\'ee \'ea\'ee\'ed\'f2\'f3\'f0\'f3 \'ef +\'eb\'e0\'f2\'fb (\'f1\'eb\'ee\'e9 }{\b\f2\fs24\lang1033\cgrid0 top}{\b\f2\fs24\cgrid0 )}{\b\f2\fs24\lang1033\cgrid0 , }{\b\f29\fs24\cgrid0 \'e1\'e5\'e7 \'f2\'e5\'f5-\'ef\'ee\'eb\'e5\'e9, \'f0\'e0\'e7\'ec\'e5\'f0 205}{\b\f2\fs24\lang1033\cgrid0 x163}{ +\b\f29\fs24\cgrid0 \'ec\'ec\cell }\pard \widctlpar\intbl\adjustright {\b\f2\fs24\cgrid0 \row }\pard \widctlpar\intbl\adjustright {\b\f29\fs24\cf12\cgrid0 4. \'d1\'c2\'c5\'d0\'cb\'ce\'c2\'ca\'c0\cell }{\b\f2\fs24\lang1033\cgrid0 \cell }\pard +\widctlpar\intbl\adjustright {\b\f2\fs24\cgrid0 \row }\trowd \trgaph108\trrh365\trleft567\trbrdrt\brdrs\brdrw10 \trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 \trbrdrv\brdrs\brdrw10 \clvertalt\clbrdrt +\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx6237\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx11057\pard +\widctlpar\intbl\adjustright {\b\f29\fs24\cgrid0 \'cc\'e5\'f2\'e0\'eb\'eb\'e8\'e7\'e8\'f0\'ee\'e2\'e0\'ed\'fb \'e2\'f1\'e5 \'ee\'f2\'e2\'e5\'f0\'f1\'f2\'e8\'ff +\par (2 \'f4\'e0\'e9\'eb\'e0 \endash \'f0\'e0\'e7\'ed\'fb\'e5 \'f4\'ee\'f0\'ec\'e0\'f2\'fb \'f1\'e2\'e5\'f0\'eb\'ee\'e2\'ea\'e8 \'e8\'e7 }{\b\f2\fs24\lang1033\cgrid0 OrCAD-}{\b\f29\fs24\cgrid0 \'e0)\cell }{\b\f2\fs24\lang1033\cgrid0 Sprin_3m.tap +\par Sprin_3m.drd (}{\b\f29\fs24\cgrid0 \'e8\'e7 \'ea\'ee\'ec\'ef\'eb\'e5\'ea\'f2\'e0 \'e3\'e5\'f0\'e1\'e5\'f0\'e0}{\b\f2\fs24\lang1033\cgrid0 )\cell }\pard \widctlpar\intbl\adjustright {\b\f2\fs28\cf6\cgrid0 \row }\pard \widctlpar\adjustright { +\par }\trowd \trgaph108\trleft567\trbrdrt\brdrs\brdrw10 \trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 \trbrdrv\brdrs\brdrw10 \clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr +\brdrs\brdrw10 \cltxlrtb \cellx5671\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx11057\pard \widctlpar\intbl\adjustright {\f29\fs24\cf11\cgrid0 \'cf\'e0\'f0\'e0\'ec\'e5\'f2\'f0\'fb +\'fd\'ea\'f1\'ef\'ee\'f0\'f2\'e0 GERBER - \'f4\'e0\'e9\'eb\'ee\'e2:\cell \'cf\'e0\'f0\'e0\'ec\'e5\'f2\'f0\'fb \'fd\'ea\'f1\'ef\'ee\'f0\'f2\'e0 \'f1\'e2\'e5\'f0\'eb\'ee\'e2\'ea\'e8:\cell }\pard \widctlpar\intbl\adjustright {\f2\fs24\cf11\cgrid0 \row +}\trowd \trgaph108\trleft567\trbrdrt\brdrs\brdrw10 \trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 \trbrdrv\brdrs\brdrw10 \clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr +\brdrs\brdrw10 \cltxlrtb \cellx5670\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx11057\pard \widctlpar\intbl\adjustright {\f2\fs24\cgrid0 RS274-X\cell }{\f29\fs24\cgrid0 \'c8\'e7 }{ +\f2\fs24\lang1033\cgrid0 OrCAD-}{\f29\fs24\cgrid0 \'e0}{\f2\fs24\cgrid0 \cell }\pard \widctlpar\intbl\adjustright {\f2\fs24\cgrid0 \row }\pard \widctlpar\intbl\adjustright {\f2\fs24\cgrid0 data unit = inch\cell \cell }\pard +\widctlpar\intbl\adjustright {\f2\fs24\cgrid0 \row }\pard \widctlpar\intbl\adjustright {\f2\fs24\cgrid0 data format = absolut\cell \cell }\pard \widctlpar\intbl\adjustright {\f2\fs24\cgrid0 \row }\pard \widctlpar\intbl\adjustright { +\f2\fs24\cgrid0 suppression zeroes = }{\f2\fs24\lang1033\cgrid0 leading\cell }{\f2\fs24\cgrid0 \cell }\pard \widctlpar\intbl\adjustright {\f2\fs24\cgrid0 \row }\pard \widctlpar\intbl\adjustright {\f2\fs24\cgrid0 digits before = 3\cell \cell +}\pard \widctlpar\intbl\adjustright {\f2\fs24\cgrid0 \row }\trowd \trgaph108\trleft567\trbrdrt\brdrs\brdrw10 \trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 \trbrdrv\brdrs\brdrw10 \clvertalt\clbrdrt +\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx5670\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx11057\pard +\widctlpar\intbl\adjustright {\f2\fs24\cgrid0 digits after = 4\cell \cell }\pard \widctlpar\intbl\adjustright {\f2\fs24\cgrid0 \row }\pard \widctlpar\adjustright { +\par }\trowd \trgaph108\trleft567\trbrdrt\brdrs\brdrw10 \trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 \trbrdrv\brdrs\brdrw10 \clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr +\brdrs\brdrw10 \cltxlrtb \cellx8037\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx11057\pard\plain \s22\widctlpar\intbl\adjustright \i\fs22\lang1049\cgrid {\i0\f17\fs24\lang1033 \'cc +\'e8\'ed\'e8\'ec\'e0\'eb\'fc\'ed\'ee\'e5 \'ee\'f2\'e2\'e5\'f0\'f1\'f2\'e8\'e5}{\i0\fs24 \cell }{\i0\f17\fs24 0.7\'ec\'ec}{\i0\fs24 \cell }\pard\plain \widctlpar\intbl\adjustright \fs20\lang1049\cgrid {\i\fs24 \row }\trowd \trgaph108\trleft567\trbrdrt +\brdrs\brdrw10 \trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 \trbrdrv\brdrs\brdrw10 \clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx8037 +\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx11057\pard\plain \s22\widctlpar\intbl\adjustright \i\fs22\lang1049\cgrid {\i0\f17\fs24\lang1033 \'cc\'e8\'ed\'e8\'ec\'e0\'eb\'fc\'ed\'e0 +\'ff \'f8\'e8\'f0\'e8\'ed\'e0 \'ef\'f0\'ee\'e2\'ee\'e4\'ed\'e8\'ea\'e0}{\i0\fs24 \cell 0.175\cell }\pard\plain \widctlpar\intbl\adjustright \fs20\lang1049\cgrid {\i\fs24 \row }\pard\plain \s22\widctlpar\intbl\adjustright \i\fs22\lang1049\cgrid { +\i0\f17\fs24\lang1033 \'cc\'e8\'ed\'e8\'ec\'e0\'eb\'fc\'ed\'fb\'e9 \'e7\'e0\'e7\'ee\'f0 \'ec\'e5\'e6\'e4\'f3 \'fd\'eb\'e5\'ec\'e5\'ed\'f2\'e0\'ec\'e8 \'ef\'e5\'f7\'e0\'f2\'ed\'ee\'e3\'ee \'f0\'e8\'f1\'f3\'ed\'ea\'e0}{\i0\fs24 \cell 0.175\cell +}\pard\plain \widctlpar\intbl\adjustright \fs20\lang1049\cgrid {\i\fs24 \row }\pard\plain \s22\widctlpar\intbl\adjustright \i\fs22\lang1049\cgrid {\i0\f17\fs24\lang1033 \'cc\'e8\'ed\'e8\'ec\'e0\'eb\'fc\'ed\'fb\'e9 \'ee\'e1\'ee\'e4\'ee\'ea \'ec\'e5\'e6\'e4 +\'f3 \'ee\'f2\'e2\'e5\'f0\'f1\'f2\'e8\'e5\'ec \'e8 \'ea\'ee\'ed\'f2\'e0\'ea\'f2\'ed\'ee\'e9 \'ef\'eb\'ee\'f9\'e0\'e4\'ea\'ee\'e9}{\i0\fs24 \cell 0.15\cell }\pard\plain \widctlpar\intbl\adjustright \fs20\lang1049\cgrid {\i\fs24 \row }\trowd +\trgaph108\trleft567\trbrdrt\brdrs\brdrw10 \trbrdrl\brdrs\brdrw10 \trbrdrb\brdrs\brdrw10 \trbrdrr\brdrs\brdrw10 \trbrdrh\brdrs\brdrw10 \trbrdrv\brdrs\brdrw10 \clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr +\brdrs\brdrw10 \cltxlrtb \cellx8037\clvertalt\clbrdrt\brdrs\brdrw10 \clbrdrl\brdrs\brdrw10 \clbrdrb\brdrs\brdrw10 \clbrdrr\brdrs\brdrw10 \cltxlrtb \cellx11057\pard\plain \s22\widctlpar\intbl\adjustright \i\fs22\lang1049\cgrid {\i0\f17\fs24\lang1033 \'cc +\'e8\'ed\'e8\'ec\'e0\'eb\'fc\'ed\'ee\'e5 \'ee\'e1\'ee\'e4\'ee\'ea \'ec\'e5\'e6\'e4\'f3 \'ec\'e0\'f1\'ea\'ee\'e9 \'e8 \'ea\'ee\'ed\'f2\'e0\'ea\'f2\'ed\'ee\'e9 \'ef\'eb\'ee\'f9\'e0\'e4\'ea\'ee\'e9}{\i0\fs24 \cell >0\cell }\pard\plain +\widctlpar\intbl\adjustright \fs20\lang1049\cgrid {\fs24 \row }\pard \fi709\widctlpar\adjustright {\b\f17\fs28\cf12 \'d0\'e0\'e7\'ec\'e5\'f0\'fb \'ef\'ee\'e4 \'f8\'f2\'e0\'ec\'ef }{\b\fs28\cf12 \endash }{\b\fs28 (}{\b\f17\fs28 \'ed\'e5 \'f2\'f0\'e5\'e1 +\'f3\'e5\'f2\'f1\'ff}{\b\fs28 )}{\b\fs28\cf12 +\par }\pard\plain \s17\fi709\keepn\widctlpar\outlinelevel2\adjustright \fs28\lang1049\cgrid {\b\f17\ul\cf12 \'c4\'ee\'ef\'ee\'eb\'ed\'e8\'f2\'e5\'eb\'fc\'ed\'fb\'e5 \'f2\'f0\'e5\'e1\'ee\'e2\'e0\'ed\'e8\'ff +\par }{\b\f17\cf12 \'c3\'e0\'eb\'fc\'e2\'e0\'ed\'e8\'f7\'e5\'f1\'ea\'ee\'e5 \'e7\'ee\'eb\'ee\'f7\'e5\'ed\'e8\'e5 \'ea\'ee\'ed\'f2\'e0\'ea\'f2\'ee\'e2 \'f0\'e0\'e7\'fa\'e5\'ec\'e0}{\b\cf12 \endash }{\b (}{\b\f17 \'ed\'e5 \'f2\'f0\'e5\'e1\'f3\'e5\'f2\'f1\'ff}{ +\b )}{\b\cf12 +\par }{\b\f17\cf12 \'d2\'f0\'e5\'e1\'f3\'e5\'f2\'f1\'ff \'f4\'f0\'e5\'e7\'e5\'f0\'ee\'e2\'ea\'e0 \'ef\'e0\'e7\'ee\'e2/\'f4\'e0\'f1\'ee\'ea/\'ee\'ea\'ed\'e0/\'ea\'ee\'ed\'f2\'f3\'f0\'e0/\'ee\'f2\'e2\'e5\'f0\'f1\'f2\'e8\'e9}{\b\cf12 }{\b\cf12 \endash }{\b (}{ +\b\f17 \'ed\'e5 \'f2\'f0\'e5\'e1\'f3\'e5\'f2\'f1\'ff}{\b )}{\b\cf12 +\par }\pard\plain \fi709\widctlpar\adjustright \fs20\lang1049\cgrid {\b\fs28\cf12 +\par }\pard\plain \s16\fi709\sb240\sa60\keepn\widctlpar\outlinelevel1\adjustright \b\i\f1\lang1049\cgrid {\f23 \'c8\'d1\'cf\'ce\'cb\'cd\'c8\'d2\'c5\'cb\'dc____________________ /}{\lang1033 }{/}{\lang1033 +\par }\pard\plain \widctlpar\adjustright \fs20\lang1049\cgrid {\lang1033 +\par }\pard\plain \s16\fi709\sb240\sa60\keepn\widctlpar\outlinelevel1\adjustright \b\i\f1\lang1049\cgrid {\f23 \'c7\'c0\'ca\'c0\'c7\'d7\'c8\'ca______________________}{\b0 }{/ / +\par }\pard\plain \widctlpar\adjustright \fs20\lang1049\cgrid { +\par +\par }} \ No newline at end of file diff --git a/2003s/orcad/SPRINT_3M.MAX b/2003s/orcad/SPRINT_3M.MAX new file mode 100644 index 0000000..ac1dcb2 Binary files /dev/null and b/2003s/orcad/SPRINT_3M.MAX differ diff --git a/2003s/orcad/SPRIN_3M.MAX b/2003s/orcad/SPRIN_3M.MAX new file mode 100644 index 0000000..e3c6321 Binary files /dev/null and b/2003s/orcad/SPRIN_3M.MAX differ diff --git a/2003s/orcad/readme.md b/2003s/orcad/readme.md new file mode 100644 index 0000000..19f0482 --- /dev/null +++ b/2003s/orcad/readme.md @@ -0,0 +1,10 @@ +# SPRIN_3M.MAX + +─рЄр Їрщыр - 09.12.2002 17:21. ├хЁсхЁ√ шьхээю ё ¤Єюую Їрщыр с√ыш шёяюы№чютрэ√ фы  шчуюЄютыхэш  яырЄ т 2009 уюфє. + +# SPRINT_3M.MAX + +─рЄр Їрщыр - 09.12.2002 17:59, ўхЁхч 38 ьшэєЄ. ─юЁюцъш эр яырЄх Єх цх, шчьхэшышё№ шэЇюЁьрЎшюээ√х эрфяшёш чр яЁхфхырьш яырЄ√. + + + diff --git a/2003s/photos/sprinter_2003s_bot.jpg b/2003s/photos/sprinter_2003s_bot.jpg new file mode 100644 index 0000000..dbc5c42 Binary files /dev/null and b/2003s/photos/sprinter_2003s_bot.jpg differ diff --git a/2003s/photos/sprinter_2003s_top.jpg b/2003s/photos/sprinter_2003s_top.jpg new file mode 100644 index 0000000..c2ec803 Binary files /dev/null and b/2003s/photos/sprinter_2003s_top.jpg differ diff --git a/2016s/docs/Sprinter_2016s.pdf b/2016s/docs/Sprinter_2016s.pdf new file mode 100644 index 0000000..4c241e1 Binary files /dev/null and b/2016s/docs/Sprinter_2016s.pdf differ diff --git a/2016s/fw/bios/BIOS_REV.txt b/2016s/fw/bios/BIOS_REV.txt new file mode 100644 index 0000000..718e1e0 --- /dev/null +++ b/2016s/fw/bios/BIOS_REV.txt @@ -0,0 +1,121 @@ +;--------------------------------------------------------------- +;Rev Date Name Description +;--------------------------------------------------------------- +;Версия 3.04 +;R0046 16.06.2003 IM Исправления для совместимости video с Sp2000 +;R0046 13.06.2003 IM Исправления глюков в режиме ZX +;R0046 02.06.2003 IM Исправления для видео-ОЗУ AS7C1024A-JC12 +;Версия 3.03 +;R0045 05.02.2003 IM Исправления для видео-ОЗУ AS7C1024-JC12 +;Версия 3.02 +;R0044 01.10.2002 IM Добавления в прошивке +;Версия 3.00.253 (10.04.2002) UPDATE01 +;R0043 01.04.2002 IM Перекомпилена прошивка для ПЛМ для SIMM +;R0042 10.03.2002 DNS Setup 253 +;Версия 2.17.252 (03.03.2002) UPDATE-beta-version +;R0041 03-03-2002 IM Подправлены цвета в функции CGA палитры +;R0040 02-03-2002 IM Исправлен глюк функции выдачи портов +;R0039 02-03-2002 IM Добавлены чтение палитры и текстовая CGA палитра +;Версия 2.16.252 (27.02.2002) WORK +;R0038 27-02-2002 IM Сообщение об отсутствии Spectrum-ROM +;R0037 26-02-2002 IM Жестко закреплены страницы 41h..47h за Spectrum.ROM +;R0036 25-02-2002 IM Добавлен внутренний порт для возврата в ZX/FN +;R0035 22-02-2002 IM В BIOS добавлена функция установки Original-INT +;R0034 21-02-2002 IM Добавлена функция BIOS, переключающая 720/1.44 +;Версия 2.15.252 (18.02.2002) WORK +;R0033 18-02-2002 IM Исправление для ISA +;R0032 12-02-2002 IM Добавлена функция чтения ROM-Disk-а +;R0031 12-02-2002 IM Исправлена функция BIOS чтения/записи RAM-Disk-ов +;R0030 12-02-2002 IM Исправлена схема COVOX-Blaster-а +;R0029 08-02-2002 IM Полностью измененa схема доступа к ПЗУ/Fast-RAM/ISA +;Версия 2.14.252 (01.02.2002) WORK +;R0028 01-02-2002 DNS Добавлен сдвиг экрана в setup +;Версия 2.13.251 (10.11.2002) WORK +;R0027 23-01-2002 IM COVOX-Blaster 16bit, 110khz, stereo +;R0026 17-01-2002 IM Исправлена ошибка в функции FN_PIC1 +;Версия 2.12.251 (10.11.2002) RELEASE +;R0025 10-01-2002 IM Смещен экран на 1 знакоместо влево +;Версия 2.11.251 (08.01.2002) WORK +;R0024 10-01-2002 IM Исправление предыдущего исправления +;R0023 08-01-2002 IM Исправления в BIOS-е (перезагрузка ПЛМ) +;R0022 08-01-2002 IM разборки с FDD +;Версия 2.10.251 (25.12.2001) RELEASE +;R0020 23-12-2001 IM коррекция синхронизации в ПЛМ +;R0019 20-12-2001 IM убрано R0018 - NMI +;Версия 2.09.251 (18.12.2001) WORK (for Denis only!) +;R0018 18-12-2001 IM изменена прошивка ПЛМ (добавлен NMI) +;R0017 17-12-2001 IM изменена прошивка ПЛМ (исправления для SIMM) +;R0016 15-12-2001 IM изменена прошивка ПЛМ (исправления SINC) +;R0015 14-12-2001 IM добавлен пункт "L" в Post +;R0014 19-11-2001 IM обезглюченая прошивка для Winbond +;R0013 18-11-2001 IM возвращен старый copyright в Basic128 +;Версия 2.08.251 (17.11.2001) WORK +;R0012 17-11-2001 IM изменена прошивка ПЛМ от 17-ноя-2001 +;Версия 2.07.251 (11.11.2001) WORK +;R0011 11-11-2001 IM изменена прошивка ПЛМ от 11-ноя-2001 +;Версия 2.06.251 (07.11.2001) WORK +;R0010 07-11-2001 IM изменена прошивка ПЛМ от 07-ноя-2001 +;Версия 2.06.251 (05.11.2001) WORK +;R0009 05-11-2001 IM изменена прошивка ПЛМ от 05-ноя-2001 +;Версия 2.05.251 (xx.xx.2001) WORK +;R0008 xx-xx-2001 IM -- описание изменений -- +;Версия 2.04.251 (27.10.2001) RELEASE +;R0007 27-10-2001 IM изменена прошивка ПЛМ от 27-окт-2001 +;R0006 12-10-2001 IM перекопана прошивка ПЛМ от 12-окт-2001 +;Версия 2.04.250 (04.10.2001) WORK +;R0005 04-10-2001 DNS вставлен новый ROM.BIN от 4-окт-2001 +;Версия 2.04.249 (22.09.2001) WORK +;R0004 22-09-2001 DNS вставлен новый ROM.BIN от ...хм.. не помню.. +;R0003 22-09-2001 IM исправление названий в меню "Hardware" +;R0002 22-09-2001 IM вставлен номер ПЗУ и функция биоса для него 0EDh +;R0001 22-09-2001 IM добавлена функция GOTO Spectrum 0FBh +;Версия 2.03.248 (08.06.2001) WORK +;--------------------------------------------------------------- +;Revisions: +;R0044 - Введены биты порта управления управления: +; бит выключения RESET +; бит включения NMI по + +; бит отключения ZX-screen (совмещен с битом Sprinter/Spectrum) +;R0036 - Спец-функция для sprinter.exe Установка внутреннего порта EE +; в не 0 приводит к переходу в установленную страницу и продолжению +; работы программы, установившей перехват +;R0033 - В режиме Sprinter введен старый доступ к ISA через порт 1FFD и +; PAGE3=D0..DF +;R0031 - В функции чтения/записи RAM-Disk-ов был жестокий глюк... +; она вообще не работала +;R0030 - Убраны сбои при проигрывании в режиме с прерываниями, когда +; в CBL записываются лишние или недозаписываются байты... +; по прерыванию CBL внутренний счетчик устанавливается на 00h или 80h +;R0029 - Введено разделение Sprinter и Spectrum режимов. +; В режиме Spectrum и Sprinter-ZX все ПЗУ находятся в ОЗУ +; Изменен доступ к ПЗУ и Fast-RAM доступ стал быстрее. Изменилась +; адресация страниц Fast-RAM и ROM. Адресуются через порт 5F в режиме +; SYSTEM-on. Введен полный запрет доступа к RAM во время работы с ПЗУ +; ОЗУ в этот момент свободно для других функций (потребуется для DMA) +; Скорость работы в Fast-RAM выведена на максимум (без вайтов). +; Выкинуты ПЗУ Spectrum-а из BIOS. +;R0026 - Исправлена ошибка в функции FN_PIC1. Были неверная отработка +; номера окна и несохранение порта RGADR. +;R0024 - последствия R0023, в Турбо возникло занижение скорости из-за +; переключения управляющего регистра на boundary вместо wait +;R0023 - обнаружена и устранена ошибка в программе перезагрузки ПЛМ извне +; (через КЭШ) был неверно инициализирован boundary-регистр Z84C15 +;R0022 - убран глюк работы с FDD, возникший после корректировки работы с +; SIMM-ами (подаваемые на FDD данные обрывались раньше времени) +;R0020 - убран глюк несовместимости прошивки "старой" и "новой" партий плат +;R0018 - "дикий" NMI - по alt+F12 просто подается NMI, ничего более не +; отслеживается +;R0017 - введены задержки (input delay in MAX+) для ввода данных с SIMM-а, +; изменена времянка сигнала /WE на SIMM +;R0016 - Добавлена схема подавления джиттера строчной синхронизации +; давится джиттер +/- 0.25мкс +;R0015 - Перед загрузкой ПЛМ зажигается "L" на индикаторе Post-Tester-a +;R0014 - убран глюк под меню help на Winbond-ах (проверить!) +;R0012 - закреплено исправление для ISA, видео-ОЗУ улучшение для UMC +;R0011 - закреплено исправление для ISA, по видео-ОЗУ откат до 2.04 версии +;R0010 - дополнительное удаление глюков с видео-ОЗУ +;R0009 - частичное удаление глюков с видео-ОЗУ +;R0007 - исправление множественных глюков при работе с SIMM методом +; перекомпиляции с новыми опциями MAX-Plus. +;R0006 - дополнительное исправление глюков при работе с SIMM. +; diff --git a/2016s/fw/bios/SETUP_REV.txt b/2016s/fw/bios/SETUP_REV.txt new file mode 100644 index 0000000..f14ed3b --- /dev/null +++ b/2016s/fw/bios/SETUP_REV.txt @@ -0,0 +1,30 @@ +;--------------------------------------------------------------- +;Rev Date Name Description +;--------------------------------------------------------------- +;╚чьхэхэш  т build'e 2.53 +;R06 16-02-2002 DNS Add CMOS install routine. Disabled TRDOS install routine. +;╚чьхэхэш  т build'e 2.52 +;R05 28-01-2002 DNS Add new items to SETUP Utility for screen position. +;╚чьхэхэш  т build'e 2.51 +;R04 14-09-2001 DNS Added procedure GET_BOARD_NUMBER and + Removed 2 IDE (if with_2ide) +;╚чьхэхэш  т build'e 2.50 +;R03a 02-08-2001 DNS ADD BUILD-IN CD DRIVER (Not release) +;R03 30-07-2001 DNS Developed a new IDE DETECT routine and fixied any bugs +;R02 25-07-2001 DNS Add Secondary IDE +;╚чьхэхэш  т build'e 2.48 +;R01 23-04-2001 DNS Removed procedure GET_ID and make new which +; will be take Model Name. +;R00 xx-xx-2000 DNS New BIOS for Sp2000 build 2.48 +;--------------------------------------------------------------- +;Revisions: +;R01 - ╘єэъЎш  GET_ID эр яырЄрї Sprinter97, яюыєўрыр фрЄ√ ёючфрэш  ш +; яЁю°штъш ╧╟╙, эр яырЄрї Sp2000 с√ыю ттхфшэю яюэ Єшх ьюфхыш. +;R02 - └тЄюфхЄхъЄ 4ї єёЄЁющёЄт +;R03 - ─юсртыхэр ЁрсюЄр тёхї ЇєэъЎшщ ёю тЄюЁ√ь IDE ърэрырь, ЁрсюЄрхЄ +; эхёЄрсшы№эю, тючьюцэю цхыхчю, эрўрЄр ЁрсюЄр эрф ўЄхэшхь ё CD, +; шёяЁртыхэр ю°шсър (яЁш юяЁхфхыхэшш CDROMр эх єърч√трыё  яЁшчэръ +; MASTER/SLAVE т ярЁрьхЄЁрї IDE(#FE:#C1C0-#C1CF). +;R04 - ─юсртыхэ т√тюф эюьхЁр яырЄ√ (ЇєэъЎш  #ED) яЁш ёЄрЁЄх ъюья№■ЄхЁр, +; ЁрсюЄр ёю тЄюЁ√ь IDE яхЁхэхёхэр т єёыютэє■ ъюьяшы Ўш■ (if with_2ide) +;---------------------------------------------------------------- \ No newline at end of file diff --git a/2016s/fw/bios/readme.md b/2016s/fw/bios/readme.md new file mode 100644 index 0000000..7eaefa9 --- /dev/null +++ b/2016s/fw/bios/readme.md @@ -0,0 +1,11 @@ +# sp2k-3.00.253.bin + +╬ЇшЎшры№эр  фрЄр т√яєёър 07.04.2002, яръхЄ юсэютыхэш  SU1 (Sprinter Update 1) + +# sp2k-3.03.253.bin + +─рЄр ёсюЁъш 13.05.2003, юЇшЎшры№эю эх т√яєёърырё№. ╬яєсышъютрэр ё юЄъЁ√Єшхь яЁюхъЄр. + +# sp2k-3.04.253.bin + +─рЄр ёсюЁъш 17.06.2003, юЇшЎшры№эю эх т√яєёърырё№. ╬яєсышъютрэр ё юЄъЁ√Єшхь яЁюхъЄр. \ No newline at end of file diff --git a/2016s/fw/bios/sp2k-3.00.253.bin b/2016s/fw/bios/sp2k-3.00.253.bin new file mode 100644 index 0000000..263bb2b Binary files /dev/null and b/2016s/fw/bios/sp2k-3.00.253.bin differ diff --git a/2016s/fw/bios/sp2k-3.03.253.bin b/2016s/fw/bios/sp2k-3.03.253.bin new file mode 100644 index 0000000..2546503 Binary files /dev/null and b/2016s/fw/bios/sp2k-3.03.253.bin differ diff --git a/2016s/fw/bios/sp2k-3.04.253.bin b/2016s/fw/bios/sp2k-3.04.253.bin new file mode 100644 index 0000000..fa8bb7a Binary files /dev/null and b/2016s/fw/bios/sp2k-3.04.253.bin differ diff --git a/2016s/fw/max/readme.md b/2016s/fw/max/readme.md new file mode 100644 index 0000000..3b6a791 --- /dev/null +++ b/2016s/fw/max/readme.md @@ -0,0 +1,7 @@ +# sp2k-7064stc100-10.pof + +─рЄр ёсюЁъш 21.08.2002, Їрщы ш хую шёїюфэшъ юяєсышъютрэ√ ё юЄъЁ√Єшхь яЁюхъЄр. + +# sp2k-7128stc100-10.pof + +─рЄр ёсюЁъш 06.06.2021, ёюсЁрэю шч Єхї цх шёїюфэшъют. diff --git a/2016s/fw/max/sp2k-7064stc100-10.pof b/2016s/fw/max/sp2k-7064stc100-10.pof new file mode 100644 index 0000000..70047b3 Binary files /dev/null and b/2016s/fw/max/sp2k-7064stc100-10.pof differ diff --git a/2016s/fw/max/sp2k-7128stc100-10.pof b/2016s/fw/max/sp2k-7128stc100-10.pof new file mode 100644 index 0000000..875e82f Binary files /dev/null and b/2016s/fw/max/sp2k-7128stc100-10.pof differ diff --git a/2016s/gerber/gerber_2016s.zip b/2016s/gerber/gerber_2016s.zip new file mode 100644 index 0000000..6c4dac2 Binary files /dev/null and b/2016s/gerber/gerber_2016s.zip differ diff --git a/2016s/gerber/gerber_2016s_fixed1.zip b/2016s/gerber/gerber_2016s_fixed1.zip new file mode 100644 index 0000000..af6efc6 Binary files /dev/null and b/2016s/gerber/gerber_2016s_fixed1.zip differ diff --git a/2016s/pcad/Sprinter.lib b/2016s/pcad/Sprinter.lib new file mode 100644 index 0000000..2dcb466 Binary files /dev/null and b/2016s/pcad/Sprinter.lib differ diff --git a/2016s/pcad/Sprinter_2016s.pcb b/2016s/pcad/Sprinter_2016s.pcb new file mode 100644 index 0000000..477e3df Binary files /dev/null and b/2016s/pcad/Sprinter_2016s.pcb differ diff --git a/2016s/pcad/Sprinter_2016s.sch b/2016s/pcad/Sprinter_2016s.sch new file mode 100644 index 0000000..4c6bab7 Binary files /dev/null and b/2016s/pcad/Sprinter_2016s.sch differ diff --git a/2016s/pcad/Sprinter_2016s_fixed1.pcb b/2016s/pcad/Sprinter_2016s_fixed1.pcb new file mode 100644 index 0000000..c3a921a Binary files /dev/null and b/2016s/pcad/Sprinter_2016s_fixed1.pcb differ diff --git a/2016s/pcad/readme.md b/2016s/pcad/readme.md new file mode 100644 index 0000000..aa189ae --- /dev/null +++ b/2016s/pcad/readme.md @@ -0,0 +1,6 @@ +# fixed1 + +╤ыхуър Ёрчфтшэєы яюы Ёэ√х ъюэфхэёрЄюЁ√, ўЄю с эюЁьры№эю ёЄрэютшышё№, ёьхёЄшы JTAG Ёрч·хь. ┬Ёюфх с√ эшўхую эх яюыюьры, эю Є.ъ.   "яЁюёЄю юсюцр■" PCAD, Єю   эх тшэютрЄ чр тючьюцэ√х яЁюсыхь√ :-) + +─ьшЄЁшщ ╠шїры№ўхэъют +@mikhaltchenkov \ No newline at end of file diff --git a/2016s/photos/IMG_7753.jpg b/2016s/photos/IMG_7753.jpg new file mode 100644 index 0000000..a4d5cbd Binary files /dev/null and b/2016s/photos/IMG_7753.jpg differ diff --git a/2016s/photos/black.jpg b/2016s/photos/black.jpg new file mode 100644 index 0000000..b13df90 Binary files /dev/null and b/2016s/photos/black.jpg differ diff --git a/2016s/photos/sp2k-1k50.jpg b/2016s/photos/sp2k-1k50.jpg new file mode 100644 index 0000000..c7cd6ba Binary files /dev/null and b/2016s/photos/sp2k-1k50.jpg differ diff --git a/2016s/photos/white.jpg b/2016s/photos/white.jpg new file mode 100644 index 0000000..ba99b54 Binary files /dev/null and b/2016s/photos/white.jpg differ diff --git a/board2000.jpg b/board2000.jpg new file mode 100644 index 0000000..5aa2437 Binary files /dev/null and b/board2000.jpg differ diff --git a/dp_im.png b/dp_im.png new file mode 100644 index 0000000..5120c37 Binary files /dev/null and b/dp_im.png differ diff --git a/package.jpg b/package.jpg new file mode 100644 index 0000000..f3842aa Binary files /dev/null and b/package.jpg differ diff --git a/readme.md b/readme.md new file mode 100644 index 0000000..65e6509 --- /dev/null +++ b/readme.md @@ -0,0 +1,158 @@ +# 2000 + +─рЄр рэюэёр: 18.12.2000у. + +╘шЁьр яЁюшчтюфшЄхы№ "PetersPlus" юс· тшыр ю эрўрых ЁрчЁрсюЄъш яЁшэЎшяшры№эю эютющ тхЁёшш ьрЄхЁшэёъющ яырЄ√ ъюья№■ЄхЁр Sprinter (sp2000). +═ютюх эрчтрэшх с√ыю эхюсїюфшью фы  Єюую, ўЄю с√ ЁрчфхышЄ№ яюэ Єш  "яырЄр ъюья№■ЄхЁр" ш "ьюфхы№ ъюья№■ЄхЁр". ╧юф яырЄющ эрфю яюэшьрЄ№ ёюсёЄтхээю яырЄє, ъръ +цхыхчю, р яюф ьюфхы№■ ъюья№■ЄхЁр эрфю яюфЁрчєьхтрЄ№ эрсюЁ ъюэЇшуєЁрЎшщ, т√яюыэхэ√ї т └ы№ЄхЁх. ═ютр  яырЄр ЄхяхЁ№ эрч√трхЄё  sp2000, ёЄрЁр  яырЄр sp97, р ьюфхы№ ъюья№■ЄхЁр эрч√трхЄё  Sprinter. + +``` +╧ЁшэЎшяшры№эюх юЄышўшх яырЄ√ sp2000 т Єюь, ўЄю юэр яючтюы хЄ яЁютюфшЄ№ ряуЁхщф ьюфхыш ъюья№■ЄхЁр схч чрьхэ√ яырЄ√. ▌Єю юёє∙хёЄты хЄё  ё яюью∙№■ яЁюуЁрьь√ чряєёърхьющ эр ёрьюь Sprinter ш яхЁхчряшё√тр■∙хщ шэЇюЁьрЎш■ т +ўшярї яырЄ√. ╤ЄюшьюёЄ№ яюфюсэюую ряуЁхщфр сєфхЄ эхтхышър. +``` + +24.02.2001у. ЇюЄюуЁрЇш  яырЄ√ sp2000 с√ыр юяєсышъютрэр эр ёрщЄх (т Єю тЁхь  http://virtuals.atlant.ru/peters/). + +
+ +╫єЄ№ яючфэхх ╧хЄхЁё√ юсэрЁєцшыш, ўЄю яхўрЄэр  яырЄр Ёрчтхфхэр ё уЁєсхщ°шьш ю°шсърьш. ┬ Єю тЁхь  шчуюЄютыхэшх яырЄ ёЄюшыю яЁшышўэ√ї фхэху ш чрэшьрыю тЁхь , р эхёъюы№ъю фхё Єъют яырЄ єцх с√ыш эр Ёєърї. +═х яЁюярфрЄ№ цх фюсЁє - ш 17.03.2001 уюфр юэш юс· тшыш ю тхЁёшш sp2000-light. + +# 2000-light + +
+ +``` +╤ єўхЄюь ¤Єюую, ь√ Ёх°шыш Ёрё°шЁшЄ№ ышэхщъє яырЄ Sprinter-р ш уюЄют√ +яЁхфыюцшЄ№ яюы№чютрЄхы ь яырЄє Sp2000-Light. ╬Єышўшх юЄ Sp2000 ёюёЄюшЄ т +юЄёєЄёЄтшш ISA ёыюЄют, тЄюЁюую IDE Ёрч·хьр ш юуЁрэшўхэшш тшфхю ╬╟╙ фю 256Kb. +▌Єю яючтюышыю ёэшчшЄ№ ёЄюшьюёЄ№ "цхыхчр" фю 85 фюыырЁют. ╧Ёш ¤Єюь яырЄр +ёюїЁрэшыр тючьюцэюёЄ№ яЁюуЁрььэюую ряуЁхщфр ьюфхыш ъюь№■ЄхЁр. +Hрфххьё , ўЄю эютр  яырЄр ёьюцхЄ чршэЄхЁхёютрЄ№ яюы№чютрЄхыхщ, ъюЄюЁ√ь +Sprinter +шэЄхЁхёхэ т яхЁтє■ юўхЁхф№ ъръ "яЁюфтшэєЄ√щ" Specrtum. +``` + +╤ ISA ёыюЄрьш яюэ Єэю, тЄюЁющ IDE Ёрч·хь ш Єръ эх ЁрсюЄры, р юуЁрэшўхэшх тшфхю ╬╟╙ фю 256╩с с√ыю "ьрЁъхЄшэуют√ь юсьрэюь", тЄюЁ√х 256╩с эшъюуфр ш эх шёяюы№чютрышё№. + +┬ ьрёЄхЁ-рЁїштрї ёюїЁрэшышё№ шёїюфэ√х Їрщы√ яЁюхъЄр т OrCAD ё Ёрсюўшь эрчтрэшхь "SPRINT_3", фрЄшЁютрэ√ 05.12.2002 13:22. ┬ Їрщых яхўрЄэющ яырЄ√ єцх тэхёхэ√ шчьхэхэш , ъюЄюЁ√х фхырышё№ эртхёэ√ь ьюэЄрцюь (яхЁхЁхчрэшх фюЁюцхъ, єёЄрэютър smd-ЁхчшёЄюЁют). ▌Єш ¤ыхьхэЄ√ яЁюёЄю тэхёхэ√ т яЁюхъЄ, эю эр яырЄх эх Ёрчьх∙хэ√ ш эх Ёрчтхфхэ√. + +
+ +10.12.2001у. ЇшЁьр "PetersPlus" яЁюшчтхыр тЄюЁє■ ярЁЄш■ ьрЄхЁшэёъшї яырЄ sp2000, ёъюЁхх тёхую єцх шёяЁртыхээ√ї. + +┬ ьрёЄхЁ-рЁїштрї эрщфхэ√ ёрь√х "ётхцшх" ьюэЄрцэ√х ёїхь√ sp2000, фрЄшЁютрээ√х юЄ 10.10.2002у. ё эхёъюы№ъшьш фюЁрсюЄърьш. ╩ ¤Єюьє тЁхьхэш юъюэўрЄхы№эю ёЇюЁьшЁютрырё№ ёїхьр ъюья№■ЄхЁр, р 13.02.2003у. юэр с√ыр юяєсышъютрэр эр юЇшЎшры№эюь ёрщЄх. + + + + + + + +# 2000s + +11.06.2003у. яюёЄєяшыр т яЁюфрцє яырЄр sp2000s (ш VGA Converter фы  ъюья№■ЄхЁр). + +
+ +╩ ¤Єюьє тЁхьхэш эрўрышё№ яхЁхсюш ё яюёЄртърьш тшфхю ярь Єш т DIP-ъюЁяєёрї. ╧юёЄрт∙шъ ьшъЁюёїхь чртхЁшы, ўЄю яюфюсЁры рэрыюу ьшъЁюёїхь т soj-ъюЁяєёрї. ▌Єю яЁштхыю ъ Єюьє, ўЄю яЁш°ыюё№ фхырЄ№ яхЁхЁрчтюфъє яхўрЄэющ яырЄ√ +т юсырёЄш тшфхю ярь Єш. ▌Єю эх ьэюую ё Єюўъш чЁхэш  ёютЁхьхээюую CAD шэцхэхЁр, эю т Єю тЁхь  ¤Єю ёЄюшыю чэрўшЄхы№э√ї єёшышщ. + +╧ырЄр sp2000s сюы№°х эшўхь эх юЄышўрырё№ юЄ яЁхф°хёЄтхээшЎ√, ёєЇЇшъё "s" юсючэрўры яЁшьхэхэшх ъюЁяєёют soj ьшъЁюёїхь тшфхю ярь Єш. ╬ўхтшфэю, ўЄю тёх фюЁрсюЄъш ё ЁхчшёЄюЁрьш єцх с√ыш Єръ цх ё■фр шэЄхуЁшЁютрэ√. + +┬√сюЁ ьшъЁюёїхь яЁюшчтюфшЄхы  Aliance т ётю■ юўхЁхф№ яЁштхы ш ъ чэрўшЄхы№эющ фюЁрсюЄъх яЁю°штъш ╧╦╚╤, ъюЄюЁр  с√ыр эряЁртыхэр шёъы■ўшЄхы№эю эр сюЁ№сє ё тшфхю рЁЄхЇръЄрьш (ьєёюЁэ√х Єюўъш ш ышэшш эр ¤ъЁрэх). +╥ръ с√ы Ёхрышчютрэ BIOS тхЁёшщ 3.03 ш 3.04, эю юЇшЎшры№эю юэш эшъюуфр эх т√їюфшыш. ╒юЄ  ЁрсюЄ√ х∙х ш тхышё№, эю ё ёхЁхфшэ√ 2003 уюфр тхё№ яЁюхъЄ Sprinter яЁръЄшўхёъш єцх с√ы юёЄрэютыхэ. + + + +# ╬ёЄрэютър яЁюхъЄр, яюя√Єъш т√ъєяшЄ№ ш тючюсэютшЄ№ ЁрсюЄ√ + +┬ Єхўхэшх 2003-2005 уюфют эрф яЁюхъЄюь яютшё Єєьрэ, эшўхую эхяюэшьр■∙хх ёююс∙хёЄтю Sprinter Team ы■сшЄхыхщ ¤Єюую ъюья№■ЄхЁр я√Єрыюё№ т√ ёэшЄ№ ўЄю яЁюшёїюфшЄ, ё Єхўхэшхь тЁхьхэш яюэшьр , ўЄю шї ы■сшь√щ ъюья№■ЄхЁ ьюцхЄ єс√Є№ т эшс√Єшх. +─хырышё№ яюя√Єъш ёт чрЄ№  ё ЁєъютюфшЄхы ьш "╧хЄхЁё╧ы■ё", ё эхяюёЁхфёЄтхээю ЁрчЁрсюЄўшърьш, эю  ёэюёЄш сюы№°х эх ёЄрэютшыюё№. ═ръюэхЎ, 21.04.2005у. Mac Buster ёююс∙шы эр ёЄЁрэшЎрї ЇюЁєьр NedoPC т 10:47 ёыхфє■∙хх: + +``` +┼ёЄ№ эютюёЄш юЄ ╧хЄхЁёют. ┼ёыш є ъюую ё эхЁтрьш шыш ё ёхЁфЎхь эх тёх т яюЁ фъх, Єю ыєў°х эх ўшЄрЄ№. +``` +╧ЁхфтрЁшЄхы№эр  ЎшЇЁр яю ышЎхэчшш эр ьрьє ш тшфхю 280 Є√ё Ёєсыхщ. +╫Єю тїюфшЄ: яюыэр  шэЇюЁьрЎш  яю яЁюшчтюфёЄтє ш эрёЄЁющъх. +╚ёїюфэшъш ёюсёЄтхээюую яЁюуЁрььэюую юсхёяхўхэш (┴╚╬╤,ёюЇЄ ш яЁюў). +╩ышхэЄёър  срчр(юЄуЁєцхээ√х ш эют√х чр тъш) └ Єръцх сєфє∙шх ъышхэЄ√(чрърч√ яЁюфюыцр■Є яюёЄєярЄ№). +╬сєўхэшх эрёЄЁющ∙шър цхыхчр(яЁюуЁрььшЁютрэшх └ыЄхЁ ш эрёЄЁющър яырЄ). +╠.с. х∙х ўЄю чрс√ы. +╚ьххЄё  36 ьрЄхЁшэёъшї яырЄ,3 яырЄ√ тшфхю +╠эюую SMD ЁхчшёЄюЁют/ъюэфхэёрЄюЁют,Ёрч·хь√,ярэхыш ш яЁюў. +╧ю цхыхчє х∙х эх яЁшъшф√трыш ,ёъюы№ъю ёЄюшЄ,фюуютюЁшьё  +``` +``` + +2005 уюф, ъєЁё фюыырЁр ўєЄ№ ьхэ№°х 28 Ёєсыхщ. ╤ЄюшЄ ыш уютюЁшЄ№ ю ўєтёЄтрї єўрёЄэшъют Sprinter Team... ╤ ¤Єюую ьюьхэЄр уЁєяяр NedoPC, фю ъюэЎр эрфх■∙р ё  чрэ Є№ё  яЁюфюыцхэшхь ЁрсюЄ эрф ╤яЁшэЄхЁюь, юъюэўрЄхы№эю яЁшэшьрхЄ Ёх°хэшх ю ЁрчЁрсюЄъх ётюхую ёюсёЄтхээюую ъюья№■ЄхЁр. + + + + +# ┬ючЁюцфхэшх, ьрёЄхЁ-рЁїшт√ + +╘шЁьр "╧хЄхЁё╧ы■ё" эх ёьюуыр яЁюфрЄ№ яЁюхъЄ эшъюьє. ═хшчтхёЄэю, с√ыш ыш яюя√Єъш яЁюфрцш чрЁєсхц, эю ёяєёЄ  2 уюфр, р шьхээю 01.02.2007у. ╚трэ ╠ръ, уыртэ√щ ЁрчЁрсюЄўшъ, юс· тшы ю Єюь, ўЄю ЇшЁьр "╧хЄхЁё╧ы■ё" юЄфрыр хьє тёх эрЁрсюЄъш яю ¤Єюьє ъюья№■ЄхЁє ш ЄхяхЁ№ юэ уюЄют ёю тЁхьхэхь юЄъЁ√Є№ яЁюхъЄ. +═р ЇюЁєьх zx-pk яюёЄ юс ¤Єюь яю тшыё  03.02.2007у. https://zx-pk.ru/threads/4710-sprinter-resurrection-2-(ofitsialnoe-soobshchenie-ot-f-peters).html +═рўрырё№ фюыур  ЁрсюЄр эрф ЁрчсюЁюь Їрщыют√ї чртрыют фы  Єюую, ўЄю т√ыюцшЄ№ юс∙хёЄтхээюёЄш Єюы№ъю Єю ўЄю эхюсїюфшью. + +┬ёх рЁїшт√, ъюЄюЁ√х с√ыш т√ыюцхэ√ ╚трэюь ╠ръ, ь√ эрч√трхь ьрёЄхЁ-рЁїштрьш. ▌Єю юёэютэющ ш хфшэёЄтхээ√щ шёЄюўэшъ шэЇюЁьрЎшш яю яЁюхъЄє. ─Ёєушї эхЄ ш тхЁю Єэю єцх эх сєфхЄ, тё╕ ёюсЁрэю чфхё№. +╚трэ фы  ¤Єюую ёючфры ёЄЁрэшўъє http://sprinter.winglion.ru ш яюяюыэ ы хх. ╬фэръю ё Єхўхэшхь тЁхьхэш Їрщы√ ё эхх ъръшь-Єю юсЁрчюь "ЄхЁ ышё№" (тючьюцэю єфры ышё№ їюёЄхЁюь). +╥ръ с√ыр "яхЁхёючфрэр" ¤Єр ёЄЁрэшўър яю эютюьє рфЁхёє https://winglion.sprinter.ru ш фюяюыэхэр фю ьръёшьры№эюую фюяюыэхэш , ъюЄюЁюх Єрь ъюуфр-ышсю с√ыю (сыруюфрЁ  webarchive.org ш ёююс∙хёЄтє Sprinter Team, ёюїЁрэшт°шь ¤Єш рЁїшт√). + +╥ръ, яЁшьхЁэю ъ 2009 уюфє с√ыю тё╕ юЄъЁ√Єю ш т√ыюцхэю. ╥ръ цх т Єхўхэшх ¤Єюую тЁхьхэш ЁрёяЁюфртрышё№ юёЄрЄъш х∙х ╧хЄхЁё╧ы■ёютёъшї яхўрЄэ√ї яырЄ, шї с√ыю эх юўхэ№ ьэюую, сєътры№эю фхё Єюъ-фтр Ёрчэ√ї тхЁёшщ. + + + + +# sp2003s + +╧юёых юЄъЁ√Єш  яЁюхъЄр т ьрёЄхЁ-рЁїштрї с√ыр юсэрЁєцхэр "эютхщ°р " тхЁёш  яырЄ√, ъюЄюЁр  эшъюуфр эх т√яєёърырё№ ш эх яєсышъютрырё№. + +
+ +┴√ыш Єръ цх уюЄют√ ухЁсхЁ-Їрщы√ фы  яЁюшчтюфёЄтр яхўрЄэ√ї яырЄ. ═р юёэютх т√ыюцхээющ шэЇюЁьрЎшш loxiё т√яєёЄшы эхсюы№°є■ ярЁЄш■ яхўрЄэ√ї яырЄ, + + + +# sp2016s + +┬ чртхЁ°хэшх т√°хёърчрээюую т 2016 с√ы яЁхфёЄртыхэ яхЁт√щ эютюфхы ъырёёшўхёъющ яырЄ√ ╤яЁшэЄхЁр ё эхсюы№°шьш, эю юўхэ№ трцэ√ьш шчьхэхэш ьш ш фюяюыэхэш ьш. + +
+ +``` +╧юёых юЄЁшёютъш яырЄ√ ш ёїхь√ юЁшушэры№эющ тхЁёшш ъюья№■ЄхЁр,   Ёх°шы тэхёЄш эхсюы№°шх яЁртъш ъюёьхЄшўхёъюую їрЁръЄхЁр, р яю ёєЄш ўрёЄ№ т√тюфэ√ї ЁхчшёЄюЁют чрьхэшы эр SMD ЁрчьхЁр 0805, єьхэ№°шы ЁрчьхЁ SMD ъюэфхэёрЄюЁют ё 1206 эр 0805. ╩Ёюьх Єюую Ёрч·хь фы  AT сыюър яшЄрэш  с√ы чрьхэхэ эр Ёрч·хь фы  ATX сыюъют яшЄрэш , шчьхэхэр ёїхьр ЇюЁьшЁютрЄхы  яшЄрэш  эр 3.3┬ ш 2.5┬. ╙сЁрэ ёЄрсшышчрЄюЁ эряЁ цхэш  фы  ┬├93, ътрЁЎхт√щ ЁхчюэрЄюЁ с√ы чрьхэхэ эр ътрЁЎхт√щ ухэхЁрЄюЁ т SMD шёяюыэхэшш ЁрчьхЁюь 5070. ┬ ЇюЁьшЁютрЄхых чтєър ЄрэЄрыют√х ъюэфхэёрЄюЁ√ с√ыш чрьхэхэ√ эр ¤ыхъЄЁюышЄшўхёъшх. ╩Ёюьх Єюую с√ыш эхсюы№°шх шчьхэхэш  т ЄЁрёёшЁютъх яырЄ√ ш шчьхэхэ Єшя чрыштъш ё ёхЄъш эр ёяыю°эє■. ┬ 2017 уюфє тэхё х∙х юфэю шчьхэхэшх, фюсртыхэю яюёрфюўэюх ьхёЄю фы  Ёрч·хьр PS2 ъыртшрЄєЁ√. +``` + +http://micklab.ru/ZX%20Spectrum/Sprinter2000.htm + + + + + + + + + + + + +▌ЄюЄ ъюья№■ЄхЁ юЇшЎшры№эю эх яЁюшчтюфшЄё  ё 2003 уюфр, эю тё╕ х∙╕ ёє∙хёЄтєхЄ яЁш яюффхЁцъх ёююс∙хёЄтр. + + + + + + + + + + + + + + + + +