mirror of
https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
i8089.c: added instruction decode and more opcodes, starts executing task blocks now
This commit is contained in:
Dirk Best
parent
bc0e399730
commit
00128f8980
@ -46,6 +46,7 @@ public:
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protected:
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// device-level overrides
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virtual void device_start();
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virtual void device_reset();
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virtual void execute_run();
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int m_icount;
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@ -53,9 +54,59 @@ protected:
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private:
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// opcodes
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void add_rm(int r, int m, int o = 0);
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void add_mr(int m, int r, int o = 0);
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void addb_rm(int r, int m, int o = 0);
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void addb_mr(int m, int r, int o = 0);
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void addbi_ri(int r, int i);
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void addbi_mi(int m, int i, int o = 0);
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void addi_ri(int r, int i);
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void addi_mi(int m, int i, int o = 0);
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void and_rm(int r, int m, int o = 0);
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void and_mr(int m, int r, int o = 0);
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void andb_rm(int r, int m, int o = 0);
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void andb_mr(int m, int r, int o = 0);
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void andbi_ri(int r, int i);
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void andbi_mi(int m, int i, int o = 0);
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void andi_ri(int r, int i);
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void andi_mi(int m, int i, int o = 0);
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void call(int m, int d, int o = 0);
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void clr(int m, int b, int o = 0);
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void dec_r(int r);
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void dec_m(int m, int o = 0);
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void decb(int m, int o = 0);
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void hlt();
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void inc_r(int r);
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void inc_m(int m, int o = 0);
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void incb(int m, int o = 0);
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void jbt(int m, int b, int d, int o = 0);
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void jmce(int m, int d, int o = 0);
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void jmcne(int m, int d, int o = 0);
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void jmp(int d);
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void jnbt(int m, int b, int d, int o = 0);
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void jnz_r(int r, int d);
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void jnz_m(int m, int d, int o = 0);
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void jnzb(int m, int d, int o = 0);
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void jz_r(int r, int d);
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void jz_m(int m, int d, int o = 0);
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void jzb(int m, int d, int o = 0);
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void lcall(int m, int d, int o = 0);
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void ljbt(int m, int b, int d, int o = 0);
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void ljmce(int m, int d, int o = 0);
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void ljmcne(int m, int d, int o = 0);
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void ljmp(int d);
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void ljnbt(int m, int b, int d, int o = 0);
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void ljnz_r(int r, int d);
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void ljnz_m(int m, int d, int o = 0);
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void ljnzb(int m, int d, int o = 0);
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void ljz_r(int r, int d);
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void ljz_m(int m, int d, int o = 0);
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void ljzb(int m, int d, int o = 0);
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void lpd(int p, int m, int o = 0);
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void lpdi(int p, int i, int o = 0);
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void mov_mr(int m, int r, int o = 0);
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void mov_rm(int r, int m, int o = 0);
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void mov_mm(int m1, int m2, int o1 = 0, int o2 = 0);
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void movb_mr(int m, int r, int o = 0);
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void movb_rm(int r, int m, int o = 0);
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void movb_mm(int m1, int m2, int o1 = 0, int o2 = 0);
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@ -66,25 +117,38 @@ private:
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void movp_mp(int m, int p, int o = 0);
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void movp_pm(int p, int m, int o = 0);
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void nop();
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void not_r(int r);
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void not_m(int m, int o = 0);
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void not_rm(int r, int m, int o = 0);
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void notb_m(int m, int o = 0);
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void notb_rm(int r, int m, int o = 0);
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void or_rm(int r, int m, int o = 0);
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void or_mr(int m, int r, int o = 0);
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void orb_rm(int r, int m, int o = 0);
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void orb_mr(int m, int r, int o = 0);
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void orbi_ri(int r, int i);
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void orbi_mi(int m, int i, int o = 0);
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void ori_ri(int r, int i);
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void ori_mi(int m, int i, int o = 0);
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void setb(int m, int b, int o = 0);
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void sintr();
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void tsl(int m, int i, int d, int o = 0);
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void wid(int s, int d);
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void xfer();
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void invalid(int opc);
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// instruction fetch
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UINT16 displacement(int wb);
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UINT8 offset(int aa);
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UINT8 imm8();
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UINT16 imm16();
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void examine_ccw(UINT8 ccw);
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devcb2_write_line m_write_sintr;
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enum
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{
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STATE_IDLE,
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STATE_EXECUTING,
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STATE_DMA
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};
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i8089_device *m_iop;
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int m_state;
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bool m_interrupts_enabled;
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// register
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enum
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{
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@ -115,9 +179,7 @@ i8089_channel::i8089_channel(const machine_config &mconfig, const char *tag, dev
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device_t(mconfig, I8089_CHANNEL, "Intel 8089 I/O Channel", tag, owner, clock, "i8089_channel", __FILE__),
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device_execute_interface(mconfig, *this),
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m_icount(0),
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m_write_sintr(*this),
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m_state(STATE_IDLE),
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m_interrupts_enabled(true)
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m_write_sintr(*this)
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{
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}
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@ -133,9 +195,6 @@ void i8089_channel::device_start()
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m_write_sintr.resolve_safe();
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// register for save states
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save_item(NAME(m_state));
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save_item(NAME(m_interrupts_enabled));
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for (int i = 0; i < ARRAY_LENGTH(m_r); i++)
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{
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save_item(NAME(m_r[i].w), i);
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@ -143,23 +202,207 @@ void i8089_channel::device_start()
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}
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}
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void i8089_channel::device_reset()
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{
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// initialize registers
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for (int i = 0; i < ARRAY_LENGTH(m_r); i++)
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{
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m_r[i].w = 0;
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m_r[i].t = 0;
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}
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}
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//**************************************************************************
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// IMPLEMENTATION
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//**************************************************************************
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UINT16 i8089_channel::displacement(int wb)
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{
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UINT16 displacement = 0;
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if (wb == 1)
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{
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displacement = m_iop->read_byte(m_r[TP].w);
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m_r[TP].w++;
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}
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else if (wb == 2)
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{
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displacement = m_iop->read_word(m_r[TP].w);
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m_r[TP].w += 2;
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}
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return displacement;
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}
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UINT8 i8089_channel::offset(int aa)
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{
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UINT8 offset = 0;
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if (aa == 1)
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{
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offset = m_iop->read_byte(m_r[TP].w);
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m_r[TP].w++;
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}
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return offset;
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}
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UINT8 i8089_channel::imm8()
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{
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UINT8 imm8 = m_iop->read_byte(m_r[TP].w);
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m_r[TP].w++;
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return imm8;
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}
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UINT16 i8089_channel::imm16()
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{
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UINT8 imm16 = m_iop->read_word(m_r[TP].w);
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m_r[TP].w += 2;
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return imm16;
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}
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void i8089_channel::execute_run()
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{
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do
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{
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switch (m_state)
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// active transfer?
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if (BIT(m_r[PSW].w, 6))
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{
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case STATE_IDLE:
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m_icount = 0;
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break;
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}
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case STATE_DMA:
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m_icount = 0;
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break;
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// executing task block instructions?
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else if (BIT(m_r[PSW].w, 2))
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{
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// fetch first two instruction bytes
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UINT16 op = m_iop->read_word(m_r[TP].w);
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m_r[TP].w += 2;
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// extract parameters
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UINT8 params = op & 0xff;
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UINT8 opcode = (op >> 8) & 0xff;
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int brp = (params >> 5) & 0x07;
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int wb = (params >> 3) & 0x03;
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int aa = (params >> 1) & 0x03;
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int w = (params >> 0) & 0x01;
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int opc = (opcode >> 2) & 0x3f;
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int mm = (opcode >> 0) & 0x03;
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// fix-up so we can use our register array
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if (mm == BC) mm = PP;
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UINT8 o;
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UINT16 off, seg;
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switch (opc)
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{
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case 0x00: // control
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switch (brp)
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{
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case 0: nop(); break;
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case 1: invalid(opc); break;
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case 2: sintr(); break;
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case 3: xfer(); break;
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default:
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if (BIT(brp, 2))
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wid(BIT(brp, 1), BIT(brp, 0));
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}
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break;
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case 0x02: // lpdi
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off = imm16();
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seg = imm16();
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lpdi(brp, seg, off);
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break;
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case 0x08: // add(b)i r, i
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if (w) addi_ri(brp, imm16());
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else addbi_ri(brp, imm8());
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break;
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case 0x0a: // and(b)i r, i
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if (w) andi_ri(brp, imm16());
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else andbi_ri(brp, imm8());
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break;
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case 0x0c: // mov(b)i r, i
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if (w) movi_ri(brp, imm16());
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else movbi_ri(brp, imm8());
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break;
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case 0x0f: // dec r
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dec_r(brp);
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break;
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case 0x12: // hlt
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if (BIT(brp, 0))
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hlt();
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break;
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case 0x22: // lpd
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o = offset(aa);
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lpd(brp, mm, o);
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break;
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case 0x28: // add(b) r, m
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if (w) add_rm(brp, mm, offset(aa));
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else addb_rm(brp, mm, offset(aa));
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break;
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case 0x2a: // and(b) r, m
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if (w) and_rm(brp, mm, offset(aa));
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else andb_rm(brp, mm, offset(aa));
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break;
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case 0x27: // call
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o = offset(aa);
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call(mm, displacement(wb), o);
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break;
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case 0x30: // add(b)i m, i
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o = offset(aa);
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if (w) addi_mi(mm, imm16(), o);
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else addbi_mi(mm, imm8(), o);
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break;
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case 0x32: // and(b)i m, i
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o = offset(aa);
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if (w) andi_mi(mm, imm16());
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else andbi_mi(mm, imm8());
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break;
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case 0x34: // add(b) m, r
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if (w) add_mr(mm, brp, offset(aa));
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else addb_mr(mm, brp, offset(aa));
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break;
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case 0x36: // and(b) m, r
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if (w) and_mr(mm, brp, offset(aa));
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else andb_mr(mm, brp, offset(aa));
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break;
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case 0x3b: // dec(b) m
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if (w) dec_m(mm, offset(aa));
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else decb(mm, offset(aa));
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break;
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case 0x3e: // clr
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clr(mm, brp, offset(aa));
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break;
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default:
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invalid(opc);
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}
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case STATE_EXECUTING:
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m_icount--;
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break;
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}
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// nothing to do
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else
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{
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m_icount--;
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}
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}
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while (m_icount > 0);
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@ -172,47 +415,33 @@ void i8089_channel::set_control_block(offs_t address)
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bool i8089_channel::bus_load_limit()
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{
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return BIT(m_r[CP].w, 5);
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return BIT(m_r[PSW].w, 5);
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}
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bool i8089_channel::priority()
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{
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return BIT(m_r[CP].w, 7);
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return BIT(m_r[PSW].w, 7);
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}
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void i8089_channel::examine_ccw(UINT8 ccw)
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{
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// interrupt control field
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switch ((ccw >> 3) & 0x03)
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{
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// no effect
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case 0:
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break;
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// priority and bus load limit, bit 7 and 5
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m_r[PSW].w = (m_r[PSW].w & 0x5f) | (ccw & 0xa0);
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// acknowledge interrupt
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case 1:
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if (VERBOSE)
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logerror("%s('%s'): acknowledge interrupt\n", shortname(), tag());
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if (BIT(ccw, 4))
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{
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m_write_sintr(0);
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break;
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m_r[PSW].w &= ~(1 << 5);
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}
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// enable interrupts
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case 2:
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if (VERBOSE)
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logerror("%s('%s'): interrupts enabled\n", shortname(), tag());
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m_interrupts_enabled = true;
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break;
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// disable interrupts
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case 3:
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if (VERBOSE)
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logerror("%s('%s'): interrupts disabled\n", shortname(), tag());
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m_write_sintr(0);
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m_interrupts_enabled = false;
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break;
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// interrupt enable
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if (BIT(ccw, 5))
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{
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if (BIT(ccw, 4))
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m_r[PSW].w &= ~(1 << 4);
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else
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m_r[PSW].w |= 1 << 4;
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}
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}
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@ -226,7 +455,7 @@ void i8089_channel::attention()
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// no channel command
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case 0:
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if (VERBOSE)
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logerror("%s('%s'): command received: no channel command\n", shortname(), tag());
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logerror("%s('%s'): command received: update psw\n", shortname(), tag());
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examine_ccw(ccw);
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break;
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@ -242,7 +471,7 @@ void i8089_channel::attention()
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movp_pm(TP, PP);
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movbi_mi(CP, 0xff, 1);
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m_state = STATE_EXECUTING;
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m_r[PSW].w |= 1 << 2;
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break;
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@ -264,7 +493,7 @@ void i8089_channel::attention()
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lpd(TP, PP);
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movbi_mi(CP, 0xff, 1);
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m_state = STATE_EXECUTING;
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m_r[PSW].w |= 1 << 2;
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if (VERBOSE)
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{
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@ -291,6 +520,14 @@ void i8089_channel::attention()
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movb_rm(PSW, PP, 3);
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movbi_mi(CP, 0xff, 1);
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m_r[PSW].w |= 1 << 2;
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if (VERBOSE)
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{
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logerror("%s('%s'): ---- continuing channel ----\n", shortname(), tag());
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logerror("%s('%s'): task pointer: %06x\n", shortname(), tag(), m_r[TP].w);
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}
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break;
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// halt channel, save tp
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@ -333,19 +570,71 @@ WRITE_LINE_MEMBER( i8089_channel::drq_w )
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// OPCODES
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//**************************************************************************
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#define UNIMPLEMENTED logerror("%s('%s'): unimplemented opcode: %s\n", shortname(), tag(), __FUNCTION__);
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void i8089_channel::add_rm(int r, int m, int o) { UNIMPLEMENTED }
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void i8089_channel::add_mr(int m, int r, int o) { UNIMPLEMENTED }
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void i8089_channel::addb_rm(int r, int m, int o) { UNIMPLEMENTED }
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void i8089_channel::addb_mr(int m, int r, int o) { UNIMPLEMENTED }
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void i8089_channel::addbi_ri(int r, int i) { UNIMPLEMENTED }
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void i8089_channel::addbi_mi(int m, int i, int o) { UNIMPLEMENTED }
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void i8089_channel::addi_ri(int r, int i) { UNIMPLEMENTED }
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void i8089_channel::addi_mi(int m, int i, int o) { UNIMPLEMENTED }
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void i8089_channel::and_rm(int r, int m, int o) { UNIMPLEMENTED }
|
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void i8089_channel::and_mr(int m, int r, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::andb_rm(int r, int m, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::andb_mr(int m, int r, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::andbi_ri(int r, int i) { UNIMPLEMENTED }
|
||||
void i8089_channel::andbi_mi(int m, int i, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::andi_ri(int r, int i) { UNIMPLEMENTED }
|
||||
void i8089_channel::andi_mi(int m, int i, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::call(int m, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::clr(int m, int b, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::dec_r(int r) { UNIMPLEMENTED }
|
||||
void i8089_channel::dec_m(int m, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::decb(int m, int o) { UNIMPLEMENTED }
|
||||
|
||||
// halt
|
||||
void i8089_channel::hlt()
|
||||
{
|
||||
movbi_mi(CP, 0x00, 1);
|
||||
m_state = STATE_IDLE;
|
||||
m_r[PSW].w &= ~(1 << 2);
|
||||
}
|
||||
|
||||
void i8089_channel::inc_r(int r) { UNIMPLEMENTED }
|
||||
void i8089_channel::inc_m(int m, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::incb(int m, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::jbt(int m, int b, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::jmce(int m, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::jmcne(int m, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::jmp(int d) { UNIMPLEMENTED }
|
||||
void i8089_channel::jnbt(int m, int b, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::jnz_r(int r, int d) { UNIMPLEMENTED }
|
||||
void i8089_channel::jnz_m(int m, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::jnzb(int m, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::jz_r(int r, int d) { UNIMPLEMENTED }
|
||||
void i8089_channel::jz_m(int m, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::jzb(int m, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::lcall(int m, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::ljbt(int m, int b, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::ljmce(int m, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::ljmcne(int m, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::ljmp(int d) { UNIMPLEMENTED }
|
||||
void i8089_channel::ljnbt(int m, int b, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::ljnz_r(int r, int d) { UNIMPLEMENTED }
|
||||
void i8089_channel::ljnz_m(int m, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::ljnzb(int m, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::ljz_r(int r, int d) { UNIMPLEMENTED }
|
||||
void i8089_channel::ljz_m(int m, int d, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::ljzb(int m, int d, int o) { UNIMPLEMENTED }
|
||||
|
||||
// load pointer from memory
|
||||
void i8089_channel::lpd(int p, int m, int o)
|
||||
{
|
||||
UINT16 offset = m_iop->read_word(m_r[m].w + o);
|
||||
UINT16 segment = m_iop->read_word(m_r[m].w + o + 2);
|
||||
m_r[p].w = (segment << 4) + (offset & 0xfffff);
|
||||
|
||||
m_r[p].w = ((segment << 4) + offset) & 0xfffff;
|
||||
m_r[p].t = 0;
|
||||
}
|
||||
|
||||
@ -356,6 +645,10 @@ void i8089_channel::lpdi(int p, int i, int o)
|
||||
m_r[p].t = 0;
|
||||
}
|
||||
|
||||
void i8089_channel::mov_mr(int m, int r, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::mov_rm(int r, int m, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::mov_mm(int m1, int m2, int o1, int o2) { UNIMPLEMENTED }
|
||||
|
||||
// move register to memory byte
|
||||
void i8089_channel::movb_mr(int m, int r, int o)
|
||||
{
|
||||
@ -414,9 +707,9 @@ void i8089_channel::movp_mp(int m, int p, int o)
|
||||
void i8089_channel::movp_pm(int p, int m, int o)
|
||||
{
|
||||
UINT16 offset = m_iop->read_word(m_r[m].w + o);
|
||||
UINT16 segment = m_iop->read_word(m_r[m].w +o + 2);
|
||||
UINT16 segment = m_iop->read_word(m_r[m].w + o + 2);
|
||||
|
||||
m_r[p].w = ((segment << 4) + offset) & 0x0fffff;
|
||||
m_r[p].w = ((segment << 4) + offset) & 0xfffff;
|
||||
m_r[p].t = segment >> 3 & 0x01;
|
||||
}
|
||||
|
||||
@ -425,11 +718,46 @@ void i8089_channel::nop()
|
||||
{
|
||||
}
|
||||
|
||||
void i8089_channel::not_r(int r) { UNIMPLEMENTED }
|
||||
void i8089_channel::not_m(int m, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::not_rm(int r, int m, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::notb_m(int m, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::notb_rm(int r, int m, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::or_rm(int r, int m, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::or_mr(int m, int r, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::orb_rm(int r, int m, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::orb_mr(int m, int r, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::orbi_ri(int r, int i) { UNIMPLEMENTED }
|
||||
void i8089_channel::orbi_mi(int m, int i, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::ori_ri(int r, int i) { UNIMPLEMENTED }
|
||||
void i8089_channel::ori_mi(int m, int i, int o) { UNIMPLEMENTED }
|
||||
void i8089_channel::setb(int m, int b, int o) { UNIMPLEMENTED }
|
||||
|
||||
// set interrupt service flip-flop
|
||||
void i8089_channel::sintr()
|
||||
{
|
||||
if (m_interrupts_enabled)
|
||||
if (BIT(m_r[PSW].w, 4))
|
||||
{
|
||||
m_r[PSW].w |= 1 << 5;
|
||||
m_write_sintr(1);
|
||||
}
|
||||
}
|
||||
|
||||
void i8089_channel::tsl(int m, int i, int d, int o) { UNIMPLEMENTED }
|
||||
|
||||
// set source and destination logical widths
|
||||
void i8089_channel::wid(int s, int d)
|
||||
{
|
||||
m_r[PSW].w &= 0x3f;
|
||||
m_r[PSW].w |= d << 0;
|
||||
m_r[PSW].w |= s << 1;
|
||||
}
|
||||
|
||||
void i8089_channel::xfer() { UNIMPLEMENTED }
|
||||
|
||||
void i8089_channel::invalid(int opc)
|
||||
{
|
||||
logerror("%s('%s'): invalid opcode: %02x\n", shortname(), tag(), opc);
|
||||
}
|
||||
|
||||
|
||||
@ -600,7 +928,7 @@ UINT16 i8089_device::read_word(offs_t address)
|
||||
|
||||
UINT16 data = 0xffff;
|
||||
|
||||
if (m_16bit_system)
|
||||
if (m_16bit_system && !(address & 1))
|
||||
{
|
||||
data = m_mem->read_word(address);
|
||||
}
|
||||
@ -623,7 +951,7 @@ void i8089_device::write_word(offs_t address, UINT16 data)
|
||||
{
|
||||
assert(m_initialized);
|
||||
|
||||
if (m_16bit_system)
|
||||
if (m_16bit_system && !(address & 1))
|
||||
{
|
||||
m_mem->write_word(address, data);
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user