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Memory banks are now referenced by tag rather than index.

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Changed all memory_bank_* functions to specify a tag.
Bulk-converted existing banks to be tagged "bank##" in
order to ensure consistency. However, going forward, the
tags don't matter, so please name them something useful.

Added AM_BANK_READ/AM_BANK_WRITE macros to let you specify
bank tags. Also changed AM_ROMBANK and AM_RAMBANK macros to
accept tags as well.

Added new functions memory_install_read_bank_handler and
memory_install_write_bank_handler to install banks by tag
name, similar to input ports.

Changed internals of memory system to dynamically allocate
all banks. The first time a bank with an unknown tag is
installed, a new bank object is created and tracked 
internally. Removed all SMH_BANK(n) references outside of
the main code; these should never, ever be useful anymore.
This commit is contained in:
Aaron Giles 2009-12-03 08:16:38 +00:00
parent d642d98b58
commit 0069237f20
437 changed files with 2726 additions and 2642 deletions
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5
src/emu/cpu/mips/psx.c
View File

@ -1315,9 +1315,8 @@ static void mips_update_scratchpad( const address_space *space )
} }
else else
{ {
memory_install_readwrite32_handler( space, 0x1f800000, 0x1f8003ff, 0, 0, (read32_space_func)SMH_BANK(32), (write32_space_func)SMH_BANK(32) ); memory_install_readwrite_bank_handler( space, 0x1f800000, 0x1f8003ff, 0, 0, "bank32" );
memory_set_bankptr(space->machine, "bank32", psxcpu->dcache );
memory_set_bankptr(space->machine, 32, psxcpu->dcache );
} }
} }

436
src/emu/memory.c
View File

@ -134,9 +134,7 @@
***************************************************************************/ ***************************************************************************/
/* banking constants */ /* banking constants */
#define MAX_BANKS (STATIC_BANKMAX - STATIC_BANK1) /* maximum number of banks */
#define MAX_BANK_ENTRIES 4096 /* maximum number of possible bank values */ #define MAX_BANK_ENTRIES 4096 /* maximum number of possible bank values */
#define MAX_EXPLICIT_BANKS 96 /* maximum number of explicitly-defined banks */
/* address map lookup table definitions */ /* address map lookup table definitions */
#define LEVEL1_BITS 18 /* number of address bits in the level 1 table */ #define LEVEL1_BITS 18 /* number of address bits in the level 1 table */
@ -176,7 +174,6 @@ typedef enum _read_or_write read_or_write;
#define HANDLER_IS_STATIC(h) ((FPTR)(h) < STATIC_COUNT) #define HANDLER_IS_STATIC(h) ((FPTR)(h) < STATIC_COUNT)
#define HANDLER_TO_BANK(h) ((UINT32)(FPTR)(h)) #define HANDLER_TO_BANK(h) ((UINT32)(FPTR)(h))
#define BANK_TO_HANDLER(b) ((genf *)(FPTR)(b))
#define SUBTABLE_PTR(tabledata, entry) (&(tabledata)->table[(1 << LEVEL1_BITS) + (((entry) - SUBTABLE_BASE) << LEVEL2_BITS)]) #define SUBTABLE_PTR(tabledata, entry) (&(tabledata)->table[(1 << LEVEL1_BITS) + (((entry) - SUBTABLE_BASE) << LEVEL2_BITS)])
@ -206,19 +203,22 @@ struct _bank_reference
}; };
/* a bank is a global pointer to memory that can be shared across devices and changed dynamically */ /* a bank is a global pointer to memory that can be shared across devices and changed dynamically */
typedef struct _bank_data bank_info; typedef struct _bank_info bank_info;
struct _bank_data struct _bank_info
{ {
UINT8 used; /* is this bank used? */ bank_info * next; /* next bank in sequence */
UINT8 dynamic; /* is this bank allocated dynamically? */ UINT8 index; /* array index for this handler */
bank_reference * reflist; /* linked list of address spaces referencing this bank */
UINT8 read; /* is this bank used for reads? */ UINT8 read; /* is this bank used for reads? */
UINT8 write; /* is this bank used for writes? */ UINT8 write; /* is this bank used for writes? */
void * handler; /* SMH_BANK(n) handler for this bank */
bank_reference * reflist; /* linked list of address spaces referencing this bank */
offs_t bytestart; /* byte-adjusted start offset */ offs_t bytestart; /* byte-adjusted start offset */
offs_t byteend; /* byte-adjusted end offset */ offs_t byteend; /* byte-adjusted end offset */
UINT16 curentry; /* current entry */ UINT16 curentry; /* current entry */
void * entry[MAX_BANK_ENTRIES];/* array of entries for this bank */ void * entry[MAX_BANK_ENTRIES];/* array of entries for this bank */
void * entryd[MAX_BANK_ENTRIES];/* array of decrypted entries for this bank */ void * entryd[MAX_BANK_ENTRIES];/* array of decrypted entries for this bank */
char * name; /* friendly name for this bank */
char tag[1]; /* tag associated with this bank */
}; };
/* In memory.h: typedef struct _direct_range direct_range; */ /* In memory.h: typedef struct _direct_range direct_range; */
@ -263,7 +263,11 @@ struct _memory_private
memory_block * memory_block_list; /* head of the list of memory blocks */ memory_block * memory_block_list; /* head of the list of memory blocks */
bank_info bankdata[STATIC_COUNT]; /* data gathered for each bank */ tagmap * bankmap; /* map for fast bank lookups */
bank_info * banklist; /* data gathered for each bank */
UINT8 banknext; /* next bank to allocate */
tagmap * sharemap; /* map for share lookups */
UINT8 * wptable; /* watchpoint-fill table */ UINT8 * wptable; /* watchpoint-fill table */
}; };
@ -326,8 +330,7 @@ static void *space_find_backing_memory(const address_space *space, offs_t bytead
static int space_needs_backing_store(const address_space *space, const address_map_entry *entry); static int space_needs_backing_store(const address_space *space, const address_map_entry *entry);
/* banking helpers */ /* banking helpers */
static void bank_assign_static(int banknum, const address_space *space, read_or_write readorwrite, offs_t bytestart, offs_t byteend); static void *bank_find_or_allocate(const address_space *space, const char *tag, offs_t bytestart, offs_t byteend, read_or_write readorwrite);
static genf *bank_assign_dynamic(const address_space *space, read_or_write readorwrite, offs_t bytestart, offs_t byteend);
static STATE_POSTLOAD( bank_reattach ); static STATE_POSTLOAD( bank_reattach );
/* table management */ /* table management */
@ -358,7 +361,7 @@ static memory_handler get_stub_handler(read_or_write readorwrite, int spacedbits
static genf *get_static_handler(int handlerbits, int readorwrite, int which); static genf *get_static_handler(int handlerbits, int readorwrite, int which);
/* debugging */ /* debugging */
static const char *handler_to_string(const address_table *table, UINT8 entry); static const char *handler_to_string(const address_space *space, const address_table *table, UINT8 entry);
static void dump_map(FILE *file, const address_space *space, const address_table *table); static void dump_map(FILE *file, const address_space *space, const address_table *table);
static void mem_dump(running_machine *machine); static void mem_dump(running_machine *machine);
@ -720,6 +723,10 @@ void memory_init(running_machine *machine)
/* allocate our private data */ /* allocate our private data */
memdata = machine->memory_data = auto_alloc_clear(machine, memory_private); memdata = machine->memory_data = auto_alloc_clear(machine, memory_private);
memdata->bankmap = tagmap_alloc();
memdata->sharemap = tagmap_alloc();
if (memdata->bankmap == NULL || memdata->sharemap == NULL)
fatalerror("Out of memory allocating maps for memory constructs!");
/* build up the list of address spaces */ /* build up the list of address spaces */
memory_init_spaces(machine); memory_init_spaces(machine);
@ -836,25 +843,24 @@ void memory_set_decrypted_region(const address_space *space, offs_t addrstart, o
{ {
offs_t bytestart = memory_address_to_byte(space, addrstart); offs_t bytestart = memory_address_to_byte(space, addrstart);
offs_t byteend = memory_address_to_byte_end(space, addrend); offs_t byteend = memory_address_to_byte_end(space, addrend);
int banknum, found = FALSE; int found = FALSE;
bank_info *bank;
/* loop over banks looking for a match */ /* loop over banks looking for a match */
for (banknum = 0; banknum < STATIC_COUNT; banknum++) for (bank = space->machine->memory_data->banklist; bank != NULL; bank = bank->next)
{ {
bank_info *bank = &space->machine->memory_data->bankdata[banknum];
/* consider this bank if it is used for reading and matches the address space */ /* consider this bank if it is used for reading and matches the address space */
if (bank->used && bank->read && bank_references_space(bank, space)) if (bank->read && bank_references_space(bank, space))
{ {
/* verify that the region fully covers the decrypted range */ /* verify that the region fully covers the decrypted range */
if (bank->bytestart >= bytestart && bank->byteend <= byteend) if (bank->bytestart >= bytestart && bank->byteend <= byteend)
{ {
/* set the decrypted pointer for the corresponding memory bank */ /* set the decrypted pointer for the corresponding memory bank */
space->machine->memory_data->bankd_ptr[banknum] = (UINT8 *)base + bank->bytestart - bytestart; space->machine->memory_data->bankd_ptr[bank->index] = (UINT8 *)base + bank->bytestart - bytestart;
found = TRUE; found = TRUE;
/* if we are executing from here, force an opcode base update */ /* if we are executing from here, force an opcode base update */
if (space->direct.entry == banknum) if (space->direct.entry == bank->index)
force_opbase_update(space); force_opbase_update(space);
} }
@ -1014,17 +1020,15 @@ void *memory_get_write_ptr(const address_space *space, offs_t byteaddress)
addresses for a bank addresses for a bank
-------------------------------------------------*/ -------------------------------------------------*/
void memory_configure_bank(running_machine *machine, int banknum, int startentry, int numentries, void *base, offs_t stride) void memory_configure_bank(running_machine *machine, const char *tag, int startentry, int numentries, void *base, offs_t stride)
{ {
memory_private *memdata = machine->memory_data; memory_private *memdata = machine->memory_data;
bank_info *bank = &memdata->bankdata[banknum]; bank_info *bank = tagmap_find_hash_only(memdata->bankmap, tag);
int entrynum; int entrynum;
/* validation checks */ /* validation checks */
if (banknum < STATIC_BANK1 || banknum > MAX_EXPLICIT_BANKS || !bank->used) if (bank == NULL)
fatalerror("memory_configure_bank called with invalid bank %d", banknum); fatalerror("memory_configure_bank called for unknown bank '%s'", tag);
if (bank->dynamic)
fatalerror("memory_configure_bank called with dynamic bank %d", banknum);
if (startentry < 0 || startentry + numentries > MAX_BANK_ENTRIES) if (startentry < 0 || startentry + numentries > MAX_BANK_ENTRIES)
fatalerror("memory_configure_bank called with out-of-range entries %d-%d", startentry, startentry + numentries - 1); fatalerror("memory_configure_bank called with out-of-range entries %d-%d", startentry, startentry + numentries - 1);
if (!base) if (!base)
@ -1035,8 +1039,8 @@ void memory_configure_bank(running_machine *machine, int banknum, int startentry
bank->entry[entrynum] = (UINT8 *)base + (entrynum - startentry) * stride; bank->entry[entrynum] = (UINT8 *)base + (entrynum - startentry) * stride;
/* if we have no bankptr yet, set it to the first entry */ /* if we have no bankptr yet, set it to the first entry */
if (memdata->bank_ptr[banknum] == NULL) if (memdata->bank_ptr[bank->index] == NULL)
memdata->bank_ptr[banknum] = (UINT8 *)bank->entry[0]; memdata->bank_ptr[bank->index] = (UINT8 *)bank->entry[0];
} }
@ -1045,19 +1049,17 @@ void memory_configure_bank(running_machine *machine, int banknum, int startentry
the decrypted addresses for a bank the decrypted addresses for a bank
-------------------------------------------------*/ -------------------------------------------------*/
void memory_configure_bank_decrypted(running_machine *machine, int banknum, int startentry, int numentries, void *base, offs_t stride) void memory_configure_bank_decrypted(running_machine *machine, const char *tag, int startentry, int numentries, void *base, offs_t stride)
{ {
memory_private *memdata = machine->memory_data; memory_private *memdata = machine->memory_data;
bank_info *bank = &memdata->bankdata[banknum]; bank_info *bank = tagmap_find_hash_only(memdata->bankmap, tag);
int entrynum; int entrynum;
/* validation checks */ /* validation checks */
if (banknum < STATIC_BANK1 || banknum > MAX_EXPLICIT_BANKS || !bank->used) if (bank == NULL)
fatalerror("memory_configure_bank called with invalid bank %d", banknum); fatalerror("memory_configure_bank_decrypted called for unknown bank '%s'", tag);
if (bank->dynamic)
fatalerror("memory_configure_bank called with dynamic bank %d", banknum);
if (startentry < 0 || startentry + numentries > MAX_BANK_ENTRIES) if (startentry < 0 || startentry + numentries > MAX_BANK_ENTRIES)
fatalerror("memory_configure_bank called with out-of-range entries %d-%d", startentry, startentry + numentries - 1); fatalerror("memory_configure_bank_decrypted called with out-of-range entries %d-%d", startentry, startentry + numentries - 1);
if (!base) if (!base)
fatalerror("memory_configure_bank_decrypted called NULL base"); fatalerror("memory_configure_bank_decrypted called NULL base");
@ -1066,8 +1068,8 @@ void memory_configure_bank_decrypted(running_machine *machine, int banknum, int
bank->entryd[entrynum] = (UINT8 *)base + (entrynum - startentry) * stride; bank->entryd[entrynum] = (UINT8 *)base + (entrynum - startentry) * stride;
/* if we have no bankptr yet, set it to the first entry */ /* if we have no bankptr yet, set it to the first entry */
if (memdata->bankd_ptr[banknum] == NULL) if (memdata->bankd_ptr[bank->index] == NULL)
memdata->bankd_ptr[banknum] = (UINT8 *)bank->entryd[0]; memdata->bankd_ptr[bank->index] = (UINT8 *)bank->entryd[0];
} }
@ -1076,26 +1078,24 @@ void memory_configure_bank_decrypted(running_machine *machine, int banknum, int
entry to be the new bank base entry to be the new bank base
-------------------------------------------------*/ -------------------------------------------------*/
void memory_set_bank(running_machine *machine, int banknum, int entrynum) void memory_set_bank(running_machine *machine, const char *tag, int entrynum)
{ {
memory_private *memdata = machine->memory_data; memory_private *memdata = machine->memory_data;
bank_info *bank = &memdata->bankdata[banknum]; bank_info *bank = tagmap_find_hash_only(memdata->bankmap, tag);
bank_reference *ref; bank_reference *ref;
/* validation checks */ /* validation checks */
if (banknum < STATIC_BANK1 || banknum > MAX_EXPLICIT_BANKS || !bank->used) if (bank == NULL)
fatalerror("memory_set_bank called with invalid bank %d", banknum); fatalerror("memory_set_bank called for unknown bank '%s'", tag);
if (bank->dynamic)
fatalerror("memory_set_bank called with dynamic bank %d", banknum);
if (entrynum < 0 || entrynum > MAX_BANK_ENTRIES) if (entrynum < 0 || entrynum > MAX_BANK_ENTRIES)
fatalerror("memory_set_bank called with out-of-range entry %d", entrynum); fatalerror("memory_set_bank called with out-of-range entry %d", entrynum);
if (!bank->entry[entrynum]) if (!bank->entry[entrynum])
fatalerror("memory_set_bank called for bank %d with invalid bank entry %d", banknum, entrynum); fatalerror("memory_set_bank called for bank '%s' with invalid bank entry %d", tag, entrynum);
/* set the base */ /* set the base */
bank->curentry = entrynum; bank->curentry = entrynum;
memdata->bank_ptr[banknum] = (UINT8 *)bank->entry[entrynum]; memdata->bank_ptr[bank->index] = (UINT8 *)bank->entry[entrynum];
memdata->bankd_ptr[banknum] = (UINT8 *)bank->entryd[entrynum]; memdata->bankd_ptr[bank->index] = (UINT8 *)bank->entryd[entrynum];
/* invalidate all the direct references to any referenced address spaces */ /* invalidate all the direct references to any referenced address spaces */
for (ref = bank->reflist; ref != NULL; ref = ref->next) for (ref = bank->reflist; ref != NULL; ref = ref->next)
@ -1108,16 +1108,14 @@ void memory_set_bank(running_machine *machine, int banknum, int entrynum)
selected bank selected bank
-------------------------------------------------*/ -------------------------------------------------*/
int memory_get_bank(running_machine *machine, int banknum) int memory_get_bank(running_machine *machine, const char *tag)
{ {
memory_private *memdata = machine->memory_data; memory_private *memdata = machine->memory_data;
bank_info *bank = &memdata->bankdata[banknum]; bank_info *bank = tagmap_find_hash_only(memdata->bankmap, tag);
/* validation checks */ /* validation checks */
if (banknum < STATIC_BANK1 || banknum > MAX_EXPLICIT_BANKS || !bank->used) if (bank == NULL)
fatalerror("memory_get_bank called with invalid bank %d", banknum); fatalerror("memory_get_bank called for unknown bank '%s'", tag);
if (bank->dynamic)
fatalerror("memory_get_bank called with dynamic bank %d", banknum);
return bank->curentry; return bank->curentry;
} }
@ -1126,24 +1124,22 @@ int memory_get_bank(running_machine *machine, int banknum)
memory_set_bankptr - set the base of a bank memory_set_bankptr - set the base of a bank
-------------------------------------------------*/ -------------------------------------------------*/
void memory_set_bankptr(running_machine *machine, int banknum, void *base) void memory_set_bankptr(running_machine *machine, const char *tag, void *base)
{ {
memory_private *memdata = machine->memory_data; memory_private *memdata = machine->memory_data;
bank_info *bank = &memdata->bankdata[banknum]; bank_info *bank = tagmap_find_hash_only(memdata->bankmap, tag);
bank_reference *ref; bank_reference *ref;
/* validation checks */ /* validation checks */
if (banknum < STATIC_BANK1 || banknum > MAX_EXPLICIT_BANKS || !bank->used) if (bank == NULL)
fatalerror("memory_set_bankptr called with invalid bank %d", banknum); fatalerror("memory_set_bankptr called for unknown bank '%s'", tag);
if (bank->dynamic)
fatalerror("memory_set_bankptr called with dynamic bank %d", banknum);
if (base == NULL) if (base == NULL)
fatalerror("memory_set_bankptr called NULL base"); fatalerror("memory_set_bankptr called NULL base");
if (ALLOW_ONLY_AUTO_MALLOC_BANKS) if (ALLOW_ONLY_AUTO_MALLOC_BANKS)
validate_auto_malloc_memory(base, bank->byteend - bank->bytestart + 1); validate_auto_malloc_memory(base, bank->byteend - bank->bytestart + 1);
/* set the base */ /* set the base */
memdata->bank_ptr[banknum] = (UINT8 *)base; memdata->bank_ptr[bank->index] = (UINT8 *)base;
/* invalidate all the direct references to any referenced address spaces */ /* invalidate all the direct references to any referenced address spaces */
for (ref = bank->reflist; ref != NULL; ref = ref->next) for (ref = bank->reflist; ref != NULL; ref = ref->next)
@ -1151,24 +1147,6 @@ void memory_set_bankptr(running_machine *machine, int banknum, void *base)
} }
/*-------------------------------------------------
memory_find_unused_bank - return the index of
an unused bank
-------------------------------------------------*/
int memory_find_unused_bank(running_machine *machine)
{
memory_private *memdata = machine->memory_data;
int banknum;
for (banknum = STATIC_BANK1; banknum <= MAX_EXPLICIT_BANKS; banknum++)
if (!memdata->bankdata[banknum].used)
return banknum;
return -1;
}
/*************************************************************************** /***************************************************************************
DYNAMIC ADDRESS SPACE MAPPING DYNAMIC ADDRESS SPACE MAPPING
@ -1393,6 +1371,31 @@ void _memory_install_port_handler(const address_space *space, offs_t addrstart,
} }
/*-------------------------------------------------
_memory_install_bank_handler - install a
new port handler into the given address space
-------------------------------------------------*/
void _memory_install_bank_handler(const address_space *space, offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, const char *rtag, const char *wtag)
{
address_space *spacerw = (address_space *)space;
if (rtag != NULL)
{
void *handler = bank_find_or_allocate(space, rtag, addrstart, addrend, ROW_READ);
space_map_range(spacerw, ROW_READ, space->dbits, 0, addrstart, addrend, addrmask, addrmirror, handler, spacerw, rtag);
}
if (wtag != NULL)
{
void *handler = bank_find_or_allocate(space, wtag, addrstart, addrend, ROW_WRITE);
space_map_range(spacerw, ROW_WRITE, space->dbits, 0, addrstart, addrend, addrmask, addrmirror, handler, spacerw, wtag);
}
mem_dump(space->machine);
}
/*************************************************************************** /***************************************************************************
DEBUGGER HELPERS DEBUGGER HELPERS
@ -1415,7 +1418,7 @@ const char *memory_get_handler_string(const address_space *space, int read0_or_w
entry = table->table[LEVEL2_INDEX(entry, byteaddress)]; entry = table->table[LEVEL2_INDEX(entry, byteaddress)];
/* 8-bit case: RAM/ROM */ /* 8-bit case: RAM/ROM */
return handler_to_string(table, entry); return handler_to_string(space, table, entry);
} }
@ -1641,8 +1644,8 @@ static void memory_init_preflight(running_machine *machine)
memory_private *memdata = machine->memory_data; memory_private *memdata = machine->memory_data;
address_space *space; address_space *space;
/* zap the bank data */ /* reset the banking state */
memset(&memdata->bankdata, 0, sizeof(memdata->bankdata)); memdata->banknext = STATIC_BANK1;
/* loop over valid address spaces */ /* loop over valid address spaces */
for (space = (address_space *)memdata->spacelist; space != NULL; space = (address_space *)space->next) for (space = (address_space *)memdata->spacelist; space != NULL; space = (address_space *)space->next)
@ -1699,12 +1702,6 @@ static void memory_init_preflight(running_machine *machine)
/* convert any region-relative entries to their memory pointers */ /* convert any region-relative entries to their memory pointers */
if (entry->region != NULL) if (entry->region != NULL)
entry->memory = memory_region(machine, entry->region) + entry->rgnoffs; entry->memory = memory_region(machine, entry->region) + entry->rgnoffs;
/* assign static banks for explicitly specified entries */
if (HANDLER_IS_BANK(entry->read.generic))
bank_assign_static(HANDLER_TO_BANK(entry->read.generic), space, ROW_READ, entry->bytestart, entry->byteend);
if (HANDLER_IS_BANK(entry->write.generic))
bank_assign_static(HANDLER_TO_BANK(entry->write.generic), space, ROW_WRITE, entry->bytestart, entry->byteend);
} }
/* now loop over all the handlers and enforce the address mask */ /* now loop over all the handlers and enforce the address mask */
@ -1785,6 +1782,20 @@ static void memory_init_populate(running_machine *machine)
space_map_range_private(space, ROW_WRITE, bits, entry->write_mask, entry->addrstart, entry->addrend, entry->addrmask, entry->addrmirror, handler, (void *)port, entry->write_porttag); space_map_range_private(space, ROW_WRITE, bits, entry->write_mask, entry->addrstart, entry->addrend, entry->addrmask, entry->addrmirror, handler, (void *)port, entry->write_porttag);
} }
/* if we have a read bank tag, look it up */
if (entry->read_banktag != NULL)
{
void *handler = bank_find_or_allocate(space, entry->read_banktag, entry->addrstart, entry->addrend, ROW_READ);
space_map_range_private(space, ROW_READ, space->dbits, entry->read_mask, entry->addrstart, entry->addrend, entry->addrmask, entry->addrmirror, handler, space, entry->read_banktag);
}
/* if we have a write bank tag, look it up */
if (entry->write_banktag != NULL)
{
void *handler = bank_find_or_allocate(space, entry->write_banktag, entry->addrstart, entry->addrend, ROW_WRITE);
space_map_range_private(space, ROW_WRITE, space->dbits, entry->write_mask, entry->addrstart, entry->addrend, entry->addrmask, entry->addrmirror, handler, space, entry->write_banktag);
}
/* install the read handler if present */ /* install the read handler if present */
if (rhandler.generic != NULL) if (rhandler.generic != NULL)
{ {
@ -1907,7 +1918,7 @@ static void memory_init_locate(running_machine *machine)
{ {
memory_private *memdata = machine->memory_data; memory_private *memdata = machine->memory_data;
address_space *space; address_space *space;
int banknum; bank_info *bank;
/* loop over valid address spaces */ /* loop over valid address spaces */
for (space = (address_space *)memdata->spacelist; space != NULL; space = (address_space *)space->next) for (space = (address_space *)memdata->spacelist; space != NULL; space = (address_space *)space->next)
@ -1934,30 +1945,26 @@ static void memory_init_locate(running_machine *machine)
} }
/* once this is done, find the starting bases for the banks */ /* once this is done, find the starting bases for the banks */
for (banknum = 1; banknum <= MAX_BANKS; banknum++) for (bank = memdata->banklist; bank != NULL; bank = bank->next)
{ {
bank_info *bank = &memdata->bankdata[banknum]; address_map_entry *entry;
if (bank->used) bank_reference *ref;
{ int foundit = FALSE;
address_map_entry *entry;
bank_reference *ref;
int foundit = FALSE;
/* set the initial bank pointer */ /* set the initial bank pointer */
for (ref = bank->reflist; !foundit && ref != NULL; ref = ref->next) for (ref = bank->reflist; !foundit && ref != NULL; ref = ref->next)
for (entry = ref->space->map->entrylist; entry != NULL; entry = entry->next) for (entry = ref->space->map->entrylist; entry != NULL; entry = entry->next)
if (entry->bytestart == bank->bytestart) if (entry->bytestart == bank->bytestart && entry->memory != NULL)
{ {
memdata->bank_ptr[banknum] = (UINT8 *)entry->memory; memdata->bank_ptr[bank->index] = (UINT8 *)entry->memory;
foundit = TRUE; foundit = TRUE;
VPRINTF(("assigned bank %d pointer to memory from range %08X-%08X [%p]\n", banknum, entry->addrstart, entry->addrend, entry->memory)); VPRINTF(("assigned bank '%s' pointer to memory from range %08X-%08X [%p]\n", bank->tag, entry->addrstart, entry->addrend, entry->memory));
break; break;
} }
/* if the entry was set ahead of time, override the automatically found pointer */ /* if the entry was set ahead of time, override the automatically found pointer */
if (!bank->dynamic && bank->curentry != MAX_BANK_ENTRIES) if (bank->tag[0] != '~' && bank->curentry != MAX_BANK_ENTRIES)
memdata->bank_ptr[banknum] = (UINT8 *)bank->entry[bank->curentry]; memdata->bank_ptr[bank->index] = (UINT8 *)bank->entry[bank->curentry];
}
} }
/* request a callback to fix up the banks when done */ /* request a callback to fix up the banks when done */
@ -1973,7 +1980,6 @@ static void memory_exit(running_machine *machine)
{ {
memory_private *memdata = machine->memory_data; memory_private *memdata = machine->memory_data;
address_space *space, *nextspace; address_space *space, *nextspace;
int banknum;
/* free the memory blocks */ /* free the memory blocks */
while (memdata->memory_block_list != NULL) while (memdata->memory_block_list != NULL)
@ -1983,16 +1989,21 @@ static void memory_exit(running_machine *machine)
free(block); free(block);
} }
/* free all the bank references */ /* free banks */
for (banknum = 0; banknum < STATIC_COUNT; banknum++) while (memdata->banklist != NULL)
{ {
bank_info *bank = &memdata->bankdata[banknum]; bank_info *bank = memdata->banklist;
/* free references within each bank */
while (bank->reflist != NULL) while (bank->reflist != NULL)
{ {
bank_reference *ref = bank->reflist; bank_reference *ref = bank->reflist;
bank->reflist = ref->next; bank->reflist = ref->next;
free(ref); free(ref);
} }
memdata->banklist = bank->next;
free(bank);
} }
/* free all the address spaces and tables */ /* free all the address spaces and tables */
@ -2029,6 +2040,12 @@ static void memory_exit(running_machine *machine)
free(space); free(space);
} }
/* free the maps */
if (memdata->bankmap != NULL)
tagmap_free(memdata->bankmap);
if (memdata->sharemap != NULL)
tagmap_free(memdata->sharemap);
} }
@ -2184,6 +2201,16 @@ static void map_detokenize(address_map *map, const game_driver *driver, const ch
entry->write_porttag = TOKEN_GET_STRING(tokens); entry->write_porttag = TOKEN_GET_STRING(tokens);
break; break;
case ADDRMAP_TOKEN_READ_BANK:
check_entry_field(read_banktag);
entry->read_banktag = TOKEN_GET_STRING(tokens);
break;
case ADDRMAP_TOKEN_WRITE_BANK:
check_entry_field(write_banktag);
entry->write_banktag = TOKEN_GET_STRING(tokens);
break;
case ADDRMAP_TOKEN_REGION: case ADDRMAP_TOKEN_REGION:
check_entry_field(region); check_entry_field(region);
TOKEN_UNGET_UINT32(tokens); TOKEN_UNGET_UINT32(tokens);
@ -2276,7 +2303,7 @@ static void space_map_range_private(address_space *space, read_or_write readorwr
adjust_addresses(space, &bytestart, &byteend, &bytemask, &bytemirror); adjust_addresses(space, &bytestart, &byteend, &bytemask, &bytemirror);
/* assign a bank to the adjusted addresses */ /* assign a bank to the adjusted addresses */
handler = (genf *)bank_assign_dynamic(space, readorwrite, bytestart, byteend); handler = bank_find_or_allocate(space, NULL, bytestart, byteend, readorwrite);
if (memdata->bank_ptr[HANDLER_TO_BANK(handler)] == NULL) if (memdata->bank_ptr[HANDLER_TO_BANK(handler)] == NULL)
memdata->bank_ptr[HANDLER_TO_BANK(handler)] = (UINT8 *)space_find_backing_memory(space, bytestart); memdata->bank_ptr[HANDLER_TO_BANK(handler)] = (UINT8 *)space_find_backing_memory(space, bytestart);
} }
@ -2319,10 +2346,6 @@ static void space_map_range(address_space *space, read_or_write readorwrite, int
assert_always((bytestart & (space->dbits / 8 - 1)) == 0, "space_map_range called with misaligned start address"); assert_always((bytestart & (space->dbits / 8 - 1)) == 0, "space_map_range called with misaligned start address");
assert_always((byteend & (space->dbits / 8 - 1)) == (space->dbits / 8 - 1), "space_map_range called with misaligned end address"); assert_always((byteend & (space->dbits / 8 - 1)) == (space->dbits / 8 - 1), "space_map_range called with misaligned end address");
/* if we're installing a new bank, make sure we mark it */
if (HANDLER_IS_BANK(handler))
bank_assign_static(HANDLER_TO_BANK(handler), space, readorwrite, bytestart, byteend);
/* get the final handler index */ /* get the final handler index */
entry = table_assign_handler(space, tabledata->handlers, object, handler, handler_name, bytestart, byteend, bytemask); entry = table_assign_handler(space, tabledata->handlers, object, handler, handler_name, bytestart, byteend, bytemask);
@ -2395,32 +2418,20 @@ static void *space_find_backing_memory(const address_space *space, offs_t bytead
static int space_needs_backing_store(const address_space *space, const address_map_entry *entry) static int space_needs_backing_store(const address_space *space, const address_map_entry *entry)
{ {
FPTR handler; /* if we are asked to provide a base pointer, then yes, we do need backing */
if (entry->baseptr != NULL || entry->baseptroffs_plus1 != 0 || entry->genbaseptroffs_plus1 != 0) if (entry->baseptr != NULL || entry->baseptroffs_plus1 != 0 || entry->genbaseptroffs_plus1 != 0)
return TRUE; return TRUE;
handler = (FPTR)entry->write.generic; /* if we're writing to any sort of bank or RAM, then yes, we do need backing */
if (handler < STATIC_COUNT) if (entry->write_banktag != NULL || (FPTR)entry->write.generic == STATIC_RAM)
{ return TRUE;
if (handler != STATIC_INVALID &&
handler != STATIC_ROM &&
handler != STATIC_NOP &&
handler != STATIC_UNMAP)
return TRUE;
}
handler = (FPTR)entry->read.generic; /* if we're reading from RAM or from ROM outside of address space 0 or its region, then yes, we do need backing */
if (handler < STATIC_COUNT) if ((FPTR)entry->read.generic == STATIC_RAM ||
{ ((FPTR)entry->read.generic == STATIC_ROM && (space->spacenum != ADDRESS_SPACE_0 || entry->addrstart >= memory_region_length(space->machine, space->cpu->tag))))
if (handler != STATIC_INVALID && return TRUE;
(handler < STATIC_BANK1 || handler > STATIC_BANK1 + MAX_BANKS - 1) &&
(handler != STATIC_ROM || space->spacenum != ADDRESS_SPACE_0 || entry->addrstart >= memory_region_length(space->machine, space->cpu->tag)) &&
handler != STATIC_NOP &&
handler != STATIC_UNMAP)
return TRUE;
}
/* all other cases don't need backing */
return FALSE; return FALSE;
} }
@ -2431,66 +2442,89 @@ static int space_needs_backing_store(const address_space *space, const address_m
***************************************************************************/ ***************************************************************************/
/*------------------------------------------------- /*-------------------------------------------------
bank_assign_static - assign and tag a static bank_find_or_allocate - allocate a new
bank bank, or find an existing one, and return the
SMH_BANK(n) handler
-------------------------------------------------*/ -------------------------------------------------*/
static void bank_assign_static(int banknum, const address_space *space, read_or_write readorwrite, offs_t bytestart, offs_t byteend) void *bank_find_or_allocate(const address_space *space, const char *tag, offs_t bytestart, offs_t byteend, read_or_write readorwrite)
{ {
bank_info *bank = &space->machine->memory_data->bankdata[banknum]; memory_private *memdata = space->machine->memory_data;
bank_info *bank = NULL;
char temptag[10];
char name[30];
/* if we're not yet used, fill in the data */ /* if this bank is named, look it up */
if (!bank->used) if (tag != NULL)
bank = tagmap_find_hash_only(memdata->bankmap, tag);
/* else try to find an exact match */
else
{ {
/* if we're allowed to, wire up state saving for the entry */ for (bank = memdata->banklist; bank != NULL; bank = bank->next)
if (state_save_registration_allowed(space->machine)) if (bank->tag[0] == '~' && bank->bytestart == bytestart && bank->byteend == byteend && bank->reflist != NULL && bank->reflist->space == space)
state_save_register_item(space->machine, "memory", NULL, banknum, bank->curentry); break;
}
/* fill in information about the bank */ /* if we don't have a bank yet, find a free one */
bank->used = TRUE; if (bank == NULL)
bank->dynamic = FALSE; {
add_bank_reference(bank, space); int banknum = memdata->banknext++;
/* handle failure */
if (banknum > STATIC_BANKMAX)
{
if (tag != NULL)
fatalerror("Unable to allocate new bank '%s'", tag);
else
fatalerror("Unable to allocate bank for RAM/ROM area %X-%X\n", bytestart, byteend);
}
/* generate an internal tag if we don't have one */
if (tag == NULL)
{
sprintf(temptag, "~%d~", banknum);
tag = temptag;
sprintf(name, "Internal bank #%d", banknum);
}
else
sprintf(name, "Bank '%s'", tag);
/* allocate the bank */
bank = (bank_info *)alloc_array_clear_or_die(UINT8, sizeof(bank_info) + strlen(tag) + 1 + strlen(name));
/* populate it */
bank->index = banknum;
bank->handler = SMH_BANK(banknum);
bank->bytestart = bytestart; bank->bytestart = bytestart;
bank->byteend = byteend; bank->byteend = byteend;
bank->curentry = MAX_BANK_ENTRIES; bank->curentry = MAX_BANK_ENTRIES;
} strcpy(bank->tag, tag);
bank->name = bank->tag + strlen(tag) + 1;
strcpy(bank->name, name);
/* update the read/write status of the bank */ /* add us to the list */
if (readorwrite == ROW_READ) bank->next = memdata->banklist;
bank->read = TRUE; memdata->banklist = bank;
else
bank->write = TRUE;
}
/* for named banks, add to the map and register for save states */
/*------------------------------------------------- if (tag[0] != '~')
bank_assign_dynamic - finds a free or exact
matching bank
-------------------------------------------------*/
static genf *bank_assign_dynamic(const address_space *space, read_or_write readorwrite, offs_t bytestart, offs_t byteend)
{
int banknum;
/* loop over banks, searching for an exact match or an empty */
for (banknum = MAX_BANKS; banknum >= 1; banknum--)
{
bank_info *bank = &space->machine->memory_data->bankdata[banknum];
if (!bank->used || (bank->dynamic && bank_references_space(bank, space) && bank->bytestart == bytestart))
{ {
bank->used = TRUE; tagmap_add_unique_hash(memdata->bankmap, tag, bank);
bank->dynamic = TRUE; if (state_save_registration_allowed(space->machine))
add_bank_reference(bank, space); state_save_register_item(space->machine, "memory", bank->tag, 0, bank->curentry);
bank->bytestart = bytestart;
bank->byteend = byteend;
VPRINTF(("Assigned bank %d to '%s',%s,%08X\n", banknum, space->cpu->tag, space->name, bytestart));
return BANK_TO_HANDLER(banknum);
} }
} }
/* if we got here, we failed */ /* update the read/write state for this bank */
fatalerror("Device '%s': ran out of banks for RAM/ROM regions!", space->cpu->tag); if (readorwrite == ROW_READ)
return NULL; bank->read = TRUE;
if (readorwrite == ROW_WRITE)
bank->write = TRUE;
/* add a reference for this space */
add_bank_reference(bank, space);
return bank->handler;
} }
@ -2501,19 +2535,16 @@ static genf *bank_assign_dynamic(const address_space *space, read_or_write reado
static STATE_POSTLOAD( bank_reattach ) static STATE_POSTLOAD( bank_reattach )
{ {
memory_private *memdata = machine->memory_data; memory_private *memdata = machine->memory_data;
int banknum; bank_info *bank;
/* once this is done, find the starting bases for the banks */ /* once this is done, find the starting bases for the banks */
for (banknum = 1; banknum <= MAX_BANKS; banknum++) for (bank = memdata->banklist; bank != NULL; bank = bank->next)
{ if (bank->tag[0] != '~')
bank_info *bank = &memdata->bankdata[banknum];
if (bank->used && !bank->dynamic)
{ {
/* if this entry has a changed entry, set the appropriate pointer */ /* if this entry has a changed entry, set the appropriate pointer */
if (bank->curentry != MAX_BANK_ENTRIES) if (bank->curentry != MAX_BANK_ENTRIES)
memdata->bank_ptr[banknum] = (UINT8 *)bank->entry[bank->curentry]; memdata->bank_ptr[bank->index] = (UINT8 *)bank->entry[bank->curentry];
} }
}
} }
@ -3480,7 +3511,7 @@ static genf *get_static_handler(int handlerbits, int readorwrite, int which)
description of a handler description of a handler
-------------------------------------------------*/ -------------------------------------------------*/
static const char *handler_to_string(const address_table *table, UINT8 entry) static const char *handler_to_string(const address_space *space, const address_table *table, UINT8 entry)
{ {
static const char *const strings[] = static const char *const strings[] =
{ {
@ -3508,16 +3539,25 @@ static const char *handler_to_string(const address_table *table, UINT8 entry)
"bank 84", "bank 85", "bank 86", "bank 87", "bank 84", "bank 85", "bank 86", "bank 87",
"bank 88", "bank 89", "bank 90", "bank 91", "bank 88", "bank 89", "bank 90", "bank 91",
"bank 92", "bank 93", "bank 94", "bank 95", "bank 92", "bank 93", "bank 94", "bank 95",
"bank 96", "ram[97]", "ram[98]", "ram[99]", "bank 96", "bank 97", "bank 98", "bank 99",
"ram[100]", "ram[101]", "ram[102]", "ram[103]", "bank 100", "bank 101", "bank 102", "bank 103",
"ram[104]", "ram[105]", "ram[106]", "ram[107]", "bank 104", "bank 105", "bank 106", "bank 107",
"ram[108]", "ram[109]", "ram[110]", "ram[111]", "bank 108", "bank 109", "bank 110", "bank 111",
"ram[112]", "ram[113]", "ram[114]", "ram[115]", "bank 112", "bank 113", "bank 114", "bank 115",
"ram[116]", "ram[117]", "ram[118]", "ram[119]", "bank 116", "bank 117", "bank 118", "bank 119",
"ram[120]", "ram[121]", "ram[122]", "ram", "bank 120", "bank 121", "bank 122", "ram",
"rom", "nop", "unmapped", "watchpoint" "rom", "nop", "unmapped", "watchpoint"
}; };
/* banks have names */
if (entry >= STATIC_BANK1 && entry <= STATIC_BANKMAX)
{
bank_info *info;
for (info = space->machine->memory_data->banklist; info != NULL; info = info->next)
if (info->index == entry)
return info->name;
}
/* constant strings for lower entries */ /* constant strings for lower entries */
if (entry < STATIC_COUNT) if (entry < STATIC_COUNT)
return strings[entry]; return strings[entry];
@ -3548,7 +3588,7 @@ static void dump_map(FILE *file, const address_space *space, const address_table
{ {
UINT8 entry = table_derive_range(table, byteaddress, &bytestart, &byteend); UINT8 entry = table_derive_range(table, byteaddress, &bytestart, &byteend);
fprintf(file, "%08X-%08X = %02X: %s [offset=%08X]\n", fprintf(file, "%08X-%08X = %02X: %s [offset=%08X]\n",
bytestart, byteend, entry, handler_to_string(table, entry), table->handlers[entry]->bytestart); bytestart, byteend, entry, handler_to_string(space, table, entry), table->handlers[entry]->bytestart);
} }
} }

38
src/emu/memory.h
View File

@ -73,6 +73,8 @@ enum
ADDRMAP_TOKEN_DEVICE_WRITE, ADDRMAP_TOKEN_DEVICE_WRITE,
ADDRMAP_TOKEN_READ_PORT, ADDRMAP_TOKEN_READ_PORT,
ADDRMAP_TOKEN_WRITE_PORT, ADDRMAP_TOKEN_WRITE_PORT,
ADDRMAP_TOKEN_READ_BANK,
ADDRMAP_TOKEN_WRITE_BANK,
ADDRMAP_TOKEN_REGION, ADDRMAP_TOKEN_REGION,
ADDRMAP_TOKEN_SHARE, ADDRMAP_TOKEN_SHARE,
ADDRMAP_TOKEN_BASEPTR, ADDRMAP_TOKEN_BASEPTR,
@ -229,6 +231,8 @@ struct _address_map_entry
const char * read_devtag; /* read tag for the relevant device */ const char * read_devtag; /* read tag for the relevant device */
const char * read_porttag; /* tag for input port reading */ const char * read_porttag; /* tag for input port reading */
const char * write_porttag; /* tag for output port writing */ const char * write_porttag; /* tag for output port writing */
const char * read_banktag; /* tag for bank reading */
const char * write_banktag; /* tag for bank writing */
write_handler write; /* write handler callback */ write_handler write; /* write handler callback */
UINT8 write_bits; /* bits for the write handler callback (0=default, 1=8, 2=16, 3=32) */ UINT8 write_bits; /* bits for the write handler callback (0=default, 1=8, 2=16, 3=32) */
UINT8 write_mask; /* mask bits indicating which subunits to process */ UINT8 write_mask; /* mask bits indicating which subunits to process */
@ -502,6 +506,8 @@ union _addrmap64_token
#define memory_install_read_port_handler(space, start, end, mask, mirror, rtag) \ #define memory_install_read_port_handler(space, start, end, mask, mirror, rtag) \
_memory_install_port_handler(space, start, end, mask, mirror, rtag, NULL) _memory_install_port_handler(space, start, end, mask, mirror, rtag, NULL)
#define memory_install_read_bank_handler(space, start, end, mask, mirror, rtag) \
_memory_install_bank_handler(space, start, end, mask, mirror, rtag, NULL)
/* wrappers for dynamic write handler installation */ /* wrappers for dynamic write handler installation */
#define memory_install_write_handler(space, start, end, mask, mirror, whandler) \ #define memory_install_write_handler(space, start, end, mask, mirror, whandler) \
@ -528,6 +534,8 @@ union _addrmap64_token
#define memory_install_write_port_handler(space, start, end, mask, mirror, wtag) \ #define memory_install_write_port_handler(space, start, end, mask, mirror, wtag) \
_memory_install_port_handler(space, start, end, mask, mirror, NULL, wtag) _memory_install_port_handler(space, start, end, mask, mirror, NULL, wtag)
#define memory_install_write_bank_handler(space, start, end, mask, mirror, wtag) \
_memory_install_bank_handler(space, start, end, mask, mirror, NULL, wtag)
/* wrappers for dynamic read/write handler installation */ /* wrappers for dynamic read/write handler installation */
#define memory_install_readwrite_handler(space, start, end, mask, mirror, rhandler, whandler) \ #define memory_install_readwrite_handler(space, start, end, mask, mirror, rhandler, whandler) \
@ -554,6 +562,8 @@ union _addrmap64_token
#define memory_install_readwrite_port_handler(space, start, end, mask, mirror, rtag, wtag) \ #define memory_install_readwrite_port_handler(space, start, end, mask, mirror, rtag, wtag) \
_memory_install_port_handler(space, start, end, mask, mirror, rtag, wtag) _memory_install_port_handler(space, start, end, mask, mirror, rtag, wtag)
#define memory_install_readwrite_bank_handler(space, start, end, mask, mirror, tag) \
_memory_install_bank_handler(space, start, end, mask, mirror, tag, tag)
/* macros for accessing bytes and words within larger chunks */ /* macros for accessing bytes and words within larger chunks */
@ -755,6 +765,14 @@ union _addrmap64_token
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_WRITE_PORT, 8, 0, 8, 0, 8), \ TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_WRITE_PORT, 8, 0, 8, 0, 8), \
TOKEN_STRING(_tag), TOKEN_STRING(_tag),
#define AM_READ_BANK(_tag) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_READ_BANK, 8, 0, 8, 0, 8), \
TOKEN_STRING(_tag),
#define AM_WRITE_BANK(_tag) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_WRITE_BANK, 8, 0, 8, 0, 8), \
TOKEN_STRING(_tag),
#define AM_REGION(_tag, _offs) \ #define AM_REGION(_tag, _offs) \
TOKEN_UINT64_PACK2(ADDRMAP_TOKEN_REGION, 8, _offs, 32), \ TOKEN_UINT64_PACK2(ADDRMAP_TOKEN_REGION, 8, _offs, 32), \
TOKEN_STRING(_tag), TOKEN_STRING(_tag),
@ -795,10 +813,10 @@ union _addrmap64_token
#define AM_DEVREADWRITE32(_tag,_read,_write,_mask) AM_DEVREAD32(_tag,_read,_mask) AM_DEVWRITE32(_tag,_write,_mask) #define AM_DEVREADWRITE32(_tag,_read,_write,_mask) AM_DEVREAD32(_tag,_read,_mask) AM_DEVWRITE32(_tag,_write,_mask)
#define AM_ROM AM_READ(SMH_ROM) #define AM_ROM AM_READ(SMH_ROM)
#define AM_ROMBANK(_bank) AM_READ(SMH_BANK(_bank)) #define AM_ROMBANK(_bank) AM_READ_BANK(_bank)
#define AM_RAM AM_READWRITE(SMH_RAM, SMH_RAM) #define AM_RAM AM_READWRITE(SMH_RAM, SMH_RAM)
#define AM_RAMBANK(_bank) AM_READWRITE(SMH_BANK(_bank), SMH_BANK(_bank)) #define AM_RAMBANK(_bank) AM_READ_BANK(_bank) AM_WRITE_BANK(_bank)
#define AM_RAM_WRITE(_write) AM_READWRITE(SMH_RAM, _write) #define AM_RAM_WRITE(_write) AM_READWRITE(SMH_RAM, _write)
#define AM_WRITEONLY AM_WRITE(SMH_RAM) #define AM_WRITEONLY AM_WRITE(SMH_RAM)
@ -867,22 +885,19 @@ void *memory_get_write_ptr(const address_space *space, offs_t byteaddress) ATTR_
/* ----- memory banking ----- */ /* ----- memory banking ----- */
/* configure the addresses for a bank */ /* configure the addresses for a bank */
void memory_configure_bank(running_machine *machine, int banknum, int startentry, int numentries, void *base, offs_t stride) ATTR_NONNULL(1, 5); void memory_configure_bank(running_machine *machine, const char *tag, int startentry, int numentries, void *base, offs_t stride) ATTR_NONNULL(1, 5);
/* configure the decrypted addresses for a bank */ /* configure the decrypted addresses for a bank */
void memory_configure_bank_decrypted(running_machine *machine, int banknum, int startentry, int numentries, void *base, offs_t stride) ATTR_NONNULL(1, 5); void memory_configure_bank_decrypted(running_machine *machine, const char *tag, int startentry, int numentries, void *base, offs_t stride) ATTR_NONNULL(1, 5);
/* select one pre-configured entry to be the new bank base */ /* select one pre-configured entry to be the new bank base */
void memory_set_bank(running_machine *machine, int banknum, int entrynum) ATTR_NONNULL(1); void memory_set_bank(running_machine *machine, const char *tag, int entrynum) ATTR_NONNULL(1);
/* return the currently selected bank */ /* return the currently selected bank */
int memory_get_bank(running_machine *machine, int banknum) ATTR_NONNULL(1); int memory_get_bank(running_machine *machine, const char *tag) ATTR_NONNULL(1);
/* set the absolute address of a bank base */ /* set the absolute address of a bank base */
void memory_set_bankptr(running_machine *machine, int banknum, void *base) ATTR_NONNULL(1, 3); void memory_set_bankptr(running_machine *machine, const char *tag, void *base) ATTR_NONNULL(1, 3);
/* return the index of an unused bank */
int memory_find_unused_bank(running_machine *machine) ATTR_NONNULL(1);
@ -921,6 +936,9 @@ UINT64 *_memory_install_device_handler64(const address_space *space, const devic
/* install a new port handler into the given address space */ /* install a new port handler into the given address space */
void _memory_install_port_handler(const address_space *space, offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, const char *rtag, const char *wtag) ATTR_NONNULL(1); void _memory_install_port_handler(const address_space *space, offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, const char *rtag, const char *wtag) ATTR_NONNULL(1);
/* install a new bank handler into the given address space */
void _memory_install_bank_handler(const address_space *space, offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, const char *rtag, const char *wtag) ATTR_NONNULL(1);
/* ----- debugger helpers ----- */ /* ----- debugger helpers ----- */

17
src/emu/sound/okim6295.c
View File

@ -50,7 +50,7 @@ struct _okim6295_state
struct ADPCMVoice voice[OKIM6295_VOICES]; struct ADPCMVoice voice[OKIM6295_VOICES];
const device_config *device; const device_config *device;
INT32 command; INT32 command;
INT32 bank_num; UINT8 bank_installed;
INT32 bank_offs; INT32 bank_offs;
sound_stream *stream; /* which stream are we playing on? */ sound_stream *stream; /* which stream are we playing on? */
UINT32 master_clock; /* master clock frequency */ UINT32 master_clock; /* master clock frequency */
@ -352,7 +352,7 @@ static DEVICE_START( okim6295 )
compute_tables(); compute_tables();
info->command = -1; info->command = -1;
info->bank_num = -1; info->bank_installed = FALSE;
info->bank_offs = 0; info->bank_offs = 0;
info->device = device; info->device = device;
@ -404,21 +404,18 @@ void okim6295_set_bank_base(const device_config *device, int base)
stream_update(info->stream); stream_update(info->stream);
/* if we are setting a non-zero base, and we have no bank, allocate one */ /* if we are setting a non-zero base, and we have no bank, allocate one */
if (info->bank_num == -1 && base != 0) if (!info->bank_installed && base != 0)
{ {
info->bank_num = memory_find_unused_bank(device->machine);
if (info->bank_num == -1)
fatalerror("Unable to allocate bank for oki6295 device '%s'", device->tag);
/* override our memory map with a bank */ /* override our memory map with a bank */
memory_install_read8_handler(device->space[0], 0x00000, 0x3ffff, 0, 0, (read8_space_func)SMH_BANK(info->bank_num)); memory_install_read_bank_handler(device->space[0], 0x00000, 0x3ffff, 0, 0, device->tag);
info->bank_installed = TRUE;
} }
/* if we have a bank number, set the base pointer */ /* if we have a bank number, set the base pointer */
if (info->bank_num != -1) if (info->bank_installed)
{ {
info->bank_offs = base; info->bank_offs = base;
memory_set_bankptr(device->machine, info->bank_num, device->region + base); memory_set_bankptr(device->machine, device->tag, device->region + base);
} }
} }

27
src/mame/audio/atarijsa.c
View File

@ -82,13 +82,13 @@ static WRITE8_HANDLER( jsa3_io_w );
*************************************/ *************************************/
static ADDRESS_MAP_START( jsa3_oki_map, 0, 8 ) static ADDRESS_MAP_START( jsa3_oki_map, 0, 8 )
AM_RANGE(0x00000, 0x1ffff) AM_ROMBANK(12) AM_RANGE(0x00000, 0x1ffff) AM_ROMBANK("bank12")
AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK(13) AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("bank13")
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( jsa3_oki2_map, 0, 8 ) static ADDRESS_MAP_START( jsa3_oki2_map, 0, 8 )
AM_RANGE(0x00000, 0x1ffff) AM_ROMBANK(14) AM_RANGE(0x00000, 0x1ffff) AM_ROMBANK("bank14")
AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK(15) AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("bank15")
ADDRESS_MAP_END ADDRESS_MAP_END
@ -161,10 +161,11 @@ void atarijsa_init(running_machine *machine, const char *testport, int testmask)
UINT8 *base = memory_region(machine, regions[rgn]); UINT8 *base = memory_region(machine, regions[rgn]);
if (base != NULL && memory_region_length(machine, regions[rgn]) >= 0x80000) if (base != NULL && memory_region_length(machine, regions[rgn]) >= 0x80000)
{ {
int banknum = (rgn != 2) ? 12 : 14; const char *bank = (rgn != 2) ? "bank12" : "bank14";
memory_configure_bank(machine, banknum, 0, 2, base + 0x00000, 0x00000); const char *bank_plus_1 = (rgn != 2) ? "bank13" : "bank15";
memory_configure_bank(machine, banknum, 2, 2, base + 0x20000, 0x20000); memory_configure_bank(machine, bank, 0, 2, base + 0x00000, 0x00000);
memory_set_bankptr(machine, banknum + 1, base + 0x60000); memory_configure_bank(machine, bank, 2, 2, base + 0x20000, 0x20000);
memory_set_bankptr(machine, bank_plus_1, base + 0x60000);
} }
} }
} }
@ -531,7 +532,7 @@ static WRITE8_HANDLER( jsa3_io_w )
/* update the OKI bank */ /* update the OKI bank */
if (oki6295 != NULL) if (oki6295 != NULL)
memory_set_bank(space->machine, 12, (memory_get_bank(space->machine, 12) & 2) | ((data >> 1) & 1)); memory_set_bank(space->machine, "bank12", (memory_get_bank(space->machine, "bank12") & 2) | ((data >> 1) & 1));
/* update the bank */ /* update the bank */
memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000); memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000);
@ -556,7 +557,7 @@ static WRITE8_HANDLER( jsa3_io_w )
/* update the OKI bank */ /* update the OKI bank */
if (oki6295 != NULL) if (oki6295 != NULL)
memory_set_bank(space->machine, 12, (memory_get_bank(space->machine, 12) & 1) | ((data >> 3) & 2)); memory_set_bank(space->machine, "bank12", (memory_get_bank(space->machine, "bank12") & 1) | ((data >> 3) & 2));
/* update the volumes */ /* update the volumes */
ym2151_volume = ((data >> 1) & 7) * 100 / 7; ym2151_volume = ((data >> 1) & 7) * 100 / 7;
@ -661,7 +662,7 @@ static WRITE8_HANDLER( jsa3s_io_w )
*/ */
/* update the OKI bank */ /* update the OKI bank */
memory_set_bank(space->machine, 12, (memory_get_bank(space->machine, 12) & 2) | ((data >> 1) & 1)); memory_set_bank(space->machine, "bank12", (memory_get_bank(space->machine, "bank12") & 2) | ((data >> 1) & 1));
/* update the bank */ /* update the bank */
memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000); memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000);
@ -686,8 +687,8 @@ static WRITE8_HANDLER( jsa3s_io_w )
*/ */
/* update the OKI bank */ /* update the OKI bank */
memory_set_bank(space->machine, 12, (memory_get_bank(space->machine, 12) & 1) | ((data >> 3) & 2)); memory_set_bank(space->machine, "bank12", (memory_get_bank(space->machine, "bank12") & 1) | ((data >> 3) & 2));
memory_set_bank(space->machine, 14, data >> 6); memory_set_bank(space->machine, "bank14", data >> 6);
/* update the volumes */ /* update the volumes */
ym2151_volume = ((data >> 1) & 7) * 100 / 7; ym2151_volume = ((data >> 1) & 7) * 100 / 7;

12
src/mame/audio/cage.c
View File

@ -160,8 +160,8 @@ void cage_init(running_machine *machine, offs_t speedup)
cage_irqhandler = NULL; cage_irqhandler = NULL;
memory_set_bankptr(machine, 10, memory_region(machine, "cageboot")); memory_set_bankptr(machine, "bank10", memory_region(machine, "cageboot"));
memory_set_bankptr(machine, 11, memory_region(machine, "cage")); memory_set_bankptr(machine, "bank11", memory_region(machine, "cage"));
cage_cpu = cputag_get_cpu(machine, "cage"); cage_cpu = cputag_get_cpu(machine, "cage");
cage_cpu_clock_period = ATTOTIME_IN_HZ(cpu_get_clock(cage_cpu)); cage_cpu_clock_period = ATTOTIME_IN_HZ(cpu_get_clock(cage_cpu));
@ -619,24 +619,24 @@ static const tms32031_config cage_config =
static ADDRESS_MAP_START( cage_map, ADDRESS_SPACE_PROGRAM, 32 ) static ADDRESS_MAP_START( cage_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x000000, 0x00ffff) AM_RAM AM_RANGE(0x000000, 0x00ffff) AM_RAM
AM_RANGE(0x200000, 0x200000) AM_WRITENOP AM_RANGE(0x200000, 0x200000) AM_WRITENOP
AM_RANGE(0x400000, 0x47ffff) AM_ROMBANK(10) AM_RANGE(0x400000, 0x47ffff) AM_ROMBANK("bank10")
AM_RANGE(0x808000, 0x8080ff) AM_READWRITE(tms32031_io_r, tms32031_io_w) AM_BASE(&tms32031_io_regs) AM_RANGE(0x808000, 0x8080ff) AM_READWRITE(tms32031_io_r, tms32031_io_w) AM_BASE(&tms32031_io_regs)
AM_RANGE(0x809800, 0x809fff) AM_RAM AM_RANGE(0x809800, 0x809fff) AM_RAM
AM_RANGE(0xa00000, 0xa00000) AM_READWRITE(cage_from_main_r, cage_to_main_w) AM_RANGE(0xa00000, 0xa00000) AM_READWRITE(cage_from_main_r, cage_to_main_w)
AM_RANGE(0xc00000, 0xffffff) AM_ROMBANK(11) AM_RANGE(0xc00000, 0xffffff) AM_ROMBANK("bank11")
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( cage_map_seattle, ADDRESS_SPACE_PROGRAM, 32 ) static ADDRESS_MAP_START( cage_map_seattle, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x000000, 0x00ffff) AM_RAM AM_RANGE(0x000000, 0x00ffff) AM_RAM
AM_RANGE(0x200000, 0x200000) AM_WRITENOP AM_RANGE(0x200000, 0x200000) AM_WRITENOP
AM_RANGE(0x400000, 0x47ffff) AM_ROMBANK(10) AM_RANGE(0x400000, 0x47ffff) AM_ROMBANK("bank10")
AM_RANGE(0x808000, 0x8080ff) AM_READWRITE(tms32031_io_r, tms32031_io_w) AM_BASE(&tms32031_io_regs) AM_RANGE(0x808000, 0x8080ff) AM_READWRITE(tms32031_io_r, tms32031_io_w) AM_BASE(&tms32031_io_regs)
AM_RANGE(0x809800, 0x809fff) AM_RAM AM_RANGE(0x809800, 0x809fff) AM_RAM
AM_RANGE(0xa00000, 0xa00000) AM_READWRITE(cage_from_main_r, cage_from_main_ack_w) AM_RANGE(0xa00000, 0xa00000) AM_READWRITE(cage_from_main_r, cage_from_main_ack_w)
AM_RANGE(0xa00001, 0xa00001) AM_WRITE(cage_to_main_w) AM_RANGE(0xa00001, 0xa00001) AM_WRITE(cage_to_main_w)
AM_RANGE(0xa00003, 0xa00003) AM_READ(cage_io_status_r) AM_RANGE(0xa00003, 0xa00003) AM_READ(cage_io_status_r)
AM_RANGE(0xc00000, 0xffffff) AM_ROMBANK(11) AM_RANGE(0xc00000, 0xffffff) AM_ROMBANK("bank11")
ADDRESS_MAP_END ADDRESS_MAP_END

4
src/mame/audio/cyberbal.c
View File

@ -25,7 +25,7 @@ void cyberbal_sound_reset(running_machine *machine)
{ {
/* reset the sound system */ /* reset the sound system */
bank_base = &memory_region(machine, "audiocpu")[0x10000]; bank_base = &memory_region(machine, "audiocpu")[0x10000];
memory_set_bankptr(machine, 8, &bank_base[0x0000]); memory_set_bankptr(machine, "bank8", &bank_base[0x0000]);
fast_68k_int = io_68k_int = 0; fast_68k_int = io_68k_int = 0;
sound_data_from_68k = sound_data_from_6502 = 0; sound_data_from_68k = sound_data_from_6502 = 0;
sound_data_from_68k_ready = sound_data_from_6502_ready = 0; sound_data_from_68k_ready = sound_data_from_6502_ready = 0;
@ -60,7 +60,7 @@ READ8_HANDLER( cyberbal_sound_6502_stat_r )
WRITE8_HANDLER( cyberbal_sound_bank_select_w ) WRITE8_HANDLER( cyberbal_sound_bank_select_w )
{ {
memory_set_bankptr(space->machine, 8, &bank_base[0x1000 * ((data >> 6) & 3)]); memory_set_bankptr(space->machine, "bank8", &bank_base[0x1000 * ((data >> 6) & 3)]);
coin_counter_w(space->machine, 1, (data >> 5) & 1); coin_counter_w(space->machine, 1, (data >> 5) & 1);
coin_counter_w(space->machine, 0, (data >> 4) & 1); coin_counter_w(space->machine, 0, (data >> 4) & 1);
cputag_set_input_line(space->machine, "dac", INPUT_LINE_RESET, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE); cputag_set_input_line(space->machine, "dac", INPUT_LINE_RESET, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);

56
src/mame/audio/dcs.c
View File

@ -440,7 +440,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dcs_2k_data_map, ADDRESS_SPACE_DATA, 16 ) static ADDRESS_MAP_START( dcs_2k_data_map, ADDRESS_SPACE_DATA, 16 )
AM_RANGE(0x0000, 0x07ff) AM_MIRROR(0x1800) AM_READWRITE(dcs_dataram_r, dcs_dataram_w) AM_RANGE(0x0000, 0x07ff) AM_MIRROR(0x1800) AM_READWRITE(dcs_dataram_r, dcs_dataram_w)
AM_RANGE(0x2000, 0x2fff) AM_ROMBANK(20) AM_RANGE(0x2000, 0x2fff) AM_ROMBANK("bank20")
AM_RANGE(0x3000, 0x33ff) AM_WRITE(dcs_data_bank_select_w) AM_RANGE(0x3000, 0x33ff) AM_WRITE(dcs_data_bank_select_w)
AM_RANGE(0x3400, 0x37ff) AM_READWRITE(input_latch_r, output_latch_w) AM_RANGE(0x3400, 0x37ff) AM_READWRITE(input_latch_r, output_latch_w)
AM_RANGE(0x3800, 0x39ff) AM_RAM AM_RANGE(0x3800, 0x39ff) AM_RAM
@ -451,7 +451,7 @@ ADDRESS_MAP_END
/* DCS 2k with UART memory map */ /* DCS 2k with UART memory map */
static ADDRESS_MAP_START( dcs_2k_uart_data_map, ADDRESS_SPACE_DATA, 16 ) static ADDRESS_MAP_START( dcs_2k_uart_data_map, ADDRESS_SPACE_DATA, 16 )
AM_RANGE(0x0000, 0x07ff) AM_MIRROR(0x1800) AM_READWRITE(dcs_dataram_r, dcs_dataram_w) AM_RANGE(0x0000, 0x07ff) AM_MIRROR(0x1800) AM_READWRITE(dcs_dataram_r, dcs_dataram_w)
AM_RANGE(0x2000, 0x2fff) AM_ROMBANK(20) AM_RANGE(0x2000, 0x2fff) AM_ROMBANK("bank20")
AM_RANGE(0x3000, 0x33ff) AM_WRITE(dcs_data_bank_select_w) AM_RANGE(0x3000, 0x33ff) AM_WRITE(dcs_data_bank_select_w)
AM_RANGE(0x3400, 0x3402) AM_NOP /* UART (ignored) */ AM_RANGE(0x3400, 0x3402) AM_NOP /* UART (ignored) */
AM_RANGE(0x3403, 0x3403) AM_READWRITE(input_latch_r, output_latch_w) AM_RANGE(0x3403, 0x3403) AM_READWRITE(input_latch_r, output_latch_w)
@ -470,7 +470,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dcs_8k_data_map, ADDRESS_SPACE_DATA, 16 ) static ADDRESS_MAP_START( dcs_8k_data_map, ADDRESS_SPACE_DATA, 16 )
AM_RANGE(0x0000, 0x07ff) AM_RAM AM_RANGE(0x0000, 0x07ff) AM_RAM
AM_RANGE(0x0800, 0x1fff) AM_READWRITE(dcs_dataram_r, dcs_dataram_w) AM_RANGE(0x0800, 0x1fff) AM_READWRITE(dcs_dataram_r, dcs_dataram_w)
AM_RANGE(0x2000, 0x2fff) AM_ROMBANK(20) AM_RANGE(0x2000, 0x2fff) AM_ROMBANK("bank20")
AM_RANGE(0x3000, 0x33ff) AM_WRITE(dcs_data_bank_select_w) AM_RANGE(0x3000, 0x33ff) AM_WRITE(dcs_data_bank_select_w)
AM_RANGE(0x3400, 0x37ff) AM_READWRITE(input_latch_r, output_latch_w) AM_RANGE(0x3400, 0x37ff) AM_READWRITE(input_latch_r, output_latch_w)
AM_RANGE(0x3800, 0x39ff) AM_RAM AM_RANGE(0x3800, 0x39ff) AM_RAM
@ -536,7 +536,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dsio_data_map, ADDRESS_SPACE_DATA, 16 ) static ADDRESS_MAP_START( dsio_data_map, ADDRESS_SPACE_DATA, 16 )
ADDRESS_MAP_UNMAP_HIGH ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x03ff) AM_RAMBANK(20) AM_RANGE(0x0000, 0x03ff) AM_RAMBANK("bank20")
AM_RANGE(0x0400, 0x3fdf) AM_RAM AM_RANGE(0x0400, 0x3fdf) AM_RAM
AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w) AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -568,7 +568,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( denver_data_map, ADDRESS_SPACE_DATA, 16 ) static ADDRESS_MAP_START( denver_data_map, ADDRESS_SPACE_DATA, 16 )
ADDRESS_MAP_UNMAP_HIGH ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x07ff) AM_RAMBANK(20) AM_RANGE(0x0000, 0x07ff) AM_RAMBANK("bank20")
AM_RANGE(0x0800, 0x3fdf) AM_RAM AM_RANGE(0x0800, 0x3fdf) AM_RAM
AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w) AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -809,7 +809,7 @@ static TIMER_CALLBACK( dcs_reset )
/* rev 1: just reset the bank to 0 */ /* rev 1: just reset the bank to 0 */
case 1: case 1:
dcs.sounddata_bank = 0; dcs.sounddata_bank = 0;
memory_set_bank(machine, 20, 0); memory_set_bank(machine, "bank20", 0);
break; break;
/* rev 2: reset the SDRC ASIC */ /* rev 2: reset the SDRC ASIC */
@ -945,7 +945,7 @@ void dcs_init(running_machine *machine)
dcs.sounddata = dcs.bootrom; dcs.sounddata = dcs.bootrom;
dcs.sounddata_words = dcs.bootrom_words; dcs.sounddata_words = dcs.bootrom_words;
dcs.sounddata_banks = dcs.sounddata_words / 0x1000; dcs.sounddata_banks = dcs.sounddata_words / 0x1000;
memory_configure_bank(machine, 20, 0, dcs.sounddata_banks, dcs.sounddata, 0x1000*2); memory_configure_bank(machine, "bank20", 0, dcs.sounddata_banks, dcs.sounddata, 0x1000*2);
/* create the timers */ /* create the timers */
dcs.internal_timer = timer_alloc(machine, internal_timer_callback, NULL); dcs.internal_timer = timer_alloc(machine, internal_timer_callback, NULL);
@ -1007,7 +1007,7 @@ void dcs2_init(running_machine *machine, int dram_in_mb, offs_t polling_offset)
} }
dcs.sounddata_banks = dcs.sounddata_words / soundbank_words; dcs.sounddata_banks = dcs.sounddata_words / soundbank_words;
if (dcs.rev != 2) if (dcs.rev != 2)
memory_configure_bank(machine, 20, 0, dcs.sounddata_banks, dcs.sounddata, soundbank_words*2); memory_configure_bank(machine, "bank20", 0, dcs.sounddata_banks, dcs.sounddata, soundbank_words*2);
/* allocate memory for the SRAM */ /* allocate memory for the SRAM */
dcs_sram = auto_alloc_array(machine, UINT16, 0x8000*4/2); dcs_sram = auto_alloc_array(machine, UINT16, 0x8000*4/2);
@ -1068,7 +1068,7 @@ static WRITE16_HANDLER( dcs_dataram_w )
static WRITE16_HANDLER( dcs_data_bank_select_w ) static WRITE16_HANDLER( dcs_data_bank_select_w )
{ {
dcs.sounddata_bank = data & 0x7ff; dcs.sounddata_bank = data & 0x7ff;
memory_set_bank(space->machine, 20, dcs.sounddata_bank % dcs.sounddata_banks); memory_set_bank(space->machine, "bank20", dcs.sounddata_bank % dcs.sounddata_banks);
/* bit 11 = sound board led */ /* bit 11 = sound board led */
#if 0 #if 0
@ -1095,15 +1095,15 @@ INLINE void sdrc_update_bank_pointers(running_machine *machine)
{ {
/* ROM-based; use the memory page to select from ROM */ /* ROM-based; use the memory page to select from ROM */
if (SDRC_ROM_MS == 1 && SDRC_ROM_ST != 3) if (SDRC_ROM_MS == 1 && SDRC_ROM_ST != 3)
memory_set_bankptr(machine, 25, &dcs.sounddata[(SDRC_EPM_PG * pagesize) % dcs.sounddata_words]); memory_set_bankptr(machine, "bank25", &dcs.sounddata[(SDRC_EPM_PG * pagesize) % dcs.sounddata_words]);
} }
else else
{ {
/* RAM-based; use the ROM page to select from ROM, and the memory page to select from RAM */ /* RAM-based; use the ROM page to select from ROM, and the memory page to select from RAM */
if (SDRC_ROM_MS == 1 && SDRC_ROM_ST != 3) if (SDRC_ROM_MS == 1 && SDRC_ROM_ST != 3)
memory_set_bankptr(machine, 25, &dcs.bootrom[(SDRC_ROM_PG * 4096 /*pagesize*/) % dcs.bootrom_words]); memory_set_bankptr(machine, "bank25", &dcs.bootrom[(SDRC_ROM_PG * 4096 /*pagesize*/) % dcs.bootrom_words]);
if (SDRC_DM_ST != 0) if (SDRC_DM_ST != 0)
memory_set_bankptr(machine, 26, &dcs.sounddata[(SDRC_DM_PG * 1024) % dcs.sounddata_words]); memory_set_bankptr(machine, "bank26", &dcs.sounddata[(SDRC_DM_PG * 1024) % dcs.sounddata_words]);
} }
} }
} }
@ -1122,29 +1122,29 @@ static void sdrc_remap_memory(running_machine *machine)
else else
{ {
/* first start with a clean program map */ /* first start with a clean program map */
memory_install_readwrite32_handler(dcs.program, 0x0800, 0x3fff, 0, 0, (read32_space_func)SMH_BANK(21), (write32_space_func)SMH_BANK(21)); memory_install_readwrite_bank_handler(dcs.program, 0x0800, 0x3fff, 0, 0, "bank21");
memory_set_bankptr(machine, 21, dcs_sram + 0x4800); memory_set_bankptr(machine, "bank21", dcs_sram + 0x4800);
/* set up the data map based on the SRAM banking */ /* set up the data map based on the SRAM banking */
/* map 0: ram from 0800-37ff */ /* map 0: ram from 0800-37ff */
if (SDRC_SM_BK == 0) if (SDRC_SM_BK == 0)
{ {
memory_install_readwrite16_handler(dcs.data, 0x0800, 0x17ff, 0, 0, (read16_space_func)SMH_BANK(22), (write16_space_func)SMH_BANK(22)); memory_install_readwrite_bank_handler(dcs.data, 0x0800, 0x17ff, 0, 0, "bank22");
memory_install_readwrite16_handler(dcs.data, 0x1800, 0x27ff, 0, 0, (read16_space_func)SMH_BANK(23), (write16_space_func)SMH_BANK(23)); memory_install_readwrite_bank_handler(dcs.data, 0x1800, 0x27ff, 0, 0, "bank23");
memory_install_readwrite16_handler(dcs.data, 0x2800, 0x37ff, 0, 0, (read16_space_func)SMH_BANK(24), (write16_space_func)SMH_BANK(24)); memory_install_readwrite_bank_handler(dcs.data, 0x2800, 0x37ff, 0, 0, "bank24");
memory_set_bankptr(machine, 22, dcs_sram + 0x0000); memory_set_bankptr(machine, "bank22", dcs_sram + 0x0000);
memory_set_bankptr(machine, 23, dcs_sram + 0x1000); memory_set_bankptr(machine, "bank23", dcs_sram + 0x1000);
memory_set_bankptr(machine, 24, dcs_sram + 0x2000); memory_set_bankptr(machine, "bank24", dcs_sram + 0x2000);
} }
/* map 1: nothing from 0800-17ff, alternate RAM at 1800-27ff, same RAM at 2800-37ff */ /* map 1: nothing from 0800-17ff, alternate RAM at 1800-27ff, same RAM at 2800-37ff */
else else
{ {
memory_install_readwrite16_handler(dcs.data, 0x0800, 0x17ff, 0, 0, (read16_space_func)SMH_UNMAP, (write16_space_func)SMH_UNMAP); memory_install_readwrite16_handler(dcs.data, 0x0800, 0x17ff, 0, 0, (read16_space_func)SMH_UNMAP, (write16_space_func)SMH_UNMAP);
memory_install_readwrite16_handler(dcs.data, 0x1800, 0x27ff, 0, 0, (read16_space_func)SMH_BANK(23), (write16_space_func)SMH_BANK(23)); memory_install_readwrite_bank_handler(dcs.data, 0x1800, 0x27ff, 0, 0, "bank23");
memory_install_readwrite16_handler(dcs.data, 0x2800, 0x37ff, 0, 0, (read16_space_func)SMH_BANK(24), (write16_space_func)SMH_BANK(24)); memory_install_readwrite_bank_handler(dcs.data, 0x2800, 0x37ff, 0, 0, "bank24");
memory_set_bankptr(machine, 23, dcs_sram + 0x3000); memory_set_bankptr(machine, "bank23", dcs_sram + 0x3000);
memory_set_bankptr(machine, 24, dcs_sram + 0x2000); memory_set_bankptr(machine, "bank24", dcs_sram + 0x2000);
} }
} }
@ -1153,14 +1153,14 @@ static void sdrc_remap_memory(running_machine *machine)
{ {
int baseaddr = (SDRC_ROM_ST == 0) ? 0x0000 : (SDRC_ROM_ST == 1) ? 0x3000 : 0x3400; int baseaddr = (SDRC_ROM_ST == 0) ? 0x0000 : (SDRC_ROM_ST == 1) ? 0x3000 : 0x3400;
int pagesize = (SDRC_ROM_SZ == 0 && SDRC_ROM_ST != 0) ? 4096 : 1024; int pagesize = (SDRC_ROM_SZ == 0 && SDRC_ROM_ST != 0) ? 4096 : 1024;
memory_install_read16_handler(dcs.data, baseaddr, baseaddr + pagesize - 1, 0, 0, (read16_space_func)SMH_BANK(25)); memory_install_read_bank_handler(dcs.data, baseaddr, baseaddr + pagesize - 1, 0, 0, "bank25");
} }
/* map the DRAM page as bank 26 */ /* map the DRAM page as bank 26 */
if (SDRC_DM_ST != 0) if (SDRC_DM_ST != 0)
{ {
int baseaddr = (SDRC_DM_ST == 1) ? 0x0000 : (SDRC_DM_ST == 2) ? 0x3000 : 0x3400; int baseaddr = (SDRC_DM_ST == 1) ? 0x0000 : (SDRC_DM_ST == 2) ? 0x3000 : 0x3400;
memory_install_readwrite16_handler(dcs.data, baseaddr, baseaddr + 0x3ff, 0, 0, (read16_space_func)SMH_BANK(26), (write16_space_func)SMH_BANK(26)); memory_install_readwrite_bank_handler(dcs.data, baseaddr, baseaddr + 0x3ff, 0, 0, "bank26");
} }
/* update the bank pointers */ /* update the bank pointers */
@ -1352,7 +1352,7 @@ static WRITE16_HANDLER( dsio_w )
/* offset 2 controls RAM pages */ /* offset 2 controls RAM pages */
case 2: case 2:
dsio.reg[2] = data; dsio.reg[2] = data;
memory_set_bank(space->machine, 20, DSIO_DM_PG % dcs.sounddata_banks); memory_set_bank(space->machine, "bank20", DSIO_DM_PG % dcs.sounddata_banks);
break; break;
} }
} }
@ -1418,7 +1418,7 @@ static WRITE16_HANDLER( denver_w )
/* offset 2 controls RAM pages */ /* offset 2 controls RAM pages */
case 2: case 2:
dsio.reg[2] = data; dsio.reg[2] = data;
memory_set_bank(space->machine, 20, DENV_DM_PG % dcs.sounddata_bank); memory_set_bank(space->machine, "bank20", DENV_DM_PG % dcs.sounddata_bank);
break; break;
/* offset 3 controls FIFO reset */ /* offset 3 controls FIFO reset */

14
src/mame/audio/mario.c
View File

@ -453,7 +453,7 @@ static void set_ea(const address_space *space, int ea)
mario_state *state = (mario_state *)space->machine->driver_data; mario_state *state = (mario_state *)space->machine->driver_data;
//printf("ea: %d\n", ea); //printf("ea: %d\n", ea);
//cputag_set_input_line(machine, "audiocpu", MCS48_INPUT_EA, (ea) ? ASSERT_LINE : CLEAR_LINE); //cputag_set_input_line(machine, "audiocpu", MCS48_INPUT_EA, (ea) ? ASSERT_LINE : CLEAR_LINE);
if (state->eabank != 0) if (state->eabank != NULL)
memory_set_bank(space->machine, state->eabank, ea); memory_set_bank(space->machine, state->eabank, ea);
} }
@ -473,13 +473,13 @@ static SOUND_START( mario )
SND[0x1001] = 0x01; SND[0x1001] = 0x01;
#endif #endif
state->eabank = 0; state->eabank = NULL;
if (audiocpu != NULL && cpu_get_type(audiocpu) != CPU_Z80) if (audiocpu != NULL && cpu_get_type(audiocpu) != CPU_Z80)
{ {
state->eabank = 1; state->eabank = "bank1";
memory_install_read8_handler(cpu_get_address_space(audiocpu, ADDRESS_SPACE_PROGRAM), 0x000, 0x7ff, 0, 0, (read8_space_func)SMH_BANK(1)); memory_install_read_bank_handler(cpu_get_address_space(audiocpu, ADDRESS_SPACE_PROGRAM), 0x000, 0x7ff, 0, 0, "bank1");
memory_configure_bank(machine, 1, 0, 1, memory_region(machine, "audiocpu"), 0); memory_configure_bank(machine, "bank1", 0, 1, memory_region(machine, "audiocpu"), 0);
memory_configure_bank(machine, 1, 1, 1, memory_region(machine, "audiocpu") + 0x1000, 0x800); memory_configure_bank(machine, "bank1", 1, 1, memory_region(machine, "audiocpu") + 0x1000, 0x800);
} }
state_save_register_global(machine, state->last); state_save_register_global(machine, state->last);
@ -641,7 +641,7 @@ WRITE8_HANDLER( mario_sh3_w )
*************************************/ *************************************/
static ADDRESS_MAP_START( mario_sound_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( mario_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x07ff) AM_ROMBANK(1) AM_REGION("audiocpu", 0) AM_RANGE(0x0000, 0x07ff) AM_ROMBANK("bank1") AM_REGION("audiocpu", 0)
AM_RANGE(0x0800, 0x0fff) AM_ROM AM_RANGE(0x0800, 0x0fff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END

16
src/mame/audio/seibu.c
View File

@ -120,7 +120,7 @@ void seibu_sound_decrypt(running_machine *machine,const char *cpu,int length)
} }
if (length > 0x10000) if (length > 0x10000)
memory_configure_bank_decrypted(machine, 1, 0, (length - 0x10000) / 0x8000, decrypt + 0x10000, 0x8000); memory_configure_bank_decrypted(machine, "bank1", 0, (length - 0x10000) / 0x8000, decrypt + 0x10000, 0x8000);
} }
@ -337,7 +337,7 @@ MACHINE_RESET( seibu_sound )
sound_cpu=cputag_get_cpu(machine, "audiocpu"); sound_cpu=cputag_get_cpu(machine, "audiocpu");
update_irq_lines(machine, VECTOR_INIT); update_irq_lines(machine, VECTOR_INIT);
if (romlength > 0x10000) if (romlength > 0x10000)
memory_configure_bank(machine, 1, 0, (romlength - 0x10000) / 0x8000, rom + 0x10000, 0x8000); memory_configure_bank(machine, "bank1", 0, (romlength - 0x10000) / 0x8000, rom + 0x10000, 0x8000);
} }
/***************************************************************************/ /***************************************************************************/
@ -347,7 +347,7 @@ static int main2sub_pending,sub2main_pending;
WRITE8_HANDLER( seibu_bank_w ) WRITE8_HANDLER( seibu_bank_w )
{ {
memory_set_bank(space->machine, 1, data & 1); memory_set_bank(space->machine, "bank1", data & 1);
} }
WRITE8_HANDLER( seibu_coin_w ) WRITE8_HANDLER( seibu_coin_w )
@ -482,7 +482,7 @@ ADDRESS_MAP_START( seibu_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x4018, 0x4019) AM_WRITE(seibu_main_data_w) AM_RANGE(0x4018, 0x4019) AM_WRITE(seibu_main_data_w)
AM_RANGE(0x401b, 0x401b) AM_WRITE(seibu_coin_w) AM_RANGE(0x401b, 0x401b) AM_WRITE(seibu_coin_w)
AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w) AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1")
ADDRESS_MAP_END ADDRESS_MAP_END
@ -501,7 +501,7 @@ ADDRESS_MAP_START( seibu2_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x4018, 0x4019) AM_WRITE(seibu_main_data_w) AM_RANGE(0x4018, 0x4019) AM_WRITE(seibu_main_data_w)
AM_RANGE(0x401b, 0x401b) AM_WRITE(seibu_coin_w) AM_RANGE(0x401b, 0x401b) AM_WRITE(seibu_coin_w)
AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w) AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1")
ADDRESS_MAP_END ADDRESS_MAP_END
ADDRESS_MAP_START( seibu2_raiden2_sound_map, ADDRESS_SPACE_PROGRAM, 8 ) ADDRESS_MAP_START( seibu2_raiden2_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
@ -520,7 +520,7 @@ ADDRESS_MAP_START( seibu2_raiden2_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x401b, 0x401b) AM_WRITE(seibu_coin_w) AM_RANGE(0x401b, 0x401b) AM_WRITE(seibu_coin_w)
AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w) AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
AM_RANGE(0x6002, 0x6002) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w) AM_RANGE(0x6002, 0x6002) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1")
ADDRESS_MAP_END ADDRESS_MAP_END
@ -539,7 +539,7 @@ ADDRESS_MAP_START( seibu3_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x4018, 0x4019) AM_WRITE(seibu_main_data_w) AM_RANGE(0x4018, 0x4019) AM_WRITE(seibu_main_data_w)
AM_RANGE(0x401b, 0x401b) AM_WRITE(seibu_coin_w) AM_RANGE(0x401b, 0x401b) AM_WRITE(seibu_coin_w)
AM_RANGE(0x6008, 0x6009) AM_DEVREADWRITE("ym2", ym2203_r, ym2203_w) AM_RANGE(0x6008, 0x6009) AM_DEVREADWRITE("ym2", ym2203_r, ym2203_w)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1")
ADDRESS_MAP_END ADDRESS_MAP_END
ADDRESS_MAP_START( seibu3_adpcm_sound_map, ADDRESS_SPACE_PROGRAM, 8 ) ADDRESS_MAP_START( seibu3_adpcm_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
@ -561,5 +561,5 @@ ADDRESS_MAP_START( seibu3_adpcm_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6005, 0x6006) AM_DEVWRITE("adpcm2", seibu_adpcm_adr_w) AM_RANGE(0x6005, 0x6006) AM_DEVWRITE("adpcm2", seibu_adpcm_adr_w)
AM_RANGE(0x6008, 0x6009) AM_DEVREADWRITE("ym2", ym2203_r, ym2203_w) AM_RANGE(0x6008, 0x6009) AM_DEVREADWRITE("ym2", ym2203_r, ym2203_w)
AM_RANGE(0x601a, 0x601a) AM_DEVWRITE("adpcm2", seibu_adpcm_ctl_w) AM_RANGE(0x601a, 0x601a) AM_DEVWRITE("adpcm2", seibu_adpcm_ctl_w)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1")
ADDRESS_MAP_END ADDRESS_MAP_END

12
src/mame/audio/taito_en.c
View File

@ -241,9 +241,9 @@ ADDRESS_MAP_START( f3_sound_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x280000, 0x28001f) AM_READWRITE(f3_68681_r, f3_68681_w) AM_RANGE(0x280000, 0x28001f) AM_READWRITE(f3_68681_r, f3_68681_w)
AM_RANGE(0x300000, 0x30003f) AM_WRITE(f3_es5505_bank_w) AM_RANGE(0x300000, 0x30003f) AM_WRITE(f3_es5505_bank_w)
AM_RANGE(0x340000, 0x340003) AM_WRITE(f3_volume_w) /* 8 channel volume control */ AM_RANGE(0x340000, 0x340003) AM_WRITE(f3_volume_w) /* 8 channel volume control */
AM_RANGE(0xc00000, 0xc1ffff) AM_ROMBANK(1) AM_RANGE(0xc00000, 0xc1ffff) AM_ROMBANK("bank1")
AM_RANGE(0xc20000, 0xc3ffff) AM_ROMBANK(2) AM_RANGE(0xc20000, 0xc3ffff) AM_ROMBANK("bank2")
AM_RANGE(0xc40000, 0xc7ffff) AM_ROMBANK(3) AM_RANGE(0xc40000, 0xc7ffff) AM_ROMBANK("bank3")
AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_SHARE(1) // mirror AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_SHARE(1) // mirror
ADDRESS_MAP_END ADDRESS_MAP_END
@ -251,9 +251,9 @@ void taito_f3_soundsystem_reset(running_machine *machine)
{ {
/* Sound cpu program loads to 0xc00000 so we use a bank */ /* Sound cpu program loads to 0xc00000 so we use a bank */
UINT16 *ROM = (UINT16 *)memory_region(machine, "audiocpu"); UINT16 *ROM = (UINT16 *)memory_region(machine, "audiocpu");
memory_set_bankptr(machine, 1,&ROM[0x80000]); memory_set_bankptr(machine, "bank1",&ROM[0x80000]);
memory_set_bankptr(machine, 2,&ROM[0x90000]); memory_set_bankptr(machine, "bank2",&ROM[0x90000]);
memory_set_bankptr(machine, 3,&ROM[0xa0000]); memory_set_bankptr(machine, "bank3",&ROM[0xa0000]);
sound_ram[0]=ROM[0x80000]; /* Stack and Reset vectors */ sound_ram[0]=ROM[0x80000]; /* Stack and Reset vectors */
sound_ram[1]=ROM[0x80001]; sound_ram[1]=ROM[0x80001];

38
src/mame/audio/williams.c
View File

@ -102,7 +102,7 @@ static ADDRESS_MAP_START( williams_cvsd_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6000, 0x6000) AM_MIRROR(0x07ff) AM_DEVWRITE("cvsd", cvsd_digit_clock_clear_w) AM_RANGE(0x6000, 0x6000) AM_MIRROR(0x07ff) AM_DEVWRITE("cvsd", cvsd_digit_clock_clear_w)
AM_RANGE(0x6800, 0x6800) AM_MIRROR(0x07ff) AM_DEVWRITE("cvsd", cvsd_clock_set_w) AM_RANGE(0x6800, 0x6800) AM_MIRROR(0x07ff) AM_DEVWRITE("cvsd", cvsd_clock_set_w)
AM_RANGE(0x7800, 0x7800) AM_MIRROR(0x07ff) AM_WRITE(cvsd_bank_select_w) AM_RANGE(0x7800, 0x7800) AM_MIRROR(0x07ff) AM_WRITE(cvsd_bank_select_w)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(5) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank5")
ADDRESS_MAP_END ADDRESS_MAP_END
@ -116,8 +116,8 @@ static ADDRESS_MAP_START( williams_narc_master_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3400, 0x3400) AM_MIRROR(0x03ff) AM_READ(narc_command_r) AM_RANGE(0x3400, 0x3400) AM_MIRROR(0x03ff) AM_READ(narc_command_r)
AM_RANGE(0x3800, 0x3800) AM_MIRROR(0x03ff) AM_WRITE(narc_master_bank_select_w) AM_RANGE(0x3800, 0x3800) AM_MIRROR(0x03ff) AM_WRITE(narc_master_bank_select_w)
AM_RANGE(0x3c00, 0x3c00) AM_MIRROR(0x03ff) AM_WRITE(narc_master_sync_w) AM_RANGE(0x3c00, 0x3c00) AM_MIRROR(0x03ff) AM_WRITE(narc_master_sync_w)
AM_RANGE(0x4000, 0xbfff) AM_ROMBANK(5) AM_RANGE(0x4000, 0xbfff) AM_ROMBANK("bank5")
AM_RANGE(0xc000, 0xffff) AM_ROMBANK(6) AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bank6")
ADDRESS_MAP_END ADDRESS_MAP_END
/* NARC slave readmem/writemem structures */ /* NARC slave readmem/writemem structures */
@ -130,8 +130,8 @@ static ADDRESS_MAP_START( williams_narc_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3400, 0x3400) AM_MIRROR(0x03ff) AM_READ(narc_command2_r) AM_RANGE(0x3400, 0x3400) AM_MIRROR(0x03ff) AM_READ(narc_command2_r)
AM_RANGE(0x3800, 0x3800) AM_MIRROR(0x03ff) AM_WRITE(narc_slave_bank_select_w) AM_RANGE(0x3800, 0x3800) AM_MIRROR(0x03ff) AM_WRITE(narc_slave_bank_select_w)
AM_RANGE(0x3c00, 0x3c00) AM_MIRROR(0x03ff) AM_WRITE(narc_slave_sync_w) AM_RANGE(0x3c00, 0x3c00) AM_MIRROR(0x03ff) AM_WRITE(narc_slave_sync_w)
AM_RANGE(0x4000, 0xbfff) AM_ROMBANK(7) AM_RANGE(0x4000, 0xbfff) AM_ROMBANK("bank7")
AM_RANGE(0xc000, 0xffff) AM_ROMBANK(8) AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bank8")
ADDRESS_MAP_END ADDRESS_MAP_END
@ -145,8 +145,8 @@ static ADDRESS_MAP_START( williams_adpcm_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3000, 0x3000) AM_MIRROR(0x03ff) AM_READ(adpcm_command_r) AM_RANGE(0x3000, 0x3000) AM_MIRROR(0x03ff) AM_READ(adpcm_command_r)
AM_RANGE(0x3400, 0x3400) AM_MIRROR(0x03ff) AM_DEVWRITE("oki", adpcm_6295_bank_select_w) AM_RANGE(0x3400, 0x3400) AM_MIRROR(0x03ff) AM_DEVWRITE("oki", adpcm_6295_bank_select_w)
AM_RANGE(0x3c00, 0x3c00) AM_MIRROR(0x03ff) AM_WRITE(adpcm_talkback_w) AM_RANGE(0x3c00, 0x3c00) AM_MIRROR(0x03ff) AM_WRITE(adpcm_talkback_w)
AM_RANGE(0x4000, 0xbfff) AM_ROMBANK(5) AM_RANGE(0x4000, 0xbfff) AM_ROMBANK("bank5")
AM_RANGE(0xc000, 0xffff) AM_ROMBANK(6) AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bank6")
ADDRESS_MAP_END ADDRESS_MAP_END
@ -284,9 +284,9 @@ void williams_cvsd_init(running_machine *machine)
D3 -> A16 D3 -> A16
*/ */
offs_t offset = 0x8000 * ((bank >> 2) & 3) + 0x20000 * (bank & 3); offs_t offset = 0x8000 * ((bank >> 2) & 3) + 0x20000 * (bank & 3);
memory_configure_bank(machine, 5, bank, 1, &ROM[0x10000 + offset], 0); memory_configure_bank(machine, "bank5", bank, 1, &ROM[0x10000 + offset], 0);
} }
memory_set_bank(machine, 5, 0); memory_set_bank(machine, "bank5", 0);
/* reset the IRQ state */ /* reset the IRQ state */
pia6821_ca1_w(devtag_get_device(machine, "cvsdpia"), 0, 1); pia6821_ca1_w(devtag_get_device(machine, "cvsdpia"), 0, 1);
@ -316,9 +316,9 @@ void williams_narc_init(running_machine *machine)
D3 -> A16 D3 -> A16
*/ */
offs_t offset = 0x8000 * (bank & 1) + 0x10000 * ((bank >> 3) & 1) + 0x20000 * ((bank >> 1) & 3); offs_t offset = 0x8000 * (bank & 1) + 0x10000 * ((bank >> 3) & 1) + 0x20000 * ((bank >> 1) & 3);
memory_configure_bank(machine, 5, bank, 1, &ROM[0x10000 + offset], 0); memory_configure_bank(machine, "bank5", bank, 1, &ROM[0x10000 + offset], 0);
} }
memory_set_bankptr(machine, 6, &ROM[0x10000 + 0x4000 + 0x8000 + 0x10000 + 0x20000 * 3]); memory_set_bankptr(machine, "bank6", &ROM[0x10000 + 0x4000 + 0x8000 + 0x10000 + 0x20000 * 3]);
/* configure slave CPU banks */ /* configure slave CPU banks */
ROM = memory_region(machine, "narc2cpu"); ROM = memory_region(machine, "narc2cpu");
@ -330,9 +330,9 @@ void williams_narc_init(running_machine *machine)
D3 -> A16 D3 -> A16
*/ */
offs_t offset = 0x8000 * (bank & 1) + 0x10000 * ((bank >> 3) & 1) + 0x20000 * ((bank >> 1) & 3); offs_t offset = 0x8000 * (bank & 1) + 0x10000 * ((bank >> 3) & 1) + 0x20000 * ((bank >> 1) & 3);
memory_configure_bank(machine, 7, bank, 1, &ROM[0x10000 + offset], 0); memory_configure_bank(machine, "bank7", bank, 1, &ROM[0x10000 + offset], 0);
} }
memory_set_bankptr(machine, 8, &ROM[0x10000 + 0x4000 + 0x8000 + 0x10000 + 0x20000 * 3]); memory_set_bankptr(machine, "bank8", &ROM[0x10000 + 0x4000 + 0x8000 + 0x10000 + 0x20000 * 3]);
/* register for save states */ /* register for save states */
state_save_register_global(machine, williams_sound_int_state); state_save_register_global(machine, williams_sound_int_state);
@ -351,8 +351,8 @@ void williams_adpcm_init(running_machine *machine)
/* configure banks */ /* configure banks */
ROM = memory_region(machine, "adpcm"); ROM = memory_region(machine, "adpcm");
memory_configure_bank(machine, 5, 0, 8, &ROM[0x10000], 0x8000); memory_configure_bank(machine, "bank5", 0, 8, &ROM[0x10000], 0x8000);
memory_set_bankptr(machine, 6, &ROM[0x10000 + 0x4000 + 7 * 0x8000]); memory_set_bankptr(machine, "bank6", &ROM[0x10000 + 0x4000 + 7 * 0x8000]);
/* expand ADPCM data */ /* expand ADPCM data */
/* it is assumed that U12 is loaded @ 0x00000 and U13 is loaded @ 0x40000 */ /* it is assumed that U12 is loaded @ 0x00000 and U13 is loaded @ 0x40000 */
@ -442,7 +442,7 @@ static void adpcm_ym2151_irq(const device_config *device, int state)
static WRITE8_HANDLER( cvsd_bank_select_w ) static WRITE8_HANDLER( cvsd_bank_select_w )
{ {
memory_set_bank(space->machine, 5, data & 0x0f); memory_set_bank(space->machine, "bank5", data & 0x0f);
} }
@ -509,13 +509,13 @@ void williams_cvsd_reset_w(int state)
static WRITE8_HANDLER( narc_master_bank_select_w ) static WRITE8_HANDLER( narc_master_bank_select_w )
{ {
memory_set_bank(space->machine, 5, data & 0x0f); memory_set_bank(space->machine, "bank5", data & 0x0f);
} }
static WRITE8_HANDLER( narc_slave_bank_select_w ) static WRITE8_HANDLER( narc_slave_bank_select_w )
{ {
memory_set_bank(space->machine, 7, data & 0x0f); memory_set_bank(space->machine, "bank7", data & 0x0f);
} }
@ -628,7 +628,7 @@ int williams_narc_talkback_r(void)
static WRITE8_HANDLER( adpcm_bank_select_w ) static WRITE8_HANDLER( adpcm_bank_select_w )
{ {
memory_set_bank(space->machine, 5, data & 0x07); memory_set_bank(space->machine, "bank5", data & 0x07);
} }

6
src/mame/drivers/1942.c
View File

@ -72,7 +72,7 @@ correctly.
static WRITE8_HANDLER( c1942_bankswitch_w ) static WRITE8_HANDLER( c1942_bankswitch_w )
{ {
memory_set_bank(space->machine, 1, data & 0x03); memory_set_bank(space->machine, "bank1", data & 0x03);
} }
static INTERRUPT_GEN( c1942_interrupt ) static INTERRUPT_GEN( c1942_interrupt )
@ -86,7 +86,7 @@ static INTERRUPT_GEN( c1942_interrupt )
static ADDRESS_MAP_START( c1942_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( c1942_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xc000) AM_READ_PORT("SYSTEM") AM_RANGE(0xc000, 0xc000) AM_READ_PORT("SYSTEM")
AM_RANGE(0xc001, 0xc001) AM_READ_PORT("P1") AM_RANGE(0xc001, 0xc001) AM_READ_PORT("P1")
AM_RANGE(0xc002, 0xc002) AM_READ_PORT("P2") AM_RANGE(0xc002, 0xc002) AM_READ_PORT("P2")
@ -507,7 +507,7 @@ ROM_END
static DRIVER_INIT( 1942 ) static DRIVER_INIT( 1942 )
{ {
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 3, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 3, &ROM[0x10000], 0x4000);
} }

16
src/mame/drivers/1943.c
View File

@ -45,10 +45,10 @@ static READ8_HANDLER( c1943_protection_r )
static ADDRESS_MAP_START( c1943_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( c1943_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x8fff) AM_ROMBANK(1) AM_RANGE(0x8000, 0x8fff) AM_ROMBANK("bank1")
AM_RANGE(0x9000, 0x9fff) AM_ROMBANK(2) AM_RANGE(0x9000, 0x9fff) AM_ROMBANK("bank2")
AM_RANGE(0xa000, 0xafff) AM_ROMBANK(3) AM_RANGE(0xa000, 0xafff) AM_ROMBANK("bank3")
AM_RANGE(0xb000, 0xbfff) AM_ROMBANK(4) AM_RANGE(0xb000, 0xbfff) AM_ROMBANK("bank4")
AM_RANGE(0xc000, 0xc000) AM_READ_PORT("SYSTEM") AM_RANGE(0xc000, 0xc000) AM_READ_PORT("SYSTEM")
AM_RANGE(0xc001, 0xc001) AM_READ_PORT("P1") AM_RANGE(0xc001, 0xc001) AM_READ_PORT("P1")
AM_RANGE(0xc002, 0xc002) AM_READ_PORT("P2") AM_RANGE(0xc002, 0xc002) AM_READ_PORT("P2")
@ -464,10 +464,10 @@ ROM_END
static DRIVER_INIT( 1943 ) static DRIVER_INIT( 1943 )
{ {
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 28, &ROM[0x10000], 0x1000); memory_configure_bank(machine, "bank1", 0, 28, &ROM[0x10000], 0x1000);
memory_configure_bank(machine, 2, 0, 28, &ROM[0x11000], 0x1000); memory_configure_bank(machine, "bank2", 0, 28, &ROM[0x11000], 0x1000);
memory_configure_bank(machine, 3, 0, 28, &ROM[0x12000], 0x1000); memory_configure_bank(machine, "bank3", 0, 28, &ROM[0x12000], 0x1000);
memory_configure_bank(machine, 4, 0, 28, &ROM[0x13000], 0x1000); memory_configure_bank(machine, "bank4", 0, 28, &ROM[0x13000], 0x1000);
} }
/* Game Drivers */ /* Game Drivers */

10
src/mame/drivers/40love.c
View File

@ -291,7 +291,7 @@ static WRITE8_HANDLER( bank_select_w )
// popmessage("WRONG BANK SELECT = %x !!!!\n",data); // popmessage("WRONG BANK SELECT = %x !!!!\n",data);
} }
memory_set_bank(space->machine, 1, data & 1); memory_set_bank(space->machine, "bank1", data & 1);
} }
static WRITE8_HANDLER( pix1_w ) static WRITE8_HANDLER( pix1_w )
@ -580,7 +580,7 @@ static DRIVER_INIT( undoukai )
{ {
buggychl_state *state = (buggychl_state *)machine->driver_data; buggychl_state *state = (buggychl_state *)machine->driver_data;
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 2, &ROM[0x10000], 0x2000); memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x10000], 0x2000);
state->pix_color[0] = 0x000; state->pix_color[0] = 0x000;
state->pix_color[1] = 0x1e3; state->pix_color[1] = 0x1e3;
@ -592,7 +592,7 @@ static DRIVER_INIT( 40love )
{ {
buggychl_state *state = (buggychl_state *)machine->driver_data; buggychl_state *state = (buggychl_state *)machine->driver_data;
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 2, &ROM[0x10000], 0x2000); memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x10000], 0x2000);
#if 0 #if 0
/* character ROM hack /* character ROM hack
@ -657,13 +657,13 @@ static ADDRESS_MAP_START( 40love_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x9840, 0x987f) AM_RAM AM_BASE_SIZE_MEMBER(buggychl_state, spriteram, spriteram_size) /* sprites part 1 */ AM_RANGE(0x9840, 0x987f) AM_RAM AM_BASE_SIZE_MEMBER(buggychl_state, spriteram, spriteram_size) /* sprites part 1 */
AM_RANGE(0x9880, 0x98bf) AM_READWRITE(fortyl_bg_colorram_r, fortyl_bg_colorram_w) AM_BASE_MEMBER(buggychl_state, colorram) /* background attributes (2 bytes per line) */ AM_RANGE(0x9880, 0x98bf) AM_READWRITE(fortyl_bg_colorram_r, fortyl_bg_colorram_w) AM_BASE_MEMBER(buggychl_state, colorram) /* background attributes (2 bytes per line) */
AM_RANGE(0x98c0, 0x98ff) AM_RAM AM_BASE_SIZE_MEMBER(buggychl_state, spriteram2, spriteram2_size)/* sprites part 2 */ AM_RANGE(0x98c0, 0x98ff) AM_RAM AM_BASE_SIZE_MEMBER(buggychl_state, spriteram2, spriteram2_size)/* sprites part 2 */
AM_RANGE(0xa000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0xa000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xffff) AM_READWRITE(fortyl_pixram_r, fortyl_pixram_w) /* banked pixel layer */ AM_RANGE(0xc000, 0xffff) AM_READWRITE(fortyl_pixram_r, fortyl_pixram_w) /* banked pixel layer */
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( undoukai_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( undoukai_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1) AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank1")
AM_RANGE(0xa000, 0xa7ff) AM_RAM AM_BASE_MEMBER(buggychl_state, mcu_ram) /* M5517P on main board */ AM_RANGE(0xa000, 0xa7ff) AM_RAM AM_BASE_MEMBER(buggychl_state, mcu_ram) /* M5517P on main board */
AM_RANGE(0xa800, 0xa800) AM_READWRITE(undoukai_mcu_r, undoukai_mcu_w) AM_RANGE(0xa800, 0xa800) AM_READWRITE(undoukai_mcu_r, undoukai_mcu_w)
AM_RANGE(0xa801, 0xa801) AM_READWRITE(undoukai_mcu_status_r, pix1_w) //pixel layer related AM_RANGE(0xa801, 0xa801) AM_READWRITE(undoukai_mcu_status_r, pix1_w) //pixel layer related

8
src/mame/drivers/aerofgt.c
View File

@ -112,7 +112,7 @@ static WRITE8_HANDLER( pending_command_clear_w )
static WRITE8_HANDLER( aerofgt_sh_bankswitch_w ) static WRITE8_HANDLER( aerofgt_sh_bankswitch_w )
{ {
memory_set_bank(space->machine, 1, data & 0x03); memory_set_bank(space->machine, "bank1", data & 0x03);
} }
@ -380,7 +380,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x77ff) AM_ROM AM_RANGE(0x0000, 0x77ff) AM_ROM
AM_RANGE(0x7800, 0x7fff) AM_RAM AM_RANGE(0x7800, 0x7fff) AM_RAM
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1")
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( turbofrc_sound_portmap, ADDRESS_SPACE_IO, 8 ) static ADDRESS_MAP_START( turbofrc_sound_portmap, ADDRESS_SPACE_IO, 8 )
@ -1305,7 +1305,7 @@ static MACHINE_START( aerofgt )
{ {
UINT8 *rom = memory_region(machine, "audiocpu"); UINT8 *rom = memory_region(machine, "audiocpu");
memory_configure_bank(machine, 1, 0, 4, &rom[0x10000], 0x8000); memory_configure_bank(machine, "bank1", 0, 4, &rom[0x10000], 0x8000);
MACHINE_START_CALL(common); MACHINE_START_CALL(common);
} }
@ -1320,7 +1320,7 @@ static MACHINE_RESET( aerofgt )
{ {
MACHINE_RESET_CALL(common); MACHINE_RESET_CALL(common);
memory_set_bank(machine, 1, 0); /* needed by spinlbrk */ memory_set_bank(machine, "bank1", 0); /* needed by spinlbrk */
} }
static MACHINE_DRIVER_START( pspikes ) static MACHINE_DRIVER_START( pspikes )

14
src/mame/drivers/airbustr.c
View File

@ -280,7 +280,7 @@ static WRITE8_HANDLER( master_nmi_trigger_w )
cputag_set_input_line(space->machine, "slave", INPUT_LINE_NMI, PULSE_LINE); cputag_set_input_line(space->machine, "slave", INPUT_LINE_NMI, PULSE_LINE);
} }
static void airbustr_bankswitch(running_machine *machine, const char *cpu, int bank, int data) static void airbustr_bankswitch(running_machine *machine, const char *cpu, const char *bank, int data)
{ {
UINT8 *ROM = memory_region(machine, cpu); UINT8 *ROM = memory_region(machine, cpu);
@ -294,12 +294,12 @@ static void airbustr_bankswitch(running_machine *machine, const char *cpu, int b
static WRITE8_HANDLER( master_bankswitch_w ) static WRITE8_HANDLER( master_bankswitch_w )
{ {
airbustr_bankswitch(space->machine, "master", 1, data); airbustr_bankswitch(space->machine, "master", "bank1", data);
} }
static WRITE8_HANDLER( slave_bankswitch_w ) static WRITE8_HANDLER( slave_bankswitch_w )
{ {
airbustr_bankswitch(space->machine, "slave", 2, data); airbustr_bankswitch(space->machine, "slave", "bank2", data);
flip_screen_set(space->machine, data & 0x10); flip_screen_set(space->machine, data & 0x10);
@ -309,7 +309,7 @@ static WRITE8_HANDLER( slave_bankswitch_w )
static WRITE8_HANDLER( sound_bankswitch_w ) static WRITE8_HANDLER( sound_bankswitch_w )
{ {
airbustr_bankswitch(space->machine, "audiocpu", 3, data); airbustr_bankswitch(space->machine, "audiocpu", "bank3", data);
} }
static READ8_HANDLER( soundcommand_status_r ) static READ8_HANDLER( soundcommand_status_r )
@ -369,7 +369,7 @@ static WRITE8_HANDLER( airbustr_coin_counter_w )
static ADDRESS_MAP_START( master_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( master_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xcfff) AM_READWRITE(pandora_spriteram_r, pandora_spriteram_w) AM_RANGE(0xc000, 0xcfff) AM_READWRITE(pandora_spriteram_r, pandora_spriteram_w)
AM_RANGE(0xd000, 0xdfff) AM_RAM AM_RANGE(0xd000, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xefff) AM_RAM AM_BASE(&devram) // shared with protection device AM_RANGE(0xe000, 0xefff) AM_RAM AM_BASE(&devram) // shared with protection device
@ -385,7 +385,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( slave_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( slave_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(2) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank2")
AM_RANGE(0xc000, 0xc3ff) AM_RAM_WRITE(airbustr_videoram2_w) AM_BASE(&airbustr_videoram2) AM_RANGE(0xc000, 0xc3ff) AM_RAM_WRITE(airbustr_videoram2_w) AM_BASE(&airbustr_videoram2)
AM_RANGE(0xc400, 0xc7ff) AM_RAM_WRITE(airbustr_colorram2_w) AM_BASE(&airbustr_colorram2) AM_RANGE(0xc400, 0xc7ff) AM_RAM_WRITE(airbustr_colorram2_w) AM_BASE(&airbustr_colorram2)
AM_RANGE(0xc800, 0xcbff) AM_RAM_WRITE(airbustr_videoram_w) AM_BASE_GENERIC(videoram) AM_RANGE(0xc800, 0xcbff) AM_RAM_WRITE(airbustr_videoram_w) AM_BASE_GENERIC(videoram)
@ -411,7 +411,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(3) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank3")
AM_RANGE(0xc000, 0xdfff) AM_RAM AM_RANGE(0xc000, 0xdfff) AM_RAM
ADDRESS_MAP_END ADDRESS_MAP_END

4
src/mame/drivers/ajax.c
View File

@ -32,7 +32,7 @@ static ADDRESS_MAP_START( ajax_main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE_GENERIC(paletteram)/* palette */ AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE_GENERIC(paletteram)/* palette */
AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE(1) /* shared RAM with the 6809 */ AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE(1) /* shared RAM with the 6809 */
AM_RANGE(0x4000, 0x5fff) AM_RAM /* RAM 6264L at K10 */ AM_RANGE(0x4000, 0x5fff) AM_RAM /* RAM 6264L at K10 */
AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(2) /* banked ROM */ AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank2") /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM N11 */ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM N11 */
ADDRESS_MAP_END ADDRESS_MAP_END
@ -43,7 +43,7 @@ static ADDRESS_MAP_START( ajax_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1800, 0x1800) AM_WRITE(ajax_bankswitch_2_w) /* bankswitch control */ AM_RANGE(0x1800, 0x1800) AM_WRITE(ajax_bankswitch_2_w) /* bankswitch control */
AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE(1) /* shared RAM with the 052001 */ AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE(1) /* shared RAM with the 052001 */
AM_RANGE(0x4000, 0x7fff) AM_READWRITE(K052109_r, K052109_w) /* video RAM + color RAM + video registers */ AM_RANGE(0x4000, 0x7fff) AM_READWRITE(K052109_r, K052109_w) /* video RAM + color RAM + video registers */
AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1) /* banked ROM */ AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank1") /* banked ROM */
AM_RANGE(0xa000, 0xffff) AM_ROM /* ROM I16 */ AM_RANGE(0xa000, 0xffff) AM_ROM /* ROM I16 */
ADDRESS_MAP_END ADDRESS_MAP_END

6
src/mame/drivers/albazg.c
View File

@ -195,7 +195,7 @@ static WRITE8_DEVICE_HANDLER( mux_w )
if( state->bank != new_bank) if( state->bank != new_bank)
{ {
state->bank = new_bank; state->bank = new_bank;
memory_set_bank(device->machine, 1, state->bank); memory_set_bank(device->machine, "bank1", state->bank);
} }
state->mux_data = data & ~0xc0; state->mux_data = data & ~0xc0;
@ -249,7 +249,7 @@ static const ppi8255_interface ppi8255_intf =
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1) AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank1")
AM_RANGE(0xa7fc, 0xa7fc) AM_WRITE(prot_lock_w) AM_RANGE(0xa7fc, 0xa7fc) AM_WRITE(prot_lock_w)
AM_RANGE(0xa7ff, 0xa7ff) AM_WRITE_PORT("EEPROMOUT") AM_RANGE(0xa7ff, 0xa7ff) AM_WRITE_PORT("EEPROMOUT")
AM_RANGE(0xaf80, 0xafff) AM_READWRITE(custom_ram_r, custom_ram_w) AM_BASE_MEMBER(albazg_state, cus_ram) AM_RANGE(0xaf80, 0xafff) AM_READWRITE(custom_ram_r, custom_ram_w) AM_BASE_MEMBER(albazg_state, cus_ram)
@ -375,7 +375,7 @@ static MACHINE_START( yumefuda )
albazg_state *state = (albazg_state *)machine->driver_data; albazg_state *state = (albazg_state *)machine->driver_data;
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 4, &ROM[0x10000], 0x2000); memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x2000);
state_save_register_global(machine, state->mux_data); state_save_register_global(machine, state->mux_data);
state_save_register_global(machine, state->bank); state_save_register_global(machine, state->bank);

14
src/mame/drivers/alg.c
View File

@ -201,12 +201,12 @@ static WRITE8_DEVICE_HANDLER( alg_cia_0_porta_w )
const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM); const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
/* switch banks as appropriate */ /* switch banks as appropriate */
memory_set_bank(device->machine, 1, data & 1); memory_set_bank(device->machine, "bank1", data & 1);
/* swap the write handlers between ROM and bank 1 based on the bit */ /* swap the write handlers between ROM and bank 1 based on the bit */
if ((data & 1) == 0) if ((data & 1) == 0)
/* overlay disabled, map RAM on 0x000000 */ /* overlay disabled, map RAM on 0x000000 */
memory_install_write16_handler(space, 0x000000, 0x07ffff, 0, 0, (write16_space_func)SMH_BANK(1)); memory_install_write_bank_handler(space, 0x000000, 0x07ffff, 0, 0, "bank1");
else else
/* overlay enabled, map Amiga system ROM on 0x000000 */ /* overlay enabled, map Amiga system ROM on 0x000000 */
@ -256,7 +256,7 @@ static WRITE8_DEVICE_HANDLER( alg_cia_1_porta_w )
static ADDRESS_MAP_START( main_map_r1, ADDRESS_SPACE_PROGRAM, 16 ) static ADDRESS_MAP_START( main_map_r1, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_UNMAP_HIGH ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x000000, 0x07ffff) AM_RAMBANK(1) AM_BASE(&amiga_chip_ram) AM_SIZE(&amiga_chip_ram_size) AM_RANGE(0x000000, 0x07ffff) AM_RAMBANK("bank1") AM_BASE(&amiga_chip_ram) AM_SIZE(&amiga_chip_ram_size)
AM_RANGE(0xbfd000, 0xbfefff) AM_READWRITE(amiga_cia_r, amiga_cia_w) AM_RANGE(0xbfd000, 0xbfefff) AM_READWRITE(amiga_cia_r, amiga_cia_w)
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE(amiga_custom_r, amiga_custom_w) AM_BASE(&amiga_custom_regs) AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE(amiga_custom_r, amiga_custom_w) AM_BASE(&amiga_custom_regs)
AM_RANGE(0xe80000, 0xe8ffff) AM_READWRITE(amiga_autoconfig_r, amiga_autoconfig_w) AM_RANGE(0xe80000, 0xe8ffff) AM_READWRITE(amiga_autoconfig_r, amiga_autoconfig_w)
@ -269,7 +269,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( main_map_r2, ADDRESS_SPACE_PROGRAM, 16 ) static ADDRESS_MAP_START( main_map_r2, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_UNMAP_HIGH ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x000000, 0x07ffff) AM_RAMBANK(1) AM_BASE(&amiga_chip_ram) AM_SIZE(&amiga_chip_ram_size) AM_RANGE(0x000000, 0x07ffff) AM_RAMBANK("bank1") AM_BASE(&amiga_chip_ram) AM_SIZE(&amiga_chip_ram_size)
AM_RANGE(0xbfd000, 0xbfefff) AM_READWRITE(amiga_cia_r, amiga_cia_w) AM_RANGE(0xbfd000, 0xbfefff) AM_READWRITE(amiga_cia_r, amiga_cia_w)
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE(amiga_custom_r, amiga_custom_w) AM_BASE(&amiga_custom_regs) AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE(amiga_custom_r, amiga_custom_w) AM_BASE(&amiga_custom_regs)
AM_RANGE(0xe80000, 0xe8ffff) AM_READWRITE(amiga_autoconfig_r, amiga_autoconfig_w) AM_RANGE(0xe80000, 0xe8ffff) AM_READWRITE(amiga_autoconfig_r, amiga_autoconfig_w)
@ -282,7 +282,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( main_map_picmatic, ADDRESS_SPACE_PROGRAM, 16 ) static ADDRESS_MAP_START( main_map_picmatic, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_UNMAP_HIGH ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x000000, 0x07ffff) AM_RAMBANK(1) AM_BASE(&amiga_chip_ram) AM_SIZE(&amiga_chip_ram_size) AM_RANGE(0x000000, 0x07ffff) AM_RAMBANK("bank1") AM_BASE(&amiga_chip_ram) AM_SIZE(&amiga_chip_ram_size)
AM_RANGE(0xbfd000, 0xbfefff) AM_READWRITE(amiga_cia_r, amiga_cia_w) AM_RANGE(0xbfd000, 0xbfefff) AM_READWRITE(amiga_cia_r, amiga_cia_w)
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE(amiga_custom_r, amiga_custom_w) AM_BASE(&amiga_custom_regs) AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE(amiga_custom_r, amiga_custom_w) AM_BASE(&amiga_custom_regs)
AM_RANGE(0xe80000, 0xe8ffff) AM_READWRITE(amiga_autoconfig_r, amiga_autoconfig_w) AM_RANGE(0xe80000, 0xe8ffff) AM_READWRITE(amiga_autoconfig_r, amiga_autoconfig_w)
@ -669,8 +669,8 @@ static void alg_init(running_machine *machine)
amiga_machine_config(machine, &alg_intf); amiga_machine_config(machine, &alg_intf);
/* set up memory */ /* set up memory */
memory_configure_bank(machine, 1, 0, 1, amiga_chip_ram, 0); memory_configure_bank(machine, "bank1", 0, 1, amiga_chip_ram, 0);
memory_configure_bank(machine, 1, 1, 1, memory_region(machine, "user1"), 0); memory_configure_bank(machine, "bank1", 1, 1, memory_region(machine, "user1"), 0);
} }

6
src/mame/drivers/aliens.c
View File

@ -93,7 +93,7 @@ static WRITE8_DEVICE_HANDLER( aliens_snd_bankswitch_w )
static ADDRESS_MAP_START( aliens_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( aliens_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x03ff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE(&ram) /* palette + work RAM */ AM_RANGE(0x0000, 0x03ff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE(&ram) /* palette + work RAM */
AM_RANGE(0x0400, 0x1fff) AM_RAM AM_RANGE(0x0400, 0x1fff) AM_RAM
AM_RANGE(0x2000, 0x3fff) AM_ROMBANK(1) /* banked ROM */ AM_RANGE(0x2000, 0x3fff) AM_ROMBANK("bank1") /* banked ROM */
AM_RANGE(0x5f80, 0x5f80) AM_READ_PORT("DSW3") AM_RANGE(0x5f80, 0x5f80) AM_READ_PORT("DSW3")
AM_RANGE(0x5f81, 0x5f81) AM_READ_PORT("P1") AM_RANGE(0x5f81, 0x5f81) AM_READ_PORT("P1")
AM_RANGE(0x5f82, 0x5f82) AM_READ_PORT("P2") AM_RANGE(0x5f82, 0x5f82) AM_READ_PORT("P2")
@ -476,7 +476,7 @@ static KONAMI_SETLINES_CALLBACK( aliens_banking )
if (lines & 0x10) offs -= 0x8000; if (lines & 0x10) offs -= 0x8000;
offs += (lines & 0x0f)*0x2000; offs += (lines & 0x0f)*0x2000;
memory_set_bankptr(device->machine, 1, &RAM[offs] ); memory_set_bankptr(device->machine, "bank1", &RAM[offs] );
} }
static MACHINE_RESET( aliens ) static MACHINE_RESET( aliens )
@ -486,7 +486,7 @@ static MACHINE_RESET( aliens )
konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), aliens_banking); konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), aliens_banking);
/* init the default bank */ /* init the default bank */
memory_set_bankptr(machine, 1, &RAM[0x10000]); memory_set_bankptr(machine, "bank1", &RAM[0x10000]);
} }

20
src/mame/drivers/alpha68k.c
View File

@ -695,7 +695,7 @@ static ADDRESS_MAP_START( alpha68k_II_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x200000, 0x207fff) AM_RAM AM_BASE_MEMBER(alpha68k_state, spriteram) AM_RANGE(0x200000, 0x207fff) AM_RAM AM_BASE_MEMBER(alpha68k_state, spriteram)
AM_RANGE(0x300000, 0x3001ff) AM_READWRITE(alpha_II_trigger_r, alpha_microcontroller_w) AM_RANGE(0x300000, 0x3001ff) AM_READWRITE(alpha_II_trigger_r, alpha_microcontroller_w)
AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(alpha68k_paletteram_w) AM_BASE_MEMBER(alpha68k_state, paletteram) AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(alpha68k_paletteram_w) AM_BASE_MEMBER(alpha68k_state, paletteram)
AM_RANGE(0x800000, 0x83ffff) AM_ROMBANK(8) AM_RANGE(0x800000, 0x83ffff) AM_ROMBANK("bank8")
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( alpha68k_V_map, ADDRESS_SPACE_PROGRAM, 16 ) static ADDRESS_MAP_START( alpha68k_V_map, ADDRESS_SPACE_PROGRAM, 16 )
@ -713,7 +713,7 @@ static ADDRESS_MAP_START( alpha68k_V_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x300000, 0x3001ff) AM_WRITE(alpha_microcontroller_w) AM_RANGE(0x300000, 0x3001ff) AM_WRITE(alpha_microcontroller_w)
AM_RANGE(0x303e00, 0x303fff) AM_WRITE(alpha_microcontroller_w) /* Gang Wars mirror */ AM_RANGE(0x303e00, 0x303fff) AM_WRITE(alpha_microcontroller_w) /* Gang Wars mirror */
AM_RANGE(0x400000, 0x401fff) AM_RAM_WRITE(alpha68k_paletteram_w) AM_BASE_MEMBER(alpha68k_state, paletteram) AM_RANGE(0x400000, 0x401fff) AM_RAM_WRITE(alpha68k_paletteram_w) AM_BASE_MEMBER(alpha68k_state, paletteram)
AM_RANGE(0x800000, 0x83ffff) AM_ROMBANK(8) AM_RANGE(0x800000, 0x83ffff) AM_ROMBANK("bank8")
ADDRESS_MAP_END ADDRESS_MAP_END
static READ16_HANDLER(sound_cpu_r) { return 1; } static READ16_HANDLER(sound_cpu_r) { return 1; }
@ -740,13 +740,13 @@ ADDRESS_MAP_END
static WRITE8_HANDLER( sound_bank_w ) static WRITE8_HANDLER( sound_bank_w )
{ {
memory_set_bank(space->machine, 7, data); memory_set_bank(space->machine, "bank7", data);
} }
static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_RANGE(0x8000, 0x87ff) AM_RAM
AM_RANGE(0xc000, 0xffff) AM_ROMBANK(7) AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bank7")
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( kyros_sound_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( kyros_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
@ -1889,7 +1889,7 @@ static MACHINE_START( alpha68k_V )
alpha68k_state *state = (alpha68k_state *)machine->driver_data; alpha68k_state *state = (alpha68k_state *)machine->driver_data;
UINT8 *ROM = memory_region(machine, "audiocpu"); UINT8 *ROM = memory_region(machine, "audiocpu");
memory_configure_bank(machine, 7, 0, 32, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank7", 0, 32, &ROM[0x10000], 0x4000);
MACHINE_START_CALL(common); MACHINE_START_CALL(common);
@ -1925,7 +1925,7 @@ static MACHINE_START( alpha68k_II )
alpha68k_state *state = (alpha68k_state *)machine->driver_data; alpha68k_state *state = (alpha68k_state *)machine->driver_data;
UINT8 *ROM = memory_region(machine, "audiocpu"); UINT8 *ROM = memory_region(machine, "audiocpu");
memory_configure_bank(machine, 7, 0, 28, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank7", 0, 28, &ROM[0x10000], 0x4000);
MACHINE_START_CALL(common); MACHINE_START_CALL(common);
@ -3300,7 +3300,7 @@ static DRIVER_INIT( skysoldr )
{ {
alpha68k_state *state = (alpha68k_state *)machine->driver_data; alpha68k_state *state = (alpha68k_state *)machine->driver_data;
memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, skysoldr_cycle_r); memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, skysoldr_cycle_r);
memory_set_bankptr(machine, 8, (memory_region(machine, "user1")) + 0x40000); memory_set_bankptr(machine, "bank8", (memory_region(machine, "user1")) + 0x40000);
state->invert_controls = 0; state->invert_controls = 0;
state->microcontroller_id = 0; state->microcontroller_id = 0;
state->coin_id = 0x22 | (0x22 << 8); state->coin_id = 0x22 | (0x22 << 8);
@ -3317,7 +3317,7 @@ static DRIVER_INIT( goldmedl )
static DRIVER_INIT( goldmeda ) static DRIVER_INIT( goldmeda )
{ {
alpha68k_state *state = (alpha68k_state *)machine->driver_data; alpha68k_state *state = (alpha68k_state *)machine->driver_data;
memory_set_bankptr(machine, 8, memory_region(machine, "maincpu") + 0x20000); memory_set_bankptr(machine, "bank8", memory_region(machine, "maincpu") + 0x20000);
state->invert_controls = 0; state->invert_controls = 0;
state->microcontroller_id = 0x8803; //Guess - routine to handle coinage is the same as in 'goldmedl' state->microcontroller_id = 0x8803; //Guess - routine to handle coinage is the same as in 'goldmedl'
state->coin_id = 0x23 | (0x24 << 8); state->coin_id = 0x23 | (0x24 << 8);
@ -3345,7 +3345,7 @@ static DRIVER_INIT( gangwars )
{ {
alpha68k_state *state = (alpha68k_state *)machine->driver_data; alpha68k_state *state = (alpha68k_state *)machine->driver_data;
memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40206, 0x40207, 0, 0, gangwars_cycle_r); memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40206, 0x40207, 0, 0, gangwars_cycle_r);
memory_set_bankptr(machine, 8, memory_region(machine, "user1")); memory_set_bankptr(machine, "bank8", memory_region(machine, "user1"));
state->invert_controls = 0; state->invert_controls = 0;
state->microcontroller_id = 0x8512; state->microcontroller_id = 0x8512;
state->coin_id = 0x23 | (0x24 << 8); state->coin_id = 0x23 | (0x24 << 8);
@ -3355,7 +3355,7 @@ static DRIVER_INIT( gangwarb )
{ {
alpha68k_state *state = (alpha68k_state *)machine->driver_data; alpha68k_state *state = (alpha68k_state *)machine->driver_data;
memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40206, 0x40207, 0, 0, gangwarb_cycle_r); memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40206, 0x40207, 0, 0, gangwarb_cycle_r);
memory_set_bankptr(machine, 8, memory_region(machine, "user1")); memory_set_bankptr(machine, "bank8", memory_region(machine, "user1"));
state->invert_controls = 0; state->invert_controls = 0;
state->microcontroller_id = 0x8512; state->microcontroller_id = 0x8512;
state->coin_id = 0x23 | (0x24 << 8); state->coin_id = 0x23 | (0x24 << 8);

8
src/mame/drivers/angelkds.c
View File

@ -143,7 +143,7 @@ static WRITE8_HANDLER( angelkds_sub_sound_w );
static WRITE8_HANDLER( angelkds_cpu_bank_write ) static WRITE8_HANDLER( angelkds_cpu_bank_write )
{ {
memory_set_bank(space->machine, 1, data & 0x0f); // shall we check (data & 0x0f) < # of available banks (8 or 10 resp.)? memory_set_bank(space->machine, "bank1", data & 0x0f); // shall we check (data & 0x0f) < # of available banks (8 or 10 resp.)?
} }
@ -197,7 +197,7 @@ contain a level.
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xdfff) AM_RAM AM_RANGE(0xc000, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xe3ff) AM_RAM_WRITE(angelkds_bgtopvideoram_w) AM_BASE_MEMBER(angelkds_state, bgtopvideoram) /* Top Half of Screen */ AM_RANGE(0xe000, 0xe3ff) AM_RAM_WRITE(angelkds_bgtopvideoram_w) AM_BASE_MEMBER(angelkds_state, bgtopvideoram) /* Top Half of Screen */
AM_RANGE(0xe400, 0xe7ff) AM_RAM_WRITE(angelkds_bgbotvideoram_w) AM_BASE_MEMBER(angelkds_state, bgbotvideoram) /* Bottom Half of Screen */ AM_RANGE(0xe400, 0xe7ff) AM_RAM_WRITE(angelkds_bgbotvideoram_w) AM_BASE_MEMBER(angelkds_state, bgbotvideoram) /* Bottom Half of Screen */
@ -755,7 +755,7 @@ ROM_END
static DRIVER_INIT( angelkds ) static DRIVER_INIT( angelkds )
{ {
UINT8 *RAM = memory_region(machine, "user1"); UINT8 *RAM = memory_region(machine, "user1");
memory_configure_bank(machine, 1, 0, 8, &RAM[0x0000], 0x4000); memory_configure_bank(machine, "bank1", 0, 8, &RAM[0x0000], 0x4000);
} }
static DRIVER_INIT( spcpostn ) static DRIVER_INIT( spcpostn )
@ -763,7 +763,7 @@ static DRIVER_INIT( spcpostn )
UINT8 *RAM = memory_region(machine, "user1"); UINT8 *RAM = memory_region(machine, "user1");
spcpostn_decode(machine, "maincpu"); spcpostn_decode(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 10, &RAM[0x0000], 0x4000); memory_configure_bank(machine, "bank1", 0, 10, &RAM[0x0000], 0x4000);
} }

2
src/mame/drivers/appoooh.c
View File

@ -216,7 +216,7 @@ static WRITE8_HANDLER( appoooh_adpcm_w )
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x9fff) AM_ROM AM_RANGE(0x8000, 0x9fff) AM_ROM
AM_RANGE(0xa000, 0xdfff) AM_ROMBANK(1) AM_RANGE(0xa000, 0xdfff) AM_ROMBANK("bank1")
AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_RANGE(0xe000, 0xe7ff) AM_RAM
AM_RANGE(0xe800, 0xefff) AM_RAM /* RAM ? */ AM_RANGE(0xe800, 0xefff) AM_RAM /* RAM ? */

8
src/mame/drivers/aquarium.c
View File

@ -101,7 +101,7 @@ static WRITE16_HANDLER( aquarium_sound_w )
static WRITE8_HANDLER( aquarium_z80_bank_w ) static WRITE8_HANDLER( aquarium_z80_bank_w )
{ {
memory_set_bank(space->machine, 1, data & 0x07); memory_set_bank(space->machine, "bank1", data & 0x07);
} }
static UINT8 aquarium_snd_bitswap( UINT8 scrambled_data ) static UINT8 aquarium_snd_bitswap( UINT8 scrambled_data )
@ -155,7 +155,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( snd_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( snd_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x7800, 0x7fff) AM_RAM AM_RANGE(0x7800, 0x7fff) AM_RAM
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1")
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( snd_portmap, ADDRESS_SPACE_IO, 8 ) static ADDRESS_MAP_START( snd_portmap, ADDRESS_SPACE_IO, 8 )
@ -314,8 +314,8 @@ static DRIVER_INIT( aquarium )
} }
/* configure and set up the sound bank */ /* configure and set up the sound bank */
memory_configure_bank(machine, 1, 0, 7, &Z80[0x18000], 0x8000); memory_configure_bank(machine, "bank1", 0, 7, &Z80[0x18000], 0x8000);
memory_set_bank(machine, 1, 1); memory_set_bank(machine, "bank1", 1);
} }

17
src/mame/drivers/arcadia.c
View File

@ -72,7 +72,10 @@ static UINT8 coin_counter[2];
static WRITE16_HANDLER( arcadia_multibios_change_game ) static WRITE16_HANDLER( arcadia_multibios_change_game )
{ {
memory_install_read16_handler(space, 0x800000, 0x97ffff, 0, 0, (read16_space_func)((data == 0) ? SMH_BANK(2) : SMH_NOP)); if (data == 0)
memory_install_read_bank_handler(space, 0x800000, 0x97ffff, 0, 0, "bank2");
else
memory_install_read16_handler(space, 0x800000, 0x97ffff, 0, 0, (read16_space_func)SMH_NOP);
} }
@ -95,12 +98,12 @@ static WRITE16_HANDLER( arcadia_multibios_change_game )
static WRITE8_DEVICE_HANDLER( arcadia_cia_0_porta_w ) static WRITE8_DEVICE_HANDLER( arcadia_cia_0_porta_w )
{ {
/* switch banks as appropriate */ /* switch banks as appropriate */
memory_set_bank(device->machine, 1, data & 1); memory_set_bank(device->machine, "bank1", data & 1);
/* swap the write handlers between ROM and bank 1 based on the bit */ /* swap the write handlers between ROM and bank 1 based on the bit */
if ((data & 1) == 0) if ((data & 1) == 0)
/* overlay disabled, map RAM on 0x000000 */ /* overlay disabled, map RAM on 0x000000 */
memory_install_write16_handler(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, (write16_space_func)SMH_BANK(1)); memory_install_write_bank_handler(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, "bank1");
else else
/* overlay enabled, map Amiga system ROM on 0x000000 */ /* overlay enabled, map Amiga system ROM on 0x000000 */
@ -180,13 +183,13 @@ static void arcadia_reset_coins(running_machine *machine)
static ADDRESS_MAP_START( amiga_map, ADDRESS_SPACE_PROGRAM, 16 ) static ADDRESS_MAP_START( amiga_map, ADDRESS_SPACE_PROGRAM, 16 )
ADDRESS_MAP_UNMAP_HIGH ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x000000, 0x07ffff) AM_RAMBANK(1) AM_BASE(&amiga_chip_ram) AM_SIZE(&amiga_chip_ram_size) AM_RANGE(0x000000, 0x07ffff) AM_RAMBANK("bank1") AM_BASE(&amiga_chip_ram) AM_SIZE(&amiga_chip_ram_size)
AM_RANGE(0xbfd000, 0xbfefff) AM_READWRITE(amiga_cia_r, amiga_cia_w) AM_RANGE(0xbfd000, 0xbfefff) AM_READWRITE(amiga_cia_r, amiga_cia_w)
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE(amiga_custom_r, amiga_custom_w) AM_BASE(&amiga_custom_regs) AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE(amiga_custom_r, amiga_custom_w) AM_BASE(&amiga_custom_regs)
AM_RANGE(0xe80000, 0xe8ffff) AM_READWRITE(amiga_autoconfig_r, amiga_autoconfig_w) AM_RANGE(0xe80000, 0xe8ffff) AM_READWRITE(amiga_autoconfig_r, amiga_autoconfig_w)
AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("user1", 0) /* Kickstart BIOS */ AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("user1", 0) /* Kickstart BIOS */
AM_RANGE(0x800000, 0x97ffff) AM_ROMBANK(2) AM_REGION("user3", 0) AM_RANGE(0x800000, 0x97ffff) AM_ROMBANK("bank2") AM_REGION("user3", 0)
AM_RANGE(0x980000, 0x9fbfff) AM_ROM AM_REGION("user2", 0) AM_RANGE(0x980000, 0x9fbfff) AM_ROM AM_REGION("user2", 0)
AM_RANGE(0x9fc000, 0x9ffffd) AM_RAM AM_BASE_SIZE_GENERIC(nvram) AM_RANGE(0x9fc000, 0x9ffffd) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
AM_RANGE(0x9ffffe, 0x9fffff) AM_WRITE(arcadia_multibios_change_game) AM_RANGE(0x9ffffe, 0x9fffff) AM_WRITE(arcadia_multibios_change_game)
@ -760,8 +763,8 @@ static void arcadia_init(running_machine *machine)
amiga_machine_config(machine, &arcadia_intf); amiga_machine_config(machine, &arcadia_intf);
/* set up memory */ /* set up memory */
memory_configure_bank(machine, 1, 0, 1, amiga_chip_ram, 0); memory_configure_bank(machine, "bank1", 0, 1, amiga_chip_ram, 0);
memory_configure_bank(machine, 1, 1, 1, memory_region(machine, "user1"), 0); memory_configure_bank(machine, "bank1", 1, 1, memory_region(machine, "user1"), 0);
/* OnePlay bios is encrypted, TenPlay is not */ /* OnePlay bios is encrypted, TenPlay is not */
biosrom = (UINT16 *)memory_region(machine, "user2"); biosrom = (UINT16 *)memory_region(machine, "user2");

8
src/mame/drivers/argus.c
View File

@ -169,7 +169,7 @@ static WRITE8_HANDLER( argus_bankselect_w )
int bankaddress; int bankaddress;
bankaddress = 0x10000 + ((data & 7) * 0x4000); bankaddress = 0x10000 + ((data & 7) * 0x4000);
memory_set_bankptr(space->machine, 1, &RAM[bankaddress]); /* Select 8 banks of 16k */ memory_set_bankptr(space->machine, "bank1", &RAM[bankaddress]); /* Select 8 banks of 16k */
} }
@ -181,7 +181,7 @@ static WRITE8_HANDLER( argus_bankselect_w )
static ADDRESS_MAP_START( argus_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( argus_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_RAMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_RAMBANK("bank1")
AM_RANGE(0xc000, 0xc000) AM_READ_PORT("SYSTEM") AM_RANGE(0xc000, 0xc000) AM_READ_PORT("SYSTEM")
AM_RANGE(0xc001, 0xc001) AM_READ_PORT("P1") AM_RANGE(0xc001, 0xc001) AM_READ_PORT("P1")
AM_RANGE(0xc002, 0xc002) AM_READ_PORT("P2") AM_RANGE(0xc002, 0xc002) AM_READ_PORT("P2")
@ -205,7 +205,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( valtric_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( valtric_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_RAMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_RAMBANK("bank1")
AM_RANGE(0xc000, 0xc000) AM_READ_PORT("SYSTEM") AM_RANGE(0xc000, 0xc000) AM_READ_PORT("SYSTEM")
AM_RANGE(0xc001, 0xc001) AM_READ_PORT("P1") AM_RANGE(0xc001, 0xc001) AM_READ_PORT("P1")
AM_RANGE(0xc002, 0xc002) AM_READ_PORT("P2") AM_RANGE(0xc002, 0xc002) AM_READ_PORT("P2")
@ -229,7 +229,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( butasan_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( butasan_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_RAMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_RAMBANK("bank1")
AM_RANGE(0xc000, 0xc000) AM_READ_PORT("SYSTEM") AM_RANGE(0xc000, 0xc000) AM_READ_PORT("SYSTEM")
AM_RANGE(0xc001, 0xc001) AM_READ_PORT("P1") AM_RANGE(0xc001, 0xc001) AM_READ_PORT("P1")
AM_RANGE(0xc002, 0xc002) AM_READ_PORT("P2") AM_RANGE(0xc002, 0xc002) AM_READ_PORT("P2")

8
src/mame/drivers/ashnojoe.c
View File

@ -141,7 +141,7 @@ static READ8_HANDLER( sound_latch_status_r )
static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM AM_RANGE(0x0000, 0x5fff) AM_ROM
AM_RANGE(0x6000, 0x7fff) AM_RAM AM_RANGE(0x6000, 0x7fff) AM_RAM
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(4) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank4")
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_portmap, ADDRESS_SPACE_IO, 8 ) static ADDRESS_MAP_START( sound_portmap, ADDRESS_SPACE_IO, 8 )
@ -291,7 +291,7 @@ static WRITE8_DEVICE_HANDLER( ym2203_write_a )
static WRITE8_DEVICE_HANDLER( ym2203_write_b ) static WRITE8_DEVICE_HANDLER( ym2203_write_b )
{ {
memory_set_bank(device->machine, 4, data & 0x0f); memory_set_bank(device->machine, "bank4", data & 0x0f);
} }
static const ym2203_interface ym2203_config = static const ym2203_interface ym2203_config =
@ -471,9 +471,9 @@ ROM_END
static DRIVER_INIT( ashnojoe ) static DRIVER_INIT( ashnojoe )
{ {
UINT8 *ROM = memory_region(machine, "adpcm"); UINT8 *ROM = memory_region(machine, "adpcm");
memory_configure_bank(machine, 4, 0, 16, &ROM[0x00000], 0x8000); memory_configure_bank(machine, "bank4", 0, 16, &ROM[0x00000], 0x8000);
memory_set_bank(machine, 4, 0); memory_set_bank(machine, "bank4", 0);
} }
GAME( 1990, scessjoe, 0, ashnojoe, ashnojoe, ashnojoe, ROT0, "WAVE / Taito Corporation", "Success Joe (World)", GAME_SUPPORTS_SAVE ) GAME( 1990, scessjoe, 0, ashnojoe, ashnojoe, ashnojoe, ROT0, "WAVE / Taito Corporation", "Success Joe (World)", GAME_SUPPORTS_SAVE )

8
src/mame/drivers/asteroid.c
View File

@ -237,8 +237,8 @@ static WRITE8_HANDLER( llander_led_w )
static ADDRESS_MAP_START( asteroid_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( asteroid_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x7fff) ADDRESS_MAP_GLOBAL_MASK(0x7fff)
AM_RANGE(0x0000, 0x01ff) AM_RAM AM_RANGE(0x0000, 0x01ff) AM_RAM
AM_RANGE(0x0200, 0x02ff) AM_RAMBANK(1) AM_BASE(&asteroid_ram1) AM_RANGE(0x0200, 0x02ff) AM_RAMBANK("bank1") AM_BASE(&asteroid_ram1)
AM_RANGE(0x0300, 0x03ff) AM_RAMBANK(2) AM_BASE(&asteroid_ram2) AM_RANGE(0x0300, 0x03ff) AM_RAMBANK("bank2") AM_BASE(&asteroid_ram2)
AM_RANGE(0x2000, 0x2007) AM_READ(asteroid_IN0_r) /* IN0 */ AM_RANGE(0x2000, 0x2007) AM_READ(asteroid_IN0_r) /* IN0 */
AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r) /* IN1 */ AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r) /* IN1 */
AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r) /* DSW1 */ AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r) /* DSW1 */
@ -258,8 +258,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( astdelux_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( astdelux_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x7fff) ADDRESS_MAP_GLOBAL_MASK(0x7fff)
AM_RANGE(0x0000, 0x01ff) AM_RAM AM_RANGE(0x0000, 0x01ff) AM_RAM
AM_RANGE(0x0200, 0x02ff) AM_RAMBANK(1) AM_BASE(&asteroid_ram1) AM_RANGE(0x0200, 0x02ff) AM_RAMBANK("bank1") AM_BASE(&asteroid_ram1)
AM_RANGE(0x0300, 0x03ff) AM_RAMBANK(2) AM_BASE(&asteroid_ram2) AM_RANGE(0x0300, 0x03ff) AM_RAMBANK("bank2") AM_BASE(&asteroid_ram2)
AM_RANGE(0x2000, 0x2007) AM_READ(asteroid_IN0_r) /* IN0 */ AM_RANGE(0x2000, 0x2007) AM_READ(asteroid_IN0_r) /* IN0 */
AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r) /* IN1 */ AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r) /* IN1 */
AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r) /* DSW1 */ AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r) /* DSW1 */

12
src/mame/drivers/astrocde.c
View File

@ -428,8 +428,8 @@ static WRITE8_HANDLER( profpac_banksw_w )
profpac_bank = data; profpac_bank = data;
/* set the main banking */ /* set the main banking */
memory_install_read8_handler(space, 0x4000, 0xbfff, 0, 0, (read8_space_func)SMH_BANK(1)); memory_install_read_bank_handler(space, 0x4000, 0xbfff, 0, 0, "bank1");
memory_set_bankptr(space->machine, 1, memory_region(space->machine, "user1") + 0x8000 * bank); memory_set_bankptr(space->machine, "bank1", memory_region(space->machine, "user1") + 0x8000 * bank);
/* bank 0 reads video RAM in the 4000-7FFF range */ /* bank 0 reads video RAM in the 4000-7FFF range */
if (bank == 0) if (bank == 0)
@ -444,8 +444,8 @@ static WRITE8_HANDLER( profpac_banksw_w )
/* if the bank is in range, map the appropriate bank */ /* if the bank is in range, map the appropriate bank */
if (bank < 0x28) if (bank < 0x28)
{ {
memory_install_read8_handler(space, 0x4000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(2)); memory_install_read_bank_handler(space, 0x4000, 0x7fff, 0, 0, "bank2");
memory_set_bankptr(space->machine, 2, memory_region(space->machine, "user2") + 0x4000 * bank); memory_set_bankptr(space->machine, "bank2", memory_region(space->machine, "user2") + 0x4000 * bank);
} }
else else
memory_install_read8_handler(space, 0x4000, 0x7fff, 0, 0, (read8_space_func)SMH_UNMAP); memory_install_read8_handler(space, 0x4000, 0x7fff, 0, 0, (read8_space_func)SMH_UNMAP);
@ -629,7 +629,7 @@ static ADDRESS_MAP_START( profpac_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x0000, 0x3fff) AM_WRITE(astrocade_funcgen_w) AM_RANGE(0x0000, 0x3fff) AM_WRITE(astrocade_funcgen_w)
AM_RANGE(0x4000, 0x7fff) AM_READWRITE(profpac_videoram_r, profpac_videoram_w) AM_RANGE(0x4000, 0x7fff) AM_READWRITE(profpac_videoram_r, profpac_videoram_w)
AM_RANGE(0x4000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x4000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xdfff) AM_ROM AM_RANGE(0xc000, 0xdfff) AM_ROM
AM_RANGE(0xe000, 0xe1ff) AM_READWRITE(protected_ram_r, protected_ram_w) AM_BASE(&protected_ram) AM_RANGE(0xe000, 0xe1ff) AM_READWRITE(protected_ram_r, protected_ram_w) AM_BASE(&protected_ram)
AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
@ -641,7 +641,7 @@ static ADDRESS_MAP_START( demndrgn_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x0000, 0x3fff) AM_WRITE(astrocade_funcgen_w) AM_RANGE(0x0000, 0x3fff) AM_WRITE(astrocade_funcgen_w)
AM_RANGE(0x4000, 0x7fff) AM_READWRITE(profpac_videoram_r, profpac_videoram_w) AM_RANGE(0x4000, 0x7fff) AM_READWRITE(profpac_videoram_r, profpac_videoram_w)
AM_RANGE(0x4000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x4000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xdfff) AM_ROM AM_RANGE(0xc000, 0xdfff) AM_ROM
AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
AM_RANGE(0xe800, 0xffff) AM_RAM AM_RANGE(0xe800, 0xffff) AM_RAM

14
src/mame/drivers/asuka.c
View File

@ -257,12 +257,12 @@ static INTERRUPT_GEN( cadash_interrupt )
static WRITE8_HANDLER( sound_bankswitch_w ) static WRITE8_HANDLER( sound_bankswitch_w )
{ {
memory_set_bankptr(space->machine, 1, memory_region(space->machine, "audiocpu") + ((data-1) & 0x03) * 0x4000 + 0x10000 ); memory_set_bankptr(space->machine, "bank1", memory_region(space->machine, "audiocpu") + ((data-1) & 0x03) * 0x4000 + 0x10000 );
} }
static WRITE8_DEVICE_HANDLER( sound_bankswitch_2151_w ) static WRITE8_DEVICE_HANDLER( sound_bankswitch_2151_w )
{ {
memory_set_bankptr(device->machine, 1, memory_region(device->machine, "audiocpu") + ((data-1) & 0x03) * 0x4000 + 0x10000 ); memory_set_bankptr(device->machine, "bank1", memory_region(device->machine, "audiocpu") + ((data-1) & 0x03) * 0x4000 + 0x10000 );
} }
@ -303,8 +303,8 @@ static WRITE8_DEVICE_HANDLER( asuka_msm5205_stop_w )
static MACHINE_START( asuka ) static MACHINE_START( asuka )
{ {
/* configure the banks */ /* configure the banks */
memory_configure_bank(machine, 1, 0, 1, memory_region(machine, "audiocpu"), 0); memory_configure_bank(machine, "bank1", 0, 1, memory_region(machine, "audiocpu"), 0);
memory_configure_bank(machine, 1, 1, 3, memory_region(machine, "audiocpu") + 0x10000, 0x04000); memory_configure_bank(machine, "bank1", 1, 3, memory_region(machine, "audiocpu") + 0x10000, 0x04000);
state_save_register_global(machine, adpcm_pos); state_save_register_global(machine, adpcm_pos);
} }
@ -389,7 +389,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( bonzeadv_z80_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( bonzeadv_z80_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xdfff) AM_RAM AM_RANGE(0xc000, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xe003) AM_DEVREADWRITE("ymsnd", ym2610_r, ym2610_w) AM_RANGE(0xe000, 0xe003) AM_DEVREADWRITE("ymsnd", ym2610_r, ym2610_w)
AM_RANGE(0xe200, 0xe200) AM_WRITE(taitosound_slave_port_w) AM_RANGE(0xe200, 0xe200) AM_WRITE(taitosound_slave_port_w)
@ -403,7 +403,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( z80_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( z80_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0x8fff) AM_RAM AM_RANGE(0x8000, 0x8fff) AM_RAM
AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w) AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
// AM_RANGE(0x9002, 0x9100) AM_READNOP // AM_RANGE(0x9002, 0x9100) AM_READNOP
@ -417,7 +417,7 @@ ADDRESS_MAP_END
/* no MSM5205 */ /* no MSM5205 */
static ADDRESS_MAP_START( cadash_z80_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( cadash_z80_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0x8fff) AM_RAM AM_RANGE(0x8000, 0x8fff) AM_RAM
AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w) AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
AM_RANGE(0xa000, 0xa000) AM_WRITE(taitosound_slave_port_w) AM_RANGE(0xa000, 0xa000) AM_WRITE(taitosound_slave_port_w)

10
src/mame/drivers/ataxx.c
View File

@ -46,8 +46,8 @@
static ADDRESS_MAP_START( master_map_program, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( master_map_program, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x2000, 0x9fff) AM_ROMBANK(1) AM_RANGE(0x2000, 0x9fff) AM_ROMBANK("bank1")
AM_RANGE(0xa000, 0xdfff) AM_ROMBANK(2) AM_RANGE(0xa000, 0xdfff) AM_ROMBANK("bank2")
AM_RANGE(0xa000, 0xdfff) AM_WRITE(ataxx_battery_ram_w) AM_RANGE(0xa000, 0xdfff) AM_WRITE(ataxx_battery_ram_w)
AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_RANGE(0xe000, 0xf7ff) AM_RAM
AM_RANGE(0xf800, 0xffff) AM_READWRITE(ataxx_paletteram_and_misc_r, ataxx_paletteram_and_misc_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0xf800, 0xffff) AM_READWRITE(ataxx_paletteram_and_misc_r, ataxx_paletteram_and_misc_w) AM_BASE_GENERIC(paletteram)
@ -76,7 +76,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( slave_map_program, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( slave_map_program, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x2000, 0x9fff) AM_ROMBANK(3) AM_RANGE(0x2000, 0x9fff) AM_ROMBANK("bank3")
AM_RANGE(0xa000, 0xdfff) AM_ROM AM_RANGE(0xa000, 0xdfff) AM_ROM
AM_RANGE(0xe000, 0xefff) AM_RAM AM_RANGE(0xe000, 0xefff) AM_RAM
AM_RANGE(0xfffc, 0xfffd) AM_WRITE(leland_slave_video_addr_w) AM_RANGE(0xfffc, 0xfffd) AM_WRITE(leland_slave_video_addr_w)
@ -777,8 +777,8 @@ static DRIVER_INIT( asylum )
leland_rotate_memory(machine, "slave"); leland_rotate_memory(machine, "slave");
/* asylum appears to have some extra RAM for the slave CPU */ /* asylum appears to have some extra RAM for the slave CPU */
memory_install_readwrite8_handler(cputag_get_address_space(machine, "slave", ADDRESS_SPACE_PROGRAM), 0xf000, 0xfffb, 0, 0, (read8_space_func)SMH_BANK(4), (write8_space_func)SMH_BANK(4)); memory_install_readwrite_bank_handler(cputag_get_address_space(machine, "slave", ADDRESS_SPACE_PROGRAM), 0xf000, 0xfffb, 0, 0, "bank4");
memory_set_bankptr(machine, 4, auto_alloc_array(machine, UINT8, 0x1000)); memory_set_bankptr(machine, "bank4", auto_alloc_array(machine, UINT8, 0x1000));
/* set up additional input ports */ /* set up additional input ports */
memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x0d, 0x0d, 0, 0, "P2"); memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x0d, 0x0d, 0, 0, "P2");

4
src/mame/drivers/balsente.c
View File

@ -259,8 +259,8 @@ static ADDRESS_MAP_START( cpu1_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x9a00, 0x9a03) AM_READ(balsente_random_num_r) AM_RANGE(0x9a00, 0x9a03) AM_READ(balsente_random_num_r)
AM_RANGE(0x9a04, 0x9a05) AM_READWRITE(balsente_m6850_r, balsente_m6850_w) AM_RANGE(0x9a04, 0x9a05) AM_READWRITE(balsente_m6850_r, balsente_m6850_w)
AM_RANGE(0x9b00, 0x9cff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) /* system+cart NOVRAM */ AM_RANGE(0x9b00, 0x9cff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) /* system+cart NOVRAM */
AM_RANGE(0xa000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0xa000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xffff) AM_ROMBANK(2) AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bank2")
ADDRESS_MAP_END ADDRESS_MAP_END

4
src/mame/drivers/battlera.c
View File

@ -81,7 +81,7 @@ static ADDRESS_MAP_START( battlera_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x100000, 0x10ffff) AM_READWRITE(HuC6270_debug_r, HuC6270_debug_w) /* Cheat to edit vram data */ AM_RANGE(0x100000, 0x10ffff) AM_READWRITE(HuC6270_debug_r, HuC6270_debug_w) /* Cheat to edit vram data */
AM_RANGE(0x1e0800, 0x1e0801) AM_WRITE(battlera_sound_w) AM_RANGE(0x1e0800, 0x1e0801) AM_WRITE(battlera_sound_w)
AM_RANGE(0x1e1000, 0x1e13ff) AM_WRITE(battlera_palette_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x1e1000, 0x1e13ff) AM_WRITE(battlera_palette_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8) /* Main ram */ AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank8") /* Main ram */
AM_RANGE(0x1fe000, 0x1fe001) AM_READWRITE(HuC6270_register_r, HuC6270_register_w) AM_RANGE(0x1fe000, 0x1fe001) AM_READWRITE(HuC6270_register_r, HuC6270_register_w)
AM_RANGE(0x1fe002, 0x1fe003) AM_WRITE(HuC6270_data_w) AM_RANGE(0x1fe002, 0x1fe003) AM_WRITE(HuC6270_data_w)
AM_RANGE(0x1ff000, 0x1ff001) AM_READWRITE(control_data_r, control_data_w) AM_RANGE(0x1ff000, 0x1ff001) AM_READWRITE(control_data_r, control_data_w)
@ -124,7 +124,7 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x040000, 0x040001) AM_DEVWRITE("ymsnd", ym2203_w) AM_RANGE(0x040000, 0x040001) AM_DEVWRITE("ymsnd", ym2203_w)
AM_RANGE(0x080000, 0x080001) AM_WRITE(battlera_adpcm_data_w) AM_RANGE(0x080000, 0x080001) AM_WRITE(battlera_adpcm_data_w)
AM_RANGE(0x1fe800, 0x1fe80f) AM_DEVWRITE("c6280", c6280_w) AM_RANGE(0x1fe800, 0x1fe80f) AM_DEVWRITE("c6280", c6280_w)
AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(7) /* Main ram */ AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank7") /* Main ram */
AM_RANGE(0x1ff000, 0x1ff001) AM_READ(soundlatch_r) AM_DEVWRITE("msm", battlera_adpcm_reset_w) AM_RANGE(0x1ff000, 0x1ff001) AM_READ(soundlatch_r) AM_DEVWRITE("msm", battlera_adpcm_reset_w)
AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w) AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
ADDRESS_MAP_END ADDRESS_MAP_END

4
src/mame/drivers/battlnts.c
View File

@ -40,7 +40,7 @@ static WRITE8_HANDLER( battlnts_bankswitch_w )
/* bits 6 & 7 = bank number */ /* bits 6 & 7 = bank number */
bankaddress = 0x10000 + ((data & 0xc0) >> 6) * 0x4000; bankaddress = 0x10000 + ((data & 0xc0) >> 6) * 0x4000;
memory_set_bankptr(space->machine, 1,&RAM[bankaddress]); memory_set_bankptr(space->machine, "bank1",&RAM[bankaddress]);
/* bits 4 & 5 = coin counters */ /* bits 4 & 5 = coin counters */
coin_counter_w(space->machine, 0,data & 0x10); coin_counter_w(space->machine, 0,data & 0x10);
@ -65,7 +65,7 @@ static ADDRESS_MAP_START( battlnts_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2e10, 0x2e10) AM_WRITE(watchdog_reset_w) /* watchdog reset */ AM_RANGE(0x2e10, 0x2e10) AM_WRITE(watchdog_reset_w) /* watchdog reset */
AM_RANGE(0x2e14, 0x2e14) AM_WRITE(soundlatch_w) /* sound code # */ AM_RANGE(0x2e14, 0x2e14) AM_WRITE(soundlatch_w) /* sound code # */
AM_RANGE(0x2e18, 0x2e18) AM_WRITE(battlnts_sh_irqtrigger_w) /* cause interrupt on audio CPU */ AM_RANGE(0x2e18, 0x2e18) AM_WRITE(battlnts_sh_irqtrigger_w) /* cause interrupt on audio CPU */
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) /* banked ROM */ AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM 777e02.bin */ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM 777e02.bin */
ADDRESS_MAP_END ADDRESS_MAP_END

2
src/mame/drivers/beezer.c
View File

@ -16,7 +16,7 @@
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_RAM AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram) AM_RANGE(0x0000, 0xbfff) AM_RAM AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)
AM_RANGE(0xc000, 0xcfff) AM_ROMBANK(1) AM_RANGE(0xc000, 0xcfff) AM_ROMBANK("bank1")
AM_RANGE(0xd000, 0xffff) AM_ROM AM_WRITE(beezer_bankswitch_w) AM_RANGE(0xd000, 0xffff) AM_ROM AM_WRITE(beezer_bankswitch_w)
ADDRESS_MAP_END ADDRESS_MAP_END

29
src/mame/drivers/bfcobra.c
View File

@ -121,7 +121,7 @@ static UINT32 mux_outputlatch;
/* /*
Function prototypes Function prototypes
*/ */
INLINE void z80_bank(running_machine *machine, int num, int data); INLINE void z80_bank(running_machine *machine, const char *bank, int data);
static void update_irqs(running_machine *machine) static void update_irqs(running_machine *machine)
@ -882,12 +882,13 @@ static WRITE8_HANDLER( chipset_w )
case 0x02: case 0x02:
case 0x03: case 0x03:
{ {
static const char * const bankname[] = { "bank1", "bank2", "bank3" };
if (data > 0x3f) if (data > 0x3f)
popmessage("%x: Unusual bank access (%x)\n", cpu_get_previouspc(space->cpu), data); popmessage("%x: Unusual bank access (%x)\n", cpu_get_previouspc(space->cpu), data);
data &= 0x3f; data &= 0x3f;
bank[offset] = data; bank[offset] = data;
z80_bank(space->machine, offset, data); z80_bank(space->machine, bankname[offset - 1], data);
break; break;
} }
@ -962,7 +963,7 @@ static WRITE8_HANDLER( chipset_w )
} }
} }
INLINE void z80_bank(running_machine *machine, int num, int data) INLINE void z80_bank(running_machine *machine, const char *bank, int data)
{ {
if (data < 0x08) if (data < 0x08)
{ {
@ -975,24 +976,24 @@ INLINE void z80_bank(running_machine *machine, int num, int data)
UINT32 offset = ((bank[0] >> 1) * 0x20000) + offs_table[bank[0] & 0x1][data]; UINT32 offset = ((bank[0] >> 1) * 0x20000) + offs_table[bank[0] & 0x1][data];
memory_set_bankptr(machine, num, memory_region(machine, "user1") + offset); memory_set_bankptr(machine, bank, memory_region(machine, "user1") + offset);
} }
else if (data < 0x10) else if (data < 0x10)
{ {
memory_set_bankptr(machine, num, &video_ram[(data - 0x08) * 0x4000]); memory_set_bankptr(machine, bank, &video_ram[(data - 0x08) * 0x4000]);
} }
else else
{ {
memory_set_bankptr(machine, num, &work_ram[(data - 0x10) * 0x4000]); memory_set_bankptr(machine, bank, &work_ram[(data - 0x10) * 0x4000]);
} }
} }
static WRITE8_HANDLER( rombank_w ) static WRITE8_HANDLER( rombank_w )
{ {
bank[0] = data; bank[0] = data;
z80_bank(space->machine, 1, bank[1]); z80_bank(space->machine, "bank1", bank[1]);
z80_bank(space->machine, 2, bank[2]); z80_bank(space->machine, "bank2", bank[2]);
z80_bank(space->machine, 3, bank[3]); z80_bank(space->machine, "bank3", bank[3]);
} }
@ -1306,10 +1307,10 @@ static MACHINE_RESET( bfcobra )
***************************************************************************/ ***************************************************************************/
static ADDRESS_MAP_START( z80_prog_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( z80_prog_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROMBANK(4) AM_RANGE(0x0000, 0x3fff) AM_ROMBANK("bank4")
AM_RANGE(0x4000, 0x7fff) AM_RAMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_RAMBANK("bank1")
AM_RANGE(0x8000, 0xbfff) AM_RAMBANK(2) AM_RANGE(0x8000, 0xbfff) AM_RAMBANK("bank2")
AM_RANGE(0xc000, 0xffff) AM_RAMBANK(3) AM_RANGE(0xc000, 0xffff) AM_RAMBANK("bank3")
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( z80_io_map, ADDRESS_SPACE_IO, 8 ) static ADDRESS_MAP_START( z80_io_map, ADDRESS_SPACE_IO, 8 )
@ -1700,7 +1701,7 @@ static DRIVER_INIT( bfcobra )
bank[3] = 0; bank[3] = 0;
/* Fixed 16kB ROM region */ /* Fixed 16kB ROM region */
memory_set_bankptr(machine, 4, memory_region(machine, "user1")); memory_set_bankptr(machine, "bank4", memory_region(machine, "user1"));
/* TODO: Properly sort out the data ACIA */ /* TODO: Properly sort out the data ACIA */
data_r = 1; data_r = 1;

14
src/mame/drivers/bfm_sc1.c
View File

@ -152,7 +152,7 @@ static int Scorpion1_GetSwitchState(int strobe, int data)
static WRITE8_HANDLER( bankswitch_w ) static WRITE8_HANDLER( bankswitch_w )
{ {
memory_set_bank(space->machine,1,data & 0x03); memory_set_bank(space->machine,"bank1",data & 0x03);
} }
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
@ -752,10 +752,10 @@ static MACHINE_RESET( bfm_sc1 )
{ {
UINT8 *rom = memory_region(machine, "maincpu"); UINT8 *rom = memory_region(machine, "maincpu");
memory_configure_bank(machine,1, 0, 1, &rom[0x10000], 0); memory_configure_bank(machine,"bank1", 0, 1, &rom[0x10000], 0);
memory_configure_bank(machine,1, 1, 3, &rom[0x02000], 0x02000); memory_configure_bank(machine,"bank1", 1, 3, &rom[0x02000], 0x02000);
memory_set_bank(machine,1,3); memory_set_bank(machine,"bank1",3);
} }
} }
@ -797,7 +797,7 @@ static ADDRESS_MAP_START( memmap, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3800, 0x39FF) AM_WRITE(reel56_w) // reel 5+6 latch AM_RANGE(0x3800, 0x39FF) AM_WRITE(reel56_w) // reel 5+6 latch
AM_RANGE(0x4000, 0x5FFF) AM_ROM // 8k ROM AM_RANGE(0x4000, 0x5FFF) AM_ROM // 8k ROM
AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK(1) // 8k paged ROM (4 pages) AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK("bank1") // 8k paged ROM (4 pages)
AM_RANGE(0x8000, 0xFFFF) AM_RAM AM_WRITE(watchdog_w) // 32k ROM AM_RANGE(0x8000, 0xFFFF) AM_RAM AM_WRITE(watchdog_w) // 32k ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -845,7 +845,7 @@ static ADDRESS_MAP_START( memmap_adder2, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3E01, 0x3E01) AM_READWRITE(vid_uart_rx_r,vid_uart_tx_w) // video uart receive reg AM_RANGE(0x3E01, 0x3E01) AM_READWRITE(vid_uart_rx_r,vid_uart_tx_w) // video uart receive reg
AM_RANGE(0x4000, 0x5FFF) AM_ROM // 8k ROM AM_RANGE(0x4000, 0x5FFF) AM_ROM // 8k ROM
AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK(1) // 8k paged ROM (4 pages) AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK("bank1") // 8k paged ROM (4 pages)
AM_RANGE(0x8000, 0xFFFF) AM_ROM AM_WRITE(watchdog_w) // 32k ROM AM_RANGE(0x8000, 0xFFFF) AM_ROM AM_WRITE(watchdog_w) // 32k ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -890,7 +890,7 @@ static ADDRESS_MAP_START( sc1_nec_uk, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3800, 0x39FF) AM_DEVWRITE("upd", nec_latch_w) AM_RANGE(0x3800, 0x39FF) AM_DEVWRITE("upd", nec_latch_w)
AM_RANGE(0x4000, 0x5FFF) AM_ROM // 8k ROM AM_RANGE(0x4000, 0x5FFF) AM_ROM // 8k ROM
AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK(1) // 8k paged ROM (4 pages) AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK("bank1") // 8k paged ROM (4 pages)
AM_RANGE(0x8000, 0xFFFF) AM_ROM AM_WRITE(watchdog_w) // 32k ROM AM_RANGE(0x8000, 0xFFFF) AM_ROM AM_WRITE(watchdog_w) // 32k ROM
ADDRESS_MAP_END ADDRESS_MAP_END

16
src/mame/drivers/bfm_sc2.c
View File

@ -369,10 +369,10 @@ send data to them, although obviously there's no response. */
{ {
UINT8 *rom = memory_region(machine, "maincpu"); UINT8 *rom = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 1, &rom[0x10000], 0); memory_configure_bank(machine, "bank1", 0, 1, &rom[0x10000], 0);
memory_configure_bank(machine, 1, 1, 3, &rom[0x02000], 0x02000); memory_configure_bank(machine, "bank1", 1, 3, &rom[0x02000], 0x02000);
memory_set_bank(machine, 1,3); memory_set_bank(machine, "bank1",3);
} }
} }
@ -487,7 +487,7 @@ static WRITE8_HANDLER( watchdog_w )
static WRITE8_HANDLER( bankswitch_w ) static WRITE8_HANDLER( bankswitch_w )
{ {
memory_set_bank(space->machine, 1,data & 0x03); memory_set_bank(space->machine, "bank1",data & 0x03);
} }
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
@ -1556,7 +1556,7 @@ static ADDRESS_MAP_START( memmap_vid, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3FFF, 0x3FFF) AM_READ(coin_input_r) AM_RANGE(0x3FFF, 0x3FFF) AM_READ(coin_input_r)
AM_RANGE(0x4000, 0x5fff) AM_ROM // 8k fixed ROM AM_RANGE(0x4000, 0x5fff) AM_ROM // 8k fixed ROM
AM_RANGE(0x4000, 0xFFFF) AM_WRITE(unknown_w) // contains unknown I/O registers AM_RANGE(0x4000, 0xFFFF) AM_WRITE(unknown_w) // contains unknown I/O registers
AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK(1) // 8k paged ROM (4 pages) AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK("bank1") // 8k paged ROM (4 pages)
AM_RANGE(0x8000, 0xFFFF) AM_ROM // 32k ROM AM_RANGE(0x8000, 0xFFFF) AM_ROM // 32k ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -2790,7 +2790,7 @@ static ADDRESS_MAP_START( sc2_memmap, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3FFF, 0x3FFF) AM_READ( coin_input_r) AM_RANGE(0x3FFF, 0x3FFF) AM_READ( coin_input_r)
AM_RANGE(0x4000, 0x5FFF) AM_ROM /* 8k fixed ROM */ AM_RANGE(0x4000, 0x5FFF) AM_ROM /* 8k fixed ROM */
AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK(1) /* 8k paged ROM (4 pages) */ AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK("bank1") /* 8k paged ROM (4 pages) */
AM_RANGE(0x8000, 0xFFFF) AM_ROM /* 32k ROM */ AM_RANGE(0x8000, 0xFFFF) AM_ROM /* 32k ROM */
ADDRESS_MAP_END ADDRESS_MAP_END
@ -2839,7 +2839,7 @@ static ADDRESS_MAP_START( sc3_memmap, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3FFF, 0x3FFF) AM_READ( coin_input_r) AM_RANGE(0x3FFF, 0x3FFF) AM_READ( coin_input_r)
AM_RANGE(0x4000, 0x5FFF) AM_ROM AM_RANGE(0x4000, 0x5FFF) AM_ROM
// AM_RANGE(0x4000, 0xFFFF) AM_WRITE(unknown_w) // AM_RANGE(0x4000, 0xFFFF) AM_WRITE(unknown_w)
AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK(1) AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xFFFF) AM_ROM AM_RANGE(0x8000, 0xFFFF) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -2889,7 +2889,7 @@ static ADDRESS_MAP_START( memmap_sc2_dm01, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3FFF, 0x3FFF) AM_READ( coin_input_r) AM_RANGE(0x3FFF, 0x3FFF) AM_READ( coin_input_r)
AM_RANGE(0x4000, 0x5FFF) AM_ROM AM_RANGE(0x4000, 0x5FFF) AM_ROM
// AM_RANGE(0x4000, 0xFFFF) AM_WRITE(unknown_w) // AM_RANGE(0x4000, 0xFFFF) AM_WRITE(unknown_w)
AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK(1) AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xFFFF) AM_ROM AM_RANGE(0x8000, 0xFFFF) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END

6
src/mame/drivers/bigevglf.c
View File

@ -72,7 +72,7 @@ static WRITE8_HANDLER( beg_banking_w )
/* d0-d3 connect to A11-A14 of the ROMs (via ls273 latch) /* d0-d3 connect to A11-A14 of the ROMs (via ls273 latch)
d4-d7 select one of ROMs (via ls273(above) and then ls154) d4-d7 select one of ROMs (via ls273(above) and then ls154)
*/ */
memory_set_bank(space->machine, 1, state->beg_bank & 0xff); /* empty sockets for IC37-IC44 ROMS */ memory_set_bank(space->machine, "bank1", state->beg_bank & 0xff); /* empty sockets for IC37-IC44 ROMS */
} }
static TIMER_CALLBACK( from_sound_latch_callback ) static TIMER_CALLBACK( from_sound_latch_callback )
@ -310,7 +310,7 @@ INPUT_PORTS_END
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_ROM AM_RANGE(0x0000, 0xbfff) AM_ROM
AM_RANGE(0xc000, 0xcfff) AM_RAM AM_RANGE(0xc000, 0xcfff) AM_RAM
AM_RANGE(0xd000, 0xd7ff) AM_ROMBANK(1) AM_RANGE(0xd000, 0xd7ff) AM_ROMBANK("bank1")
AM_RANGE(0xd800, 0xdbff) AM_RAM AM_SHARE(1) /* only half of the RAM is accessible, line a10 of IC73 (6116) is GNDed */ AM_RANGE(0xd800, 0xdbff) AM_RAM AM_SHARE(1) /* only half of the RAM is accessible, line a10 of IC73 (6116) is GNDed */
AM_RANGE(0xe000, 0xe7ff) AM_WRITE(bigevglf_palette_w) AM_BASE_MEMBER(bigevglf_state, paletteram) AM_RANGE(0xe000, 0xe7ff) AM_WRITE(bigevglf_palette_w) AM_BASE_MEMBER(bigevglf_state, paletteram)
AM_RANGE(0xe800, 0xefff) AM_WRITEONLY AM_BASE_MEMBER(bigevglf_state, spriteram1) /* sprite 'templates' */ AM_RANGE(0xe800, 0xefff) AM_WRITEONLY AM_BASE_MEMBER(bigevglf_state, spriteram1) /* sprite 'templates' */
@ -637,7 +637,7 @@ ROM_END
static DRIVER_INIT( bigevglf ) static DRIVER_INIT( bigevglf )
{ {
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 0xff, &ROM[0x10000], 0x800); memory_configure_bank(machine, "bank1", 0, 0xff, &ROM[0x10000], 0x800);
} }
GAME( 1986, bigevglf, 0, bigevglf, bigevglf, bigevglf, ROT270, "Taito America Corporation", "Big Event Golf (US)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) GAME( 1986, bigevglf, 0, bigevglf, bigevglf, bigevglf, ROT270, "Taito America Corporation", "Big Event Golf (US)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )

4
src/mame/drivers/bladestl.c
View File

@ -80,7 +80,7 @@ static WRITE8_HANDLER( bladestl_bankswitch_w )
/* bits 5-6 = bank number */ /* bits 5-6 = bank number */
bankaddress = 0x10000 + ((data & 0x60) >> 5) * 0x2000; bankaddress = 0x10000 + ((data & 0x60) >> 5) * 0x2000;
memory_set_bankptr(space->machine, 1,&RAM[bankaddress]); memory_set_bankptr(space->machine, "bank1",&RAM[bankaddress]);
/* bit 7 = select sprite bank */ /* bit 7 = select sprite bank */
bladestl_spritebank = (data & 0x80) << 3; bladestl_spritebank = (data & 0x80) << 3;
@ -126,7 +126,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2f80, 0x2f9f) AM_READWRITE(K051733_r, K051733_w) /* Protection: 051733 */ AM_RANGE(0x2f80, 0x2f9f) AM_READWRITE(K051733_r, K051733_w) /* Protection: 051733 */
AM_RANGE(0x2fc0, 0x2fc0) AM_WRITENOP /* ??? */ AM_RANGE(0x2fc0, 0x2fc0) AM_WRITENOP /* ??? */
AM_RANGE(0x4000, 0x5fff) AM_RAM /* Work RAM */ AM_RANGE(0x4000, 0x5fff) AM_RAM /* Work RAM */
AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(1) /* banked ROM */ AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1") /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END

8
src/mame/drivers/blktiger.c
View File

@ -58,7 +58,7 @@ static WRITE8_HANDLER( blktiger_to_main_w )
static WRITE8_HANDLER( blktiger_bankswitch_w ) static WRITE8_HANDLER( blktiger_bankswitch_w )
{ {
memory_set_bank(space->machine, 1, data & 0x0f); memory_set_bank(space->machine, "bank1", data & 0x0f);
} }
static WRITE8_HANDLER( blktiger_coinlockout_w ) static WRITE8_HANDLER( blktiger_coinlockout_w )
@ -73,7 +73,7 @@ static WRITE8_HANDLER( blktiger_coinlockout_w )
static ADDRESS_MAP_START( blktiger_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( blktiger_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xcfff) AM_READWRITE(blktiger_bgvideoram_r, blktiger_bgvideoram_w) AM_RANGE(0xc000, 0xcfff) AM_READWRITE(blktiger_bgvideoram_r, blktiger_bgvideoram_w)
AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(blktiger_txvideoram_w) AM_BASE_MEMBER(blktiger_state, txvideoram) AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(blktiger_txvideoram_w) AM_BASE_MEMBER(blktiger_state, txvideoram)
AM_RANGE(0xd800, 0xdbff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0xd800, 0xdbff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE_GENERIC(paletteram)
@ -287,7 +287,7 @@ static MACHINE_START( blktiger )
state->mcu = devtag_get_device(machine, "mcu"); state->mcu = devtag_get_device(machine, "mcu");
/* configure bankswitching */ /* configure bankswitching */
memory_configure_bank(machine, 1, 0, 16, memory_region(machine, "maincpu") + 0x10000, 0x4000); memory_configure_bank(machine, "bank1", 0, 16, memory_region(machine, "maincpu") + 0x10000, 0x4000);
state_save_register_global(machine, state->scroll_bank); state_save_register_global(machine, state->scroll_bank);
state_save_register_global(machine, state->screen_layout); state_save_register_global(machine, state->screen_layout);
@ -305,7 +305,7 @@ static MACHINE_RESET( blktiger )
blktiger_state *state = (blktiger_state *)machine->driver_data; blktiger_state *state = (blktiger_state *)machine->driver_data;
/* configure bankswitching */ /* configure bankswitching */
memory_configure_bank(machine, 1, 0, 16, memory_region(machine, "maincpu") + 0x10000, 0x4000); memory_configure_bank(machine, "bank1", 0, 16, memory_region(machine, "maincpu") + 0x10000, 0x4000);
state->scroll_x[0] = 0; state->scroll_x[0] = 0;
state->scroll_x[1] = 0; state->scroll_x[1] = 0;

4
src/mame/drivers/blockhl.c
View File

@ -79,7 +79,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r, K052109_051960_w) AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r, K052109_051960_w)
AM_RANGE(0x4000, 0x57ff) AM_RAM AM_RANGE(0x4000, 0x57ff) AM_RAM
AM_RANGE(0x5800, 0x5fff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE(&ram) AM_RANGE(0x5800, 0x5fff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE(&ram)
AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -251,7 +251,7 @@ static KONAMI_SETLINES_CALLBACK( blockhl_banking )
/* bits 0-1 = ROM bank */ /* bits 0-1 = ROM bank */
rombank = lines & 0x03; rombank = lines & 0x03;
offs = 0x10000 + (lines & 0x03) * 0x2000; offs = 0x10000 + (lines & 0x03) * 0x2000;
memory_set_bankptr(device->machine, 1,&RAM[offs]); memory_set_bankptr(device->machine, "bank1",&RAM[offs]);
/* bits 3/4 = coin counters */ /* bits 3/4 = coin counters */
coin_counter_w(device->machine, 0,lines & 0x08); coin_counter_w(device->machine, 0,lines & 0x08);

4
src/mame/drivers/bnstars.c
View File

@ -1265,7 +1265,7 @@ static ADDRESS_MAP_START( bnstars_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0xfec08000, 0xfec0ffff) AM_RAM_WRITE(ms32_bg0_ram_w) AM_BASE(&ms32_bg0_ram) AM_RANGE(0xfec08000, 0xfec0ffff) AM_RAM_WRITE(ms32_bg0_ram_w) AM_BASE(&ms32_bg0_ram)
AM_RANGE(0xfee00000, 0xfee1ffff) AM_RAM AM_RANGE(0xfee00000, 0xfee1ffff) AM_RAM
AM_RANGE(0xffe00000, 0xffffffff) AM_ROMBANK(1) AM_RANGE(0xffe00000, 0xffffffff) AM_ROMBANK("bank1")
ADDRESS_MAP_END ADDRESS_MAP_END
#if 0 #if 0
@ -1438,7 +1438,7 @@ static DRIVER_INIT (bnstars)
decrypt_ms32_tx(machine, 0x00020,0x7e, "gfx7"); decrypt_ms32_tx(machine, 0x00020,0x7e, "gfx7");
decrypt_ms32_bg(machine, 0x00001,0x9b, "gfx6"); decrypt_ms32_bg(machine, 0x00001,0x9b, "gfx6");
memory_set_bankptr(machine, 1, memory_region(machine, "maincpu")); memory_set_bankptr(machine, "bank1", memory_region(machine, "maincpu"));
} }
GAME( 1997, bnstars1, 0, bnstars, bnstars, bnstars, ROT0, "Jaleco", "Vs. Janshi Brandnew Stars", GAME_NO_SOUND ) GAME( 1997, bnstars1, 0, bnstars, bnstars, bnstars, ROT0, "Jaleco", "Vs. Janshi Brandnew Stars", GAME_NO_SOUND )

2
src/mame/drivers/boogwing.c
View File

@ -137,7 +137,7 @@ static ADDRESS_MAP_START( audio_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w) AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w) AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r) AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8) AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank8")
AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w) AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w) AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
ADDRESS_MAP_END ADDRESS_MAP_END

4
src/mame/drivers/bottom9.c
View File

@ -78,7 +78,7 @@ if ((data & 1) == 0) popmessage("bankswitch RAM bank 0");
/* bit 1-4 = ROM bank */ /* bit 1-4 = ROM bank */
if (data & 0x10) offs = 0x20000 + (data & 0x06) * 0x1000; if (data & 0x10) offs = 0x20000 + (data & 0x06) * 0x1000;
else offs = 0x10000 + (data & 0x0e) * 0x1000; else offs = 0x10000 + (data & 0x0e) * 0x1000;
memory_set_bankptr(space->machine, 1,&RAM[offs]); memory_set_bankptr(space->machine, "bank1",&RAM[offs]);
} }
static WRITE8_HANDLER( bottom9_1f90_w ) static WRITE8_HANDLER( bottom9_1f90_w )
@ -147,7 +147,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2000, 0x27ff) AM_READWRITE(bottom9_bankedram2_r, bottom9_bankedram2_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x2000, 0x27ff) AM_READWRITE(bottom9_bankedram2_r, bottom9_bankedram2_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r, K052109_051960_w) AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r, K052109_051960_w)
AM_RANGE(0x4000, 0x5fff) AM_RAM AM_RANGE(0x4000, 0x5fff) AM_RAM
AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END

6
src/mame/drivers/brkthru.c
View File

@ -117,7 +117,7 @@ static ADDRESS_MAP_START( brkthru_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1800, 0x1801) AM_WRITE(brkthru_1800_w) /* bg scroll and color, ROM bank selection, flip screen */ AM_RANGE(0x1800, 0x1801) AM_WRITE(brkthru_1800_w) /* bg scroll and color, ROM bank selection, flip screen */
AM_RANGE(0x1802, 0x1802) AM_WRITE(brkthru_soundlatch_w) AM_RANGE(0x1802, 0x1802) AM_WRITE(brkthru_soundlatch_w)
AM_RANGE(0x1803, 0x1803) AM_WRITE(brkthru_1803_w) /* NMI enable, + ? */ AM_RANGE(0x1803, 0x1803) AM_WRITE(brkthru_1803_w) /* NMI enable, + ? */
AM_RANGE(0x2000, 0x3fff) AM_ROMBANK(1) AM_RANGE(0x2000, 0x3fff) AM_ROMBANK("bank1")
AM_RANGE(0x4000, 0xffff) AM_ROM AM_RANGE(0x4000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -135,7 +135,7 @@ static ADDRESS_MAP_START( darwin_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0800, 0x0801) AM_WRITE(brkthru_1800_w) /* bg scroll and color, ROM bank selection, flip screen */ AM_RANGE(0x0800, 0x0801) AM_WRITE(brkthru_1800_w) /* bg scroll and color, ROM bank selection, flip screen */
AM_RANGE(0x0802, 0x0802) AM_WRITE(brkthru_soundlatch_w) AM_RANGE(0x0802, 0x0802) AM_WRITE(brkthru_soundlatch_w)
AM_RANGE(0x0803, 0x0803) AM_WRITE(darwin_0803_w) /* NMI enable, + ? */ AM_RANGE(0x0803, 0x0803) AM_WRITE(darwin_0803_w) /* NMI enable, + ? */
AM_RANGE(0x2000, 0x3fff) AM_ROMBANK(1) AM_RANGE(0x2000, 0x3fff) AM_ROMBANK("bank1")
AM_RANGE(0x4000, 0xffff) AM_ROM AM_RANGE(0x4000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -661,7 +661,7 @@ ROM_END
static DRIVER_INIT( brkthru ) static DRIVER_INIT( brkthru )
{ {
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 8, &ROM[0x10000], 0x2000); memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x2000);
} }
/************************************* /*************************************

8
src/mame/drivers/btime.c
View File

@ -2165,8 +2165,8 @@ static DRIVER_INIT( cookrace )
btime_state *state = (btime_state *)machine->driver_data; btime_state *state = (btime_state *)machine->driver_data;
decrypt_C10707_cpu(machine, "maincpu"); decrypt_C10707_cpu(machine, "maincpu");
memory_install_read8_handler(cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM), 0x0200, 0x0fff, 0, 0, (read8_space_func)SMH_BANK(10)); memory_install_read_bank_handler(cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM), 0x0200, 0x0fff, 0, 0, "bank10");
memory_set_bankptr(machine, 10, memory_region(machine, "audiocpu") + 0xe200); memory_set_bankptr(machine, "bank10", memory_region(machine, "audiocpu") + 0xe200);
state->audio_nmi_enable_type = AUDIO_ENABLE_DIRECT; state->audio_nmi_enable_type = AUDIO_ENABLE_DIRECT;
} }
@ -2184,8 +2184,8 @@ static DRIVER_INIT( wtennis )
memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc15f, 0xc15f, 0, 0, wtennis_reset_hack_r); memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc15f, 0xc15f, 0, 0, wtennis_reset_hack_r);
memory_install_read8_handler(cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM), 0x0200, 0x0fff, 0, 0, (read8_space_func)SMH_BANK(10)); memory_install_read_bank_handler(cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM), 0x0200, 0x0fff, 0, 0, "bank10");
memory_set_bankptr(machine, 10, memory_region(machine, "audiocpu") + 0xe200); memory_set_bankptr(machine, "bank10", memory_region(machine, "audiocpu") + 0xe200);
state->audio_nmi_enable_type = AUDIO_ENABLE_AY8910; state->audio_nmi_enable_type = AUDIO_ENABLE_AY8910;
} }

8
src/mame/drivers/bublbobl.c
View File

@ -287,7 +287,7 @@ TODO:
static ADDRESS_MAP_START( master_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( master_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xdcff) AM_RAM AM_BASE_SIZE_MEMBER(bublbobl_state, videoram, videoram_size) AM_RANGE(0xc000, 0xdcff) AM_RAM AM_BASE_SIZE_MEMBER(bublbobl_state, videoram, videoram_size)
AM_RANGE(0xdd00, 0xdfff) AM_RAM AM_BASE_SIZE_MEMBER(bublbobl_state, objectram, objectram_size) AM_RANGE(0xdd00, 0xdfff) AM_RAM AM_BASE_SIZE_MEMBER(bublbobl_state, objectram, objectram_size)
AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE(1) AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE(1)
@ -343,7 +343,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( bootleg_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( bootleg_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xdcff) AM_RAM AM_BASE_SIZE_MEMBER(bublbobl_state, videoram, videoram_size) AM_RANGE(0xc000, 0xdcff) AM_RAM AM_BASE_SIZE_MEMBER(bublbobl_state, videoram, videoram_size)
AM_RANGE(0xdd00, 0xdfff) AM_RAM AM_BASE_SIZE_MEMBER(bublbobl_state, objectram, objectram_size) AM_RANGE(0xdd00, 0xdfff) AM_RAM AM_BASE_SIZE_MEMBER(bublbobl_state, objectram, objectram_size)
AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE(1) AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE(1)
@ -367,7 +367,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( tokio_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( tokio_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xdcff) AM_RAM AM_BASE_SIZE_MEMBER(bublbobl_state, videoram, videoram_size) AM_RANGE(0xc000, 0xdcff) AM_RAM AM_BASE_SIZE_MEMBER(bublbobl_state, videoram, videoram_size)
AM_RANGE(0xdd00, 0xdfff) AM_RAM AM_BASE_SIZE_MEMBER(bublbobl_state, objectram, objectram_size) AM_RANGE(0xdd00, 0xdfff) AM_RAM AM_BASE_SIZE_MEMBER(bublbobl_state, objectram, objectram_size)
AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE(1) AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE(1)
@ -1496,7 +1496,7 @@ ROM_END
static void configure_banks( running_machine* machine ) static void configure_banks( running_machine* machine )
{ {
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 8, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
} }
static DRIVER_INIT( bublbobl ) static DRIVER_INIT( bublbobl )

4
src/mame/drivers/buggychl.c
View File

@ -92,7 +92,7 @@ Dip locations and factory settings verified from dip listing
static WRITE8_HANDLER( bankswitch_w ) static WRITE8_HANDLER( bankswitch_w )
{ {
memory_set_bankptr(space->machine, 1,&memory_region(space->machine, "maincpu")[0x10000 + (data & 7) * 0x2000]); memory_set_bankptr(space->machine, "bank1",&memory_region(space->machine, "maincpu")[0x10000 + (data & 7) * 0x2000]);
} }
static TIMER_CALLBACK( nmi_callback ) static TIMER_CALLBACK( nmi_callback )
@ -141,7 +141,7 @@ static ADDRESS_MAP_START( buggychl_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8000, 0x87ff) AM_RAM /* 6116 SRAM (36) */ AM_RANGE(0x8000, 0x87ff) AM_RAM /* 6116 SRAM (36) */
AM_RANGE(0x8800, 0x8fff) AM_RAM /* 6116 SRAM (35) */ AM_RANGE(0x8800, 0x8fff) AM_RAM /* 6116 SRAM (35) */
AM_RANGE(0x9000, 0x9fff) AM_WRITE(buggychl_sprite_lookup_w) AM_RANGE(0x9000, 0x9fff) AM_WRITE(buggychl_sprite_lookup_w)
AM_RANGE(0xa000, 0xbfff) AM_ROMBANK(1) AM_WRITE(buggychl_chargen_w) AM_BASE_MEMBER(buggychl_state, charram) AM_RANGE(0xa000, 0xbfff) AM_ROMBANK("bank1") AM_WRITE(buggychl_chargen_w) AM_BASE_MEMBER(buggychl_state, charram)
AM_RANGE(0xc800, 0xcfff) AM_RAM AM_BASE_SIZE_MEMBER(buggychl_state, videoram, videoram_size) AM_RANGE(0xc800, 0xcfff) AM_RAM AM_BASE_SIZE_MEMBER(buggychl_state, videoram, videoram_size)
AM_RANGE(0xd100, 0xd100) AM_WRITE(buggychl_ctrl_w) AM_RANGE(0xd100, 0xd100) AM_WRITE(buggychl_ctrl_w)
AM_RANGE(0xd200, 0xd200) AM_WRITE(bankswitch_w) AM_RANGE(0xd200, 0xd200) AM_WRITE(bankswitch_w)

4
src/mame/drivers/bzone.c
View File

@ -800,8 +800,8 @@ static WRITE8_HANDLER( analog_select_w )
static DRIVER_INIT( bradley ) static DRIVER_INIT( bradley )
{ {
memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x400, 0x7ff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1)); memory_install_readwrite_bank_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x400, 0x7ff, 0, 0, "bank1");
memory_set_bankptr(machine, 1, auto_alloc_array(machine, UINT8, 0x400)); memory_set_bankptr(machine, "bank1", auto_alloc_array(machine, UINT8, 0x400));
memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1808, 0x1808, 0, 0, "1808"); memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1808, 0x1808, 0, 0, "1808");
memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1809, 0x1809, 0, 0, "1809"); memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1809, 0x1809, 0, 0, "1809");

2
src/mame/drivers/cabal.c
View File

@ -850,7 +850,7 @@ static void seibu_sound_bootleg(running_machine *machine,const char *cpu,int len
memcpy(decrypt, rom+length, length); memcpy(decrypt, rom+length, length);
if (length > 0x10000) if (length > 0x10000)
memory_configure_bank_decrypted(machine, 1, 0, (length - 0x10000) / 0x8000, decrypt + 0x10000, 0x8000); memory_configure_bank_decrypted(machine, "bank1", 0, (length - 0x10000) / 0x8000, decrypt + 0x10000, 0x8000);
} }

8
src/mame/drivers/calchase.c
View File

@ -324,11 +324,11 @@ static void mxtc_config_w(const device_config *busdevice, const device_config *d
{ {
if (data & 0x10) // enable RAM access to region 0xf0000 - 0xfffff if (data & 0x10) // enable RAM access to region 0xf0000 - 0xfffff
{ {
memory_set_bankptr(busdevice->machine, 1, bios_ram); memory_set_bankptr(busdevice->machine, "bank1", bios_ram);
} }
else // disable RAM access (reads go to BIOS ROM) else // disable RAM access (reads go to BIOS ROM)
{ {
memory_set_bankptr(busdevice->machine, 1, memory_region(busdevice->machine, "bios") + 0x10000); memory_set_bankptr(busdevice->machine, "bank1", memory_region(busdevice->machine, "bios") + 0x10000);
} }
break; break;
} }
@ -459,7 +459,7 @@ static ADDRESS_MAP_START( calchase_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x000a0000, 0x000bffff) AM_RAM AM_BASE(&vga_vram) AM_RANGE(0x000a0000, 0x000bffff) AM_RAM AM_BASE(&vga_vram)
AM_RANGE(0x000c0000, 0x000c7fff) AM_RAM AM_REGION("video_bios", 0) AM_RANGE(0x000c0000, 0x000c7fff) AM_RAM AM_REGION("video_bios", 0)
AM_RANGE(0x000e0000, 0x000effff) AM_RAM AM_RANGE(0x000e0000, 0x000effff) AM_RAM
AM_RANGE(0x000f0000, 0x000fffff) AM_ROMBANK(1) AM_RANGE(0x000f0000, 0x000fffff) AM_ROMBANK("bank1")
AM_RANGE(0x000f0000, 0x000fffff) AM_WRITE(bios_ram_w) AM_RANGE(0x000f0000, 0x000fffff) AM_WRITE(bios_ram_w)
AM_RANGE(0x00100000, 0x01ffffff) AM_RAM AM_RANGE(0x00100000, 0x01ffffff) AM_RAM
AM_RANGE(0x04000000, 0x040001ff) AM_RAM AM_RANGE(0x04000000, 0x040001ff) AM_RAM
@ -622,7 +622,7 @@ static const struct pit8253_config calchase_pit8254_config =
static MACHINE_RESET(calchase) static MACHINE_RESET(calchase)
{ {
memory_set_bankptr(machine, 1, memory_region(machine, "bios") + 0x10000); memory_set_bankptr(machine, "bank1", memory_region(machine, "bios") + 0x10000);
} }
static void set_gate_a20(running_machine *machine, int a20) static void set_gate_a20(running_machine *machine, int a20)

6
src/mame/drivers/capbowl.c
View File

@ -139,7 +139,7 @@ static TIMER_CALLBACK( capbowl_update )
static WRITE8_HANDLER( capbowl_rom_select_w ) static WRITE8_HANDLER( capbowl_rom_select_w )
{ {
// 2009-11 FP: shall we add a check to be sure that bank < 6? // 2009-11 FP: shall we add a check to be sure that bank < 6?
memory_set_bank(space->machine, 1, ((data & 0x0c) >> 1) + (data & 0x01)); memory_set_bank(space->machine, "bank1", ((data & 0x0c) >> 1) + (data & 0x01));
} }
@ -237,7 +237,7 @@ static NVRAM_HANDLER( capbowl )
*************************************/ *************************************/
static ADDRESS_MAP_START( capbowl_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( capbowl_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROMBANK(1) AM_RANGE(0x0000, 0x3fff) AM_ROMBANK("bank1")
AM_RANGE(0x4000, 0x4000) AM_WRITEONLY AM_BASE_MEMBER(capbowl_state, rowaddress) AM_RANGE(0x4000, 0x4000) AM_WRITEONLY AM_BASE_MEMBER(capbowl_state, rowaddress)
AM_RANGE(0x4800, 0x4800) AM_WRITE(capbowl_rom_select_w) AM_RANGE(0x4800, 0x4800) AM_WRITE(capbowl_rom_select_w)
AM_RANGE(0x5000, 0x57ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) AM_RANGE(0x5000, 0x57ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
@ -523,7 +523,7 @@ static DRIVER_INIT( capbowl )
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
/* configure ROM banks in 0x0000-0x3fff */ /* configure ROM banks in 0x0000-0x3fff */
memory_configure_bank(machine, 1, 0, 6, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 6, &ROM[0x10000], 0x4000);
DRIVER_INIT_CALL(bowlrama); DRIVER_INIT_CALL(bowlrama);
} }

24
src/mame/drivers/cave.c
View File

@ -779,7 +779,7 @@ static ADDRESS_MAP_START( mazinger_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x800002, 0x800003) AM_READ_PORT("IN1") // Inputs + EEPROM AM_RANGE(0x800002, 0x800003) AM_READ_PORT("IN1") // Inputs + EEPROM
AM_RANGE(0x900000, 0x900001) AM_WRITE(cave_eeprom_msb_w) // EEPROM AM_RANGE(0x900000, 0x900001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
/**/AM_RANGE(0xc08000, 0xc0ffff) AM_RAM AM_BASE_GENERIC(paletteram) AM_SIZE(&cave_paletteram_size) // Palette /**/AM_RANGE(0xc08000, 0xc0ffff) AM_RAM AM_BASE_GENERIC(paletteram) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0xd00000, 0xd7ffff) AM_ROMBANK(1) // ROM AM_RANGE(0xd00000, 0xd7ffff) AM_ROMBANK("bank1") // ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -964,7 +964,7 @@ static WRITE8_HANDLER( hotdogst_rombank_w )
int bank = data & 0x0f; int bank = data & 0x0f;
if ( data & ~0x0f ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data); if ( data & ~0x0f ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data);
if (bank > 1) bank+=2; if (bank > 1) bank+=2;
memory_set_bankptr(space->machine, 2, &RAM[ 0x4000 * bank ]); memory_set_bankptr(space->machine, "bank2", &RAM[ 0x4000 * bank ]);
} }
static WRITE8_HANDLER( hotdogst_okibank_w ) static WRITE8_HANDLER( hotdogst_okibank_w )
@ -978,7 +978,7 @@ static WRITE8_HANDLER( hotdogst_okibank_w )
static ADDRESS_MAP_START( hotdogst_sound_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( hotdogst_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(2) // ROM (Banked) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank2") // ROM (Banked)
AM_RANGE(0xe000, 0xffff) AM_RAM // RAM AM_RANGE(0xe000, 0xffff) AM_RAM // RAM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -1003,12 +1003,12 @@ static WRITE8_HANDLER( mazinger_rombank_w )
int bank = data & 0x07; int bank = data & 0x07;
if ( data & ~0x07 ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data); if ( data & ~0x07 ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data);
if (bank > 1) bank+=2; if (bank > 1) bank+=2;
memory_set_bankptr(space->machine, 2, &RAM[ 0x4000 * bank ]); memory_set_bankptr(space->machine, "bank2", &RAM[ 0x4000 * bank ]);
} }
static ADDRESS_MAP_START( mazinger_sound_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( mazinger_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(2) // ROM (Banked) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank2") // ROM (Banked)
AM_RANGE(0xc000, 0xc7ff) AM_RAM // RAM AM_RANGE(0xc000, 0xc7ff) AM_RAM // RAM
AM_RANGE(0xf800, 0xffff) AM_RAM // RAM AM_RANGE(0xf800, 0xffff) AM_RAM // RAM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -1035,7 +1035,7 @@ static WRITE8_HANDLER( metmqstr_rombank_w )
int bank = data & 0xf; int bank = data & 0xf;
if ( bank != data ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data); if ( bank != data ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data);
if (bank >= 2) bank += 2; if (bank >= 2) bank += 2;
memory_set_bankptr(space->machine, 1, &ROM[ 0x4000 * bank ]); memory_set_bankptr(space->machine, "bank1", &ROM[ 0x4000 * bank ]);
} }
static WRITE8_HANDLER( metmqstr_okibank0_w ) static WRITE8_HANDLER( metmqstr_okibank0_w )
@ -1058,7 +1058,7 @@ static WRITE8_HANDLER( metmqstr_okibank1_w )
static ADDRESS_MAP_START( metmqstr_sound_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( metmqstr_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) // ROM (Banked) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") // ROM (Banked)
AM_RANGE(0xe000, 0xffff) AM_RAM // RAM AM_RANGE(0xe000, 0xffff) AM_RAM // RAM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -1086,12 +1086,12 @@ static WRITE8_HANDLER( pwrinst2_rombank_w )
int bank = data & 0x07; int bank = data & 0x07;
if ( data & ~0x07 ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data); if ( data & ~0x07 ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data);
if (bank > 2) bank+=1; if (bank > 2) bank+=1;
memory_set_bankptr(space->machine, 1, &ROM[ 0x4000 * bank ]); memory_set_bankptr(space->machine, "bank1", &ROM[ 0x4000 * bank ]);
} }
static ADDRESS_MAP_START( pwrinst2_sound_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( pwrinst2_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM // ROM AM_RANGE(0x0000, 0x7fff) AM_ROM // ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) // ROM (Banked) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1") // ROM (Banked)
AM_RANGE(0xe000, 0xffff) AM_RAM // RAM AM_RANGE(0xe000, 0xffff) AM_RAM // RAM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -1129,7 +1129,7 @@ static WRITE8_HANDLER( sailormn_rombank_w )
int bank = data & 0x1f; int bank = data & 0x1f;
if ( data & ~0x1f ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data); if ( data & ~0x1f ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data);
if (bank > 1) bank+=2; if (bank > 1) bank+=2;
memory_set_bankptr(space->machine, 1, &RAM[ 0x4000 * bank ]); memory_set_bankptr(space->machine, "bank1", &RAM[ 0x4000 * bank ]);
} }
static WRITE8_HANDLER( sailormn_okibank0_w ) static WRITE8_HANDLER( sailormn_okibank0_w )
@ -1152,7 +1152,7 @@ static WRITE8_HANDLER( sailormn_okibank1_w )
static ADDRESS_MAP_START( sailormn_sound_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( sailormn_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) // ROM (Banked) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") // ROM (Banked)
AM_RANGE(0xc000, 0xdfff) AM_READWRITE(mirror_ram_r, mirror_ram_w) AM_BASE(&mirror_ram) // RAM AM_RANGE(0xc000, 0xdfff) AM_READWRITE(mirror_ram_r, mirror_ram_w) AM_BASE(&mirror_ram) // RAM
AM_RANGE(0xe000, 0xffff) AM_READWRITE(mirror_ram_r, mirror_ram_w) // Mirrored RAM (agallet) AM_RANGE(0xe000, 0xffff) AM_READWRITE(mirror_ram_r, mirror_ram_w) // Mirrored RAM (agallet)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -3966,7 +3966,7 @@ static DRIVER_INIT( mazinger )
time_vblank_irq = 2100; time_vblank_irq = 2100;
/* setup extra ROM */ /* setup extra ROM */
memory_set_bankptr(machine, 1,memory_region(machine, "user1")); memory_set_bankptr(machine, "bank1",memory_region(machine, "user1"));
} }

6
src/mame/drivers/cbasebal.c
View File

@ -37,7 +37,7 @@ static WRITE8_HANDLER( cbasebal_bankswitch_w )
{ {
/* bits 0-4 select ROM bank */ /* bits 0-4 select ROM bank */
//logerror("%04x: bankswitch %02x\n",cpu_get_pc(space->cpu),data); //logerror("%04x: bankswitch %02x\n",cpu_get_pc(space->cpu),data);
memory_set_bank(space->machine, 1, data & 0x1f); memory_set_bank(space->machine, "bank1", data & 0x1f);
/* bit 5 used but unknown */ /* bit 5 used but unknown */
@ -133,7 +133,7 @@ static WRITE8_HANDLER( eeprom_serial_w )
static ADDRESS_MAP_START( cbasebal_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( cbasebal_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xcfff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE_GENERIC(paletteram) /* palette + vram + scrollram */ AM_RANGE(0xc000, 0xcfff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE_GENERIC(paletteram) /* palette + vram + scrollram */
AM_RANGE(0xe000, 0xfdff) AM_RAM /* work RAM */ AM_RANGE(0xe000, 0xfdff) AM_RAM /* work RAM */
AM_RANGE(0xfe00, 0xffff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) AM_RANGE(0xfe00, 0xffff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
@ -306,7 +306,7 @@ ROM_END
static DRIVER_INIT( cbasebal ) static DRIVER_INIT( cbasebal )
{ {
memory_configure_bank(machine, 1, 0, 32, memory_region(machine, "maincpu") + 0x10000, 0x4000); memory_configure_bank(machine, "bank1", 0, 32, memory_region(machine, "maincpu") + 0x10000, 0x4000);
pang_decode(machine); pang_decode(machine);
} }

2
src/mame/drivers/cbuster.c
View File

@ -142,7 +142,7 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w) AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w) AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r) AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8) AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank8")
AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w) AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w) AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
ADDRESS_MAP_END ADDRESS_MAP_END

6
src/mame/drivers/ccastles.c
View File

@ -227,7 +227,7 @@ static MACHINE_START( ccastles )
video_screen_configure(machine->primary_screen, 320, 256, &visarea, HZ_TO_ATTOSECONDS(PIXEL_CLOCK) * VTOTAL * HTOTAL); video_screen_configure(machine->primary_screen, 320, 256, &visarea, HZ_TO_ATTOSECONDS(PIXEL_CLOCK) * VTOTAL * HTOTAL);
/* configure the ROM banking */ /* configure the ROM banking */
memory_configure_bank(machine, 1, 0, 2, memory_region(machine, "maincpu") + 0xa000, 0x6000); memory_configure_bank(machine, "bank1", 0, 2, memory_region(machine, "maincpu") + 0xa000, 0x6000);
/* create a timer for IRQs and set up the first callback */ /* create a timer for IRQs and set up the first callback */
state->irq_timer = timer_alloc(machine, clock_irq, NULL); state->irq_timer = timer_alloc(machine, clock_irq, NULL);
@ -284,7 +284,7 @@ static WRITE8_HANDLER( ccounter_w )
static WRITE8_HANDLER( bankswitch_w ) static WRITE8_HANDLER( bankswitch_w )
{ {
memory_set_bank(space->machine, 1, data & 1); memory_set_bank(space->machine, "bank1", data & 1);
} }
@ -364,7 +364,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x9e87, 0x9e87) AM_MIRROR(0x0078) AM_WRITE(bankswitch_w) AM_RANGE(0x9e87, 0x9e87) AM_MIRROR(0x0078) AM_WRITE(bankswitch_w)
AM_RANGE(0x9f00, 0x9f07) AM_MIRROR(0x0078) AM_WRITE(ccastles_video_control_w) AM_RANGE(0x9f00, 0x9f07) AM_MIRROR(0x0078) AM_WRITE(ccastles_video_control_w)
AM_RANGE(0x9f80, 0x9fbf) AM_MIRROR(0x0040) AM_WRITE(ccastles_paletteram_w) AM_RANGE(0x9f80, 0x9fbf) AM_MIRROR(0x0040) AM_WRITE(ccastles_paletteram_w)
AM_RANGE(0xa000, 0xdfff) AM_ROMBANK(1) AM_RANGE(0xa000, 0xdfff) AM_ROMBANK("bank1")
AM_RANGE(0xe000, 0xffff) AM_ROM AM_RANGE(0xe000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END

4
src/mame/drivers/cclimber.c
View File

@ -250,7 +250,7 @@ static WRITE8_HANDLER(toprollr_rombank_w)
toprollr_rombank |= (data & 1) << offset; toprollr_rombank |= (data & 1) << offset;
if (toprollr_rombank < 3) if (toprollr_rombank < 3)
memory_set_bank(space->machine, 1, toprollr_rombank); memory_set_bank(space->machine, "bank1", toprollr_rombank);
} }
@ -366,7 +366,7 @@ static ADDRESS_MAP_START( yamato_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( toprollr_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( toprollr_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROMBANK(1) AM_RANGE(0x0000, 0x5fff) AM_ROMBANK("bank1")
AM_RANGE(0x6000, 0x6bff) AM_RAM AM_RANGE(0x6000, 0x6bff) AM_RAM
AM_RANGE(0x8800, 0x88ff) AM_RAM AM_BASE(&cclimber_bigsprite_videoram) AM_RANGE(0x8800, 0x88ff) AM_RAM AM_BASE(&cclimber_bigsprite_videoram)
AM_RANGE(0x8c00, 0x8fff) AM_RAM AM_BASE(&toprollr_bg_videoram) AM_RANGE(0x8c00, 0x8fff) AM_RAM AM_BASE(&toprollr_bg_videoram)

4
src/mame/drivers/chaknpop.c
View File

@ -57,7 +57,7 @@ static ADDRESS_MAP_START( chaknpop_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x9800, 0x983f) AM_RAM_WRITE(chaknpop_attrram_w) AM_BASE_MEMBER(chaknpop_state, attr_ram) // Color attribute AM_RANGE(0x9800, 0x983f) AM_RAM_WRITE(chaknpop_attrram_w) AM_BASE_MEMBER(chaknpop_state, attr_ram) // Color attribute
AM_RANGE(0x9840, 0x98ff) AM_RAM AM_BASE_SIZE_MEMBER(chaknpop_state, spr_ram, spr_ram_size) // sprite AM_RANGE(0x9840, 0x98ff) AM_RAM AM_BASE_SIZE_MEMBER(chaknpop_state, spr_ram, spr_ram_size) // sprite
AM_RANGE(0xa000, 0xbfff) AM_ROM AM_RANGE(0xa000, 0xbfff) AM_ROM
AM_RANGE(0xc000, 0xffff) AM_RAMBANK(1) // bitmap plane 1-4 AM_RANGE(0xc000, 0xffff) AM_RAMBANK("bank1") // bitmap plane 1-4
ADDRESS_MAP_END ADDRESS_MAP_END
static const ay8910_interface ay8910_interface_1 = static const ay8910_interface ay8910_interface_1 =
@ -247,7 +247,7 @@ static MACHINE_START( chaknpop )
chaknpop_state *state = (chaknpop_state *)machine->driver_data; chaknpop_state *state = (chaknpop_state *)machine->driver_data;
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 2, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 2, &ROM[0x10000], 0x4000);
state_save_register_global(machine, state->gfxmode); state_save_register_global(machine, state->gfxmode);
state_save_register_global(machine, state->flip_x); state_save_register_global(machine, state->flip_x);

6
src/mame/drivers/cham24.c
View File

@ -176,7 +176,7 @@ static WRITE8_HANDLER( cham24_mapper_w )
UINT8* src = memory_region(space->machine, "user1"); UINT8* src = memory_region(space->machine, "user1");
// switch PPU VROM bank // switch PPU VROM bank
memory_set_bankptr(space->machine, 1, memory_region(space->machine, "gfx1") + (0x2000 * gfx_bank)); memory_set_bankptr(space->machine, "bank1", memory_region(space->machine, "gfx1") + (0x2000 * gfx_bank));
// set gfx mirroring // set gfx mirroring
cham24_set_mirroring(gfx_mirroring != 0 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); cham24_set_mirroring(gfx_mirroring != 0 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
@ -287,8 +287,8 @@ static MACHINE_START( cham24 )
memcpy(&dst[0xc000], &src[0x0f8000], 0x4000); memcpy(&dst[0xc000], &src[0x0f8000], 0x4000);
/* uses 8K swapping, all ROM!*/ /* uses 8K swapping, all ROM!*/
memory_install_readwrite8_handler(cpu_get_address_space(cputag_get_cpu(machine, "ppu"), ADDRESS_SPACE_PROGRAM), 0x0000, 0x1fff, 0, 0, (read8_space_func)SMH_BANK(1), 0); memory_install_read_bank_handler(cpu_get_address_space(cputag_get_cpu(machine, "ppu"), ADDRESS_SPACE_PROGRAM), 0x0000, 0x1fff, 0, 0, "bank1");
memory_set_bankptr(machine, 1, memory_region(machine, "gfx1")); memory_set_bankptr(machine, "bank1", memory_region(machine, "gfx1"));
/* need nametable ram, though. I doubt this uses more than 2k, but it starts up configured for 4 */ /* need nametable ram, though. I doubt this uses more than 2k, but it starts up configured for 4 */
nt_ram = auto_alloc_array(machine, UINT8, 0x1000); nt_ram = auto_alloc_array(machine, UINT8, 0x1000);

6
src/mame/drivers/champbwl.c
View File

@ -179,7 +179,7 @@ static WRITE8_HANDLER( champbwl_misc_w )
coin_lockout_w(space->machine, 0, ~data & 8); coin_lockout_w(space->machine, 0, ~data & 8);
coin_lockout_w(space->machine, 1, ~data & 4); coin_lockout_w(space->machine, 1, ~data & 4);
memory_set_bank(space->machine, 1, (data & 0x30) >> 4); memory_set_bank(space->machine, "bank1", (data & 0x30) >> 4);
} }
static WRITE8_HANDLER( champbwl_objctrl_w ) static WRITE8_HANDLER( champbwl_objctrl_w )
@ -193,7 +193,7 @@ static WRITE8_HANDLER( champbwl_objctrl_w )
static ADDRESS_MAP_START( champbwl_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( champbwl_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_REGION("maincpu", 0x10000) AM_RANGE(0x0000, 0x3fff) AM_ROM AM_REGION("maincpu", 0x10000)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram)
AM_RANGE(0xa000, 0xbfff) AM_RAM AM_BASE_MEMBER(tnzs_state, objram) AM_RANGE(0xa000, 0xbfff) AM_RAM AM_BASE_MEMBER(tnzs_state, objram)
AM_RANGE(0xc000, 0xdfff) AM_DEVREADWRITE("x1snd", seta_sound_r, seta_sound_w) AM_RANGE(0xc000, 0xdfff) AM_DEVREADWRITE("x1snd", seta_sound_r, seta_sound_w)
@ -337,7 +337,7 @@ static MACHINE_START( champbwl )
state->mcu = NULL; state->mcu = NULL;
memory_configure_bank(machine, 1, 0, 4, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
state_save_register_global(machine, state->screenflip); state_save_register_global(machine, state->screenflip);
state_save_register_global_array(machine, state->last_trackball_val); state_save_register_global_array(machine, state->last_trackball_val);

6
src/mame/drivers/chanbara.c
View File

@ -209,7 +209,7 @@ static ADDRESS_MAP_START( memmap, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2001, 0x2001) AM_READ_PORT("SYSTEM") AM_RANGE(0x2001, 0x2001) AM_READ_PORT("SYSTEM")
AM_RANGE(0x2003, 0x2003) AM_READ_PORT("JOY") AM_RANGE(0x2003, 0x2003) AM_READ_PORT("JOY")
AM_RANGE(0x3800, 0x3801) AM_DEVREADWRITE("ymsnd", ym2203_r, ym2203_w) AM_RANGE(0x3800, 0x3801) AM_DEVREADWRITE("ymsnd", ym2203_r, ym2203_w)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -335,7 +335,7 @@ static WRITE8_DEVICE_HANDLER( chanbara_ay_out_1_w )
state->scrollhi = data & 0x03; state->scrollhi = data & 0x03;
memory_set_bank(device->machine, 1, (data & 0x04) >> 2); memory_set_bank(device->machine, "bank1", (data & 0x04) >> 2);
//if (data & 0xf8) printf("chanbara_ay_out_1_w unused bits set %02x\n", data & 0xf8); //if (data & 0xf8) printf("chanbara_ay_out_1_w unused bits set %02x\n", data & 0xf8);
} }
@ -466,7 +466,7 @@ static DRIVER_INIT(chanbara )
dst[i + 0x2000] = (src[i + 0x1000] & 0x0f) << 4; dst[i + 0x2000] = (src[i + 0x1000] & 0x0f) << 4;
} }
memory_configure_bank(machine, 1, 0, 2, &bg[0x0000], 0x4000); memory_configure_bank(machine, "bank1", 0, 2, &bg[0x0000], 0x4000);
} }
GAME( 1985, chanbara, 0, chanbara, chanbara, chanbara, ROT270, "Data East", "Chanbara", GAME_SUPPORTS_SAVE ) GAME( 1985, chanbara, 0, chanbara, chanbara, chanbara, ROT270, "Data East", "Chanbara", GAME_SUPPORTS_SAVE )

16
src/mame/drivers/chinagat.c
View File

@ -180,12 +180,12 @@ static WRITE8_HANDLER( chinagat_video_ctrl_w )
static WRITE8_HANDLER( chinagat_bankswitch_w ) static WRITE8_HANDLER( chinagat_bankswitch_w )
{ {
memory_set_bank(space->machine, 1, data & 0x07); // shall we check (data & 7) < 6 (# of banks)? memory_set_bank(space->machine, "bank1", data & 0x07); // shall we check (data & 7) < 6 (# of banks)?
} }
static WRITE8_HANDLER( chinagat_sub_bankswitch_w ) static WRITE8_HANDLER( chinagat_sub_bankswitch_w )
{ {
memory_set_bank(space->machine, 4, data & 0x07); // shall we check (data & 7) < 6 (# of banks)? memory_set_bank(space->machine, "bank4", data & 0x07); // shall we check (data & 7) < 6 (# of banks)?
} }
static READ8_HANDLER( saiyugb1_mcu_command_r ) static READ8_HANDLER( saiyugb1_mcu_command_r )
@ -311,7 +311,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(ddragon_bgvideoram_w) AM_BASE_MEMBER(ddragon_state, bgvideoram) AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(ddragon_bgvideoram_w) AM_BASE_MEMBER(ddragon_state, bgvideoram)
AM_RANGE(0x3000, 0x317f) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x3000, 0x317f) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0x3400, 0x357f) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE_GENERIC(paletteram2) AM_RANGE(0x3400, 0x357f) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE_GENERIC(paletteram2)
AM_RANGE(0x3800, 0x397f) AM_WRITE(SMH_BANK(3)) AM_BASE_SIZE_MEMBER(ddragon_state, spriteram, spriteram_size) AM_RANGE(0x3800, 0x397f) AM_WRITE_BANK("bank3") AM_BASE_SIZE_MEMBER(ddragon_state, spriteram, spriteram_size)
AM_RANGE(0x3e00, 0x3e04) AM_WRITE(chinagat_interrupt_w) AM_RANGE(0x3e00, 0x3e04) AM_WRITE(chinagat_interrupt_w)
AM_RANGE(0x3e06, 0x3e06) AM_WRITEONLY AM_BASE_MEMBER(ddragon_state, scrolly_lo) AM_RANGE(0x3e06, 0x3e06) AM_WRITEONLY AM_BASE_MEMBER(ddragon_state, scrolly_lo)
AM_RANGE(0x3e07, 0x3e07) AM_WRITEONLY AM_BASE_MEMBER(ddragon_state, scrollx_lo) AM_RANGE(0x3e07, 0x3e07) AM_WRITEONLY AM_BASE_MEMBER(ddragon_state, scrollx_lo)
@ -322,7 +322,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3f02, 0x3f02) AM_READ_PORT("DSW2") AM_RANGE(0x3f02, 0x3f02) AM_READ_PORT("DSW2")
AM_RANGE(0x3f03, 0x3f03) AM_READ_PORT("P1") AM_RANGE(0x3f03, 0x3f03) AM_READ_PORT("P1")
AM_RANGE(0x3f04, 0x3f04) AM_READ_PORT("P2") AM_RANGE(0x3f04, 0x3f04) AM_READ_PORT("P2")
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -332,7 +332,7 @@ static ADDRESS_MAP_START( sub_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2800, 0x2800) AM_WRITEONLY /* Called on CPU start and after return from jump table */ AM_RANGE(0x2800, 0x2800) AM_WRITEONLY /* Called on CPU start and after return from jump table */
// AM_RANGE(0x2a2b, 0x2a2b) AM_READNOP /* What lives here? */ // AM_RANGE(0x2a2b, 0x2a2b) AM_READNOP /* What lives here? */
// AM_RANGE(0x2a30, 0x2a30) AM_READNOP /* What lives here? */ // AM_RANGE(0x2a30, 0x2a30) AM_READNOP /* What lives here? */
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(4) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank4")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -531,7 +531,7 @@ static MACHINE_START( chinagat )
state->snd_cpu = devtag_get_device(machine, "audiocpu"); state->snd_cpu = devtag_get_device(machine, "audiocpu");
/* configure banks */ /* configure banks */
memory_configure_bank(machine, 1, 0, 8, memory_region(machine, "maincpu") + 0x10000, 0x4000); memory_configure_bank(machine, "bank1", 0, 8, memory_region(machine, "maincpu") + 0x10000, 0x4000);
/* register for save states */ /* register for save states */
state_save_register_global(machine, state->scrollx_hi); state_save_register_global(machine, state->scrollx_hi);
@ -932,8 +932,8 @@ static DRIVER_INIT( chinagat )
state->sprite_irq = M6809_IRQ_LINE; state->sprite_irq = M6809_IRQ_LINE;
state->sound_irq = INPUT_LINE_NMI; state->sound_irq = INPUT_LINE_NMI;
memory_configure_bank(machine, 1, 0, 6, &MAIN[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 6, &MAIN[0x10000], 0x4000);
memory_configure_bank(machine, 4, 0, 6, &SUB[0x10000], 0x4000); memory_configure_bank(machine, "bank4", 0, 6, &SUB[0x10000], 0x4000);
} }

8
src/mame/drivers/chinsan.c
View File

@ -80,7 +80,7 @@ static VIDEO_UPDATE(chinsan)
static MACHINE_RESET( chinsan ) static MACHINE_RESET( chinsan )
{ {
memory_configure_bank(machine, 1, 0, 4, memory_region(machine, "maincpu") + 0x10000, 0x4000); memory_configure_bank(machine, "bank1", 0, 4, memory_region(machine, "maincpu") + 0x10000, 0x4000);
adpcm_idle = 1; adpcm_idle = 1;
} }
@ -88,7 +88,7 @@ static MACHINE_RESET( chinsan )
static WRITE8_HANDLER(ctrl_w) static WRITE8_HANDLER(ctrl_w)
{ {
memory_set_bank(space->machine, 1, data >> 6); memory_set_bank(space->machine, "bank1", data >> 6);
} }
static WRITE8_DEVICE_HANDLER( ym_port_w1 ) static WRITE8_DEVICE_HANDLER( ym_port_w1 )
@ -202,7 +202,7 @@ static WRITE8_DEVICE_HANDLER( chin_adpcm_w )
static ADDRESS_MAP_START( chinsan_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( chinsan_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xdfff) AM_RAM AM_RANGE(0xc000, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_BASE(&chinsan_video) AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_BASE(&chinsan_video)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -585,7 +585,7 @@ ROM_END
static DRIVER_INIT( chinsan ) static DRIVER_INIT( chinsan )
{ {
mc8123_decrypt_rom(machine, "maincpu", "user1", 1, 4); mc8123_decrypt_rom(machine, "maincpu", "user1", "bank1", 4);
} }

19
src/mame/drivers/chqflag.c
View File

@ -51,13 +51,14 @@ static WRITE8_HANDLER( chqflag_bankswitch_w )
/* bits 0-4 = ROM bank # (0x00-0x11) */ /* bits 0-4 = ROM bank # (0x00-0x11) */
bankaddress = 0x10000 + (data & 0x1f)*0x4000; bankaddress = 0x10000 + (data & 0x1f)*0x4000;
memory_set_bankptr(space->machine, 4,&RAM[bankaddress]); memory_set_bankptr(space->machine, "bank4",&RAM[bankaddress]);
/* bit 5 = memory bank select */ /* bit 5 = memory bank select */
if (data & 0x20) if (data & 0x20)
{ {
memory_install_readwrite8_handler(space, 0x1800, 0x1fff, 0, 0, (read8_space_func)SMH_BANK(5), paletteram_xBBBBBGGGGGRRRRR_be_w); memory_install_read_bank_handler(space, 0x1800, 0x1fff, 0, 0, "bank5");
memory_set_bankptr(space->machine, 5, space->machine->generic.paletteram.v); memory_install_write8_handler(space, 0x1800, 0x1fff, 0, 0, paletteram_xBBBBBGGGGGRRRRR_be_w);
memory_set_bankptr(space->machine, "bank5", space->machine->generic.paletteram.v);
if (K051316_readroms) if (K051316_readroms)
memory_install_readwrite8_handler(space, 0x1000, 0x17ff, 0, 0, K051316_rom_0_r, K051316_0_w); /* 051316 #1 (ROM test) */ memory_install_readwrite8_handler(space, 0x1000, 0x17ff, 0, 0, K051316_rom_0_r, K051316_0_w); /* 051316 #1 (ROM test) */
@ -66,8 +67,8 @@ static WRITE8_HANDLER( chqflag_bankswitch_w )
} }
else else
{ {
memory_install_readwrite8_handler(space, 0x1000, 0x17ff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1)); /* RAM */ memory_install_readwrite_bank_handler(space, 0x1000, 0x17ff, 0, 0, "bank1"); /* RAM */
memory_install_readwrite8_handler(space, 0x1800, 0x1fff, 0, 0, (read8_space_func)SMH_BANK(2), (write8_space_func)SMH_BANK(2)); /* RAM */ memory_install_readwrite_bank_handler(space, 0x1800, 0x1fff, 0, 0, "bank2"); /* RAM */
} }
/* other bits unknown/unused */ /* other bits unknown/unused */
@ -149,11 +150,11 @@ static WRITE8_HANDLER( chqflag_sh_irqtrigger_w )
static ADDRESS_MAP_START( chqflag_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( chqflag_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_RAM /* RAM */ AM_RANGE(0x0000, 0x0fff) AM_RAM /* RAM */
AM_RANGE(0x1000, 0x17ff) AM_RAMBANK(1) /* banked RAM (RAM/051316 (chip 1)) */ AM_RANGE(0x1000, 0x17ff) AM_RAMBANK("bank1") /* banked RAM (RAM/051316 (chip 1)) */
AM_RANGE(0x1800, 0x1fff) AM_RAMBANK(2) /* palette + RAM */ AM_RANGE(0x1800, 0x1fff) AM_RAMBANK("bank2") /* palette + RAM */
AM_RANGE(0x2000, 0x2007) AM_READWRITE(K051937_r, K051937_w) /* Sprite control registers */ AM_RANGE(0x2000, 0x2007) AM_READWRITE(K051937_r, K051937_w) /* Sprite control registers */
AM_RANGE(0x2400, 0x27ff) AM_READWRITE(K051960_r, K051960_w) /* Sprite RAM */ AM_RANGE(0x2400, 0x27ff) AM_READWRITE(K051960_r, K051960_w) /* Sprite RAM */
AM_RANGE(0x2800, 0x2fff) AM_READWRITE(SMH_BANK(3), K051316_1_w) /* 051316 zoom/rotation (chip 2) */ AM_RANGE(0x2800, 0x2fff) AM_READ_BANK("bank3") AM_WRITE(K051316_1_w) /* 051316 zoom/rotation (chip 2) */
AM_RANGE(0x3000, 0x3000) AM_WRITE(soundlatch_w) /* sound code # */ AM_RANGE(0x3000, 0x3000) AM_WRITE(soundlatch_w) /* sound code # */
AM_RANGE(0x3001, 0x3001) AM_WRITE(chqflag_sh_irqtrigger_w) /* cause interrupt on audio CPU */ AM_RANGE(0x3001, 0x3001) AM_WRITE(chqflag_sh_irqtrigger_w) /* cause interrupt on audio CPU */
AM_RANGE(0x3002, 0x3002) AM_WRITE(chqflag_bankswitch_w) /* bankswitch control */ AM_RANGE(0x3002, 0x3002) AM_WRITE(chqflag_bankswitch_w) /* bankswitch control */
@ -169,7 +170,7 @@ static ADDRESS_MAP_START( chqflag_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3700, 0x3700) AM_WRITE(select_analog_ctrl_w) /* select accelerator/wheel */ AM_RANGE(0x3700, 0x3700) AM_WRITE(select_analog_ctrl_w) /* select accelerator/wheel */
AM_RANGE(0x3701, 0x3701) AM_READ_PORT("IN2") /* Brake + Shift + ? */ AM_RANGE(0x3701, 0x3701) AM_READ_PORT("IN2") /* Brake + Shift + ? */
AM_RANGE(0x3702, 0x3702) AM_READWRITE(analog_read_r, select_analog_ctrl_w) /* accelerator/wheel */ AM_RANGE(0x3702, 0x3702) AM_READWRITE(analog_read_r, select_analog_ctrl_w) /* accelerator/wheel */
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(4) /* banked ROM */ AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank4") /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */
ADDRESS_MAP_END ADDRESS_MAP_END

8
src/mame/drivers/cidelsa.c
View File

@ -61,7 +61,7 @@ static WRITE8_HANDLER( draco_sound_bankswitch_w )
int bank = BIT(data, 3); int bank = BIT(data, 3);
memory_set_bank(space->machine, 1, bank); memory_set_bank(space->machine, "bank1", bank);
} }
static WRITE8_DEVICE_HANDLER( draco_sound_g_w ) static WRITE8_DEVICE_HANDLER( draco_sound_g_w )
@ -292,7 +292,7 @@ static ADDRESS_MAP_START( draco_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( draco_sound_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( draco_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x000, 0x3ff) AM_ROMBANK(1) AM_RANGE(0x000, 0x3ff) AM_ROMBANK("bank1")
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( draco_sound_io_map, ADDRESS_SPACE_IO, 8 ) static ADDRESS_MAP_START( draco_sound_io_map, ADDRESS_SPACE_IO, 8 )
@ -492,8 +492,8 @@ static MACHINE_START( draco )
MACHINE_START_CALL( cidelsa ); MACHINE_START_CALL( cidelsa );
/* setup COP402 memory banking */ /* setup COP402 memory banking */
memory_configure_bank(machine, 1, 0, 2, memory_region(machine, "audiocpu"), 0x400); memory_configure_bank(machine, "bank1", 0, 2, memory_region(machine, "audiocpu"), 0x400);
memory_set_bank(machine, 1, 0); memory_set_bank(machine, "bank1", 0);
/* register for state saving */ /* register for state saving */
state_save_register_global(machine, state->draco_sound); state_save_register_global(machine, state->draco_sound);

6
src/mame/drivers/cinemat.c
View File

@ -280,7 +280,7 @@ static READ8_HANDLER( qb3_frame_r )
static WRITE8_HANDLER( qb3_ram_bank_w ) static WRITE8_HANDLER( qb3_ram_bank_w )
{ {
memory_set_bank(space->machine, 1, cpu_get_reg(cputag_get_cpu(space->machine, "maincpu"), CCPU_P) & 3); memory_set_bank(space->machine, "bank1", cpu_get_reg(cputag_get_cpu(space->machine, "maincpu"), CCPU_P) & 3);
} }
@ -318,7 +318,7 @@ static ADDRESS_MAP_START( data_map, ADDRESS_SPACE_DATA, 16 )
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( data_map_qb3, ADDRESS_SPACE_DATA, 16 ) static ADDRESS_MAP_START( data_map_qb3, ADDRESS_SPACE_DATA, 16 )
AM_RANGE(0x0000, 0x03ff) AM_RAMBANK(1) AM_BASE(&rambase) AM_RANGE(0x0000, 0x03ff) AM_RAMBANK("bank1") AM_BASE(&rambase)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -1467,7 +1467,7 @@ static DRIVER_INIT( qb3 )
memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x0f, 0x0f, 0, 0, qb3_frame_r); memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x0f, 0x0f, 0, 0, qb3_frame_r);
memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x00, 0x00, 0, 0, qb3_ram_bank_w); memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x00, 0x00, 0, 0, qb3_ram_bank_w);
memory_configure_bank(machine, 1, 0, 4, rambase, 0x100*2); memory_configure_bank(machine, "bank1", 0, 4, rambase, 0x100*2);
} }

2
src/mame/drivers/cloud9.c
View File

@ -304,7 +304,7 @@ static READ8_HANDLER( nvram_r )
static ADDRESS_MAP_START( cloud9_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( cloud9_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0001) AM_WRITE(cloud9_bitmode_addr_w) AM_RANGE(0x0000, 0x0001) AM_WRITE(cloud9_bitmode_addr_w)
AM_RANGE(0x0002, 0x0002) AM_READWRITE(cloud9_bitmode_r, cloud9_bitmode_w) AM_RANGE(0x0002, 0x0002) AM_READWRITE(cloud9_bitmode_r, cloud9_bitmode_w)
AM_RANGE(0x0000, 0x4fff) AM_ROMBANK(1) AM_WRITE(cloud9_videoram_w) AM_RANGE(0x0000, 0x4fff) AM_ROMBANK("bank1") AM_WRITE(cloud9_videoram_w)
AM_RANGE(0x5000, 0x53ff) AM_RAM AM_BASE_MEMBER(cloud9_state, spriteram) AM_RANGE(0x5000, 0x53ff) AM_RAM AM_BASE_MEMBER(cloud9_state, spriteram)
AM_RANGE(0x5400, 0x547f) AM_WRITE(watchdog_reset_w) AM_RANGE(0x5400, 0x547f) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x5480, 0x54ff) AM_WRITE(irq_ack_w) AM_RANGE(0x5480, 0x54ff) AM_WRITE(irq_ack_w)

6
src/mame/drivers/cmmb.c
View File

@ -107,7 +107,7 @@ static UINT8 irq_mask;
UINT32 bankaddress; UINT32 bankaddress;
bankaddress = 0x10000 + (0x10000 * (data & 0x03)); bankaddress = 0x10000 + (0x10000 * (data & 0x03));
memory_set_bankptr(space->machine, 1, &ROM[bankaddress]); memory_set_bankptr(space->machine, "bank1", &ROM[bankaddress]);
} }
*/ */
@ -122,7 +122,7 @@ static WRITE8_HANDLER( cmmb_output_w )
UINT32 bankaddress; UINT32 bankaddress;
bankaddress = 0x1c000 + (0x10000 * (data & 0x03)); bankaddress = 0x1c000 + (0x10000 * (data & 0x03));
memory_set_bankptr(space->machine, 1, &ROM[bankaddress]); memory_set_bankptr(space->machine, "bank1", &ROM[bankaddress]);
} }
break; break;
case 0x03: case 0x03:
@ -146,7 +146,7 @@ static ADDRESS_MAP_START( cmmb_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2480, 0x249f) AM_RAM_WRITE(cmmb_paletteram_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x2480, 0x249f) AM_RAM_WRITE(cmmb_paletteram_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0x4000, 0x400f) AM_READWRITE(cmmb_input_r,cmmb_output_w) //i/o AM_RANGE(0x4000, 0x400f) AM_READWRITE(cmmb_input_r,cmmb_output_w) //i/o
AM_RANGE(0x4900, 0x4900) AM_READ(kludge_r) AM_RANGE(0x4900, 0x4900) AM_READ(kludge_r)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0xa000, 0xafff) AM_RAM AM_RANGE(0xa000, 0xafff) AM_RAM
AM_RANGE(0xb000, 0xbfff) AM_READWRITE(cmmb_charram_r,cmmb_charram_w) AM_RANGE(0xb000, 0xbfff) AM_READWRITE(cmmb_charram_r,cmmb_charram_w)
AM_RANGE(0xc000, 0xc00f) AM_READWRITE(cmmb_input_r,cmmb_output_w) //i/o AM_RANGE(0xc000, 0xc00f) AM_READWRITE(cmmb_input_r,cmmb_output_w) //i/o

4
src/mame/drivers/cninja.c
View File

@ -270,7 +270,7 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w) AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w) AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r) AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8) AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank8")
AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w) AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w) AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -282,7 +282,7 @@ static ADDRESS_MAP_START( sound_map_mutantf, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w) AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w) AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r) AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8) AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank8")
AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w) AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w) AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
ADDRESS_MAP_END ADDRESS_MAP_END

38
src/mame/drivers/cojag.c
View File

@ -351,17 +351,17 @@ static MACHINE_RESET( cojag )
/* graphics banks */ /* graphics banks */
if (cojag_is_r3000) if (cojag_is_r3000)
{ {
memory_configure_bank(machine, 1, 0, 2, rom + 0x800000, 0x400000); memory_configure_bank(machine, "bank1", 0, 2, rom + 0x800000, 0x400000);
memory_set_bank(machine, 1, 0); memory_set_bank(machine, "bank1", 0);
} }
memory_configure_bank(machine, 8, 0, 2, rom + 0x800000, 0x400000); memory_configure_bank(machine, "bank8", 0, 2, rom + 0x800000, 0x400000);
memory_set_bank(machine, 8, 0); memory_set_bank(machine, "bank8", 0);
/* sound banks */ /* sound banks */
memory_configure_bank(machine, 2, 0, 8, rom + 0x000000, 0x200000); memory_configure_bank(machine, "bank2", 0, 8, rom + 0x000000, 0x200000);
memory_configure_bank(machine, 9, 0, 8, rom + 0x000000, 0x200000); memory_configure_bank(machine, "bank9", 0, 8, rom + 0x000000, 0x200000);
memory_set_bank(machine, 2, 0); memory_set_bank(machine, "bank2", 0);
memory_set_bank(machine, 9, 0); memory_set_bank(machine, "bank9", 0);
} }
/* clear any spinuntil stuff */ /* clear any spinuntil stuff */
@ -426,8 +426,8 @@ static WRITE32_HANDLER( misc_control_w )
/* adjust banking */ /* adjust banking */
if (memory_region(space->machine, "user2")) if (memory_region(space->machine, "user2"))
{ {
memory_set_bank(space->machine, 2, (data >> 1) & 7); memory_set_bank(space->machine, "bank2", (data >> 1) & 7);
memory_set_bank(space->machine, 9, (data >> 1) & 7); memory_set_bank(space->machine, "bank9", (data >> 1) & 7);
} }
COMBINE_DATA(&misc_control_data); COMBINE_DATA(&misc_control_data);
@ -493,8 +493,8 @@ static WRITE32_HANDLER( latch_w )
if (memory_region(space->machine, "user2")) if (memory_region(space->machine, "user2"))
{ {
if (cojag_is_r3000) if (cojag_is_r3000)
memory_set_bank(space->machine, 1, data & 1); memory_set_bank(space->machine, "bank1", data & 1);
memory_set_bank(space->machine, 8, data & 1); memory_set_bank(space->machine, "bank8", data & 1);
} }
} }
@ -783,8 +783,8 @@ static WRITE32_HANDLER( area51mx_main_speedup_w )
static ADDRESS_MAP_START( r3000_map, ADDRESS_SPACE_PROGRAM, 32 ) static ADDRESS_MAP_START( r3000_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x04000000, 0x047fffff) AM_RAM AM_BASE(&jaguar_shared_ram) AM_SHARE(1) AM_RANGE(0x04000000, 0x047fffff) AM_RAM AM_BASE(&jaguar_shared_ram) AM_SHARE(1)
AM_RANGE(0x04800000, 0x04bfffff) AM_ROMBANK(1) AM_RANGE(0x04800000, 0x04bfffff) AM_ROMBANK("bank1")
AM_RANGE(0x04c00000, 0x04dfffff) AM_ROMBANK(2) AM_RANGE(0x04c00000, 0x04dfffff) AM_ROMBANK("bank2")
AM_RANGE(0x04e00000, 0x04e003ff) AM_DEVREADWRITE("ide", ide_controller32_r, ide_controller32_w) AM_RANGE(0x04e00000, 0x04e003ff) AM_DEVREADWRITE("ide", ide_controller32_r, ide_controller32_w)
AM_RANGE(0x04f00000, 0x04f003ff) AM_READWRITE(jaguar_tom_regs32_r, jaguar_tom_regs32_w) AM_RANGE(0x04f00000, 0x04f003ff) AM_READWRITE(jaguar_tom_regs32_r, jaguar_tom_regs32_w)
AM_RANGE(0x04f00400, 0x04f007ff) AM_RAM AM_BASE(&jaguar_gpu_clut) AM_SHARE(2) AM_RANGE(0x04f00400, 0x04f007ff) AM_RAM AM_BASE(&jaguar_gpu_clut) AM_SHARE(2)
@ -818,7 +818,7 @@ static ADDRESS_MAP_START( m68020_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0xa30000, 0xa30003) AM_WRITE(watchdog_reset32_w) AM_RANGE(0xa30000, 0xa30003) AM_WRITE(watchdog_reset32_w)
AM_RANGE(0xa40000, 0xa40003) AM_WRITE(eeprom_enable_w) AM_RANGE(0xa40000, 0xa40003) AM_WRITE(eeprom_enable_w)
AM_RANGE(0xb70000, 0xb70003) AM_READWRITE(misc_control_r, misc_control_w) AM_RANGE(0xb70000, 0xb70003) AM_READWRITE(misc_control_r, misc_control_w)
AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK(2) AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK("bank2")
AM_RANGE(0xe00000, 0xe003ff) AM_DEVREADWRITE("ide", ide_controller32_r, ide_controller32_w) AM_RANGE(0xe00000, 0xe003ff) AM_DEVREADWRITE("ide", ide_controller32_r, ide_controller32_w)
AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE(jaguar_tom_regs32_r, jaguar_tom_regs32_w) AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE(jaguar_tom_regs32_r, jaguar_tom_regs32_w)
AM_RANGE(0xf00400, 0xf007ff) AM_RAM AM_BASE(&jaguar_gpu_clut) AM_SHARE(2) AM_RANGE(0xf00400, 0xf007ff) AM_RAM AM_BASE(&jaguar_gpu_clut) AM_SHARE(2)
@ -845,8 +845,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( gpu_map, ADDRESS_SPACE_PROGRAM, 32 ) static ADDRESS_MAP_START( gpu_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x000000, 0x7fffff) AM_RAM AM_SHARE(1) AM_RANGE(0x000000, 0x7fffff) AM_RAM AM_SHARE(1)
AM_RANGE(0x800000, 0xbfffff) AM_ROMBANK(8) AM_RANGE(0x800000, 0xbfffff) AM_ROMBANK("bank8")
AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK(9) AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK("bank9")
AM_RANGE(0xe00000, 0xe003ff) AM_DEVREADWRITE("ide", ide_controller32_r, ide_controller32_w) AM_RANGE(0xe00000, 0xe003ff) AM_DEVREADWRITE("ide", ide_controller32_r, ide_controller32_w)
AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE(jaguar_tom_regs32_r, jaguar_tom_regs32_w) AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE(jaguar_tom_regs32_r, jaguar_tom_regs32_w)
AM_RANGE(0xf00400, 0xf007ff) AM_RAM AM_SHARE(2) AM_RANGE(0xf00400, 0xf007ff) AM_RAM AM_SHARE(2)
@ -866,8 +866,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dsp_map, ADDRESS_SPACE_PROGRAM, 32 ) static ADDRESS_MAP_START( dsp_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x000000, 0x7fffff) AM_RAM AM_SHARE(1) AM_RANGE(0x000000, 0x7fffff) AM_RAM AM_SHARE(1)
AM_RANGE(0x800000, 0xbfffff) AM_ROMBANK(8) AM_RANGE(0x800000, 0xbfffff) AM_ROMBANK("bank8")
AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK(9) AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK("bank9")
AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w) AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w)
AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE(dspctrl_r, dspctrl_w) AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE(dspctrl_r, dspctrl_w)
AM_RANGE(0xf1a140, 0xf1a17f) AM_READWRITE(jaguar_serial_r, jaguar_serial_w) AM_RANGE(0xf1a140, 0xf1a17f) AM_READWRITE(jaguar_serial_r, jaguar_serial_w)

4
src/mame/drivers/combatsc.c
View File

@ -289,7 +289,7 @@ static ADDRESS_MAP_START( combasc_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0600, 0x06ff) AM_RAM AM_BASE_GENERIC(paletteram) /* palette */ AM_RANGE(0x0600, 0x06ff) AM_RAM AM_BASE_GENERIC(paletteram) /* palette */
AM_RANGE(0x0800, 0x1fff) AM_RAM /* RAM */ AM_RANGE(0x0800, 0x1fff) AM_RAM /* RAM */
AM_RANGE(0x2000, 0x3fff) AM_READWRITE(combasc_video_r, combasc_video_w) AM_RANGE(0x2000, 0x3fff) AM_READWRITE(combasc_video_r, combasc_video_w)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) /* banked ROM area */ AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") /* banked ROM area */
AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */
ADDRESS_MAP_END ADDRESS_MAP_END
@ -299,7 +299,7 @@ static ADDRESS_MAP_START( combascb_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0600, 0x06ff) AM_RAM AM_BASE_GENERIC(paletteram) /* palette */ AM_RANGE(0x0600, 0x06ff) AM_RAM AM_BASE_GENERIC(paletteram) /* palette */
AM_RANGE(0x0800, 0x1fff) AM_RAM AM_RANGE(0x0800, 0x1fff) AM_RAM
AM_RANGE(0x2000, 0x3fff) AM_READWRITE(combasc_video_r, combasc_video_w) AM_RANGE(0x2000, 0x3fff) AM_READWRITE(combasc_video_r, combasc_video_w)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) /* banked ROM/RAM area */ AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") /* banked ROM/RAM area */
AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */
ADDRESS_MAP_END ADDRESS_MAP_END

6
src/mame/drivers/compgolf.c
View File

@ -45,7 +45,7 @@ static WRITE8_HANDLER( compgolf_ctrl_w )
if (state->bank != new_bank) if (state->bank != new_bank)
{ {
state->bank = new_bank; state->bank = new_bank;
memory_set_bank(space->machine, 1, state->bank); memory_set_bank(space->machine, "bank1", state->bank);
} }
state->scrollx_hi = (data & 1) << 8; state->scrollx_hi = (data & 1) << 8;
@ -70,7 +70,7 @@ static ADDRESS_MAP_START( compgolf_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3002, 0x3002) AM_READ_PORT("DSW1") AM_RANGE(0x3002, 0x3002) AM_READ_PORT("DSW1")
AM_RANGE(0x3003, 0x3003) AM_READ_PORT("DSW2") AM_RANGE(0x3003, 0x3003) AM_READ_PORT("DSW2")
AM_RANGE(0x3800, 0x3801) AM_DEVREADWRITE("ymsnd", ym2203_r, ym2203_w) AM_RANGE(0x3800, 0x3801) AM_DEVREADWRITE("ymsnd", ym2203_r, ym2203_w)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -365,7 +365,7 @@ static void compgolf_expand_bg(running_machine *machine)
static DRIVER_INIT( compgolf ) static DRIVER_INIT( compgolf )
{ {
memory_configure_bank(machine, 1, 0, 2, memory_region(machine, "user1"), 0x4000); memory_configure_bank(machine, "bank1", 0, 2, memory_region(machine, "user1"), 0x4000);
compgolf_expand_bg(machine); compgolf_expand_bg(machine);
} }

4
src/mame/drivers/contra.c
View File

@ -48,7 +48,7 @@ static WRITE8_HANDLER( contra_bankswitch_w )
bankaddress = 0x10000 + (data & 0x0f) * 0x2000; bankaddress = 0x10000 + (data & 0x0f) * 0x2000;
if (bankaddress < 0x28000) /* for safety */ if (bankaddress < 0x28000) /* for safety */
memory_set_bankptr(space->machine, 1,&RAM[bankaddress]); memory_set_bankptr(space->machine, "bank1",&RAM[bankaddress]);
} }
static WRITE8_HANDLER( contra_sh_irqtrigger_w ) static WRITE8_HANDLER( contra_sh_irqtrigger_w )
@ -100,7 +100,7 @@ static ADDRESS_MAP_START( contra_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x4400, 0x47ff) AM_WRITE(contra_bg_vram_w) AM_BASE(&contra_bg_vram) AM_RANGE(0x4400, 0x47ff) AM_WRITE(contra_bg_vram_w) AM_BASE(&contra_bg_vram)
AM_RANGE(0x4800, 0x5fff) AM_WRITEONLY AM_RANGE(0x4800, 0x5fff) AM_WRITEONLY
AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x7000, 0x7000) AM_WRITE(contra_bankswitch_w) AM_RANGE(0x7000, 0x7000) AM_WRITE(contra_bankswitch_w)
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM

8
src/mame/drivers/cps1.c
View File

@ -285,7 +285,7 @@ static WRITE8_HANDLER( cps1_snd_bankswitch_w )
int bankaddr; int bankaddr;
bankaddr = ((data & 1) * 0x4000); bankaddr = ((data & 1) * 0x4000);
memory_set_bankptr(space->machine, 1,&RAM[0x10000 + bankaddr]); memory_set_bankptr(space->machine, "bank1",&RAM[0x10000 + bankaddr]);
} }
static WRITE8_DEVICE_HANDLER( cps1_oki_pin7_w ) static WRITE8_DEVICE_HANDLER( cps1_oki_pin7_w )
@ -398,7 +398,7 @@ static WRITE8_HANDLER( qsound_banksw_w )
logerror("WARNING: Q sound bank overflow (%02x)\n", data); logerror("WARNING: Q sound bank overflow (%02x)\n", data);
bankaddress=0x10000; bankaddress=0x10000;
} }
memory_set_bankptr(space->machine, 1, &RAM[bankaddress]); memory_set_bankptr(space->machine, "bank1", &RAM[bankaddress]);
} }
@ -604,7 +604,7 @@ SOUNDA15 = pin13 = ( I1 )
static ADDRESS_MAP_START( sub_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( sub_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_RANGE(0xd000, 0xd7ff) AM_RAM
AM_RANGE(0xf000, 0xf001) AM_DEVREADWRITE("2151", ym2151_r, ym2151_w) AM_RANGE(0xf000, 0xf001) AM_DEVREADWRITE("2151", ym2151_r, ym2151_w)
AM_RANGE(0xf002, 0xf002) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w) AM_RANGE(0xf002, 0xf002) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
@ -635,7 +635,7 @@ ADDRESS_MAP_END
ADDRESS_MAP_START( qsound_sub_map, ADDRESS_SPACE_PROGRAM, 8 ) // used by cps2.c too ADDRESS_MAP_START( qsound_sub_map, ADDRESS_SPACE_PROGRAM, 8 ) // used by cps2.c too
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) /* banked (contains music data) */ AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1") /* banked (contains music data) */
AM_RANGE(0xc000, 0xcfff) AM_RAM AM_BASE(&qsound_sharedram1) AM_RANGE(0xc000, 0xcfff) AM_RAM AM_BASE(&qsound_sharedram1)
AM_RANGE(0xd000, 0xd002) AM_DEVWRITE("qsound", qsound_w) AM_RANGE(0xd000, 0xd002) AM_DEVWRITE("qsound", qsound_w)
AM_RANGE(0xd003, 0xd003) AM_WRITE(qsound_banksw_w) AM_RANGE(0xd003, 0xd003) AM_WRITE(qsound_banksw_w)

8
src/mame/drivers/crgolf.c
View File

@ -44,7 +44,7 @@
static WRITE8_HANDLER( rom_bank_select_w ) static WRITE8_HANDLER( rom_bank_select_w )
{ {
memory_set_bank(space->machine, 1, data & 15); memory_set_bank(space->machine, "bank1", data & 15);
} }
@ -56,8 +56,8 @@ static MACHINE_START( crgolf )
state->audiocpu = devtag_get_device(machine, "audiocpu"); state->audiocpu = devtag_get_device(machine, "audiocpu");
/* configure the banking */ /* configure the banking */
memory_configure_bank(machine, 1, 0, 16, memory_region(machine, "maincpu") + 0x10000, 0x2000); memory_configure_bank(machine, "bank1", 0, 16, memory_region(machine, "maincpu") + 0x10000, 0x2000);
memory_set_bank(machine, 1, 0); memory_set_bank(machine, "bank1", 0);
/* register for save states */ /* register for save states */
state_save_register_global(machine, state->port_select); state_save_register_global(machine, state->port_select);
@ -255,7 +255,7 @@ static WRITE8_DEVICE_HANDLER( crgolfhi_sample_w )
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x5fff) AM_RAM AM_RANGE(0x4000, 0x5fff) AM_RAM
AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8003, 0x8003) AM_WRITEONLY AM_BASE_MEMBER(crgolf_state, color_select) AM_RANGE(0x8003, 0x8003) AM_WRITEONLY AM_BASE_MEMBER(crgolf_state, color_select)
AM_RANGE(0x8004, 0x8004) AM_WRITEONLY AM_BASE_MEMBER(crgolf_state, screen_flip) AM_RANGE(0x8004, 0x8004) AM_WRITEONLY AM_BASE_MEMBER(crgolf_state, screen_flip)
AM_RANGE(0x8005, 0x8005) AM_WRITEONLY AM_BASE_MEMBER(crgolf_state, screen_select) AM_RANGE(0x8005, 0x8005) AM_WRITEONLY AM_BASE_MEMBER(crgolf_state, screen_select)

15
src/mame/drivers/crimfght.c
View File

@ -53,7 +53,7 @@ static WRITE8_DEVICE_HANDLER( crimfght_snd_bankswitch_w )
/********************************************/ /********************************************/
static ADDRESS_MAP_START( crimfght_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( crimfght_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x03ff) AM_RAMBANK(1) /* banked RAM */ AM_RANGE(0x0000, 0x03ff) AM_RAMBANK("bank1") /* banked RAM */
AM_RANGE(0x0400, 0x1fff) AM_RAM /* RAM */ AM_RANGE(0x0400, 0x1fff) AM_RAM /* RAM */
AM_RANGE(0x3f80, 0x3f80) AM_READ_PORT("SYSTEM") AM_RANGE(0x3f80, 0x3f80) AM_READ_PORT("SYSTEM")
AM_RANGE(0x3f81, 0x3f81) AM_READ_PORT("P1") AM_RANGE(0x3f81, 0x3f81) AM_READ_PORT("P1")
@ -66,7 +66,7 @@ static ADDRESS_MAP_START( crimfght_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3f88, 0x3f88) AM_READWRITE(watchdog_reset_r, crimfght_coin_w) /* watchdog reset */ AM_RANGE(0x3f88, 0x3f88) AM_READWRITE(watchdog_reset_r, crimfght_coin_w) /* watchdog reset */
AM_RANGE(0x3f8c, 0x3f8c) AM_WRITE(crimfght_sh_irqtrigger_w) /* cause interrupt on audio CPU? */ AM_RANGE(0x3f8c, 0x3f8c) AM_WRITE(crimfght_sh_irqtrigger_w) /* cause interrupt on audio CPU? */
AM_RANGE(0x2000, 0x5fff) AM_READWRITE(K052109_051960_r, K052109_051960_w) /* video RAM + sprite RAM */ AM_RANGE(0x2000, 0x5fff) AM_READWRITE(K052109_051960_r, K052109_051960_w) /* video RAM + sprite RAM */
AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(2) /* banked ROM */ AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank2") /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */
ADDRESS_MAP_END ADDRESS_MAP_END
@ -344,17 +344,18 @@ static KONAMI_SETLINES_CALLBACK( crimfght_banking )
/* bit 5 = select work RAM or palette */ /* bit 5 = select work RAM or palette */
if (lines & 0x20) if (lines & 0x20)
{ {
memory_install_readwrite8_handler(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0x0000, 0x03ff, 0, 0, (read8_space_func)SMH_BANK(3), paletteram_xBBBBBGGGGGRRRRR_be_w); memory_install_read_bank_handler(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0x0000, 0x03ff, 0, 0, "bank3");
memory_set_bankptr(device->machine, 3, device->machine->generic.paletteram.v); memory_install_write8_handler(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0x0000, 0x03ff, 0, 0, paletteram_xBBBBBGGGGGRRRRR_be_w);
memory_set_bankptr(device->machine, "bank3", device->machine->generic.paletteram.v);
} }
else else
memory_install_readwrite8_handler(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0x0000, 0x03ff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1)); /* RAM */ memory_install_readwrite_bank_handler(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0x0000, 0x03ff, 0, 0, "bank1"); /* RAM */
/* bit 6 = enable char ROM reading through the video RAM */ /* bit 6 = enable char ROM reading through the video RAM */
K052109_set_RMRD_line((lines & 0x40) ? ASSERT_LINE : CLEAR_LINE); K052109_set_RMRD_line((lines & 0x40) ? ASSERT_LINE : CLEAR_LINE);
offs = 0x10000 + ((lines & 0x0f) * 0x2000); offs = 0x10000 + ((lines & 0x0f) * 0x2000);
memory_set_bankptr(device->machine, 2, &RAM[offs]); memory_set_bankptr(device->machine, "bank2", &RAM[offs]);
} }
static MACHINE_RESET( crimfght ) static MACHINE_RESET( crimfght )
@ -364,7 +365,7 @@ static MACHINE_RESET( crimfght )
konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), crimfght_banking); konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), crimfght_banking);
/* init the default bank */ /* init the default bank */
memory_set_bankptr(machine, 2, &RAM[0x10000] ); memory_set_bankptr(machine, "bank2", &RAM[0x10000] );
} }
static DRIVER_INIT( crimfght ) static DRIVER_INIT( crimfght )

4
src/mame/drivers/crshrace.c
View File

@ -159,7 +159,7 @@ static WRITE8_HANDLER( crshrace_sh_bankswitch_w )
{ {
UINT8 *rom = memory_region(space->machine, "audiocpu") + 0x10000; UINT8 *rom = memory_region(space->machine, "audiocpu") + 0x10000;
memory_set_bankptr(space->machine, 1,rom + (data & 0x03) * 0x8000); memory_set_bankptr(space->machine, "bank1",rom + (data & 0x03) * 0x8000);
} }
@ -213,7 +213,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x77ff) AM_ROM AM_RANGE(0x0000, 0x77ff) AM_ROM
AM_RANGE(0x7800, 0x7fff) AM_RAM AM_RANGE(0x7800, 0x7fff) AM_RAM
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1")
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 ) static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )

8
src/mame/drivers/crystal.c
View File

@ -232,9 +232,9 @@ static WRITE32_HANDLER(Banksw_w)
{ {
Bank=(data>>1)&7; Bank=(data>>1)&7;
if(Bank<=2) if(Bank<=2)
memory_set_bankptr(space->machine, 1,memory_region(space->machine, "user1")+Bank*0x1000000); memory_set_bankptr(space->machine, "bank1",memory_region(space->machine, "user1")+Bank*0x1000000);
else else
memory_set_bankptr(space->machine, 1,memory_region(space->machine, "user2")); memory_set_bankptr(space->machine, "bank1",memory_region(space->machine, "user2"));
} }
static TIMER_CALLBACK( Timercb ) static TIMER_CALLBACK( Timercb )
@ -446,7 +446,7 @@ static ADDRESS_MAP_START( crystal_mem, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x04800000, 0x04800fff) AM_DEVREADWRITE("vrender", vr0_snd_read, vr0_snd_write) AM_RANGE(0x04800000, 0x04800fff) AM_DEVREADWRITE("vrender", vr0_snd_read, vr0_snd_write)
AM_RANGE(0x05000000, 0x05000003) AM_READ(FlashCmd_r) AM_WRITE(FlashCmd_w) AM_RANGE(0x05000000, 0x05000003) AM_READ(FlashCmd_r) AM_WRITE(FlashCmd_w)
AM_RANGE(0x05000000, 0x05ffffff) AM_READ(SMH_BANK(1)) AM_RANGE(0x05000000, 0x05ffffff) AM_ROMBANK("bank1")
AM_RANGE(0x44414F4C, 0x44414F7F) AM_RAM AM_BASE(&ResetPatch) AM_RANGE(0x44414F4C, 0x44414F7F) AM_RAM AM_BASE(&ResetPatch)
@ -521,7 +521,7 @@ static MACHINE_RESET(crystal)
IntHigh = 0; IntHigh = 0;
cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), icallback); cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), icallback);
Bank = 0; Bank = 0;
memory_set_bankptr(machine, 1, memory_region(machine, "user1") + 0); memory_set_bankptr(machine, "bank1", memory_region(machine, "user1") + 0);
FlashCmd = 0xff; FlashCmd = 0xff;
OldPort4 = 0; OldPort4 = 0;

12
src/mame/drivers/cshooter.c
View File

@ -232,7 +232,7 @@ static WRITE8_HANDLER ( cshooter_c700_w )
static WRITE8_HANDLER ( bank_w ) static WRITE8_HANDLER ( bank_w )
{ {
memory_set_bankptr(space->machine, 1,&memory_region(space->machine, "user1")[0x4000*((data>>4)&3)]); memory_set_bankptr(space->machine, "bank1",&memory_region(space->machine, "user1")[0x4000*((data>>4)&3)]);
} }
@ -257,7 +257,7 @@ static READ8_HANDLER(pal_r)
static ADDRESS_MAP_START( cshooter_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( cshooter_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xafff) AM_READWRITE(SMH_BANK(1), SMH_RAM) AM_RANGE(0x8000, 0xafff) AM_READ_BANK("bank1") AM_WRITE(SMH_RAM)
AM_RANGE(0xb000, 0xb0ff) AM_READ(SMH_RAM) // sound related ? AM_RANGE(0xb000, 0xb0ff) AM_READ(SMH_RAM) // sound related ?
AM_RANGE(0xc000, 0xc1ff) AM_WRITE(pal_w) AM_READ(pal_r) AM_BASE_GENERIC(paletteram) AM_RANGE(0xc000, 0xc1ff) AM_WRITE(pal_w) AM_READ(pal_r) AM_BASE_GENERIC(paletteram)
AM_RANGE(0xc200, 0xc200) AM_READ_PORT("IN0") AM_RANGE(0xc200, 0xc200) AM_READ_PORT("IN0")
@ -277,9 +277,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( airraid_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( airraid_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1)) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xb000, 0xb0ff) AM_RAM // sound related ? AM_RANGE(0xb000, 0xb0ff) AM_RAM // sound related ?
AM_RANGE(0xb100, 0xb1ff) AM_RAM//READ(SMH_BANK(1)) // sound related ? AM_RANGE(0xb100, 0xb1ff) AM_RAM//ROMBANK("bank1") // sound related ?
AM_RANGE(0xc000, 0xc000) AM_READ_PORT("IN0") AM_RANGE(0xc000, 0xc000) AM_READ_PORT("IN0")
AM_RANGE(0xc001, 0xc001) AM_READ_PORT("IN1") AM_RANGE(0xc001, 0xc001) AM_READ_PORT("IN1")
AM_RANGE(0xc002, 0xc002) AM_READ_PORT("IN2") AM_RANGE(0xc002, 0xc002) AM_READ_PORT("IN2")
@ -655,7 +655,7 @@ static DRIVER_INIT( cshooter )
rom[0xa2] = 0x00; rom[0xa2] = 0x00;
rom[0xa3] = 0x00; rom[0xa3] = 0x00;
rom[0xa4] = 0x00; rom[0xa4] = 0x00;
memory_set_bankptr(machine, 1,&memory_region(machine, "user1")[0]); memory_set_bankptr(machine, "bank1",&memory_region(machine, "user1")[0]);
} }
static DRIVER_INIT( cshootre ) static DRIVER_INIT( cshootre )
@ -692,7 +692,7 @@ static DRIVER_INIT( cshootre )
rom[A] = BITSWAP8(rom[A],7,6,1,4,3,2,5,0); rom[A] = BITSWAP8(rom[A],7,6,1,4,3,2,5,0);
} }
memory_set_bankptr(machine, 1,&memory_region(machine, "user1")[0]); memory_set_bankptr(machine, "bank1",&memory_region(machine, "user1")[0]);
seibu_sound_decrypt(machine,"audiocpu",0x2000); seibu_sound_decrypt(machine,"audiocpu",0x2000);
} }

10
src/mame/drivers/cubocd32.c
View File

@ -346,12 +346,12 @@ static WRITE32_HANDLER( aga_overlay_w )
data = (data >> 16) & 1; data = (data >> 16) & 1;
/* switch banks as appropriate */ /* switch banks as appropriate */
memory_set_bank(space->machine, 1, data & 1); memory_set_bank(space->machine, "bank1", data & 1);
/* swap the write handlers between ROM and bank 1 based on the bit */ /* swap the write handlers between ROM and bank 1 based on the bit */
if ((data & 1) == 0) if ((data & 1) == 0)
/* overlay disabled, map RAM on 0x000000 */ /* overlay disabled, map RAM on 0x000000 */
memory_install_write32_handler(space, 0x000000, 0x1fffff, 0, 0, (write32_space_func)SMH_BANK(1)); memory_install_write_bank_handler(space, 0x000000, 0x1fffff, 0, 0, "bank1");
else else
/* overlay enabled, map Amiga system ROM on 0x000000 */ /* overlay enabled, map Amiga system ROM on 0x000000 */
memory_install_write32_handler(space, 0x000000, 0x1fffff, 0, 0, (write32_space_func)SMH_UNMAP); memory_install_write32_handler(space, 0x000000, 0x1fffff, 0, 0, (write32_space_func)SMH_UNMAP);
@ -414,7 +414,7 @@ static WRITE8_DEVICE_HANDLER( cd32_cia_0_portb_w )
static ADDRESS_MAP_START( cd32_map, ADDRESS_SPACE_PROGRAM, 32 ) static ADDRESS_MAP_START( cd32_map, ADDRESS_SPACE_PROGRAM, 32 )
ADDRESS_MAP_UNMAP_HIGH ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x000000, 0x1fffff) AM_RAMBANK(1) AM_BASE(&amiga_chip_ram32) AM_SIZE(&amiga_chip_ram_size) AM_RANGE(0x000000, 0x1fffff) AM_RAMBANK("bank1") AM_BASE(&amiga_chip_ram32) AM_SIZE(&amiga_chip_ram_size)
AM_RANGE(0x800000, 0x800003) AM_READ_PORT("DIPSW1") AM_RANGE(0x800000, 0x800003) AM_READ_PORT("DIPSW1")
AM_RANGE(0x800010, 0x800013) AM_READ_PORT("DIPSW2") AM_RANGE(0x800010, 0x800013) AM_READ_PORT("DIPSW2")
AM_RANGE(0xb80000, 0xb8003f) AM_READWRITE(amiga_akiko32_r, amiga_akiko32_w) AM_RANGE(0xb80000, 0xb8003f) AM_READWRITE(amiga_akiko32_r, amiga_akiko32_w)
@ -1157,8 +1157,8 @@ static DRIVER_INIT( cd32 )
amiga_machine_config(machine, &cubocd32_intf); amiga_machine_config(machine, &cubocd32_intf);
/* set up memory */ /* set up memory */
memory_configure_bank(machine, 1, 0, 1, amiga_chip_ram32, 0); memory_configure_bank(machine, "bank1", 0, 1, amiga_chip_ram32, 0);
memory_configure_bank(machine, 1, 1, 1, memory_region(machine, "user1"), 0); memory_configure_bank(machine, "bank1", 1, 1, memory_region(machine, "user1"), 0);
/* intialize akiko */ /* intialize akiko */
amiga_akiko_init(machine); amiga_akiko_init(machine);

6
src/mame/drivers/cultures.c
View File

@ -112,7 +112,7 @@ static VIDEO_UPDATE( cultures )
static WRITE8_HANDLER( cpu_bankswitch_w ) static WRITE8_HANDLER( cpu_bankswitch_w )
{ {
cultures_state *state = (cultures_state *)space->machine->driver_data; cultures_state *state = (cultures_state *)space->machine->driver_data;
memory_set_bank(space->machine, 1, data & 0x0f); memory_set_bank(space->machine, "bank1", data & 0x0f);
state->video_bank = ~data & 0x20; state->video_bank = ~data & 0x20;
} }
@ -176,7 +176,7 @@ static WRITE8_HANDLER( bg_bank_w )
static ADDRESS_MAP_START( cultures_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( cultures_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xbfff) AM_RAM_WRITE(bg0_videoram_w) AM_BASE_MEMBER(cultures_state, bg0_videoram) AM_RANGE(0x8000, 0xbfff) AM_RAM_WRITE(bg0_videoram_w) AM_BASE_MEMBER(cultures_state, bg0_videoram)
AM_RANGE(0xc000, 0xdfff) AM_RAM AM_RANGE(0xc000, 0xdfff) AM_RAM
AM_RANGE(0xf000, 0xffff) AM_RAM AM_RANGE(0xf000, 0xffff) AM_RAM
@ -359,7 +359,7 @@ static MACHINE_START( cultures )
cultures_state *state = (cultures_state *)machine->driver_data; cultures_state *state = (cultures_state *)machine->driver_data;
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 16, &ROM[0x0000], 0x4000); memory_configure_bank(machine, "bank1", 0, 16, &ROM[0x0000], 0x4000);
state->paletteram = auto_alloc_array(machine, UINT8, 0x4000); state->paletteram = auto_alloc_array(machine, UINT8, 0x4000);
state_save_register_global_pointer(machine, state->paletteram, 0x4000); state_save_register_global_pointer(machine, state->paletteram, 0x4000);

2
src/mame/drivers/cyberbal.c
View File

@ -196,7 +196,7 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2c02, 0x2c03) AM_READ(cyberbal_special_port3_r) AM_RANGE(0x2c02, 0x2c03) AM_READ(cyberbal_special_port3_r)
AM_RANGE(0x2c04, 0x2c05) AM_READ(cyberbal_sound_68k_6502_r) AM_RANGE(0x2c04, 0x2c05) AM_READ(cyberbal_sound_68k_6502_r)
AM_RANGE(0x2c06, 0x2c07) AM_READ(cyberbal_sound_6502_stat_r) AM_RANGE(0x2c06, 0x2c07) AM_READ(cyberbal_sound_6502_stat_r)
AM_RANGE(0x3000, 0x3fff) AM_ROMBANK(8) AM_RANGE(0x3000, 0x3fff) AM_ROMBANK("bank8")
AM_RANGE(0x4000, 0xffff) AM_ROM AM_RANGE(0x4000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END

6
src/mame/drivers/d9final.c
View File

@ -73,7 +73,7 @@ static WRITE8_HANDLER( d9final_bank_w )
UINT32 bankaddress; UINT32 bankaddress;
bankaddress = 0x10000+(0x4000 * (data & 0x7)); bankaddress = 0x10000+(0x4000 * (data & 0x7));
memory_set_bankptr(space->machine, 1, &ROM[bankaddress]); memory_set_bankptr(space->machine, "bank1", &ROM[bankaddress]);
} }
/* game checks this after three attract cycles, otherwise coin inputs stop to work. */ /* game checks this after three attract cycles, otherwise coin inputs stop to work. */
@ -87,7 +87,7 @@ static READ8_HANDLER( prot_latch_r )
static ADDRESS_MAP_START( d9final_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( d9final_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_RANGE(0xc000, 0xc7ff) AM_RAM
AM_RANGE(0xc800, 0xcbff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0xc800, 0xcbff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0xcc00, 0xcfff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split2_w) AM_BASE_GENERIC(paletteram2) AM_RANGE(0xcc00, 0xcfff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split2_w) AM_BASE_GENERIC(paletteram2)
@ -252,7 +252,7 @@ static MACHINE_RESET( d9final )
{ {
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_set_bankptr(machine, 1, &ROM[0x10000]); memory_set_bankptr(machine, "bank1", &ROM[0x10000]);
} }
static MACHINE_DRIVER_START( d9final ) static MACHINE_DRIVER_START( d9final )

7
src/mame/drivers/darius.c
View File

@ -285,8 +285,7 @@ static UINT8 nmi_enable = 0;
static void reset_sound_region(running_machine *machine) static void reset_sound_region(running_machine *machine)
{ {
memory_set_bankptr(machine, STATIC_BANK1, memory_region(machine, "audiocpu") + (banknum * 0x8000) + 0x10000 ); memory_set_bankptr(machine, "bank1", memory_region(machine, "audiocpu") + (banknum * 0x8000) + 0x10000 );
// memory_set_bankptr(machine, 1, memory_region(machine, "audiocpu") + (banknum * 0x8000) + 0x10000 );
} }
@ -473,7 +472,7 @@ static WRITE8_DEVICE_HANDLER( darius_write_portB1 )
*****************************************************/ *****************************************************/
static ADDRESS_MAP_START( darius_sound_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( darius_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x0000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0x8fff) AM_RAM AM_RANGE(0x8000, 0x8fff) AM_RAM
AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ym1", ym2203_r, ym2203_w) AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ym1", ym2203_r, ym2203_w)
AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ym2", ym2203_r, ym2203_w) AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ym2", ym2203_r, ym2203_w)
@ -1201,7 +1200,7 @@ static MACHINE_RESET( darius )
memcpy( RAM + 0x8000*i + 0x10000, RAM, 0x4000 ); memcpy( RAM + 0x8000*i + 0x10000, RAM, 0x4000 );
memcpy( RAM + 0x8000*i + 0x14000, RAM + 0x4000*i, 0x4000 ); memcpy( RAM + 0x8000*i + 0x14000, RAM + 0x4000*i, 0x4000 );
} }
memory_set_bankptr(machine, 1, RAM); memory_set_bankptr(machine, "bank1", RAM);
sound_global_enable( machine, 1 ); /* mixer enabled */ sound_global_enable( machine, 1 ); /* mixer enabled */

2
src/mame/drivers/darkhors.c
View File

@ -713,7 +713,7 @@ MACHINE_DRIVER_END
static ADDRESS_MAP_START( st0016_mem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( st0016_mem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xe900, 0xe9ff) AM_DEVREADWRITE("stsnd", st0016_snd_r, st0016_snd_w) AM_RANGE(0xe900, 0xe9ff) AM_DEVREADWRITE("stsnd", st0016_snd_r, st0016_snd_w)
AM_RANGE(0xec00, 0xec1f) AM_READ(st0016_character_ram_r) AM_WRITE(st0016_character_ram_w) AM_RANGE(0xec00, 0xec1f) AM_READ(st0016_character_ram_r) AM_WRITE(st0016_character_ram_w)
AM_RANGE(0xf000, 0xffff) AM_RAM AM_RANGE(0xf000, 0xffff) AM_RAM

6
src/mame/drivers/darkmist.c
View File

@ -44,7 +44,7 @@ int darkmist_hw;
static WRITE8_HANDLER(darkmist_hw_w) static WRITE8_HANDLER(darkmist_hw_w)
{ {
darkmist_hw=data; darkmist_hw=data;
memory_set_bankptr(space->machine, 1,&memory_region(space->machine, "maincpu")[0x010000+((data&0x80)?0x4000:0)]); memory_set_bankptr(space->machine, "bank1",&memory_region(space->machine, "maincpu")[0x010000+((data&0x80)?0x4000:0)]);
} }
static READ8_HANDLER(t5182shared_r) static READ8_HANDLER(t5182shared_r)
@ -60,7 +60,7 @@ static WRITE8_HANDLER(t5182shared_w)
static ADDRESS_MAP_START( memmap, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( memmap, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc801, 0xc801) AM_READ_PORT("P1") AM_RANGE(0xc801, 0xc801) AM_READ_PORT("P1")
AM_RANGE(0xc802, 0xc802) AM_READ_PORT("P2") AM_RANGE(0xc802, 0xc802) AM_READ_PORT("P2")
AM_RANGE(0xc803, 0xc803) AM_READ_PORT("START") AM_RANGE(0xc803, 0xc803) AM_READ_PORT("START")
@ -458,7 +458,7 @@ static DRIVER_INIT(darkmist)
} }
memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt); memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
memory_set_bankptr(space->machine, 1,&ROM[0x010000]); memory_set_bankptr(space->machine, "bank1",&ROM[0x010000]);
/* adr line swaps */ /* adr line swaps */
ROM = memory_region(machine, "user1"); ROM = memory_region(machine, "user1");

2
src/mame/drivers/darkseal.c
View File

@ -97,7 +97,7 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w) AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w) AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r) AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8) AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank8")
AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w) AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w) AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
ADDRESS_MAP_END ADDRESS_MAP_END

2
src/mame/drivers/dassault.c
View File

@ -261,7 +261,7 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w) AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w) AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r) AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8) AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank8")
AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w) AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w) AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
ADDRESS_MAP_END ADDRESS_MAP_END

8
src/mame/drivers/ddayjlc.c
View File

@ -193,7 +193,7 @@ static WRITE8_HANDLER( bg2_w )
if (state->bgadr > 2) if (state->bgadr > 2)
state->bgadr = 0; state->bgadr = 0;
memory_set_bank(space->machine, 1, state->bgadr); memory_set_bank(space->machine, "bank1", state->bgadr);
} }
static WRITE8_HANDLER( sound_w ) static WRITE8_HANDLER( sound_w )
@ -243,7 +243,7 @@ static ADDRESS_MAP_START( main_cpu, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x9000, 0x93ff) AM_RAM AM_BASE_MEMBER(ddayjlc_state, spriteram) AM_RANGE(0x9000, 0x93ff) AM_RAM AM_BASE_MEMBER(ddayjlc_state, spriteram)
AM_RANGE(0x9400, 0x97ff) AM_RAM_WRITE(ddayjlc_videoram_w) AM_BASE_MEMBER(ddayjlc_state, videoram) AM_RANGE(0x9400, 0x97ff) AM_RAM_WRITE(ddayjlc_videoram_w) AM_BASE_MEMBER(ddayjlc_state, videoram)
AM_RANGE(0x9800, 0x9fff) AM_RAM_WRITE(ddayjlc_bgram_w) AM_BASE_MEMBER(ddayjlc_state, bgram) /* 9800-981f - videoregs */ AM_RANGE(0x9800, 0x9fff) AM_RAM_WRITE(ddayjlc_bgram_w) AM_BASE_MEMBER(ddayjlc_state, bgram) /* 9800-981f - videoregs */
AM_RANGE(0xa000, 0xdfff) AM_ROMBANK(1) AM_WRITENOP AM_RANGE(0xa000, 0xdfff) AM_ROMBANK("bank1") AM_WRITENOP
AM_RANGE(0xe000, 0xe003) AM_WRITE(i8257_CH0_w) AM_RANGE(0xe000, 0xe003) AM_WRITE(i8257_CH0_w)
AM_RANGE(0xe008, 0xe008) AM_WRITENOP AM_RANGE(0xe008, 0xe008) AM_WRITENOP
AM_RANGE(0xf000, 0xf000) AM_WRITE(sound_w) AM_RANGE(0xf000, 0xf000) AM_WRITE(sound_w)
@ -655,8 +655,8 @@ static DRIVER_INIT( ddayjlc )
free(temp); free(temp);
} }
memory_configure_bank(machine, 1, 0, 3, memory_region(machine, "user1"), 0x4000); memory_configure_bank(machine, "bank1", 0, 3, memory_region(machine, "user1"), 0x4000);
memory_set_bank(machine, 1, 0); memory_set_bank(machine, "bank1", 0);
} }
GAME( 1984, ddayjlc, 0, ddayjlc, ddayjlc, ddayjlc, ROT90, "Jaleco", "D-Day (Jaleco set 1)", GAME_IMPERFECT_GRAPHICS | GAME_WRONG_COLORS | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) GAME( 1984, ddayjlc, 0, ddayjlc, ddayjlc, ddayjlc, ROT90, "Jaleco", "D-Day (Jaleco set 1)", GAME_IMPERFECT_GRAPHICS | GAME_WRONG_COLORS | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )

66
src/mame/drivers/ddenlovr.c
View File

@ -1883,19 +1883,19 @@ static WRITE8_HANDLER( rongrong_select_w )
//logerror("%04x: rongrong_select_w %02x\n",cpu_get_pc(space->cpu),data); //logerror("%04x: rongrong_select_w %02x\n",cpu_get_pc(space->cpu),data);
/* bits 0-4 = **both** ROM bank **AND** input select */ /* bits 0-4 = **both** ROM bank **AND** input select */
memory_set_bankptr(space->machine, 1, &rom[0x10000 + 0x8000 * (data & 0x1f)]); memory_set_bankptr(space->machine, "bank1", &rom[0x10000 + 0x8000 * (data & 0x1f)]);
ddenlovr_select = data; ddenlovr_select = data;
/* bits 5-7 = RAM bank */ /* bits 5-7 = RAM bank */
memory_set_bankptr(space->machine, 2, &rom[0x110000 + 0x1000 * ((data & 0xe0) >> 5)]); memory_set_bankptr(space->machine, "bank2", &rom[0x110000 + 0x1000 * ((data & 0xe0) >> 5)]);
} }
static ADDRESS_MAP_START( quizchq_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( quizchq_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM
AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM
AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2) // RAM (Banked) AM_RANGE(0x7000, 0x7fff) AM_RAMBANK("bank2") // RAM (Banked)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_WRITE(rongrong_palette_w) // ROM (Banked) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1") AM_WRITE(rongrong_palette_w) // ROM (Banked)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( quizchq_portmap, ADDRESS_SPACE_IO, 8 ) ADDRESS_MAP_GLOBAL_MASK(0xff) static ADDRESS_MAP_START( quizchq_portmap, ADDRESS_SPACE_IO, 8 ) ADDRESS_MAP_GLOBAL_MASK(0xff)
@ -1930,8 +1930,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( rongrong_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( rongrong_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM
AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM
AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2) // RAM (Banked) AM_RANGE(0x7000, 0x7fff) AM_RAMBANK("bank2") // RAM (Banked)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_WRITE(rongrong_palette_w) // ROM (Banked) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1") AM_WRITE(rongrong_palette_w) // ROM (Banked)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( rongrong_portmap, ADDRESS_SPACE_IO, 8 ) ADDRESS_MAP_GLOBAL_MASK(0xff) static ADDRESS_MAP_START( rongrong_portmap, ADDRESS_SPACE_IO, 8 ) ADDRESS_MAP_GLOBAL_MASK(0xff)
@ -1980,7 +1980,7 @@ static READ8_HANDLER( magic_r )
static WRITE8_HANDLER( mmpanic_rombank_w ) static WRITE8_HANDLER( mmpanic_rombank_w )
{ {
UINT8 *rom = memory_region(space->machine, "maincpu"); UINT8 *rom = memory_region(space->machine, "maincpu");
memory_set_bankptr(space->machine, 1, &rom[0x10000 + 0x8000 * (data & 0x7)]); memory_set_bankptr(space->machine, "bank1", &rom[0x10000 + 0x8000 * (data & 0x7)]);
/* Bit 4? */ /* Bit 4? */
} }
@ -2039,8 +2039,8 @@ static ADDRESS_MAP_START( mmpanic_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0051, 0x0051) AM_READ(magic_r) // ? AM_RANGE(0x0051, 0x0051) AM_READ(magic_r) // ?
AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM
AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM
AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2) // RAM (Banked) AM_RANGE(0x7000, 0x7fff) AM_RAMBANK("bank2") // RAM (Banked)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_WRITE(rongrong_palette_w) // ROM (Banked) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1") AM_WRITE(rongrong_palette_w) // ROM (Banked)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( mmpanic_portmap, ADDRESS_SPACE_IO, 8 ) static ADDRESS_MAP_START( mmpanic_portmap, ADDRESS_SPACE_IO, 8 )
@ -2116,9 +2116,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( funkyfig_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( funkyfig_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM AM_RANGE(0x0000, 0x5fff) AM_ROM
AM_RANGE(0x6000, 0x6fff) AM_RAM AM_RANGE(0x6000, 0x6fff) AM_RAM
AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2) // RAM (Banked) AM_RANGE(0x7000, 0x7fff) AM_RAMBANK("bank2") // RAM (Banked)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0x81ff) AM_WRITE(rongrong_palette_w) AM_RANGE(0x8000, 0x81ff) AM_WRITE(rongrong_palette_w)
AM_RANGE(0x8400, 0x87ff) AM_WRITENOP AM_RANGE(0x8400, 0x87ff) AM_WRITENOP
ADDRESS_MAP_END ADDRESS_MAP_END
@ -2141,9 +2141,9 @@ static WRITE8_HANDLER( funkyfig_rombank_w )
ddenlovr_select = data; ddenlovr_select = data;
memory_set_bankptr(space->machine, 1, &rom[0x10000 + 0x8000 * (data & 0x0f)]); memory_set_bankptr(space->machine, "bank1", &rom[0x10000 + 0x8000 * (data & 0x0f)]);
// bit 4 selects palette ram at 8000? // bit 4 selects palette ram at 8000?
memory_set_bankptr(space->machine, 2, &rom[0x90000 + 0x1000 * ((data & 0xe0) >> 5)]); memory_set_bankptr(space->machine, "bank2", &rom[0x90000 + 0x1000 * ((data & 0xe0) >> 5)]);
} }
static READ8_HANDLER( funkyfig_dsw_r ) static READ8_HANDLER( funkyfig_dsw_r )
@ -2247,16 +2247,16 @@ static WRITE8_HANDLER( hanakanz_rombank_w )
{ {
UINT8 *rom = memory_region(space->machine, "maincpu"); UINT8 *rom = memory_region(space->machine, "maincpu");
memory_set_bankptr(space->machine, 1, &rom[0x10000 + 0x8000 * (data & 0x0f)]); memory_set_bankptr(space->machine, "bank1", &rom[0x10000 + 0x8000 * (data & 0x0f)]);
memory_set_bankptr(space->machine, 2, &rom[0x90000 + 0x1000 * ((data & 0xf0) >> 4)]); memory_set_bankptr(space->machine, "bank2", &rom[0x90000 + 0x1000 * ((data & 0xf0) >> 4)]);
} }
static ADDRESS_MAP_START( hanakanz_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( hanakanz_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM
AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM
AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2) // RAM (Banked) AM_RANGE(0x7000, 0x7fff) AM_RAMBANK("bank2") // RAM (Banked)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) // ROM (Banked) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1") // ROM (Banked)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -2583,8 +2583,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( mjmyster_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( mjmyster_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM
AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM
AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2) // RAM (Banked) AM_RANGE(0x7000, 0x7fff) AM_RAMBANK("bank2") // RAM (Banked)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) // ROM/RAM (Banked) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1") // ROM/RAM (Banked)
AM_RANGE(0xf000, 0xf1ff) AM_WRITE(rongrong_palette_w) // RAM enabled by bit 4 of rombank AM_RANGE(0xf000, 0xf1ff) AM_WRITE(rongrong_palette_w) // RAM enabled by bit 4 of rombank
AM_RANGE(0xf200, 0xffff) AM_WRITENOP // "" AM_RANGE(0xf200, 0xffff) AM_WRITENOP // ""
ADDRESS_MAP_END ADDRESS_MAP_END
@ -2592,7 +2592,7 @@ ADDRESS_MAP_END
static WRITE8_HANDLER( mjmyster_rambank_w ) static WRITE8_HANDLER( mjmyster_rambank_w )
{ {
UINT8 *rom = memory_region(space->machine, "maincpu"); UINT8 *rom = memory_region(space->machine, "maincpu");
memory_set_bankptr(space->machine, 2, &rom[0x90000 + 0x1000 * (data & 0x07)]); memory_set_bankptr(space->machine, "bank2", &rom[0x90000 + 0x1000 * (data & 0x07)]);
// logerror("%04x: rambank = %02x\n", cpu_get_pc(space->cpu), data); // logerror("%04x: rambank = %02x\n", cpu_get_pc(space->cpu), data);
} }
@ -2703,7 +2703,7 @@ static UINT8 hginga_rombank;
static WRITE8_HANDLER( hginga_rombank_w ) static WRITE8_HANDLER( hginga_rombank_w )
{ {
UINT8 *rom = memory_region(space->machine, "maincpu"); UINT8 *rom = memory_region(space->machine, "maincpu");
memory_set_bankptr(space->machine, 1, &rom[0x10000 + 0x8000 * (data & 0x7)]); memory_set_bankptr(space->machine, "bank1", &rom[0x10000 + 0x8000 * (data & 0x7)]);
hginga_rombank = data; hginga_rombank = data;
} }
@ -2719,9 +2719,9 @@ static READ8_HANDLER( hginga_protection_r )
static ADDRESS_MAP_START( hginga_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( hginga_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM
AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM
AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2) // RAM (Banked) AM_RANGE(0x7000, 0x7fff) AM_RAMBANK("bank2") // RAM (Banked)
AM_RANGE(0xf601, 0xf601) AM_READ(hginga_protection_r) AM_RANGE(0xf601, 0xf601) AM_READ(hginga_protection_r)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) // ROM/RAM (Banked) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1") // ROM/RAM (Banked)
AM_RANGE(0xf000, 0xf1ff) AM_WRITE(rongrong_palette_w) // RAM enabled by bit 4 of rombank AM_RANGE(0xf000, 0xf1ff) AM_WRITE(rongrong_palette_w) // RAM enabled by bit 4 of rombank
AM_RANGE(0xf700, 0xf706) AM_WRITENOP AM_RANGE(0xf700, 0xf706) AM_WRITENOP
ADDRESS_MAP_END ADDRESS_MAP_END
@ -2933,9 +2933,9 @@ static READ8_HANDLER( hgokou_protection_r )
static ADDRESS_MAP_START( hgokou_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( hgokou_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM
AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM
AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2) // RAM (Banked) AM_RANGE(0x7000, 0x7fff) AM_RAMBANK("bank2") // RAM (Banked)
AM_RANGE(0xe601, 0xe601) AM_READ(hgokou_protection_r) AM_RANGE(0xe601, 0xe601) AM_READ(hgokou_protection_r)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) // ROM (Banked) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1") // ROM (Banked)
AM_RANGE(0xe000, 0xe1ff) AM_WRITE(rongrong_palette_w) AM_RANGE(0xe000, 0xe1ff) AM_WRITE(rongrong_palette_w)
AM_RANGE(0xe700, 0xe706) AM_WRITENOP AM_RANGE(0xe700, 0xe706) AM_WRITENOP
ADDRESS_MAP_END ADDRESS_MAP_END
@ -2978,8 +2978,8 @@ static WRITE8_HANDLER( hparadis_select_w )
ddenlovr_select = data; ddenlovr_select = data;
hginga_ip = 0; hginga_ip = 0;
memory_set_bankptr(space->machine, 1, &rom[0x10000 + 0x8000 * (data & 0x07)]); memory_set_bankptr(space->machine, "bank1", &rom[0x10000 + 0x8000 * (data & 0x07)]);
memory_set_bankptr(space->machine, 2, &rom[0x50000 + 0x1000 * ((data & 0xe0) >> 5)]); memory_set_bankptr(space->machine, "bank2", &rom[0x50000 + 0x1000 * ((data & 0xe0) >> 5)]);
} }
@ -3025,8 +3025,8 @@ static WRITE8_HANDLER( hparadis_coin_w )
static ADDRESS_MAP_START( hparadis_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( hparadis_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM
AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM
AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2) // RAM (Banked) AM_RANGE(0x7000, 0x7fff) AM_RAMBANK("bank2") // RAM (Banked)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) // ROM (Banked) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1") // ROM (Banked)
AM_RANGE(0xc000, 0xc1ff) AM_WRITE(rongrong_palette_w) AM_RANGE(0xc000, 0xc1ff) AM_WRITE(rongrong_palette_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -3200,7 +3200,7 @@ ADDRESS_MAP_END
static WRITE8_HANDLER( mjflove_rombank_w ) static WRITE8_HANDLER( mjflove_rombank_w )
{ {
UINT8 *rom = memory_region(space->machine, "maincpu"); UINT8 *rom = memory_region(space->machine, "maincpu");
memory_set_bankptr(space->machine, 1, &rom[0x10000 + 0x8000 * (data & 0xf)]); memory_set_bankptr(space->machine, "bank1", &rom[0x10000 + 0x8000 * (data & 0xf)]);
} }
static WRITE8_DEVICE_HANDLER( mjflove_okibank_w ) static WRITE8_DEVICE_HANDLER( mjflove_okibank_w )
@ -3330,8 +3330,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sryudens_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( sryudens_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM AM_RANGE(0x0000, 0x5fff) AM_ROM // ROM
AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM AM_RANGE(0x6000, 0x6fff) AM_RAM // RAM
AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2) // RAM (Banked) AM_RANGE(0x7000, 0x7fff) AM_RAMBANK("bank2") // RAM (Banked)
AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) // ROM (Banked) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1") // ROM (Banked)
AM_RANGE(0xe000, 0xe1ff) AM_WRITE(rongrong_palette_w) AM_RANGE(0xe000, 0xe1ff) AM_WRITE(rongrong_palette_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -3371,7 +3371,7 @@ static WRITE8_HANDLER( sryudens_coincounter_w )
static WRITE8_HANDLER( sryudens_rambank_w ) static WRITE8_HANDLER( sryudens_rambank_w )
{ {
UINT8 *rom = memory_region(space->machine, "maincpu"); UINT8 *rom = memory_region(space->machine, "maincpu");
memory_set_bankptr(space->machine, 2, &rom[0x90000 + 0x1000 * (data & 0x0f)]); memory_set_bankptr(space->machine, "bank2", &rom[0x90000 + 0x1000 * (data & 0x0f)]);
// logerror("%04x: rambank = %02x\n", cpu_get_pc(space->cpu), data); // logerror("%04x: rambank = %02x\n", cpu_get_pc(space->cpu), data);
} }

16
src/mame/drivers/ddragon.c
View File

@ -150,7 +150,7 @@ static MACHINE_START( ddragon )
ddragon_state *state = (ddragon_state *)machine->driver_data; ddragon_state *state = (ddragon_state *)machine->driver_data;
/* configure banks */ /* configure banks */
memory_configure_bank(machine, 1, 0, 8, memory_region(machine, "maincpu") + 0x10000, 0x4000); memory_configure_bank(machine, "bank1", 0, 8, memory_region(machine, "maincpu") + 0x10000, 0x4000);
state->maincpu = devtag_get_device(machine, "maincpu"); state->maincpu = devtag_get_device(machine, "maincpu");
state->sub_cpu = devtag_get_device(machine, "sub"); state->sub_cpu = devtag_get_device(machine, "sub");
@ -204,7 +204,7 @@ static WRITE8_HANDLER( ddragon_bankswitch_w )
else if (state->dd_sub_cpu_busy == 0) else if (state->dd_sub_cpu_busy == 0)
cpu_set_input_line(state->sub_cpu, state->sprite_irq, (state->sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE); cpu_set_input_line(state->sub_cpu, state->sprite_irq, (state->sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
memory_set_bank(space->machine, 1, (data & 0xe0) >> 5); memory_set_bank(space->machine, "bank1", (data & 0xe0) >> 5);
} }
@ -219,7 +219,7 @@ static WRITE8_HANDLER( toffy_bankswitch_w )
/* bit 3 unknown */ /* bit 3 unknown */
/* I don't know ... */ /* I don't know ... */
memory_set_bank(space->machine, 1, (data & 0x20) >> 5); memory_set_bank(space->machine, "bank1", (data & 0x20) >> 5);
} }
@ -268,7 +268,7 @@ static WRITE8_HANDLER( darktowr_mcu_bank_w )
static WRITE8_HANDLER( darktowr_bankswitch_w ) static WRITE8_HANDLER( darktowr_bankswitch_w )
{ {
ddragon_state *state = (ddragon_state *)space->machine->driver_data; ddragon_state *state = (ddragon_state *)space->machine->driver_data;
int oldbank = memory_get_bank(space->machine, 1); int oldbank = memory_get_bank(space->machine, "bank1");
int newbank = (data & 0xe0) >> 5; int newbank = (data & 0xe0) >> 5;
state->scrollx_hi = (data & 0x01); state->scrollx_hi = (data & 0x01);
@ -283,11 +283,11 @@ static WRITE8_HANDLER( darktowr_bankswitch_w )
else if (state->dd_sub_cpu_busy == 0) else if (state->dd_sub_cpu_busy == 0)
cpu_set_input_line(state->sub_cpu, state->sprite_irq, (state->sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE); cpu_set_input_line(state->sub_cpu, state->sprite_irq, (state->sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
memory_set_bank(space->machine, 1, newbank); memory_set_bank(space->machine, "bank1", newbank);
if (newbank == 4 && oldbank != 4) if (newbank == 4 && oldbank != 4)
memory_install_readwrite8_handler(space, 0x4000, 0x7fff, 0, 0, darktowr_mcu_bank_r, darktowr_mcu_bank_w); memory_install_readwrite8_handler(space, 0x4000, 0x7fff, 0, 0, darktowr_mcu_bank_r, darktowr_mcu_bank_w);
else if (newbank != 4 && oldbank == 4) else if (newbank != 4 && oldbank == 4)
memory_install_readwrite8_handler(space, 0x4000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1)); memory_install_readwrite_bank_handler(space, 0x4000, 0x7fff, 0, 0, "bank1");
} }
@ -518,7 +518,7 @@ static ADDRESS_MAP_START( ddragon_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3809, 0x3809) AM_WRITEONLY AM_BASE_MEMBER(ddragon_state, scrollx_lo) AM_RANGE(0x3809, 0x3809) AM_WRITEONLY AM_BASE_MEMBER(ddragon_state, scrollx_lo)
AM_RANGE(0x380a, 0x380a) AM_WRITEONLY AM_BASE_MEMBER(ddragon_state, scrolly_lo) AM_RANGE(0x380a, 0x380a) AM_WRITEONLY AM_BASE_MEMBER(ddragon_state, scrolly_lo)
AM_RANGE(0x380b, 0x380f) AM_WRITE(ddragon_interrupt_w) AM_RANGE(0x380b, 0x380f) AM_WRITE(ddragon_interrupt_w)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -539,7 +539,7 @@ static ADDRESS_MAP_START( dd2_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x380b, 0x380f) AM_WRITE(ddragon_interrupt_w) AM_RANGE(0x380b, 0x380f) AM_WRITE(ddragon_interrupt_w)
AM_RANGE(0x3c00, 0x3dff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x3c00, 0x3dff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0x3e00, 0x3fff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE_GENERIC(paletteram2) AM_RANGE(0x3e00, 0x3fff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE_GENERIC(paletteram2)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END

6
src/mame/drivers/ddrible.c
View File

@ -35,7 +35,7 @@ static INTERRUPT_GEN( ddrible_interrupt_1 )
static WRITE8_HANDLER( ddrible_bankswitch_w ) static WRITE8_HANDLER( ddrible_bankswitch_w )
{ {
memory_set_bank(space->machine, 1, data & 0x0f); memory_set_bank(space->machine, "bank1", data & 0x0f);
} }
@ -123,7 +123,7 @@ static ADDRESS_MAP_START( cpu0_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(ddrible_bg_videoram_w) AM_BASE_MEMBER(ddrible_state, bg_videoram) /* Video RAM 2 */ AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(ddrible_bg_videoram_w) AM_BASE_MEMBER(ddrible_state, bg_videoram) /* Video RAM 2 */
AM_RANGE(0x7000, 0x7fff) AM_RAM AM_BASE_MEMBER(ddrible_state, spriteram_2) /* Object RAM 2 */ AM_RANGE(0x7000, 0x7fff) AM_RAM AM_BASE_MEMBER(ddrible_state, spriteram_2) /* Object RAM 2 */
AM_RANGE(0x8000, 0x8000) AM_WRITE(ddrible_bankswitch_w) /* bankswitch control */ AM_RANGE(0x8000, 0x8000) AM_WRITE(ddrible_bankswitch_w) /* bankswitch control */
AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1) /* banked ROM */ AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank1") /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM) /* ROM */ AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM) /* ROM */
AM_RANGE(0xa000, 0xffff) AM_ROM /* ROM */ AM_RANGE(0xa000, 0xffff) AM_ROM /* ROM */
ADDRESS_MAP_END ADDRESS_MAP_END
@ -253,7 +253,7 @@ static MACHINE_START( ddrible )
{ {
ddrible_state *state = (ddrible_state *)machine->driver_data; ddrible_state *state = (ddrible_state *)machine->driver_data;
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 5, &ROM[0x10000], 0x2000); memory_configure_bank(machine, "bank1", 0, 5, &ROM[0x10000], 0x2000);
state->filter1 = devtag_get_device(machine, "filter1"); state->filter1 = devtag_get_device(machine, "filter1");
state->filter2 = devtag_get_device(machine, "filter2"); state->filter2 = devtag_get_device(machine, "filter2");

6
src/mame/drivers/dec0.c
View File

@ -209,7 +209,7 @@ static ADDRESS_MAP_START( hippodrm_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1a0000, 0x1a001f) AM_WRITE(dec0_pf3_control_8bit_w) AM_RANGE(0x1a0000, 0x1a001f) AM_WRITE(dec0_pf3_control_8bit_w)
AM_RANGE(0x1a1000, 0x1a17ff) AM_READWRITE(dec0_pf3_data_8bit_r, dec0_pf3_data_8bit_w) AM_RANGE(0x1a1000, 0x1a17ff) AM_READWRITE(dec0_pf3_data_8bit_r, dec0_pf3_data_8bit_w)
AM_RANGE(0x1d0000, 0x1d00ff) AM_READWRITE(hippodrm_prot_r, hippodrm_prot_w) AM_RANGE(0x1d0000, 0x1d00ff) AM_READWRITE(hippodrm_prot_r, hippodrm_prot_w)
AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8) /* Main ram */ AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank8") /* Main ram */
AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w) AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
AM_RANGE(0x1ff402, 0x1ff403) AM_READ_PORT("VBLANK") AM_RANGE(0x1ff402, 0x1ff403) AM_READ_PORT("VBLANK")
ADDRESS_MAP_END ADDRESS_MAP_END
@ -302,7 +302,7 @@ static ADDRESS_MAP_START( slyspy_s_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0b0000, 0x0b0001) AM_DEVWRITE("ym1", ym2203_w) AM_RANGE(0x0b0000, 0x0b0001) AM_DEVWRITE("ym1", ym2203_w)
AM_RANGE(0x0e0000, 0x0e0001) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w) AM_RANGE(0x0e0000, 0x0e0001) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
AM_RANGE(0x0f0000, 0x0f0001) AM_READ(soundlatch_r) AM_RANGE(0x0f0000, 0x0f0001) AM_READ(soundlatch_r)
AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8) AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank8")
AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w) AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -312,7 +312,7 @@ static ADDRESS_MAP_START( midres_s_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x118000, 0x118001) AM_DEVWRITE("ym1", ym2203_w) AM_RANGE(0x118000, 0x118001) AM_DEVWRITE("ym1", ym2203_w)
AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w) AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
AM_RANGE(0x138000, 0x138001) AM_READ(soundlatch_r) AM_RANGE(0x138000, 0x138001) AM_READ(soundlatch_r)
AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8) AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank8")
AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w) AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
ADDRESS_MAP_END ADDRESS_MAP_END

52
src/mame/drivers/dec8.c
View File

@ -389,7 +389,7 @@ static WRITE8_HANDLER( garyoret_i8751_w )
static WRITE8_HANDLER( dec8_bank_w ) static WRITE8_HANDLER( dec8_bank_w )
{ {
memory_set_bank(space->machine, 1, data & 0x0f); memory_set_bank(space->machine, "bank1", data & 0x0f);
} }
/* Used by Ghostbusters, Meikyuu Hunter G & Gondomania */ /* Used by Ghostbusters, Meikyuu Hunter G & Gondomania */
@ -404,7 +404,7 @@ static WRITE8_HANDLER( ghostb_bank_w )
Bits 4-7: Bank switch Bits 4-7: Bank switch
*/ */
memory_set_bank(space->machine, 1, data >> 4); memory_set_bank(space->machine, "bank1", data >> 4);
if (data & 1) state->int_enable =1; else state->int_enable = 0; if (data & 1) state->int_enable =1; else state->int_enable = 0;
if (data & 2) state->nmi_enable =1; else state->nmi_enable = 0; if (data & 2) state->nmi_enable =1; else state->nmi_enable = 0;
@ -420,7 +420,7 @@ static WRITE8_HANDLER( csilver_control_w )
Bit 0x40 - Unused. Bit 0x40 - Unused.
Bit 0x80 - Hold subcpu reset line high if clear, else low? (Not needed anyway) Bit 0x80 - Hold subcpu reset line high if clear, else low? (Not needed anyway)
*/ */
memory_set_bank(space->machine, 1, data & 0x0f); memory_set_bank(space->machine, "bank1", data & 0x0f);
} }
static WRITE8_HANDLER( dec8_sound_w ) static WRITE8_HANDLER( dec8_sound_w )
@ -455,7 +455,7 @@ static WRITE8_HANDLER( csilver_adpcm_data_w )
static WRITE8_HANDLER( csilver_sound_bank_w ) static WRITE8_HANDLER( csilver_sound_bank_w )
{ {
memory_set_bank(space->machine, 3, (data & 0x08) >> 3); memory_set_bank(space->machine, "bank3", (data & 0x08) >> 3);
} }
/******************************************************************************/ /******************************************************************************/
@ -552,7 +552,7 @@ static ADDRESS_MAP_START( cobra_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3c00, 0x3c00) AM_WRITE(dec8_bank_w) AM_RANGE(0x3c00, 0x3c00) AM_WRITE(dec8_bank_w)
AM_RANGE(0x3c02, 0x3c02) AM_WRITE(buffer_spriteram_w) /* DMA */ AM_RANGE(0x3c02, 0x3c02) AM_WRITE(buffer_spriteram_w) /* DMA */
AM_RANGE(0x3e00, 0x3e00) AM_WRITE(dec8_sound_w) AM_RANGE(0x3e00, 0x3e00) AM_WRITE(dec8_sound_w)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -576,7 +576,7 @@ static ADDRESS_MAP_START( ghostb_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3840, 0x3840) AM_WRITE(ghostb_bank_w) AM_RANGE(0x3840, 0x3840) AM_WRITE(ghostb_bank_w)
AM_RANGE(0x3860, 0x3860) AM_READ(i8751_l_r) AM_RANGE(0x3860, 0x3860) AM_READ(i8751_l_r)
AM_RANGE(0x3860, 0x3861) AM_WRITE(ghostb_i8751_w) AM_RANGE(0x3860, 0x3861) AM_WRITE(ghostb_i8751_w)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -600,7 +600,7 @@ static ADDRESS_MAP_START( meikyuh_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3840, 0x3840) AM_WRITE(ghostb_bank_w) AM_RANGE(0x3840, 0x3840) AM_WRITE(ghostb_bank_w)
AM_RANGE(0x3860, 0x3860) AM_READ(i8751_l_r) AM_RANGE(0x3860, 0x3860) AM_READ(i8751_l_r)
AM_RANGE(0x3860, 0x3861) AM_WRITE(meikyuh_i8751_w) AM_RANGE(0x3860, 0x3861) AM_WRITE(meikyuh_i8751_w)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -623,7 +623,7 @@ static ADDRESS_MAP_START( srdarwin_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3801, 0x3801) AM_READ_PORT("IN0") /* Player 1 */ AM_RANGE(0x3801, 0x3801) AM_READ_PORT("IN0") /* Player 1 */
AM_RANGE(0x3802, 0x3802) AM_READ_PORT("IN1") /* Player 2 (cocktail) + VBL */ AM_RANGE(0x3802, 0x3802) AM_READ_PORT("IN1") /* Player 2 (cocktail) + VBL */
AM_RANGE(0x3803, 0x3803) AM_READ_PORT("DSW1") /* Dip 2 */ AM_RANGE(0x3803, 0x3803) AM_READ_PORT("DSW1") /* Dip 2 */
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -646,7 +646,7 @@ static ADDRESS_MAP_START( gondo_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3838, 0x3838) AM_READ(i8751_h_r) AM_RANGE(0x3838, 0x3838) AM_READ(i8751_h_r)
AM_RANGE(0x3839, 0x3839) AM_READ(i8751_l_r) AM_RANGE(0x3839, 0x3839) AM_READ(i8751_l_r)
AM_RANGE(0x383a, 0x383b) AM_WRITE(gondo_i8751_w) AM_RANGE(0x383a, 0x383b) AM_WRITE(gondo_i8751_w)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -669,7 +669,7 @@ static ADDRESS_MAP_START( oscar_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3d80, 0x3d80) AM_WRITE(dec8_sound_w) /* SOUN */ AM_RANGE(0x3d80, 0x3d80) AM_WRITE(dec8_sound_w) /* SOUN */
AM_RANGE(0x3e00, 0x3e00) AM_WRITENOP /* COINCL */ AM_RANGE(0x3e00, 0x3e00) AM_WRITENOP /* COINCL */
AM_RANGE(0x3e80, 0x3e83) AM_WRITE(oscar_int_w) AM_RANGE(0x3e80, 0x3e83) AM_WRITE(oscar_int_w)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -703,7 +703,7 @@ static ADDRESS_MAP_START( lastmiss_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2800, 0x2fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) AM_RANGE(0x2800, 0x2fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
AM_RANGE(0x3000, 0x37ff) AM_RAM AM_SHARE(2) AM_RANGE(0x3000, 0x37ff) AM_RAM AM_SHARE(2)
AM_RANGE(0x3800, 0x3fff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE_MEMBER(dec8_state, pf0_data) AM_RANGE(0x3800, 0x3fff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE_MEMBER(dec8_state, pf0_data)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -747,7 +747,7 @@ static ADDRESS_MAP_START( shackled_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2800, 0x2fff) AM_READWRITE(shackled_sprite_r, shackled_sprite_w) AM_RANGE(0x2800, 0x2fff) AM_READWRITE(shackled_sprite_r, shackled_sprite_w)
AM_RANGE(0x3000, 0x37ff) AM_RAM AM_SHARE(2) AM_RANGE(0x3000, 0x37ff) AM_RAM AM_SHARE(2)
AM_RANGE(0x3800, 0x3fff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE_MEMBER(dec8_state, pf0_data) AM_RANGE(0x3800, 0x3fff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE_MEMBER(dec8_state, pf0_data)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -797,7 +797,7 @@ static ADDRESS_MAP_START( csilver_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2800, 0x2fff) AM_READWRITE(shackled_sprite_r, shackled_sprite_w) AM_RANGE(0x2800, 0x2fff) AM_READWRITE(shackled_sprite_r, shackled_sprite_w)
AM_RANGE(0x3000, 0x37ff) AM_RAM AM_SHARE(2) AM_RANGE(0x3000, 0x37ff) AM_RAM AM_SHARE(2)
AM_RANGE(0x3800, 0x3fff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE_MEMBER(dec8_state, pf0_data) AM_RANGE(0x3800, 0x3fff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE_MEMBER(dec8_state, pf0_data)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -835,7 +835,7 @@ static ADDRESS_MAP_START( garyoret_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x3838, 0x3839) AM_WRITE(garyoret_i8751_w) AM_RANGE(0x3838, 0x3839) AM_WRITE(garyoret_i8751_w)
AM_RANGE(0x383a, 0x383a) AM_READ(i8751_h_r) AM_RANGE(0x383a, 0x383a) AM_READ(i8751_h_r)
AM_RANGE(0x383b, 0x383b) AM_READ(i8751_l_r) AM_RANGE(0x383b, 0x383b) AM_READ(i8751_l_r)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -877,7 +877,7 @@ static ADDRESS_MAP_START( csilver_s_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2000, 0x2000) AM_WRITE(csilver_sound_bank_w) AM_RANGE(0x2000, 0x2000) AM_WRITE(csilver_sound_bank_w)
AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_r) AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_r)
AM_RANGE(0x3400, 0x3400) AM_DEVREAD("msm", csilver_adpcm_reset_r) /* ? not sure */ AM_RANGE(0x3400, 0x3400) AM_DEVREAD("msm", csilver_adpcm_reset_r) /* ? not sure */
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(3) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank3")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END ADDRESS_MAP_END
@ -3542,7 +3542,7 @@ static DRIVER_INIT( ghostb )
/* Blank out unused garbage in colour prom to avoid colour overflow */ /* Blank out unused garbage in colour prom to avoid colour overflow */
memset(RAM + 0x20, 0, 0xe0); memset(RAM + 0x20, 0, 0xe0);
memory_configure_bank(machine, 1, 0, 16, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 16, &ROM[0x10000], 0x4000);
DRIVER_INIT_CALL(deco222); DRIVER_INIT_CALL(deco222);
} }
@ -3554,35 +3554,35 @@ static DRIVER_INIT( meikyuh )
/* Blank out unused garbage in colour prom to avoid colour overflow */ /* Blank out unused garbage in colour prom to avoid colour overflow */
memset(RAM + 0x20, 0, 0xe0); memset(RAM + 0x20, 0, 0xe0);
memory_configure_bank(machine, 1, 0, 12, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 12, &ROM[0x10000], 0x4000);
DRIVER_INIT_CALL( dec8 ); DRIVER_INIT_CALL( dec8 );
} }
static DRIVER_INIT( cobracom ) static DRIVER_INIT( cobracom )
{ {
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 8, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 8, &ROM[0x10000], 0x4000);
DRIVER_INIT_CALL( dec8 ); DRIVER_INIT_CALL( dec8 );
} }
static DRIVER_INIT( oscar ) static DRIVER_INIT( oscar )
{ {
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 4, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
DRIVER_INIT_CALL( deco222 ); DRIVER_INIT_CALL( deco222 );
} }
static DRIVER_INIT( gondo ) static DRIVER_INIT( gondo )
{ {
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 12, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 12, &ROM[0x10000], 0x4000);
DRIVER_INIT_CALL( dec8 ); DRIVER_INIT_CALL( dec8 );
} }
static DRIVER_INIT( garyoret ) static DRIVER_INIT( garyoret )
{ {
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 16, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 16, &ROM[0x10000], 0x4000);
DRIVER_INIT_CALL( dec8 ); DRIVER_INIT_CALL( dec8 );
} }
@ -3591,29 +3591,29 @@ static DRIVER_INIT( csilver )
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
UINT8 *RAM = memory_region(machine, "audiocpu"); UINT8 *RAM = memory_region(machine, "audiocpu");
memory_configure_bank(machine, 1, 0, 14, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 14, &ROM[0x10000], 0x4000);
memory_configure_bank(machine, 3, 0, 2, &RAM[0x10000], 0x4000); memory_configure_bank(machine, "bank3", 0, 2, &RAM[0x10000], 0x4000);
DRIVER_INIT_CALL( dec8 ); DRIVER_INIT_CALL( dec8 );
} }
static DRIVER_INIT( shackled ) static DRIVER_INIT( shackled )
{ {
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 14, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 14, &ROM[0x10000], 0x4000);
DRIVER_INIT_CALL( dec8 ); DRIVER_INIT_CALL( dec8 );
} }
static DRIVER_INIT( lastmiss ) static DRIVER_INIT( lastmiss )
{ {
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 4, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 4, &ROM[0x10000], 0x4000);
DRIVER_INIT_CALL( dec8 ); DRIVER_INIT_CALL( dec8 );
} }
static DRIVER_INIT( srdarwin ) static DRIVER_INIT( srdarwin )
{ {
UINT8 *ROM = memory_region(machine, "maincpu"); UINT8 *ROM = memory_region(machine, "maincpu");
memory_configure_bank(machine, 1, 0, 6, &ROM[0x10000], 0x4000); memory_configure_bank(machine, "bank1", 0, 6, &ROM[0x10000], 0x4000);
DRIVER_INIT_CALL( deco222 ); DRIVER_INIT_CALL( deco222 );
} }

2
src/mame/drivers/deco32.c
View File

@ -961,7 +961,7 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w) AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w) AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r) AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8) AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank8")
AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w) AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w) AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
ADDRESS_MAP_END ADDRESS_MAP_END

13
src/mame/drivers/decocass.c
View File

@ -1366,12 +1366,13 @@ static DRIVER_INIT( decocrom )
state->decrypted2[i] = swap_bits_5_6(rom[i]); state->decrypted2[i] = swap_bits_5_6(rom[i]);
/* convert charram to a banked ROM */ /* convert charram to a banked ROM */
memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000, 0xafff, 0, 0, (read8_space_func)SMH_BANK(1), decocass_de0091_w); memory_install_read_bank_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000, 0xafff, 0, 0, "bank1");
memory_configure_bank(machine, 1, 0, 1, state->charram, 0); memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000, 0xafff, 0, 0, decocass_de0091_w);
memory_configure_bank(machine, 1, 1, 1, memory_region(machine, "user3"), 0); memory_configure_bank(machine, "bank1", 0, 1, state->charram, 0);
memory_configure_bank_decrypted(machine, 1, 0, 1, &state->decrypted[0x6000], 0); memory_configure_bank(machine, "bank1", 1, 1, memory_region(machine, "user3"), 0);
memory_configure_bank_decrypted(machine, 1, 1, 1, state->decrypted2, 0); memory_configure_bank_decrypted(machine, "bank1", 0, 1, &state->decrypted[0x6000], 0);
memory_set_bank(machine, 1, 0); memory_configure_bank_decrypted(machine, "bank1", 1, 1, state->decrypted2, 0);
memory_set_bank(machine, "bank1", 0);
/* install the bank selector */ /* install the bank selector */
memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe900, 0xe900, 0, 0, decocass_e900_w); memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe900, 0xe900, 0, 0, decocass_e900_w);

4
src/mame/drivers/deshoros.c
View File

@ -55,7 +55,7 @@ static void answer_bankswitch(running_machine *machine,UINT8 new_bank)
bank = new_bank; bank = new_bank;
bankaddress = 0 + 0x6000 * bank; bankaddress = 0 + 0x6000 * bank;
memory_set_bankptr(machine, 1, &ROM[bankaddress]); memory_set_bankptr(machine, "bank1", &ROM[bankaddress]);
} }
} }
@ -92,7 +92,7 @@ static WRITE8_HANDLER( io_w )
} }
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_READWRITE(SMH_BANK(1), SMH_ROM) AM_RANGE(0x0000, 0x5fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_RANGE(0x8000, 0x87ff) AM_RAM
AM_RANGE(0x9000, 0x900f) AM_READWRITE(io_r,io_w) AM_BASE(&io_ram) //i/o area AM_RANGE(0x9000, 0x900f) AM_READWRITE(io_r,io_w) AM_BASE(&io_ram) //i/o area
AM_RANGE(0xc000, 0xffff) AM_ROM AM_RANGE(0xc000, 0xffff) AM_ROM

2
src/mame/drivers/dietgo.c
View File

@ -39,7 +39,7 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w) AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
AM_RANGE(0x130000, 0x130001) AM_NOP /* This board only has 1 oki chip */ AM_RANGE(0x130000, 0x130001) AM_NOP /* This board only has 1 oki chip */
AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r) AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8) AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK("bank8")
AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w) AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w) AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
ADDRESS_MAP_END ADDRESS_MAP_END

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