diff --git a/src/mame/drivers/naomi.c b/src/mame/drivers/naomi.c index dc5a06728f6..ae039f550d0 100644 --- a/src/mame/drivers/naomi.c +++ b/src/mame/drivers/naomi.c @@ -1535,7 +1535,7 @@ static ADDRESS_MAP_START( naomi_map, AS_PROGRAM, 64, naomi_state ) AM_RANGE(0x005f7400, 0x005f74ff) AM_MIRROR(0x02000000) AM_DEVICE32( "rom_board", naomi_g1_device, amap, U64(0xffffffffffffffff) ) AM_RANGE(0x005f7800, 0x005f78ff) AM_MIRROR(0x02000000) AM_READWRITE(dc_g2_ctrl_r, dc_g2_ctrl_w ) AM_RANGE(0x005f7c00, 0x005f7cff) AM_MIRROR(0x02000000) AM_DEVREADWRITE32("powervr2", powervr2_device, pvr_ctrl_r, pvr_ctrl_w, U64(0xffffffffffffffff)) - AM_RANGE(0x005f8000, 0x005f9fff) AM_MIRROR(0x02000000) AM_DEVREADWRITE32("powervr2", powervr2_device, pvr_ta_r, pvr_ta_w, U64(0xffffffffffffffff)) + AM_RANGE(0x005f8000, 0x005f9fff) AM_MIRROR(0x02000000) AM_DEVICE32("powervr2", powervr2_device, ta_map, U64(0xffffffffffffffff)) AM_RANGE(0x00600000, 0x006007ff) AM_MIRROR(0x02000000) AM_READWRITE(dc_modem_r, dc_modem_w ) AM_RANGE(0x00700000, 0x00707fff) AM_MIRROR(0x02000000) AM_READWRITE(dc_aica_reg_r, dc_aica_reg_w ) AM_RANGE(0x00710000, 0x0071000f) AM_MIRROR(0x02000000) AM_READWRITE(dc_rtc_r, dc_rtc_w ) @@ -1587,7 +1587,7 @@ static ADDRESS_MAP_START( naomi2_map, AS_PROGRAM, 64, naomi_state ) AM_RANGE(0x005f7400, 0x005f74ff) AM_MIRROR(0x02000000) AM_DEVICE32( "rom_board", naomi_g1_device, amap, U64(0xffffffffffffffff) ) AM_RANGE(0x005f7800, 0x005f78ff) AM_MIRROR(0x02000000) AM_READWRITE(dc_g2_ctrl_r, dc_g2_ctrl_w ) AM_RANGE(0x005f7c00, 0x005f7cff) AM_DEVREADWRITE32("powervr2", powervr2_device, pvr_ctrl_r, pvr_ctrl_w, U64(0xffffffffffffffff)) - AM_RANGE(0x005f8000, 0x005f9fff) AM_DEVREADWRITE32("powervr2", powervr2_device, pvr_ta_r, pvr_ta_w, U64(0xffffffffffffffff)) + AM_RANGE(0x005f8000, 0x005f9fff) AM_MIRROR(0x02000000) AM_DEVICE32("powervr2", powervr2_device, ta_map, U64(0xffffffffffffffff)) AM_RANGE(0x00600000, 0x006007ff) AM_MIRROR(0x02000000) AM_READWRITE(dc_modem_r, dc_modem_w ) AM_RANGE(0x00700000, 0x00707fff) AM_MIRROR(0x02000000) AM_READWRITE(dc_aica_reg_r, dc_aica_reg_w ) AM_RANGE(0x00710000, 0x0071000f) AM_MIRROR(0x02000000) AM_READWRITE(dc_rtc_r, dc_rtc_w ) @@ -1599,7 +1599,7 @@ static ADDRESS_MAP_START( naomi2_map, AS_PROGRAM, 64, naomi_state ) // AM_RANGE(0x025f6800, 0x025f69ff) AM_READWRITE_LEGACY(dc_sysctrl_r, dc_sysctrl_w ) // second PVR DMA! // AM_RANGE(0x025f7c00, 0x025f7cff) AM_DEVREADWRITE32("powervr2", powervr2_device, pvr_ctrl_r, pvr_ctrl_w, U64(0xffffffffffffffff)) - AM_RANGE(0x025f8000, 0x025f9fff) AM_DEVREADWRITE32("powervr2", powervr2_device, pvr2_ta_r, pvr2_ta_w, U64(0xffffffffffffffff)) + AM_RANGE(0x005f8000, 0x005f9fff) AM_MIRROR(0x02000000) AM_DEVICE32("powervr2", powervr2_device, ta_map, U64(0xffffffffffffffff)) /* Area 1 */ AM_RANGE(0x04000000, 0x04ffffff) AM_RAM AM_SHARE("dc_texture_ram") // texture memory 64 bit access @@ -1609,7 +1609,7 @@ static ADDRESS_MAP_START( naomi2_map, AS_PROGRAM, 64, naomi_state ) /* Area 2*/ AM_RANGE(0x085f6800, 0x085f69ff) AM_WRITE(dc_sysctrl_w ) // writes to BOTH PVRs - AM_RANGE(0x085f8000, 0x085f9fff) AM_DEVWRITE32("powervr2", powervr2_device, pvrs_ta_w, U64(0xffffffffffffffff) ) // writes to BOTH PVRs + AM_RANGE(0x085f8000, 0x805f9fff) AM_DEVICE32("powervr2", powervr2_device, ta_map, U64(0xffffffffffffffff)) AM_RANGE(0x08800000, 0x088000ff) AM_DEVREADWRITE32("powervr2", powervr2_device, elan_regs_r, elan_regs_w, U64(0xffffffffffffffff)) // T&L chip registers // AM_RANGE(0x09000000, 0x09??????) T&L command processing AM_RANGE(0x0a000000, 0x0bffffff) AM_RAM AM_SHARE("elan_ram") // T&L chip RAM @@ -1740,7 +1740,7 @@ static ADDRESS_MAP_START( aw_map, AS_PROGRAM, 64, naomi_state ) AM_RANGE(0x005f7400, 0x005f74ff) AM_MIRROR(0x02000000) AM_DEVICE32( "rom_board", naomi_g1_device, amap, U64(0xffffffffffffffff) ) AM_RANGE(0x005f7800, 0x005f78ff) AM_READWRITE(dc_g2_ctrl_r, dc_g2_ctrl_w ) AM_RANGE(0x005f7c00, 0x005f7cff) AM_DEVREADWRITE32("powervr2", powervr2_device, pvr_ctrl_r, pvr_ctrl_w, U64(0xffffffffffffffff)) - AM_RANGE(0x005f8000, 0x005f9fff) AM_DEVREADWRITE32("powervr2", powervr2_device, pvr_ta_r, pvr_ta_w, U64(0xffffffffffffffff)) + AM_RANGE(0x005f8000, 0x005f9fff) AM_MIRROR(0x02000000) AM_DEVICE32("powervr2", powervr2_device, ta_map, U64(0xffffffffffffffff)) AM_RANGE(0x00600000, 0x006007ff) AM_READWRITE(aw_modem_r, aw_modem_w ) AM_RANGE(0x00700000, 0x00707fff) AM_READWRITE(dc_aica_reg_r, dc_aica_reg_w ) AM_RANGE(0x00710000, 0x0071000f) AM_READWRITE(dc_rtc_r, dc_rtc_w ) diff --git a/src/mame/includes/dc.h b/src/mame/includes/dc.h index aa960499669..5de13d36eb8 100644 --- a/src/mame/includes/dc.h +++ b/src/mame/includes/dc.h @@ -246,81 +246,6 @@ class dc_state : public driver_device #define RTC3 ((0x00710008-0x00710000)/4) -/*--------------- CORE registers --------------*/ -#define PVRID ((0x005f8000-0x005f8000)/4) -#define REVISION ((0x005f8004-0x005f8000)/4) -#define SOFTRESET ((0x005f8008-0x005f8000)/4) -#define STARTRENDER ((0x005f8014-0x005f8000)/4) -#define TEST_SELECT ((0x005f8018-0x005f8000)/4) -#define PARAM_BASE ((0x005f8020-0x005f8000)/4) -#define REGION_BASE ((0x005f802c-0x005f8000)/4) -#define SPAN_SORT_CFG ((0x005f8030-0x005f8000)/4) -#define VO_BORDER_COL ((0x005f8040-0x005f8000)/4) -#define FB_R_CTRL ((0x005f8044-0x005f8000)/4) -#define FB_W_CTRL ((0x005f8048-0x005f8000)/4) -#define FB_W_LINESTRIDE ((0x005f804c-0x005f8000)/4) -#define FB_R_SOF1 ((0x005f8050-0x005f8000)/4) -#define FB_R_SOF2 ((0x005f8054-0x005f8000)/4) -#define FB_R_SIZE ((0x005f805c-0x005f8000)/4) -#define FB_W_SOF1 ((0x005f8060-0x005f8000)/4) -#define FB_W_SOF2 ((0x005f8064-0x005f8000)/4) -#define FB_X_CLIP ((0x005f8068-0x005f8000)/4) -#define FB_Y_CLIP ((0x005f806c-0x005f8000)/4) -#define FPU_SHAD_SCALE ((0x005f8074-0x005f8000)/4) -#define FPU_CULL_VAL ((0x005f8078-0x005f8000)/4) -#define FPU_PARAM_CFG ((0x005f807c-0x005f8000)/4) -#define HALF_OFFSET ((0x005f8080-0x005f8000)/4) -#define FPU_PERP_VAL ((0x005f8084-0x005f8000)/4) -#define ISP_BACKGND_D ((0x005f8088-0x005f8000)/4) -#define ISP_BACKGND_T ((0x005f808c-0x005f8000)/4) -#define ISP_FEED_CFG ((0x005f8098-0x005f8000)/4) -#define SDRAM_REFRESH ((0x005f80a0-0x005f8000)/4) -#define SDRAM_ARB_CFG ((0x005f80a4-0x005f8000)/4) -#define SDRAM_CFG ((0x005f80a8-0x005f8000)/4) -#define FOG_COL_RAM ((0x005f80b0-0x005f8000)/4) -#define FOG_COL_VERT ((0x005f80b4-0x005f8000)/4) -#define FOG_DENSITY ((0x005f80b8-0x005f8000)/4) -#define FOG_CLAMP_MAX ((0x005f80bc-0x005f8000)/4) -#define FOG_CLAMP_MIN ((0x005f80c0-0x005f8000)/4) -#define SPG_TRIGGER_POS ((0x005f80c4-0x005f8000)/4) -#define SPG_HBLANK_INT ((0x005f80c8-0x005f8000)/4) -#define SPG_VBLANK_INT ((0x005f80cc-0x005f8000)/4) -#define SPG_CONTROL ((0x005f80d0-0x005f8000)/4) -#define SPG_HBLANK ((0x005f80d4-0x005f8000)/4) -#define SPG_LOAD ((0x005f80d8-0x005f8000)/4) -#define SPG_VBLANK ((0x005f80dc-0x005f8000)/4) -#define SPG_WIDTH ((0x005f80e0-0x005f8000)/4) -#define TEXT_CONTROL ((0x005f80e4-0x005f8000)/4) -#define VO_CONTROL ((0x005f80e8-0x005f8000)/4) -#define VO_STARTX ((0x005f80ec-0x005f8000)/4) -#define VO_STARTY ((0x005f80f0-0x005f8000)/4) -#define SCALER_CTL ((0x005f80f4-0x005f8000)/4) -#define PAL_RAM_CTRL ((0x005f8108-0x005f8000)/4) -#define ISP_BACKGND_T ((0x005f808c-0x005f8000)/4) -#define SPG_STATUS ((0x005f810c-0x005f8000)/4) -#define FB_BURSTCTRL ((0x005f8110-0x005f8000)/4) -#define Y_COEFF ((0x005f8118-0x005f8000)/4) -#define PT_ALPHA_REF ((0x005f811c-0x005f8000)/4) -/* 0x005f8200 - 0x005f83ff fog_table */ -/* 0x005f9000 - 0x005f9fff palette_ram */ - -/*--------- Tile Accelerator registers ---------*/ -#define TA_OL_BASE ((0x005f8124-0x005f8000)/4) -#define TA_ISP_BASE ((0x005f8128-0x005f8000)/4) -#define TA_OL_LIMIT ((0x005f812c-0x005f8000)/4) -#define TA_ISP_LIMIT ((0x005f8130-0x005f8000)/4) -#define TA_NEXT_OPB ((0x005f8134-0x005f8000)/4) -#define TA_ITP_CURRENT ((0x005f8138-0x005f8000)/4) -#define TA_GLOB_TILE_CLIP ((0x005f813c-0x005f8000)/4) -#define TA_ALLOC_CTRL ((0x005f8140-0x005f8000)/4) -#define TA_LIST_INIT ((0x005f8144-0x005f8000)/4) -#define TA_YUV_TEX_BASE ((0x005f8148-0x005f8000)/4) -#define TA_YUV_TEX_CTRL ((0x005f814c-0x005f8000)/4) -#define TA_YUV_TEX_CNT ((0x005f8150-0x005f8000)/4) -#define TA_LIST_CONT ((0x005f8160-0x005f8000)/4) -#define TA_NEXT_OPB_INIT ((0x005f8164-0x005f8000)/4) -/* 0x005f8600 - 0x005f8f5c TA_OL_POINTERS (read only) */ - /* ------------- normal interrupts ------------- */ #define IST_EOR_VIDEO 0x00000001 #define IST_EOR_ISP 0x00000002 diff --git a/src/mame/video/powervr2.c b/src/mame/video/powervr2.c index a8f3a9f9ef5..8511807a887 100644 --- a/src/mame/video/powervr2.c +++ b/src/mame/video/powervr2.c @@ -1,6 +1,5 @@ /* - dc.c - Dreamcast video emulation - + Dreamcast video emulation */ #include "emu.h" @@ -13,121 +12,90 @@ const device_type POWERVR2 = &device_creator; +DEVICE_ADDRESS_MAP_START(ta_map, 32, powervr2_device) + AM_RANGE(0x0000, 0x0003) AM_READ( id_r) + AM_RANGE(0x0004, 0x0007) AM_READ( revision_r) + AM_RANGE(0x0008, 0x000b) AM_READWRITE(softreset_r, softreset_w) + AM_RANGE(0x0014, 0x0017) AM_WRITE( startrender_w) +// 18 = test select + AM_RANGE(0x0020, 0x0023) AM_READWRITE(param_base_r, param_base_w) + AM_RANGE(0x002c, 0x002f) AM_READWRITE(region_base_r, region_base_w) +// 30 = span sort cfg + AM_RANGE(0x0040, 0x0043) AM_READWRITE(vo_border_col_r, vo_border_col_w) + AM_RANGE(0x0044, 0x0047) AM_READWRITE(fb_r_ctrl_r, fb_r_ctrl_w) + AM_RANGE(0x0048, 0x004b) AM_READWRITE(fb_w_ctrl_r, fb_w_ctrl_w) + AM_RANGE(0x004c, 0x004f) AM_READWRITE(fb_w_linestride_r, fb_w_linestride_w) + AM_RANGE(0x0050, 0x0053) AM_READWRITE(fb_r_sof1_r, fb_r_sof1_w) + AM_RANGE(0x0054, 0x0057) AM_READWRITE(fb_r_sof2_r, fb_r_sof2_w) + AM_RANGE(0x005c, 0x005f) AM_READWRITE(fb_r_size_r, fb_r_size_w) + AM_RANGE(0x0060, 0x0063) AM_READWRITE(fb_w_sof1_r, fb_w_sof1_w) + AM_RANGE(0x0064, 0x0067) AM_READWRITE(fb_w_sof2_r, fb_w_sof2_w) + AM_RANGE(0x0068, 0x006b) AM_READWRITE(fb_x_clip_r, fb_x_clip_w) + AM_RANGE(0x006c, 0x006f) AM_READWRITE(fb_y_clip_r, fb_y_clip_w) +// 74 = fpu_shad_scale +// 78 = fpu_cull_val + AM_RANGE(0x007c, 0x007f) AM_READWRITE(fpu_param_cfg_r, fpu_param_cfg_w) +// 80 = half_offset +// 84 = fpu_perp_val +// 88 = isp_backgnd_d + AM_RANGE(0x008c, 0x008f) AM_READWRITE(isp_backgnd_t_r, isp_backgnd_t_w) +// 98 = isp_feed_cfg +// a0 = sdram_refresh +// a4 = sdram_arb_cfg +// a8 = sdram_cfg +// b0 = fog_col_ram +// b4 = fog_col_vert +// b8 = fog_density +// bc = fog_clamp_max +// c0 = fog_clamp_min +// c4 = spg_trigger_pos + AM_RANGE(0x00c8, 0x00cb) AM_READWRITE(spg_hblank_int_r, spg_hblank_int_w) + AM_RANGE(0x00cc, 0x00cf) AM_READWRITE(spg_vblank_int_r, spg_vblank_int_w) +// d0 = spg_control + AM_RANGE(0x00d4, 0x00d7) AM_READWRITE(spg_hblank_r, spg_hblank_w) + AM_RANGE(0x00d8, 0x00db) AM_READWRITE(spg_load_r, spg_load_w) + AM_RANGE(0x00dc, 0x00df) AM_READWRITE(spg_vblank_r, spg_vblank_w) + AM_RANGE(0x00e0, 0x00e3) AM_READWRITE(spg_width_r, spg_width_w) + AM_RANGE(0x00e4, 0x00e7) AM_READWRITE(text_control_r, text_control_w) + AM_RANGE(0x00e8, 0x00eb) AM_READWRITE(vo_control_r, vo_control_w) + AM_RANGE(0x00ec, 0x00ef) AM_READWRITE(vo_startx_r, vo_startx_w) + AM_RANGE(0x00f0, 0x00f3) AM_READWRITE(vo_starty_r, vo_starty_w) +// f4 = scaler_ctl + AM_RANGE(0x0108, 0x010b) AM_READWRITE(pal_ram_ctrl_r, pal_ram_ctrl_w) + AM_RANGE(0x010c, 0x010f) AM_READ( spg_status_r) +// 110 = fb_burstctrl +// 118 = y_coeff +// 11c = pt_alpha_ref + + AM_RANGE(0x0124, 0x0127) AM_READWRITE(ta_ol_base_r, ta_ol_base_w) + AM_RANGE(0x0128, 0x012b) AM_READWRITE(ta_isp_base_r, ta_isp_base_w) + AM_RANGE(0x012c, 0x012f) AM_READWRITE(ta_ol_limit_r, ta_ol_limit_w) + AM_RANGE(0x0130, 0x0133) AM_READWRITE(ta_isp_limit_r, ta_isp_limit_w) + AM_RANGE(0x0134, 0x0137) AM_READ( ta_next_opb_r) + AM_RANGE(0x0138, 0x013b) AM_READ( ta_itp_current_r) +// 13c = ta_glob_tile_clip + AM_RANGE(0x0140, 0x0143) AM_READWRITE(ta_alloc_ctrl_r, ta_alloc_ctrl_w) + AM_RANGE(0x0144, 0x0147) AM_READWRITE(ta_list_init_r, ta_list_init_w) + AM_RANGE(0x0148, 0x014b) AM_READWRITE(ta_yuv_tex_base_r, ta_yuv_tex_base_w) + AM_RANGE(0x014c, 0x014f) AM_READWRITE(ta_yuv_tex_ctrl_r, ta_yuv_tex_ctrl_w) + AM_RANGE(0x0150, 0x0153) AM_READWRITE(ta_yuv_tex_cnt_r, ta_yuv_tex_cnt_w) + AM_RANGE(0x0160, 0x0163) AM_WRITE( ta_list_cont_w) + AM_RANGE(0x0164, 0x0167) AM_READWRITE(ta_next_opb_init_r, ta_next_opb_init_w) + + AM_RANGE(0x0200, 0x03ff) AM_READWRITE(fog_table_r, fog_table_w) + AM_RANGE(0x1000, 0x1fff) AM_READWRITE(palette_r, palette_w) +ADDRESS_MAP_END + const int powervr2_device::pvr_parconfseq[] = {1,2,3,2,3,4,5,6,5,6,7,8,9,10,11,12,13,14,13,14,15,16,17,16,17,0,0,0,0,0,18,19,20,19,20,21,22,23,22,23}; const int powervr2_device::pvr_wordsvertex[24] = {8,8,8,8,8,16,16,8,8,8, 8, 8,8,8,8,8,16,16, 8,16,16,8,16,16}; const int powervr2_device::pvr_wordspolygon[24] = {8,8,8,8,8, 8, 8,8,8,8,16,16,8,8,8,8, 8, 8,16,16,16,8, 8, 8}; #define DEBUG_FIFO_POLY (0) -#define DEBUG_PVRTA (0) -#define DEBUG_PVRTA_REGS (0) +#define DEBUG_PVRTA 0 #define DEBUG_PVRDLIST (0) #define DEBUG_PALRAM (1) #define DEBUG_PVRCTRL (0) -/* PVR TA macro defines */ -/* -SPG_HBLANK_INT ----- --xx xxxx xxxx ---- ---- ---- ---- hblank_in_interrupt ----- ---- ---- ---- --xx ---- ---- ---- hblank_int_mode ----- ---- ---- ---- ---- --xx xxxx xxxx line_comp_val -*/ -#define spg_hblank_in_irq ((pvrta_regs[SPG_HBLANK_INT] & 0x03ff0000) >> 16) -#define spg_hblank_in_irq_new ((pvrta_regs[SPG_HBLANK_INT] & 0x03ff0000) >> 16) -#define spg_hblank_int_mode ((pvrta_regs[SPG_HBLANK_INT] & 0x00003000) >> 12) -#define spg_line_comp_val ((pvrta_regs[SPG_HBLANK_INT] & 0x000003ff) >> 0) - -/* -SPG_VBLANK_INT ----- --xx xxxx xxxx ---- ---- ---- ---- vblank_out_interrupt_line_number ----- ---- ---- ---- ---- --xx xxxx xxxx vblank_in_interrupt_line_number -*/ -#define spg_vblank_out_irq_line_num ((pvrta_regs[SPG_VBLANK_INT] & 0x03ff0000) >> 16) -#define spg_vblank_in_irq_line_num ((pvrta_regs[SPG_VBLANK_INT] & 0x000003ff) >> 0) -#define spg_vblank_out_irq_line_num_new ((pvrta_regs[SPG_VBLANK_INT] & 0x03ff0000) >> 16) -#define spg_vblank_in_irq_line_num_new ((pvrta_regs[SPG_VBLANK_INT] & 0x000003ff) >> 0) - - -/* -VO_BORDER_COL ----- ---x ---- ---- ---- ---- ---- ---- Chroma ;suchie3 sets 0xff there, maybe it's 8 bits too? ----- ---- xxxx xxxx ---- ---- ---- ---- Red ----- ---- ---- ---- xxxx xxxx ---- ---- Green ----- ---- ---- ---- ---- ---- xxxx xxxx Blue -*/ -#define vo_border_K ((pvrta_regs[VO_BORDER_COL] & 0x01000000) >> 24) -#define vo_border_R ((pvrta_regs[VO_BORDER_COL] & 0x00ff0000) >> 16) -#define vo_border_G ((pvrta_regs[VO_BORDER_COL] & 0x0000ff00) >> 8) -#define vo_border_B ((pvrta_regs[VO_BORDER_COL] & 0x000000ff) >> 0) - -/* -SPG_HBLANK ----- ---- --xx xxxx xxxx ---- ---- ---- hbend ----- ---- ---- ---- ---- --xx xxxx xxxx hbstart -*/ -#define spg_hbend ((pvrta_regs[SPG_HBLANK] & 0x03ff0000) >> 16) -#define spg_hbstart ((pvrta_regs[SPG_HBLANK] & 0x000003ff) >> 0) - - -/* -SPG_LOAD ----- ---- --xx xxxx xxxx ---- ---- ---- vcount ----- ---- ---- ---- ---- --xx xxxx xxxx hcount -*/ -#define spg_vcount ((pvrta_regs[SPG_LOAD] & 0x03ff0000) >> 16) -#define spg_hcount ((pvrta_regs[SPG_LOAD] & 0x000003ff) >> 0) - -/* -SPG_VBLANK ----- ---- --xx xxxx xxxx ---- ---- ---- vbend ----- ---- ---- ---- ---- --xx xxxx xxxx vbstart -*/ -#define spg_vbend ((pvrta_regs[SPG_VBLANK] & 0x03ff0000) >> 16) -#define spg_vbstart ((pvrta_regs[SPG_VBLANK] & 0x000003ff) >> 0) - - -/* -VO_CONTROL ----- ---- --xx xxxx ---- ---- ---- ---- pclk_delay ----- ---- ---- ---- ---- ---x ---- ---- pixel_double ;used in test mode ----- ---- ---- ---- ---- ---- xxxx ---- field_mode ----- ---- ---- ---- ---- ---- ---- x--- blank_video ----- ---- ---- ---- ---- ---- ---- -x-- blank_pol ----- ---- ---- ---- ---- ---- ---- --x- vsync_pol ----- ---- ---- ---- ---- ---- ---- ---x hsync_pol -*/ -#define spg_pclk_delay ((pvrta_regs[VO_CONTROL] & 0x003f0000) >> 16) -#define spg_pixel_double ((pvrta_regs[VO_CONTROL] & 0x00000100) >> 8) -#define spg_field_mode ((pvrta_regs[VO_CONTROL] & 0x000000f0) >> 4) -#define spg_blank_video ((pvrta_regs[VO_CONTROL] & 0x00000008) >> 3) -#define spg_blank_pol ((pvrta_regs[VO_CONTROL] & 0x00000004) >> 2) -#define spg_vsync_pol ((pvrta_regs[VO_CONTROL] & 0x00000002) >> 1) -#define spg_hsync_pol ((pvrta_regs[VO_CONTROL] & 0x00000001) >> 0) - -/* -VO_STARTX ----- ---- ---- ---- ---- ---x xxxx xxxx horzontal start position -*/ -#define vo_horz_start_pos ((pvrta_regs[VO_STARTX] & 0x000003ff) >> 0) - -/* -VO_STARTY ----- ---x xxxx xxxx ---- ---- ---- ---- vertical start position on field 2 ----- ---- ---- ---- ---- ---x xxxx xxxx vertical start position on field 1 -*/ - -#define vo_vert_start_pos_f2 ((pvrta_regs[VO_STARTY] & 0x03ff0000) >> 16) -#define vo_vert_start_pos_f1 ((pvrta_regs[VO_STARTY] & 0x000003ff) >> 0) - -/* -SPG_STATUS ----- ---- ---- ---- --x- ---- ---- ---- vsync ----- ---- ---- ---- ---x ---- ---- ---- hsync ----- ---- ---- ---- ---- x--- ---- ---- blank ----- ---- ---- ---- ---- -x-- ---- ---- field number ----- ---- ---- ---- ---- --xx xxxx xxxx scanline -*/ - - // Perform a standard bilinear filter across four pixels inline INT32 powervr2_device::clamp(INT32 in, INT32 min, INT32 max) { @@ -441,7 +409,7 @@ UINT32 powervr2_device::tex_r_p4_1555_tw(texinfo *t, float x, float y) int off = dilated1[t->cd][xt] + dilated0[t->cd][yt]; int addrp = t->address + (off >> 1); int c = ((reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf; - return cv_1555(pvrta_regs[t->palbase + c]); + return cv_1555(palette[t->palbase + c]); } UINT32 powervr2_device::tex_r_p4_1555_vq(texinfo *t, float x, float y) @@ -451,7 +419,7 @@ UINT32 powervr2_device::tex_r_p4_1555_vq(texinfo *t, float x, float y) int idx = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])]; int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3]; int c = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)] & 0xf; - return cv_1555(pvrta_regs[t->palbase + c]); + return cv_1555(palette[t->palbase + c]); } UINT32 powervr2_device::tex_r_p4_565_tw(texinfo *t, float x, float y) @@ -461,7 +429,7 @@ UINT32 powervr2_device::tex_r_p4_565_tw(texinfo *t, float x, float y) int off = dilated1[t->cd][xt] + dilated0[t->cd][yt]; int addrp = t->address + (off >> 1); int c = ((reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf; - return cv_565(pvrta_regs[t->palbase + c]); + return cv_565(palette[t->palbase + c]); } UINT32 powervr2_device::tex_r_p4_565_vq(texinfo *t, float x, float y) @@ -471,7 +439,7 @@ UINT32 powervr2_device::tex_r_p4_565_vq(texinfo *t, float x, float y) int idx = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])]; int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3]; int c = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)] & 0xf; - return cv_565(pvrta_regs[t->palbase + c]); + return cv_565(palette[t->palbase + c]); } UINT32 powervr2_device::tex_r_p4_4444_tw(texinfo *t, float x, float y) @@ -481,7 +449,7 @@ UINT32 powervr2_device::tex_r_p4_4444_tw(texinfo *t, float x, float y) int off = dilated1[t->cd][xt] + dilated0[t->cd][yt]; int addrp = t->address + (off >> 1); int c = ((reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf; - return cv_4444(pvrta_regs[t->palbase + c]); + return cv_4444(palette[t->palbase + c]); } UINT32 powervr2_device::tex_r_p4_4444_vq(texinfo *t, float x, float y) @@ -491,7 +459,7 @@ UINT32 powervr2_device::tex_r_p4_4444_vq(texinfo *t, float x, float y) int idx = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])]; int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3]; int c = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)] & 0xf; - return cv_4444(pvrta_regs[t->palbase + c]); + return cv_4444(palette[t->palbase + c]); } UINT32 powervr2_device::tex_r_p4_8888_tw(texinfo *t, float x, float y) @@ -501,7 +469,7 @@ UINT32 powervr2_device::tex_r_p4_8888_tw(texinfo *t, float x, float y) int off = dilated1[t->cd][xt] + dilated0[t->cd][yt]; int addrp = t->address + (off >> 1); int c = ((reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf; - return pvrta_regs[t->palbase + c]; + return palette[t->palbase + c]; } UINT32 powervr2_device::tex_r_p4_8888_vq(texinfo *t, float x, float y) @@ -511,7 +479,7 @@ UINT32 powervr2_device::tex_r_p4_8888_vq(texinfo *t, float x, float y) int idx = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])]; int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3]; int c = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)] & 0xf; - return pvrta_regs[t->palbase + c]; + return palette[t->palbase + c]; } UINT32 powervr2_device::tex_r_p8_1555_tw(texinfo *t, float x, float y) @@ -520,7 +488,7 @@ UINT32 powervr2_device::tex_r_p8_1555_tw(texinfo *t, float x, float y) int yt = ((int)y) & (t->sizey-1); int addrp = t->address + dilated1[t->cd][xt] + dilated0[t->cd][yt]; int c = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)]; - return cv_1555(pvrta_regs[t->palbase + c]); + return cv_1555(palette[t->palbase + c]); } UINT32 powervr2_device::tex_r_p8_1555_vq(texinfo *t, float x, float y) @@ -530,7 +498,7 @@ UINT32 powervr2_device::tex_r_p8_1555_vq(texinfo *t, float x, float y) int idx = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])]; int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3]; int c = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)]; - return cv_1555(pvrta_regs[t->palbase + c]); + return cv_1555(palette[t->palbase + c]); } UINT32 powervr2_device::tex_r_p8_565_tw(texinfo *t, float x, float y) @@ -539,7 +507,7 @@ UINT32 powervr2_device::tex_r_p8_565_tw(texinfo *t, float x, float y) int yt = ((int)y) & (t->sizey-1); int addrp = t->address + dilated1[t->cd][xt] + dilated0[t->cd][yt]; int c = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)]; - return cv_565(pvrta_regs[t->palbase + c]); + return cv_565(palette[t->palbase + c]); } UINT32 powervr2_device::tex_r_p8_565_vq(texinfo *t, float x, float y) @@ -549,7 +517,7 @@ UINT32 powervr2_device::tex_r_p8_565_vq(texinfo *t, float x, float y) int idx = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])]; int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3]; int c = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)]; - return cv_565(pvrta_regs[t->palbase + c]); + return cv_565(palette[t->palbase + c]); } UINT32 powervr2_device::tex_r_p8_4444_tw(texinfo *t, float x, float y) @@ -558,7 +526,7 @@ UINT32 powervr2_device::tex_r_p8_4444_tw(texinfo *t, float x, float y) int yt = ((int)y) & (t->sizey-1); int addrp = t->address + dilated1[t->cd][xt] + dilated0[t->cd][yt]; int c = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)]; - return cv_4444(pvrta_regs[t->palbase + c]); + return cv_4444(palette[t->palbase + c]); } UINT32 powervr2_device::tex_r_p8_4444_vq(texinfo *t, float x, float y) @@ -568,7 +536,7 @@ UINT32 powervr2_device::tex_r_p8_4444_vq(texinfo *t, float x, float y) int idx = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])]; int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3]; int c = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)]; - return cv_4444(pvrta_regs[t->palbase + c]); + return cv_4444(palette[t->palbase + c]); } UINT32 powervr2_device::tex_r_p8_8888_tw(texinfo *t, float x, float y) @@ -577,7 +545,7 @@ UINT32 powervr2_device::tex_r_p8_8888_tw(texinfo *t, float x, float y) int yt = ((int)y) & (t->sizey-1); int addrp = t->address + dilated1[t->cd][xt] + dilated0[t->cd][yt]; int c = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)]; - return pvrta_regs[t->palbase + c]; + return palette[t->palbase + c]; } UINT32 powervr2_device::tex_r_p8_8888_vq(texinfo *t, float x, float y) @@ -587,7 +555,7 @@ UINT32 powervr2_device::tex_r_p8_8888_vq(texinfo *t, float x, float y) int idx = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])]; int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3]; int c = (reinterpret_cast(dc_texture_ram))[BYTE_XOR_LE(addrp)]; - return pvrta_regs[t->palbase + c]; + return palette[t->palbase + c]; } @@ -640,7 +608,7 @@ void powervr2_device::tex_get_info(texinfo *t) /* Stride select is used only in the non-twiddled case */ - t->stride = (t->mode & 1) && strideselect ? (pvrta_regs[TEXT_CONTROL] & 0x1f) << 5 : t->sizex; + t->stride = (t->mode & 1) && strideselect ? (text_control & 0x1f) << 5 : t->sizex; t->blend_mode = blend_mode; t->filter_mode = filtermode; @@ -653,7 +621,7 @@ void powervr2_device::tex_get_info(texinfo *t) t->vqbase = t->address; t->blend = use_alpha ? blend_functions[t->blend_mode] : bl10; - // fprintf(stderr, "tex %d %d %d %d\n", t->pf, t->mode, pvrta_regs[PAL_RAM_CTRL], t->mipmapped); + // fprintf(stderr, "tex %d %d %d %d\n", t->pf, t->mode, pal_ram_ctrl, t->mipmapped); switch(t->pf) { case 0: // 1555 @@ -707,12 +675,12 @@ void powervr2_device::tex_get_info(texinfo *t) break; case 5: // 4bpp palette - t->palbase = 0x400 | ((t->palette & 0x3f) << 4); + t->palbase = (t->palette & 0x3f) << 4; switch(t->mode) { case 0: case 1: miptype = 0; - switch(pvrta_regs[PAL_RAM_CTRL]) { + switch(pal_ram_ctrl) { case 0: t->r = &powervr2_device::tex_r_p4_1555_tw; break; case 1: t->r = &powervr2_device::tex_r_p4_565_tw; break; case 2: t->r = &powervr2_device::tex_r_p4_4444_tw; break; @@ -721,7 +689,7 @@ void powervr2_device::tex_get_info(texinfo *t) break; case 2: case 3: miptype = 3; // ? - switch(pvrta_regs[PAL_RAM_CTRL]) { + switch(pal_ram_ctrl) { case 0: t->r = &powervr2_device::tex_r_p4_1555_vq; t->address += 0x800; break; case 1: t->r = &powervr2_device::tex_r_p4_565_vq; t->address += 0x800; break; case 2: t->r = &powervr2_device::tex_r_p4_4444_vq; t->address += 0x800; break; @@ -736,12 +704,12 @@ void powervr2_device::tex_get_info(texinfo *t) break; case 6: // 8bpp palette - t->palbase = 0x400 | ((t->palette & 0x30) << 4); + t->palbase = (t->palette & 0x30) << 4; switch(t->mode) { case 0: case 1: miptype = 1; - switch(pvrta_regs[PAL_RAM_CTRL]) { + switch(pal_ram_ctrl) { case 0: t->r = &powervr2_device::tex_r_p8_1555_tw; break; case 1: t->r = &powervr2_device::tex_r_p8_565_tw; break; case 2: t->r = &powervr2_device::tex_r_p8_4444_tw; break; @@ -750,7 +718,7 @@ void powervr2_device::tex_get_info(texinfo *t) break; case 2: case 3: miptype = 3; // ? - switch(pvrta_regs[PAL_RAM_CTRL]) { + switch(pal_ram_ctrl) { case 0: t->r = &powervr2_device::tex_r_p8_1555_vq; t->address += 0x800; break; case 1: t->r = &powervr2_device::tex_r_p8_565_vq; t->address += 0x800; break; case 2: t->r = &powervr2_device::tex_r_p8_4444_vq; t->address += 0x800; break; @@ -860,301 +828,632 @@ void powervr2_device::tex_get_info(texinfo *t) } -READ32_MEMBER( powervr2_device::pvr_ta_r ) +READ32_MEMBER( powervr2_device::id_r ) { - switch (offset) - { - case SPG_STATUS: - { - UINT8 fieldnum,vsync,hsync,blank; - - fieldnum = (space.machine().primary_screen->frame_number() & 1) ? 1 : 0; - - vsync = space.machine().primary_screen->vblank() ? 1 : 0; - if(spg_vsync_pol) { vsync^=1; } - - hsync = space.machine().primary_screen->hblank() ? 1 : 0; - if(spg_hsync_pol) { hsync^=1; } - - /* FIXME: following is just a wild guess */ - blank = (space.machine().primary_screen->vblank() | space.machine().primary_screen->hblank()) ? 0 : 1; - if(spg_blank_pol) { blank^=1; } - - pvrta_regs[offset] = (vsync << 13) | (hsync << 12) | (blank << 11) | (fieldnum << 10) | (space.machine().primary_screen->vpos() & 0x3ff); - break; - } - case SPG_TRIGGER_POS: - printf("Warning: read at h/v counter ext latches\n"); - break; - case TA_LIST_INIT: - return 0; //bit 31 always return 0, a probable left-over in Crazy Taxi reads this and discards the read (?) - } - - #if DEBUG_PVRTA_REGS - if (reg != 0x43) - mame_printf_verbose("PVRTA: [%08x] read %x @ %x (reg %x), mask %" I64FMT "x (PC=%x)\n", 0x5f8000+reg*4, pvrta_regs[reg], offset, reg, mem_mask, space.device().safe_pc()); - #endif - return (UINT64)pvrta_regs[offset]; + return 0x17fd11db; } -WRITE32_MEMBER( powervr2_device::pvr_ta_w ) +READ32_MEMBER( powervr2_device::revision_r ) { - UINT32 sizera,offsetra; - int a; - int sanitycount; + return 0x00000011; +} - // Dreamcast BIOS attempts to set PVRID to zero and then dies - // if it succeeds. Don't allow. - if ((offset != PVRID) && (offset != REVISION)) - { - pvrta_regs[offset] = data; // 5f8000+reg*4=dat +READ32_MEMBER( powervr2_device::softreset_r ) +{ + return softreset; +} + +WRITE32_MEMBER( powervr2_device::softreset_w ) +{ + COMBINE_DATA(&softreset); + if (softreset & 1) { +#if DEBUG_PVRTA + logerror("%s: TA soft reset\n", tag()); +#endif + listtype_used=0; } - - switch (offset) - { - case SOFTRESET: - if (data & 1) - { - #if DEBUG_PVRTA - mame_printf_verbose("pvr_ta_w: TA soft reset\n"); - #endif - listtype_used=0; + if (softreset & 2) { +#if DEBUG_PVRTA + logerror("%s: Core Pipeline soft reset\n", tag()); +#endif + if (start_render_received == 1) { + for (int a=0;a < NUM_BUFFERS;a++) + if (grab[a].busy == 1) + grab[a].busy = 0; + start_render_received = 0; } - if (data & 2) - { - #if DEBUG_PVRTA - mame_printf_verbose("pvr_ta_w: Core Pipeline soft reset\n"); - #endif - if (start_render_received == 1) - { - for (a=0;a < NUM_BUFFERS;a++) - if (grab[a].busy == 1) - grab[a].busy = 0; - start_render_received = 0; - } - } - if (data & 4) - { - #if DEBUG_PVRTA - mame_printf_verbose("pvr_ta_w: sdram I/F soft reset\n"); - #endif - } - break; - case STARTRENDER: - g_profiler.start(PROFILER_USER1); - #if DEBUG_PVRTA - mame_printf_verbose("Start Render Received:\n"); - mame_printf_verbose(" Region Array at %08x\n",pvrta_regs[REGION_BASE]); - mame_printf_verbose(" ISP/TSP Parameters at %08x\n",pvrta_regs[PARAM_BASE]); + } + if (softreset & 4) { +#if DEBUG_PVRTA + logerror("%s: sdram I/F soft reset\n", tag()); +#endif + } +} - #endif - // select buffer to draw using PARAM_BASE - for (a=0;a < NUM_BUFFERS;a++) - { - if ((grab[a].ispbase == pvrta_regs[PARAM_BASE]) && (grab[a].valid == 1) && (grab[a].busy == 0)) - { - grab[a].busy = 1; - renderselect = a; - start_render_received=1; +WRITE32_MEMBER( powervr2_device::startrender_w ) +{ + g_profiler.start(PROFILER_USER1); +#if DEBUG_PVRTA + logerror("%s: Start render, region=%08x, params=%08x\n", tag(), region_base, param_base); +#endif + + // select buffer to draw using param_base + for (int a=0;a < NUM_BUFFERS;a++) { + if ((grab[a].ispbase == param_base) && (grab[a].valid == 1) && (grab[a].busy == 0)) { + grab[a].busy = 1; + renderselect = a; + start_render_received=1; - grab[a].fbwsof1=pvrta_regs[FB_W_SOF1]; - grab[a].fbwsof2=pvrta_regs[FB_W_SOF2]; + grab[a].fbwsof1 = fb_w_sof1; + grab[a].fbwsof2 = fb_w_sof2; - rectangle clip(0, 1023, 0, 1023); + rectangle clip(0, 1023, 0, 1023); - // we've got a request to draw, so, draw to the accumulation buffer! - // this should really be done for each tile! - render_to_accumulation_buffer(*fake_accumulationbuffer_bitmap,clip); + // we've got a request to draw, so, draw to the accumulation buffer! + // this should really be done for each tile! + render_to_accumulation_buffer(*fake_accumulationbuffer_bitmap,clip); - endofrender_timer_isp->adjust(attotime::from_usec(4000) ); // hack, make sure render takes some amount of time + endofrender_timer_isp->adjust(attotime::from_usec(4000) ); // hack, make sure render takes some amount of time - /* copy the tiles to the framebuffer (really the rendering should be in this loop too) */ - if (pvrta_regs[FPU_PARAM_CFG] & 0x200000) - sizera=6; - else - sizera=5; - offsetra=pvrta_regs[REGION_BASE]; + /* copy the tiles to the framebuffer (really the rendering should be in this loop too) */ + int sizera = fpu_param_cfg & 0x200000 ? 6 : 5; + int offsetra=region_base; - //printf("base is %08x\n", offsetra); + //printf("base is %08x\n", offsetra); - // sanity - sanitycount = 0; - for (;;) - { - UINT32 st[6]; + // sanity + int sanitycount = 0; + for (;;) { + UINT32 st[6]; - st[0]=space.read_dword((0x05000000+offsetra)); - st[1]=space.read_dword((0x05000004+offsetra)); // Opaque List Pointer - st[2]=space.read_dword((0x05000008+offsetra)); // Opaque Modifier Volume List Pointer - st[3]=space.read_dword((0x0500000c+offsetra)); // Translucent List Pointer - st[4]=space.read_dword((0x05000010+offsetra)); // Translucent Modifier Volume List Pointer + st[0]=space.read_dword((0x05000000+offsetra)); + st[1]=space.read_dword((0x05000004+offsetra)); // Opaque List Pointer + st[2]=space.read_dword((0x05000008+offsetra)); // Opaque Modifier Volume List Pointer + st[3]=space.read_dword((0x0500000c+offsetra)); // Translucent List Pointer + st[4]=space.read_dword((0x05000010+offsetra)); // Translucent Modifier Volume List Pointer - if (sizera == 6) - { - st[5] = space.read_dword((0x05000014+offsetra)); // Punch Through List Pointer - offsetra+=0x18; - } - else - { - st[5] = 0; - offsetra+=0x14; - } - - { - int x = ((st[0]&0x000000fc)>>2)*32; - int y = ((st[0]&0x00003f00)>>8)*32; - //printf("tiledata %08x %d %d - %08x %08x %08x %08x %08x\n",st[0],x,y,st[1],st[2],st[3],st[4],st[5]); - - // should render to the accumulation buffer here using pointers we filled in when processing the data - // sent to the TA. HOWEVER, we don't process the TA data and create the real format object lists, so - // instead just use these co-ordinates to copy data from our fake full-screnen accumnulation buffer into - // the framebuffer - - pvr_accumulationbuffer_to_framebuffer(space, x,y); - } - - if (st[0] & 0x80000000) - break; - - // prevent infinite loop if asked to process invalid data - if(sanitycount>2000) - break; + if (sizera == 6) { + st[5] = space.read_dword((0x05000014+offsetra)); // Punch Through List Pointer + offsetra+=0x18; + } else { + st[5] = 0; + offsetra+=0x14; } + { + int x = ((st[0]&0x000000fc)>>2)*32; + int y = ((st[0]&0x00003f00)>>8)*32; + //printf("tiledata %08x %d %d - %08x %08x %08x %08x %08x\n",st[0],x,y,st[1],st[2],st[3],st[4],st[5]); + + // should render to the accumulation buffer here using pointers we filled in when processing the data + // sent to the TA. HOWEVER, we don't process the TA data and create the real format object lists, so + // instead just use these co-ordinates to copy data from our fake full-screnen accumnulation buffer into + // the framebuffer + + pvr_accumulationbuffer_to_framebuffer(space, x,y); + } + + if (st[0] & 0x80000000) + break; + + // prevent infinite loop if asked to process invalid data + if(sanitycount>2000) + break; + } + break; + } + } +} +READ32_MEMBER( powervr2_device::param_base_r ) +{ + return param_base; +} +WRITE32_MEMBER( powervr2_device::param_base_w ) +{ + COMBINE_DATA(¶m_base); +} + +READ32_MEMBER( powervr2_device::region_base_r ) +{ + return region_base; +} + +WRITE32_MEMBER( powervr2_device::region_base_w ) +{ + COMBINE_DATA(®ion_base); +} + +READ32_MEMBER( powervr2_device::vo_border_col_r ) +{ + return vo_border_col; +} + +WRITE32_MEMBER( powervr2_device::vo_border_col_w ) +{ + COMBINE_DATA(&vo_border_col); +} + +READ32_MEMBER( powervr2_device::fb_r_ctrl_r ) +{ + return fb_r_ctrl; +} + +WRITE32_MEMBER( powervr2_device::fb_r_ctrl_w ) +{ + COMBINE_DATA(&fb_r_ctrl); +} + +READ32_MEMBER( powervr2_device::fb_w_ctrl_r ) +{ + return fb_w_ctrl; +} + +WRITE32_MEMBER( powervr2_device::fb_w_ctrl_w ) +{ + COMBINE_DATA(&fb_w_ctrl); +} + +READ32_MEMBER( powervr2_device::fb_w_linestride_r ) +{ + return fb_w_linestride; +} + +WRITE32_MEMBER( powervr2_device::fb_w_linestride_w ) +{ + COMBINE_DATA(&fb_w_linestride); +} + +READ32_MEMBER( powervr2_device::fb_r_sof1_r ) +{ + return fb_r_sof1; +} + +WRITE32_MEMBER( powervr2_device::fb_r_sof1_w ) +{ + COMBINE_DATA(&fb_r_sof1); +} + +READ32_MEMBER( powervr2_device::fb_r_sof2_r ) +{ + return fb_r_sof2; +} + +WRITE32_MEMBER( powervr2_device::fb_r_sof2_w ) +{ + COMBINE_DATA(&fb_r_sof2); +} + +READ32_MEMBER( powervr2_device::fb_r_size_r ) +{ + return fb_r_size; +} + +WRITE32_MEMBER( powervr2_device::fb_r_size_w ) +{ + COMBINE_DATA(&fb_r_size); +} + +READ32_MEMBER( powervr2_device::fb_w_sof1_r ) +{ + return fb_w_sof1; +} + +WRITE32_MEMBER( powervr2_device::fb_w_sof1_w ) +{ + COMBINE_DATA(&fb_w_sof1); +} + +READ32_MEMBER( powervr2_device::fb_w_sof2_r ) +{ + return fb_w_sof2; +} + +WRITE32_MEMBER( powervr2_device::fb_w_sof2_w ) +{ + COMBINE_DATA(&fb_w_sof2); +} + +READ32_MEMBER( powervr2_device::fb_x_clip_r ) +{ + return fb_x_clip; +} + +WRITE32_MEMBER( powervr2_device::fb_x_clip_w ) +{ + COMBINE_DATA(&fb_x_clip); +} + +READ32_MEMBER( powervr2_device::fb_y_clip_r ) +{ + return fb_y_clip; +} + +WRITE32_MEMBER( powervr2_device::fb_y_clip_w ) +{ + COMBINE_DATA(&fb_y_clip); +} + +READ32_MEMBER( powervr2_device::fpu_param_cfg_r ) +{ + return fpu_param_cfg; +} + +WRITE32_MEMBER( powervr2_device::fpu_param_cfg_w ) +{ + COMBINE_DATA(&fpu_param_cfg); +} + +READ32_MEMBER( powervr2_device::isp_backgnd_t_r ) +{ + return isp_backgnd_t; +} + +WRITE32_MEMBER( powervr2_device::isp_backgnd_t_w ) +{ + COMBINE_DATA(&isp_backgnd_t); +} + +READ32_MEMBER( powervr2_device::spg_hblank_int_r ) +{ + return spg_hblank_int; +} + +WRITE32_MEMBER( powervr2_device::spg_hblank_int_w ) +{ + COMBINE_DATA(&spg_hblank_int); + /* TODO: timer adjust */ +} + +READ32_MEMBER( powervr2_device::spg_vblank_int_r ) +{ + return spg_vblank_int; +} + +WRITE32_MEMBER( powervr2_device::spg_vblank_int_w ) +{ + COMBINE_DATA(&spg_vblank_int); + + /* clear pending irqs and modify them with the updated ones */ + vbin_timer->adjust(attotime::never); + vbout_timer->adjust(attotime::never); + + vbin_timer->adjust(space.machine().primary_screen->time_until_pos(spg_vblank_int & 0x3ff)); + vbout_timer->adjust(space.machine().primary_screen->time_until_pos((spg_vblank_int >> 16) & 0x3ff)); +} + +READ32_MEMBER( powervr2_device::spg_hblank_r ) +{ + return spg_hblank; +} + +WRITE32_MEMBER( powervr2_device::spg_hblank_w ) +{ + COMBINE_DATA(&spg_hblank); + update_screen_format(); +} + +READ32_MEMBER( powervr2_device::spg_load_r ) +{ + return spg_load; +} + +WRITE32_MEMBER( powervr2_device::spg_load_w ) +{ + COMBINE_DATA(&spg_load); + update_screen_format(); +} + +READ32_MEMBER( powervr2_device::spg_vblank_r ) +{ + return spg_vblank; +} + +WRITE32_MEMBER( powervr2_device::spg_vblank_w ) +{ + COMBINE_DATA(&spg_vblank); + update_screen_format(); +} + +READ32_MEMBER( powervr2_device::spg_width_r ) +{ + return spg_width; +} + +WRITE32_MEMBER( powervr2_device::spg_width_w ) +{ + COMBINE_DATA(&spg_width); + update_screen_format(); +} + +READ32_MEMBER( powervr2_device::text_control_r ) +{ + return text_control; +} + +WRITE32_MEMBER( powervr2_device::text_control_w ) +{ + COMBINE_DATA(&text_control); +} + +READ32_MEMBER( powervr2_device::vo_control_r ) +{ + return vo_control; +} + +WRITE32_MEMBER( powervr2_device::vo_control_w ) +{ + COMBINE_DATA(&vo_control); +} + +READ32_MEMBER( powervr2_device::vo_startx_r ) +{ + return vo_startx; +} + +WRITE32_MEMBER( powervr2_device::vo_startx_w ) +{ + COMBINE_DATA(&vo_startx); + update_screen_format(); +} + +READ32_MEMBER( powervr2_device::vo_starty_r ) +{ + return vo_starty; +} + +WRITE32_MEMBER( powervr2_device::vo_starty_w ) +{ + COMBINE_DATA(&vo_starty); + update_screen_format(); +} + +READ32_MEMBER( powervr2_device::pal_ram_ctrl_r ) +{ + return pal_ram_ctrl; +} + +WRITE32_MEMBER( powervr2_device::pal_ram_ctrl_w ) +{ + COMBINE_DATA(&pal_ram_ctrl); +} + +READ32_MEMBER( powervr2_device::spg_status_r ) +{ + UINT32 fieldnum = (machine().primary_screen->frame_number() & 1) ? 1 : 0; + + UINT32 vsync = machine().primary_screen->vblank() ? 1 : 0; + if(vo_control & 2) { vsync^=1; } + + UINT32 hsync = machine().primary_screen->hblank() ? 1 : 0; + if(vo_control & 1) { hsync^=1; } + + /* FIXME: following is just a wild guess */ + UINT32 blank = (machine().primary_screen->vblank() | space.machine().primary_screen->hblank()) ? 0 : 1; + if(vo_control & 4) { blank^=1; } + + return (vsync << 13) | (hsync << 12) | (blank << 11) | (fieldnum << 10) | (machine().primary_screen->vpos() & 0x3ff); +} + + +READ32_MEMBER( powervr2_device::ta_ol_base_r ) +{ + return ta_ol_base; +} + +WRITE32_MEMBER( powervr2_device::ta_ol_base_w ) +{ + COMBINE_DATA(&ta_ol_base); +} + +READ32_MEMBER( powervr2_device::ta_isp_base_r ) +{ + return ta_isp_base; +} + +WRITE32_MEMBER( powervr2_device::ta_isp_base_w ) +{ + COMBINE_DATA(&ta_isp_base); +} + +READ32_MEMBER( powervr2_device::ta_ol_limit_r ) +{ + return ta_ol_limit; +} + +WRITE32_MEMBER( powervr2_device::ta_ol_limit_w ) +{ + COMBINE_DATA(&ta_ol_limit); +} + +READ32_MEMBER( powervr2_device::ta_isp_limit_r ) +{ + return ta_isp_limit; +} + +WRITE32_MEMBER( powervr2_device::ta_isp_limit_w ) +{ + COMBINE_DATA(&ta_isp_limit); +} + +READ32_MEMBER( powervr2_device::ta_next_opb_r ) +{ + return ta_next_opb; +} + +READ32_MEMBER( powervr2_device::ta_itp_current_r ) +{ + return ta_itp_current; +} + +READ32_MEMBER( powervr2_device::ta_alloc_ctrl_r ) +{ + return ta_alloc_ctrl; +} + +WRITE32_MEMBER( powervr2_device::ta_alloc_ctrl_w ) +{ + COMBINE_DATA(&ta_alloc_ctrl); +} + +READ32_MEMBER( powervr2_device::ta_list_init_r ) +{ + return 0; //bit 31 always return 0, a probable left-over in Crazy Taxi reads this and discards the read (?) +} + +WRITE32_MEMBER( powervr2_device::ta_list_init_w ) +{ + if(data & 0x80000000) { + tafifo_pos=0; + tafifo_mask=7; + tafifo_vertexwords=8; + tafifo_listtype= -1; +#if DEBUG_PVRTA + logerror("%s: list init ol=(%08x, %08x) isp=(%08x, %08x), alloc=%08x obp=%08x\n", + tag(), ta_ol_base, ta_ol_limit, ta_isp_base, ta_isp_limit, ta_alloc_ctrl, ta_next_opb_init); +#endif + ta_next_opb = ta_next_opb_init; + ta_itp_current = ta_isp_base; + alloc_ctrl_OPB_Mode = ta_alloc_ctrl & 0x100000; // 0 up 1 down + alloc_ctrl_PT_OPB = (4 << ((ta_alloc_ctrl >> 16) & 3)) & 0x38; // number of 32 bit words (0,8,16,32) + alloc_ctrl_TM_OPB = (4 << ((ta_alloc_ctrl >> 12) & 3)) & 0x38; + alloc_ctrl_T_OPB = (4 << ((ta_alloc_ctrl >> 8) & 3)) & 0x38; + alloc_ctrl_OM_OPB = (4 << ((ta_alloc_ctrl >> 4) & 3)) & 0x38; + alloc_ctrl_O_OPB = (4 << ((ta_alloc_ctrl >> 0) & 3)) & 0x38; + listtype_used |= (1+4); + // use ta_isp_base and select buffer for grab data + grabsel = -1; + // try to find already used buffer but not busy + for (int a=0;a < NUM_BUFFERS;a++) + if ((grab[a].ispbase == ta_isp_base) && (grab[a].busy == 0) && (grab[a].valid == 1)) { + grabsel=a; break; } - } - if (a != NUM_BUFFERS) - break; - assert_always(0, "TA grabber error A!\n"); - break; - case TA_LIST_INIT: - if(data & 0x80000000) - { - tafifo_pos=0; - tafifo_mask=7; - tafifo_vertexwords=8; - tafifo_listtype= -1; - #if DEBUG_PVRTA - mame_printf_verbose("TA_OL_BASE %08x TA_OL_LIMIT %08x\n", pvrta_regs[TA_OL_BASE], pvrta_regs[TA_OL_LIMIT]); - mame_printf_verbose("TA_ISP_BASE %08x TA_ISP_LIMIT %08x\n", pvrta_regs[TA_ISP_BASE], pvrta_regs[TA_ISP_LIMIT]); - mame_printf_verbose("TA_ALLOC_CTRL %08x\n", pvrta_regs[TA_ALLOC_CTRL]); - mame_printf_verbose("TA_NEXT_OPB_INIT %08x\n", pvrta_regs[TA_NEXT_OPB_INIT]); - #endif - pvrta_regs[TA_NEXT_OPB] = pvrta_regs[TA_NEXT_OPB_INIT]; - pvrta_regs[TA_ITP_CURRENT] = pvrta_regs[TA_ISP_BASE]; - alloc_ctrl_OPB_Mode = pvrta_regs[TA_ALLOC_CTRL] & 0x100000; // 0 up 1 down - alloc_ctrl_PT_OPB = (4 << ((pvrta_regs[TA_ALLOC_CTRL] >> 16) & 3)) & 0x38; // number of 32 bit words (0,8,16,32) - alloc_ctrl_TM_OPB = (4 << ((pvrta_regs[TA_ALLOC_CTRL] >> 12) & 3)) & 0x38; - alloc_ctrl_T_OPB = (4 << ((pvrta_regs[TA_ALLOC_CTRL] >> 8) & 3)) & 0x38; - alloc_ctrl_OM_OPB = (4 << ((pvrta_regs[TA_ALLOC_CTRL] >> 4) & 3)) & 0x38; - alloc_ctrl_O_OPB = (4 << ((pvrta_regs[TA_ALLOC_CTRL] >> 0) & 3)) & 0x38; - listtype_used |= (1+4); - // use TA_ISP_BASE and select buffer for grab data - grabsel = -1; - // try to find already used buffer but not busy - for (a=0;a < NUM_BUFFERS;a++) - { - if ((grab[a].ispbase == pvrta_regs[TA_ISP_BASE]) && (grab[a].busy == 0) && (grab[a].valid == 1)) - { + + // try a buffer not used yet + if (grabsel < 0) + for (int a=0;a < NUM_BUFFERS;a++) + if (grab[a].valid == 0) { grabsel=a; break; } - } - // try a buffer not used yet - if (grabsel < 0) - { - for (a=0;a < NUM_BUFFERS;a++) - { - if (grab[a].valid == 0) - { - grabsel=a; - break; - } + + // find a non busy buffer starting from the last one used + if (grabsel < 0) + for (int a=0;a < 3;a++) + if (grab[(grabsellast+1+a) & 3].busy == 0) { + grabsel=a; + break; } - } - // find a non busy buffer starting from the last one used - if (grabsel < 0) - { - for (a=0;a < 3;a++) - { - if (grab[(grabsellast+1+a) & 3].busy == 0) - { - grabsel=a; - break; - } - } - } - if (grabsel < 0) - assert_always(0, "TA grabber error B!\n"); - grabsellast=grabsel; - grab[grabsel].ispbase=pvrta_regs[TA_ISP_BASE]; - grab[grabsel].busy=0; - grab[grabsel].valid=1; - grab[grabsel].verts_size=0; - grab[grabsel].strips_size=0; - g_profiler.stop(); - } - break; -//#define TA_YUV_TEX_BASE ((0x005f8148-0x005f8000)/4) - case TA_YUV_TEX_BASE: - printf("TA_YUV_TEX_BASE initialized to %08x\n", data); - - // hack, this interrupt is generated after transfering a set amount of data - //irq_cb(EOXFER_YUV_IRQ); - - break; - case TA_YUV_TEX_CTRL: - printf("TA_YUV_TEX_CTRL initialized to %08x\n", data); - break; - - case SPG_VBLANK_INT: - /* clear pending irqs and modify them with the updated ones */ - vbin_timer->adjust(attotime::never); - vbout_timer->adjust(attotime::never); - - vbin_timer->adjust(space.machine().primary_screen->time_until_pos(spg_vblank_in_irq_line_num)); - vbout_timer->adjust(space.machine().primary_screen->time_until_pos(spg_vblank_out_irq_line_num)); - break; - /* TODO: timer adjust for SPG_HBLANK_INT too */ - case TA_LIST_CONT: - #if DEBUG_PVRTA - mame_printf_verbose("List continuation processing\n"); - #endif - if(data & 0x80000000) - { - tafifo_listtype= -1; // no list being received - listtype_used |= (1+4); - } - break; - case SPG_VBLANK: - case SPG_HBLANK: - case SPG_LOAD: - case VO_STARTX: - case VO_STARTY: - { - rectangle visarea = space.machine().primary_screen->visible_area(); - /* FIXME: right visible area calculations aren't known yet*/ - visarea.min_x = 0; - visarea.max_x = ((spg_hbstart - spg_hbend - vo_horz_start_pos) <= 0x180 ? 320 : 640) - 1; - visarea.min_y = 0; - visarea.max_y = ((spg_vbstart - spg_vbend - vo_vert_start_pos_f1) <= 0x100 ? 240 : 480) - 1; - - - space.machine().primary_screen->configure(spg_hbstart, spg_vbstart, visarea, space.machine().primary_screen->frame_period().attoseconds ); - } - break; + if (grabsel < 0) + assert_always(0, "TA grabber error B!\n"); + grabsellast=grabsel; + grab[grabsel].ispbase=ta_isp_base; + grab[grabsel].busy=0; + grab[grabsel].valid=1; + grab[grabsel].verts_size=0; + grab[grabsel].strips_size=0; + + g_profiler.stop(); } +} - #if DEBUG_PVRTA_REGS - if ((offset != 0x14) && (offset != 0x15)) - mame_printf_verbose("PVRTA: [%08x=%x] write %x to %x %x, mask %x\n", 0x5f8000+reg*4, data, offset, (reg*4)+0x8000, mem_mask); - #endif + +READ32_MEMBER( powervr2_device::ta_yuv_tex_base_r ) +{ + return ta_yuv_tex_base; +} + +WRITE32_MEMBER( powervr2_device::ta_yuv_tex_base_w ) +{ + COMBINE_DATA(&ta_yuv_tex_base); + logerror("%s: ta_yuv_tex_base = %08x\n", tag(), ta_yuv_tex_base); + + // hack, this interrupt is generated after transfering a set amount of data + //irq_cb(EOXFER_YUV_IRQ); +} + +READ32_MEMBER( powervr2_device::ta_yuv_tex_ctrl_r ) +{ + return ta_yuv_tex_ctrl; +} + +WRITE32_MEMBER( powervr2_device::ta_yuv_tex_ctrl_w ) +{ + COMBINE_DATA(&ta_yuv_tex_ctrl); + logerror("%s: ta_yuv_tex_ctrl = %08x\n", tag(), ta_yuv_tex_ctrl); +} + +READ32_MEMBER( powervr2_device::ta_yuv_tex_cnt_r ) +{ + return ta_yuv_tex_cnt; +} + +WRITE32_MEMBER( powervr2_device::ta_yuv_tex_cnt_w ) +{ + COMBINE_DATA(&ta_yuv_tex_cnt); +} + +WRITE32_MEMBER( powervr2_device::ta_list_cont_w ) +{ + if(data & 0x80000000) { + tafifo_listtype= -1; // no list being received + listtype_used |= (1+4); + } +} + +READ32_MEMBER( powervr2_device::ta_next_opb_init_r ) +{ + return ta_next_opb_init; +} + +WRITE32_MEMBER( powervr2_device::ta_next_opb_init_w ) +{ + COMBINE_DATA(&ta_next_opb_init); +} + + +READ32_MEMBER( powervr2_device::fog_table_r ) +{ + return fog_table[offset]; +} + +WRITE32_MEMBER( powervr2_device::fog_table_w ) +{ + COMBINE_DATA(fog_table+offset); +} + +READ32_MEMBER( powervr2_device::palette_r ) +{ + return palette[offset]; +} + +WRITE32_MEMBER( powervr2_device::palette_w ) +{ + COMBINE_DATA(palette+offset); +} + +void powervr2_device::update_screen_format() +{ + INT32 spg_hbstart = spg_hblank & 0x3ff; + INT32 spg_hbend = (spg_hblank >> 16) & 0x3ff; + INT32 spg_vbstart = spg_vblank & 0x3ff; + INT32 spg_vbend = (spg_vblank >> 16) & 0x3ff; + INT32 vo_horz_start_pos = vo_startx & 0x3ff; + INT32 vo_vert_start_pos_f1 = vo_starty & 0x3ff; + + rectangle visarea = machine().primary_screen->visible_area(); + /* FIXME: right visible area calculations aren't known yet*/ + visarea.min_x = 0; + visarea.max_x = ((spg_hbstart - spg_hbend - vo_horz_start_pos) <= 0x180 ? 320 : 640) - 1; + visarea.min_y = 0; + visarea.max_y = ((spg_vbstart - spg_vbend - vo_vert_start_pos_f1) <= 0x100 ? 240 : 480) - 1; + + machine().primary_screen->configure(spg_hbstart, spg_vbstart, visarea, machine().primary_screen->frame_period().attoseconds ); } TIMER_CALLBACK_MEMBER(powervr2_device::transfer_opaque_list_irq) @@ -1838,8 +2137,6 @@ void powervr2_device::render_to_accumulation_buffer(bitmap_rgb32 &bitmap,const r { dc_state *state = machine().driver_data(); address_space &space = state->m_maincpu->space(AS_PROGRAM); - int cs,rs,ns; - UINT32 c; #if 0 int stride; UINT16 *bmpaddr16; @@ -1852,17 +2149,16 @@ void powervr2_device::render_to_accumulation_buffer(bitmap_rgb32 &bitmap,const r //printf("drawtest!\n"); - rs=renderselect; - c=pvrta_regs[ISP_BACKGND_T]; - c=space.read_dword(0x05000000+((c&0xfffff8)>>1)+(3+3)*4); + int rs=renderselect; + UINT32 c=space.read_dword(0x05000000+((isp_backgnd_t & 0xfffff8)>>1)+(3+3)*4); bitmap.fill(c, cliprect); - ns=grab[rs].strips_size; + int ns=grab[rs].strips_size; if(ns) memset(wbuffer, 0x00, sizeof(wbuffer)); - for (cs=0;cs < ns;cs++) + for (int cs=0;cs < ns;cs++) { strip *ts = &grab[rs].strips[cs]; int sv = ts->svert; @@ -1914,14 +2210,7 @@ void powervr2_device::pvr_accumulationbuffer_to_framebuffer(address_space &space // the standard format for the framebuffer appears to be 565 // yes, this means colour data is lost in the conversion - UINT32 wc = pvrta_regs[FB_W_CTRL]; - UINT32 stride = pvrta_regs[FB_W_LINESTRIDE]; - UINT32 writeoffs = pvrta_regs[FB_W_SOF1]; - - UINT32* src; - - - UINT8 packmode = wc & 0x7; + UINT8 packmode = fb_w_ctrl & 0x7; switch (packmode) { @@ -1931,8 +2220,8 @@ void powervr2_device::pvr_accumulationbuffer_to_framebuffer(address_space &space int xcnt,ycnt; for (ycnt=0;ycnt<32;ycnt++) { - UINT32 realwriteoffs = 0x05000000 + writeoffs + (y+ycnt) * (stride<<3) + (x*2); - src = &fake_accumulationbuffer_bitmap->pix32(y+ycnt, x); + UINT32 realwriteoffs = 0x05000000 + fb_w_sof1 + (y+ycnt) * (fb_w_linestride<<3) + (x*2); + UINT32 *src = &fake_accumulationbuffer_bitmap->pix32(y+ycnt, x); for (xcnt=0;xcnt<32;xcnt++) @@ -1955,8 +2244,8 @@ void powervr2_device::pvr_accumulationbuffer_to_framebuffer(address_space &space int xcnt,ycnt; for (ycnt=0;ycnt<32;ycnt++) { - UINT32 realwriteoffs = 0x05000000 + writeoffs + (y+ycnt) * (stride<<3) + (x*2); - src = &fake_accumulationbuffer_bitmap->pix32(y+ycnt, x); + UINT32 realwriteoffs = 0x05000000 + fb_w_sof1 + (y+ycnt) * (fb_w_linestride<<3) + (x*2); + UINT32 *src = &fake_accumulationbuffer_bitmap->pix32(y+ycnt, x); for (xcnt=0;xcnt<32;xcnt++) @@ -1982,8 +2271,8 @@ void powervr2_device::pvr_accumulationbuffer_to_framebuffer(address_space &space int xcnt,ycnt; for (ycnt=0;ycnt<32;ycnt++) { - UINT32 realwriteoffs = 0x05000000 + writeoffs + (y+ycnt) * (stride<<3) + (x*2); - src = &fake_accumulationbuffer_bitmap->pix32(y+ycnt, x); + UINT32 realwriteoffs = 0x05000000 + fb_w_sof1 + (y+ycnt) * (fb_w_linestride<<3) + (x*2); + UINT32 *src = &fake_accumulationbuffer_bitmap->pix32(y+ycnt, x); for (xcnt=0;xcnt<32;xcnt++) @@ -2007,8 +2296,8 @@ void powervr2_device::pvr_accumulationbuffer_to_framebuffer(address_space &space int xcnt,ycnt; for (ycnt=0;ycnt<32;ycnt++) { - UINT32 realwriteoffs = 0x05000000 + writeoffs + (y+ycnt) * (stride<<3) + (x*2); - src = &fake_accumulationbuffer_bitmap->pix32(y+ycnt, x); + UINT32 realwriteoffs = 0x05000000 + fb_w_sof1 + (y+ycnt) * (fb_w_linestride<<3) + (x*2); + UINT32 *src = &fake_accumulationbuffer_bitmap->pix32(y+ycnt, x); for (xcnt=0;xcnt<32;xcnt++) @@ -2034,8 +2323,8 @@ void powervr2_device::pvr_accumulationbuffer_to_framebuffer(address_space &space int xcnt,ycnt; for (ycnt=0;ycnt<32;ycnt++) { - UINT32 realwriteoffs = 0x05000000 + writeoffs + (y+ycnt) * (stride<<3) + (x*2); - src = &fake_accumulationbuffer_bitmap->pix32(y+ycnt, x); + UINT32 realwriteoffs = 0x05000000 + fb_w_sof1 + (y+ycnt) * (fb_w_linestride<<3) + (x*2); + UINT32 *src = &fake_accumulationbuffer_bitmap->pix32(y+ycnt, x); for (xcnt=0;xcnt<32;xcnt++) @@ -2068,16 +2357,15 @@ void powervr2_device::pvr_drawframebuffer(bitmap_rgb32 &bitmap,const rectangle & UINT32 c; UINT32 r,g,b; - UINT32 wc = pvrta_regs[FB_R_CTRL]; - UINT8 unpackmode = (wc & 0x0000000c) >>2; // aka fb_depth - UINT8 enable = (wc & 0x00000001); + UINT8 unpackmode = (fb_r_ctrl & 0x0000000c) >>2; // aka fb_depth + UINT8 enable = (fb_r_ctrl & 0x00000001); // ?? if (!enable) return; // only for rgb565 framebuffer - xi=((pvrta_regs[FB_R_SIZE] & 0x3ff)+1) << 1; - dy=((pvrta_regs[FB_R_SIZE] >> 10) & 0x3ff)+1; + xi=((fb_r_size & 0x3ff)+1) << 1; + dy=((fb_r_size >> 10) & 0x3ff)+1; dy++; dy*=2; // probably depends on interlace mode, fields etc... @@ -2088,8 +2376,8 @@ void powervr2_device::pvr_drawframebuffer(bitmap_rgb32 &bitmap,const rectangle & // should upsample back to 8-bit output using fb_concat for (y=0;y <= dy;y++) { - addrp=pvrta_regs[FB_R_SOF1]+y*xi*2; - if(spg_pixel_double) + addrp = fb_r_sof1+y*xi*2; + if(vo_control & 0x100) { for (x=0;x < xi;x++) { @@ -2132,8 +2420,8 @@ void powervr2_device::pvr_drawframebuffer(bitmap_rgb32 &bitmap,const rectangle & // should upsample back to 8-bit output using fb_concat for (y=0;y <= dy;y++) { - addrp=pvrta_regs[FB_R_SOF1]+y*xi*2; - if(spg_pixel_double) + addrp = fb_r_sof1+y*xi*2; + if(vo_control & 0x100) { for (x=0;x < xi;x++) { @@ -2177,8 +2465,8 @@ void powervr2_device::pvr_drawframebuffer(bitmap_rgb32 &bitmap,const rectangle & case 0x02: ; // 888 RGB 24-bit - suchie3 - HACKED, see pvr_accumulationbuffer_to_framebuffer! for (y=0;y <= dy;y++) { - addrp=pvrta_regs[FB_R_SOF1]+y*xi*2; - if(spg_pixel_double) + addrp = fb_r_sof1+y*xi*2; + if(vo_control & 0x100) { for (x=0;x < xi;x++) { @@ -2221,8 +2509,8 @@ void powervr2_device::pvr_drawframebuffer(bitmap_rgb32 &bitmap,const rectangle & case 0x03: // 0888 ARGB 32-bit - HACKED, see pvr_accumulationbuffer_to_framebuffer! for (y=0;y <= dy;y++) { - addrp=pvrta_regs[FB_R_SOF1]+y*xi*2; - if(spg_pixel_double) + addrp = fb_r_sof1+y*xi*2; + if(vo_control & 0x100) { for (x=0;x < xi;x++) { @@ -2272,12 +2560,12 @@ void powervr2_device::debug_paletteram() UINT32 r,g,b; int i; - //popmessage("%02x",pvrta_regs[PAL_RAM_CTRL]); + //popmessage("%02x",pal_ram_ctrl); for(i=0;i<0x400;i++) { - pal = pvrta_regs[((0x005F9000-0x005F8000)/4)+i]; - switch(pvrta_regs[PAL_RAM_CTRL]) + pal = palette[i]; + switch(pal_ram_ctrl) { case 0: //argb1555 <- guilty gear uses this mode { @@ -2357,27 +2645,27 @@ TIMER_CALLBACK_MEMBER(powervr2_device::vbin) { irq_cb(VBL_IN_IRQ); - vbin_timer->adjust(machine().primary_screen->time_until_pos(spg_vblank_in_irq_line_num)); + vbin_timer->adjust(machine().primary_screen->time_until_pos(spg_vblank_int & 0x3ff)); } TIMER_CALLBACK_MEMBER(powervr2_device::vbout) { irq_cb(VBL_OUT_IRQ); - vbout_timer->adjust(machine().primary_screen->time_until_pos(spg_vblank_out_irq_line_num)); + vbout_timer->adjust(machine().primary_screen->time_until_pos((spg_vblank_int >> 16) & 0x3ff)); } TIMER_CALLBACK_MEMBER(powervr2_device::hbin) { - if(spg_hblank_int_mode & 1) + if(spg_hblank_int & 0x1000) { if(scanline == next_y) { irq_cb(HBL_IN_IRQ); - next_y+=spg_line_comp_val; + next_y += spg_hblank_int & 0x3ff; } } - else if((scanline == spg_line_comp_val) || (spg_hblank_int_mode & 2)) + else if((scanline == (spg_hblank_int & 0x3ff)) || (spg_hblank_int & 0x2000)) { irq_cb(HBL_IN_IRQ); } @@ -2386,13 +2674,13 @@ TIMER_CALLBACK_MEMBER(powervr2_device::hbin) scanline++; - if(scanline >= spg_vblank_in_irq_line_num) + if(scanline >= (spg_vblank_int & 0x3ff)) { scanline = 0; - next_y = spg_line_comp_val; + next_y = spg_hblank_int & 0x3ff; } - hbin_timer->adjust(machine().primary_screen->time_until_pos(scanline, spg_hblank_in_irq-1)); + hbin_timer->adjust(machine().primary_screen->time_until_pos(scanline, ((spg_hblank_int >> 16) & 0x3ff)-1)); } @@ -2455,9 +2743,12 @@ UINT32 powervr2_device::screen_update(screen_device &screen, bitmap_rgb32 &bitma } #endif - bitmap.fill(MAKE_ARGB(0xff,vo_border_R,vo_border_G,vo_border_B), cliprect); //FIXME: Chroma bit? + bitmap.fill(MAKE_ARGB(0xff, + (vo_border_col >> 16) & 0xff, + (vo_border_col >> 8 ) & 0xff, + (vo_border_col ) & 0xff), cliprect); //FIXME: Chroma bit? - if(!spg_blank_video) + if(!(vo_control & 8)) pvr_drawframebuffer(bitmap, cliprect); // update this here so we only do string lookup once per frame @@ -2532,8 +2823,8 @@ WRITE32_MEMBER( powervr2_device::elan_regs_w ) WRITE32_MEMBER( powervr2_device::pvrs_ta_w ) { - pvr_ta_w(space,offset,data,mem_mask); - pvr2_ta_w(space,offset,data,mem_mask); + // pvr_ta_w(space,offset,data,mem_mask); + // pvr2_ta_w(space,offset,data,mem_mask); //printf("PVR2 %08x %08x\n",reg,dat); } @@ -2633,7 +2924,6 @@ void powervr2_device::device_start() irq_cb.resolve_safe(); memset(pvrctrl_regs, 0, sizeof(pvrctrl_regs)); - memset(pvrta_regs, 0, sizeof(pvrta_regs)); memset(grab, 0, sizeof(grab)); pvr_build_parameterconfig(); @@ -2649,6 +2939,88 @@ void powervr2_device::device_start() fake_accumulationbuffer_bitmap = auto_bitmap_rgb32_alloc(machine(),1024,1024); + softreset = 0; + param_base = 0; + region_base = 0; + vo_border_col = 0; + fb_r_ctrl = 0; + fb_w_ctrl = 0; + fb_w_linestride = 0; + fb_r_sof1 = 0; + fb_r_sof2 = 0; + fb_r_size = 0; + fb_w_sof1 = 0; + fb_w_sof2 = 0; + fb_x_clip = 0; + fb_y_clip = 0; + fpu_param_cfg = 0; + isp_backgnd_t = 0; + spg_hblank_int = 0; + spg_vblank_int = 0; + spg_hblank = 0; + spg_load = 0; + spg_vblank = 0; + spg_width = 0; + vo_control = 0; + vo_startx = 0; + vo_starty = 0; + text_control = 0; + pal_ram_ctrl = 0; + ta_ol_base = 0; + ta_ol_limit = 0; + ta_isp_base = 0; + ta_isp_limit = 0; + ta_next_opb = 0; + ta_itp_current = 0; + ta_alloc_ctrl = 0; + ta_next_opb_init = 0; + ta_yuv_tex_base = 0; + ta_yuv_tex_ctrl = 0; + ta_yuv_tex_cnt = 0; + memset(fog_table, 0, sizeof(fog_table)); + memset(palette, 0, sizeof(palette)); + + save_item(NAME(softreset)); + save_item(NAME(param_base)); + save_item(NAME(region_base)); + save_item(NAME(vo_border_col)); + save_item(NAME(fb_r_ctrl)); + save_item(NAME(fb_w_ctrl)); + save_item(NAME(fb_w_linestride)); + save_item(NAME(fb_r_sof1)); + save_item(NAME(fb_r_sof2)); + save_item(NAME(fb_r_size)); + save_item(NAME(fb_w_sof1)); + save_item(NAME(fb_w_sof2)); + save_item(NAME(fb_x_clip)); + save_item(NAME(fb_y_clip)); + save_item(NAME(fpu_param_cfg)); + save_item(NAME(isp_backgnd_t)); + save_item(NAME(spg_hblank_int)); + save_item(NAME(spg_vblank_int)); + save_item(NAME(spg_hblank)); + save_item(NAME(spg_load)); + save_item(NAME(spg_vblank)); + save_item(NAME(spg_width)); + save_item(NAME(vo_control)); + save_item(NAME(vo_startx)); + save_item(NAME(vo_starty)); + save_item(NAME(text_control)); + save_item(NAME(pal_ram_ctrl)); + save_item(NAME(ta_ol_base)); + save_item(NAME(ta_ol_limit)); + save_item(NAME(ta_isp_base)); + save_item(NAME(ta_isp_limit)); + save_item(NAME(ta_next_opb)); + save_item(NAME(ta_itp_current)); + save_item(NAME(ta_alloc_ctrl)); + save_item(NAME(ta_next_opb_init)); + save_item(NAME(ta_yuv_tex_base)); + save_item(NAME(ta_yuv_tex_ctrl)); + save_item(NAME(ta_yuv_tex_cnt)); + save_pointer(NAME(fog_table), 0x80); + save_pointer(NAME(palette), 0x400); + save_item(NAME(m_pvr_dma.pvr_addr)); save_item(NAME(m_pvr_dma.sys_addr)); save_item(NAME(m_pvr_dma.size)); @@ -2656,7 +3028,6 @@ void powervr2_device::device_start() save_item(NAME(m_pvr_dma.dir)); save_item(NAME(m_pvr_dma.flag)); save_item(NAME(m_pvr_dma.start)); - save_pointer(NAME(pvrta_regs),0x2000/4); save_pointer(NAME(pvrctrl_regs),0x100/4); save_item(NAME(debug_dip_status)); save_pointer(NAME(tafifo_buff),32); @@ -2666,19 +3037,15 @@ void powervr2_device::device_start() void powervr2_device::device_reset() { - pvrta_regs[VO_CONTROL]= 0x00000108; - pvrta_regs[SOFTRESET]= 0x00000007; - pvrta_regs[VO_STARTX]= 0x0000009d; - pvrta_regs[VO_STARTY]= 0x00150015; - pvrta_regs[SPG_HBLANK]= 0x007e0345; - pvrta_regs[SPG_LOAD]= 0x01060359; - pvrta_regs[SPG_VBLANK]= 0x01500104; - pvrta_regs[SPG_HBLANK_INT]= 0x031d0000; - pvrta_regs[SPG_VBLANK_INT]= 0x01500104; - - // if the next 2 registers do not have the correct values, the naomi bios will hang - pvrta_regs[PVRID]=0x17fd11db; - pvrta_regs[REVISION]=0x11; + softreset = 0x00000007; + vo_control = 0x00000108; + vo_startx = 0x0000009d; + vo_starty = 0x00150015; + spg_hblank = 0x007e0345; + spg_load = 0x01060359; + spg_vblank = 0x01500104; + spg_hblank_int = 0x031d0000; + spg_vblank_int = 0x01500104; tafifo_pos=0; tafifo_mask=7; @@ -2688,9 +3055,9 @@ void powervr2_device::device_reset() renderselect= -1; grabsel=0; - vbout_timer->adjust(machine().primary_screen->time_until_pos(spg_vblank_out_irq_line_num_new)); - vbin_timer->adjust(machine().primary_screen->time_until_pos(spg_vblank_in_irq_line_num_new)); - hbin_timer->adjust(machine().primary_screen->time_until_pos(0, spg_hblank_in_irq_new-1)); + vbout_timer->adjust(machine().primary_screen->time_until_pos((spg_vblank_int >> 16) & 0x3ff)); + vbin_timer->adjust(machine().primary_screen->time_until_pos(spg_vblank_int & 0x3ff)); + hbin_timer->adjust(machine().primary_screen->time_until_pos(0, ((spg_hblank_int >> 16) & 0x3ff)-1)); scanline = 0; next_y = 0; diff --git a/src/mame/video/powervr2.h b/src/mame/video/powervr2.h index e6d001c62aa..a2b022f6746 100644 --- a/src/mame/video/powervr2.h +++ b/src/mame/video/powervr2.h @@ -25,6 +25,8 @@ public: DMA_PVR_IRQ }; + DECLARE_ADDRESS_MAP(ta_map, 32); + struct { UINT32 pvr_addr; UINT32 sys_addr; @@ -112,7 +114,7 @@ public: UINT64 *pvr2_framebuffer_ram; UINT64 *elan_ram; - UINT32 pvrta_regs[0x2000/4]; + UINT32 pvrctrl_regs[0x100/4]; UINT32 debug_dip_status; emu_timer *vbout_timer; @@ -128,15 +130,106 @@ public: powervr2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); template void set_irq_cb(_cb cb) { irq_cb.set_callback(cb); } - DECLARE_READ32_MEMBER( pvr_ctrl_r ); + DECLARE_READ32_MEMBER( id_r ); + DECLARE_READ32_MEMBER( revision_r ); + DECLARE_READ32_MEMBER( softreset_r ); + DECLARE_WRITE32_MEMBER( softreset_w ); + DECLARE_WRITE32_MEMBER( startrender_w ); + DECLARE_READ32_MEMBER( param_base_r ); + DECLARE_WRITE32_MEMBER( param_base_w ); + DECLARE_READ32_MEMBER( region_base_r ); + DECLARE_WRITE32_MEMBER( region_base_w ); + DECLARE_READ32_MEMBER( vo_border_col_r ); + DECLARE_WRITE32_MEMBER( vo_border_col_w ); + DECLARE_READ32_MEMBER( fb_r_ctrl_r ); + DECLARE_WRITE32_MEMBER( fb_r_ctrl_w ); + DECLARE_READ32_MEMBER( fb_w_ctrl_r ); + DECLARE_WRITE32_MEMBER( fb_w_ctrl_w ); + DECLARE_READ32_MEMBER( fb_w_linestride_r ); + DECLARE_WRITE32_MEMBER( fb_w_linestride_w ); + DECLARE_READ32_MEMBER( fb_r_sof1_r ); + DECLARE_WRITE32_MEMBER( fb_r_sof1_w ); + DECLARE_READ32_MEMBER( fb_r_sof2_r ); + DECLARE_WRITE32_MEMBER( fb_r_sof2_w ); + DECLARE_READ32_MEMBER( fb_r_size_r ); + DECLARE_WRITE32_MEMBER( fb_r_size_w ); + DECLARE_READ32_MEMBER( fb_w_sof1_r ); + DECLARE_WRITE32_MEMBER( fb_w_sof1_w ); + DECLARE_READ32_MEMBER( fb_w_sof2_r ); + DECLARE_WRITE32_MEMBER( fb_w_sof2_w ); + DECLARE_READ32_MEMBER( fb_x_clip_r ); + DECLARE_WRITE32_MEMBER( fb_x_clip_w ); + DECLARE_READ32_MEMBER( fb_y_clip_r ); + DECLARE_WRITE32_MEMBER( fb_y_clip_w ); + DECLARE_READ32_MEMBER( fpu_param_cfg_r ); + DECLARE_WRITE32_MEMBER( fpu_param_cfg_w ); + DECLARE_READ32_MEMBER( isp_backgnd_t_r ); + DECLARE_WRITE32_MEMBER( isp_backgnd_t_w ); + DECLARE_READ32_MEMBER( spg_hblank_int_r ); + DECLARE_WRITE32_MEMBER( spg_hblank_int_w ); + DECLARE_READ32_MEMBER( spg_vblank_int_r ); + DECLARE_WRITE32_MEMBER( spg_vblank_int_w ); + DECLARE_READ32_MEMBER( spg_hblank_r ); + DECLARE_WRITE32_MEMBER( spg_hblank_w ); + DECLARE_READ32_MEMBER( spg_load_r ); + DECLARE_WRITE32_MEMBER( spg_load_w ); + DECLARE_READ32_MEMBER( spg_vblank_r ); + DECLARE_WRITE32_MEMBER( spg_vblank_w ); + DECLARE_READ32_MEMBER( spg_width_r ); + DECLARE_WRITE32_MEMBER( spg_width_w ); + DECLARE_READ32_MEMBER( text_control_r ); + DECLARE_WRITE32_MEMBER( text_control_w ); + DECLARE_READ32_MEMBER( vo_control_r ); + DECLARE_WRITE32_MEMBER( vo_control_w ); + DECLARE_READ32_MEMBER( vo_startx_r ); + DECLARE_WRITE32_MEMBER( vo_startx_w ); + DECLARE_READ32_MEMBER( vo_starty_r ); + DECLARE_WRITE32_MEMBER( vo_starty_w ); + DECLARE_READ32_MEMBER( pal_ram_ctrl_r ); + DECLARE_WRITE32_MEMBER( pal_ram_ctrl_w ); + DECLARE_READ32_MEMBER( spg_status_r ); + + DECLARE_READ32_MEMBER( ta_ol_base_r ); + DECLARE_WRITE32_MEMBER( ta_ol_base_w ); + DECLARE_READ32_MEMBER( ta_isp_base_r ); + DECLARE_WRITE32_MEMBER( ta_isp_base_w ); + DECLARE_READ32_MEMBER( ta_ol_limit_r ); + DECLARE_WRITE32_MEMBER( ta_ol_limit_w ); + DECLARE_READ32_MEMBER( ta_isp_limit_r ); + DECLARE_WRITE32_MEMBER( ta_isp_limit_w ); + DECLARE_READ32_MEMBER( ta_next_opb_r ); + DECLARE_READ32_MEMBER( ta_itp_current_r ); + DECLARE_READ32_MEMBER( ta_alloc_ctrl_r ); + DECLARE_WRITE32_MEMBER( ta_alloc_ctrl_w ); + DECLARE_READ32_MEMBER( ta_list_init_r ); + DECLARE_WRITE32_MEMBER( ta_list_init_w ); + DECLARE_READ32_MEMBER( ta_yuv_tex_base_r ); + DECLARE_WRITE32_MEMBER( ta_yuv_tex_base_w ); + DECLARE_READ32_MEMBER( ta_yuv_tex_ctrl_r ); + DECLARE_WRITE32_MEMBER( ta_yuv_tex_ctrl_w ); + DECLARE_READ32_MEMBER( ta_yuv_tex_cnt_r ); + DECLARE_WRITE32_MEMBER( ta_yuv_tex_cnt_w ); + DECLARE_READ32_MEMBER( ta_list_cont_r ); + DECLARE_WRITE32_MEMBER( ta_list_cont_w ); + DECLARE_READ32_MEMBER( ta_next_opb_init_r ); + DECLARE_WRITE32_MEMBER( ta_next_opb_init_w ); + + + DECLARE_READ32_MEMBER( fog_table_r ); + DECLARE_WRITE32_MEMBER( fog_table_w ); + DECLARE_READ32_MEMBER( palette_r ); + DECLARE_WRITE32_MEMBER( palette_w ); + + + DECLARE_READ32_MEMBER( pvr_ctrl_r ); DECLARE_WRITE32_MEMBER( pvr_ctrl_w ); - DECLARE_READ32_MEMBER( pvr_ta_r ); + DECLARE_READ32_MEMBER( pvr_ta_r ); DECLARE_WRITE32_MEMBER( pvr_ta_w ); - DECLARE_READ32_MEMBER( pvr2_ta_r ); + DECLARE_READ32_MEMBER( pvr2_ta_r ); DECLARE_WRITE32_MEMBER( pvr2_ta_w ); - DECLARE_READ32_MEMBER( pvrs_ta_r ); + DECLARE_READ32_MEMBER( pvrs_ta_r ); DECLARE_WRITE32_MEMBER( pvrs_ta_w ); - DECLARE_READ32_MEMBER( elan_regs_r ); + DECLARE_READ32_MEMBER( elan_regs_r ); DECLARE_WRITE32_MEMBER( elan_regs_w ); DECLARE_WRITE64_MEMBER( ta_fifo_poly_w ); DECLARE_WRITE64_MEMBER( ta_fifo_yuv_w ); @@ -166,6 +259,27 @@ protected: private: devcb2_write8 irq_cb; + // Core registers + UINT32 softreset; + UINT32 param_base, region_base; + UINT32 vo_border_col; + UINT32 fb_r_ctrl, fb_w_ctrl, fb_w_linestride, fb_r_sof1, fb_r_sof2, fb_r_size, fb_w_sof1, fb_w_sof2, fb_x_clip, fb_y_clip; + UINT32 fpu_param_cfg; + UINT32 isp_backgnd_t; + UINT32 spg_hblank_int, spg_vblank_int, spg_hblank, spg_load, spg_vblank, spg_width; + UINT32 vo_control, vo_startx, vo_starty; + UINT32 text_control; + UINT32 pal_ram_ctrl; + + // TA registers + UINT32 ta_ol_base, ta_ol_limit, ta_isp_base, ta_isp_limit; + UINT32 ta_next_opb, ta_itp_current, ta_alloc_ctrl, ta_next_opb_init; + UINT32 ta_yuv_tex_base, ta_yuv_tex_ctrl, ta_yuv_tex_cnt; + + // Other registers + UINT32 fog_table[0x80]; + UINT32 palette[0x400]; + static UINT32 (*const blend_functions[64])(UINT32 s, UINT32 d); static inline INT32 clamp(INT32 in, INT32 min, INT32 max); @@ -298,6 +412,7 @@ private: void pvr_build_parameterconfig(); void process_ta_fifo(); void debug_paletteram(); + void update_screen_format(); }; extern const device_type POWERVR2; diff --git a/src/mess/drivers/dccons.c b/src/mess/drivers/dccons.c index 2dcb3848227..81bc34b44ab 100644 --- a/src/mess/drivers/dccons.c +++ b/src/mess/drivers/dccons.c @@ -119,7 +119,7 @@ static ADDRESS_MAP_START( dc_map, AS_PROGRAM, 64, dc_cons_state ) AM_RANGE(0x005f7400, 0x005f74ff) AM_READWRITE(dc_mess_g1_ctrl_r, dc_mess_g1_ctrl_w ) AM_RANGE(0x005f7800, 0x005f78ff) AM_READWRITE(dc_g2_ctrl_r, dc_g2_ctrl_w ) AM_RANGE(0x005f7c00, 0x005f7cff) AM_DEVREADWRITE32("powervr2", powervr2_device, pvr_ctrl_r, pvr_ctrl_w, U64(0xffffffffffffffff)) - AM_RANGE(0x005f8000, 0x005f9fff) AM_DEVREADWRITE32("powervr2", powervr2_device, pvr_ta_r, pvr_ta_w, U64(0xffffffffffffffff)) + AM_RANGE(0x005f8000, 0x005f9fff) AM_DEVICE32("powervr2", powervr2_device, ta_map, U64(0xffffffffffffffff)) AM_RANGE(0x00600000, 0x006007ff) AM_READWRITE(dc_modem_r, dc_modem_w ) AM_RANGE(0x00700000, 0x00707fff) AM_READWRITE(dc_aica_reg_r, dc_aica_reg_w ) AM_RANGE(0x00710000, 0x0071000f) AM_READWRITE(dc_rtc_r, dc_rtc_w )