(MESS) concept: Hook up Apple II bus. [R. Belmont]

This commit is contained in:
R. Belmont 2014-09-22 03:11:46 +00:00
parent 4d8a28072c
commit 0086204726
4 changed files with 75 additions and 33 deletions

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@ -31,6 +31,8 @@
#include "emu.h"
#include "cpu/m68000/m68000.h"
#include "includes/concept.h"
#include "bus/a2bus/a2corvus.h"
#include "bus/rs232/rs232.h"
static ADDRESS_MAP_START(concept_memmap, AS_PROGRAM, 16, concept_state )
AM_RANGE(0x000000, 0x000007) AM_ROM AM_REGION("maincpu", 0x010000) /* boot ROM mirror */
@ -190,9 +192,8 @@ INPUT_PORTS_END
/* init with simple, fixed, B/W palette */
/* Is the palette black on white or white on black??? */
SLOT_INTERFACE_START( concept_exp_devices )
SLOT_INTERFACE("fdc", CONCEPT_FDC)
SLOT_INTERFACE("hdc", CONCEPT_HDC)
SLOT_INTERFACE_START( concept_a2_cards )
SLOT_INTERFACE("fchdd", A2BUS_CORVUS) /* Corvus flat-cable HDD interface (see notes in a2corvus.c) */
SLOT_INTERFACE_END
@ -238,17 +239,35 @@ static MACHINE_CONFIG_START( concept, concept_state )
/* ACIAs */
MCFG_DEVICE_ADD(ACIA_0_TAG, MOS6551, 0)
MCFG_MOS6551_XTAL(XTAL_1_8432MHz)
MCFG_MOS6551_TXD_HANDLER(DEVWRITELINE("rs232a", rs232_port_device, write_txd))
MCFG_DEVICE_ADD(ACIA_1_TAG, MOS6551, 0)
MCFG_MOS6551_XTAL(XTAL_1_8432MHz)
MCFG_MOS6551_TXD_HANDLER(DEVWRITELINE("rs232b", rs232_port_device, write_txd))
MCFG_DEVICE_ADD(KBD_ACIA_TAG, MOS6551, 0)
MCFG_MOS6551_XTAL(XTAL_1_8432MHz)
MCFG_CONCEPT_EXP_PORT_ADD("exp1", concept_exp_devices, NULL)
MCFG_CONCEPT_EXP_PORT_ADD("exp2", concept_exp_devices, "fdc") // Flat cable Hard Disk Controller in Slot 2
MCFG_CONCEPT_EXP_PORT_ADD("exp3", concept_exp_devices, "hdc") // Floppy Disk Controller in Slot 3
MCFG_CONCEPT_EXP_PORT_ADD("exp4", concept_exp_devices, NULL)
/* Apple II bus */
MCFG_DEVICE_ADD(A2BUS_TAG, A2BUS, 0)
MCFG_A2BUS_CPU("maincpu")
MCFG_A2BUS_SLOT_ADD(A2BUS_TAG, "sl1", concept_a2_cards, NULL)
MCFG_A2BUS_SLOT_ADD(A2BUS_TAG, "sl2", concept_a2_cards, NULL)
MCFG_A2BUS_SLOT_ADD(A2BUS_TAG, "sl3", concept_a2_cards, NULL)
MCFG_A2BUS_SLOT_ADD(A2BUS_TAG, "sl4", concept_a2_cards, "fchdd")
// 2x RS232 ports!
/* 2x RS232 ports */
MCFG_RS232_PORT_ADD("rs232a", default_rs232_devices, NULL)
MCFG_RS232_RXD_HANDLER(DEVWRITELINE(ACIA_0_TAG, mos6551_device, write_rxd))
MCFG_RS232_DCD_HANDLER(DEVWRITELINE(ACIA_0_TAG, mos6551_device, write_dcd))
MCFG_RS232_DSR_HANDLER(DEVWRITELINE(ACIA_0_TAG, mos6551_device, write_dsr))
MCFG_RS232_CTS_HANDLER(DEVWRITELINE(ACIA_0_TAG, mos6551_device, write_cts))
MCFG_RS232_PORT_ADD("rs232b", default_rs232_devices, NULL)
MCFG_RS232_RXD_HANDLER(DEVWRITELINE(ACIA_1_TAG, mos6551_device, write_rxd))
MCFG_RS232_DCD_HANDLER(DEVWRITELINE(ACIA_1_TAG, mos6551_device, write_dcd))
MCFG_RS232_DSR_HANDLER(DEVWRITELINE(ACIA_1_TAG, mos6551_device, write_dsr))
MCFG_RS232_CTS_HANDLER(DEVWRITELINE(ACIA_1_TAG, mos6551_device, write_cts))
MACHINE_CONFIG_END

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@ -11,24 +11,18 @@
#ifndef CONCEPT_H_
#define CONCEPT_H_
#include "cpu/m68000/m68000.h"
#include "machine/6522via.h"
#include "machine/mos6551.h"
#include "machine/mm58274c.h" /* mm58274 seems to be compatible with mm58174 */
#include "machine/concept_exp.h"
#include "sound/speaker.h"
#include "bus/a2bus/a2bus.h"
#define ACIA_0_TAG "acia0"
#define ACIA_1_TAG "acia1"
#define KBD_ACIA_TAG "kbacia"
#define SPEAKER_TAG "spkr"
/* keyboard interface */
enum
{
KeyQueueSize = 32,
MaxKeyMessageLen = 1
};
#define A2BUS_TAG "a2bus"
class concept_state : public driver_device
{
@ -41,6 +35,7 @@ public:
m_kbdacia(*this, KBD_ACIA_TAG),
m_speaker(*this, SPEAKER_TAG),
m_mm58274(*this,"mm58274c"),
m_a2bus(*this, A2BUS_TAG),
m_videoram(*this,"videoram") { }
required_device<cpu_device> m_maincpu;
@ -49,10 +44,9 @@ public:
required_device<mos6551_device> m_kbdacia;
required_device<speaker_sound_device> m_speaker;
required_device<mm58274c_device> m_mm58274;
required_device<a2bus_device> m_a2bus;
required_shared_ptr<UINT16> m_videoram;
concept_exp_port_device *m_exp[4];
UINT8 m_pending_interrupts;
bool m_clock_enable;
UINT8 m_clock_address;

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@ -6,7 +6,6 @@
#include "emu.h"
#include "includes/concept.h"
#include "cpu/m68000/m68000.h"
#define VERBOSE 1
@ -43,11 +42,6 @@ void concept_state::machine_start()
/* initialize clock interface */
m_clock_enable = FALSE /*TRUE*/;
m_exp[0] = machine().device<concept_exp_port_device>("exp1");
m_exp[1] = machine().device<concept_exp_port_device>("exp2");
m_exp[2] = machine().device<concept_exp_port_device>("exp3");
m_exp[3] = machine().device<concept_exp_port_device>("exp4");
save_item(NAME(m_pending_interrupts));
save_item(NAME(m_clock_enable));
save_item(NAME(m_clock_address));
@ -178,11 +172,22 @@ READ16_MEMBER(concept_state::concept_io_r)
case 2: // IO2 registers
case 3: // IO3 registers
case 4: // IO4 registers
return m_exp[((offset >> 4) & 7) - 1]->reg_r(space, offset & 0x0f);
{
int slot = ((offset >> 4) & 7);
device_a2bus_card_interface *card = m_a2bus->get_a2bus_card(slot);
if (card)
{
return card->read_c0nx(space, offset & 0x0f);
}
return 0xff;
}
break;
default: // ???
logerror("concept_io_r: Slot I/O memory accessed for unknown purpose at address 0x03%4.4x\n", offset << 1);
break;
break;
}
break;
@ -190,8 +195,16 @@ READ16_MEMBER(concept_state::concept_io_r)
case 2: // IO2 ROM
case 3: // IO3 ROM
case 4: // IO4 ROM
LOG(("concept_io_r: Slot ROM memory accessed for slot %d at address 0x03%4.4x\n", ((offset >> 8) & 7) - 1, offset << 1));
return m_exp[((offset >> 8) & 7) - 1]->rom_r(space, offset & 0xff);
{
int slot = (offset >> 8) & 7;
device_a2bus_card_interface *card = m_a2bus->get_a2bus_card(slot);
if (card)
{
return card->read_cnxx(space, offset & 0xff);
}
}
break;
case 5:
/* slot status */
@ -273,7 +286,16 @@ WRITE16_MEMBER(concept_state::concept_io_w)
case 2: // IO2 registers
case 3: // IO3 registers
case 4: // IO4 registers
return m_exp[((offset >> 4) & 7) - 1]->reg_w(space, offset & 0x0f, data);
{
int slot = (offset >> 4) & 7;
device_a2bus_card_interface *card = m_a2bus->get_a2bus_card(slot);
if (card)
{
return card->write_c0nx(space, offset & 0x0f, data);
}
}
break;
default: // ???
logerror("concept_io_w: Slot I/O memory written for unknown purpose at address 0x03%4.4x, data: 0x%4.4x\n", offset << 1, data);
@ -285,8 +307,16 @@ WRITE16_MEMBER(concept_state::concept_io_w)
case 2: // IO2 ROM
case 3: // IO3 ROM
case 4: // IO4 ROM
LOG(("concept_io_w: Slot ROM memory written to for slot %d at address 0x03%4.4x, data: 0x%4.4x\n", ((offset >> 8) & 7) - 1, offset << 1, data));
return m_exp[((offset >> 8) & 7) - 1]->rom_w(space, offset & 0xff, data);
{
int slot = (offset >> 8) & 7;
device_a2bus_card_interface *card = m_a2bus->get_a2bus_card(slot);
if (card)
{
return card->write_cnxx(space, offset & 0xff, data);
}
}
break;
case 5:
/* slot status */

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@ -1155,7 +1155,6 @@ $(MESSOBJ)/comx.a: \
$(MESSOBJ)/concept.a: \
$(MESS_DRIVERS)/concept.o \
$(MESS_MACHINE)/concept.o \
$(MESS_MACHINE)/concept_exp.o \
$(MESSOBJ)/conitec.a: \
$(MESS_DRIVERS)/prof80.o \