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https://github.com/holub/mame
synced 2025-07-01 16:19:38 +03:00
special.cpp a bit less hacky banking (nw)
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c0ad2afea4
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@ -21,8 +21,8 @@
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/* Address maps */
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/* Address maps */
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void special_state::specialist_mem(address_map &map)
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void special_state::specialist_mem(address_map &map)
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{
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{
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map(0x0000, 0x2fff).bankrw("bank1"); // First bank
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map(0x0000, 0x3fff).bankrw("bank1"); // First bank, hacky, upon reset c000-ffff area should be mirrored at 0000, 4000 and 8000
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map(0x3000, 0x8fff).ram(); // RAM
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map(0x4000, 0x8fff).ram(); // RAM
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map(0x9000, 0xbfff).ram().share("videoram"); // Video RAM
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map(0x9000, 0xbfff).ram().share("videoram"); // Video RAM
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map(0xc000, 0xefff).rom(); // System ROM
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map(0xc000, 0xefff).rom(); // System ROM
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map(0xf800, 0xf803).mirror(0x7fc).rw(m_ppi, FUNC(i8255_device::read), FUNC(i8255_device::write));
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map(0xf800, 0xf803).mirror(0x7fc).rw(m_ppi, FUNC(i8255_device::read), FUNC(i8255_device::write));
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@ -30,8 +30,8 @@ void special_state::specialist_mem(address_map &map)
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void special_state::specialp_mem(address_map &map)
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void special_state::specialp_mem(address_map &map)
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{
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{
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map(0x0000, 0x2fff).bankrw("bank1"); // First bank
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map(0x0000, 0x3fff).bankrw("bank1"); // First bank
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map(0x3000, 0x7fff).ram(); // RAM
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map(0x4000, 0x7fff).ram(); // RAM
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map(0x8000, 0xbfff).ram().share("videoram"); // Video RAM
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map(0x8000, 0xbfff).ram().share("videoram"); // Video RAM
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map(0xc000, 0xefff).rom(); // System ROM
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map(0xc000, 0xefff).rom(); // System ROM
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map(0xf800, 0xf803).mirror(0x7fc).rw(m_ppi, FUNC(i8255_device::read), FUNC(i8255_device::write));
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map(0xf800, 0xf803).mirror(0x7fc).rw(m_ppi, FUNC(i8255_device::read), FUNC(i8255_device::write));
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@ -370,8 +370,6 @@ void special_state::special(machine_config &config)
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I8080(config, m_maincpu, 2000000);
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I8080(config, m_maincpu, 2000000);
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m_maincpu->set_addrmap(AS_PROGRAM, &special_state::specialist_mem);
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m_maincpu->set_addrmap(AS_PROGRAM, &special_state::specialist_mem);
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MCFG_MACHINE_RESET_OVERRIDE(special_state, special )
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/* video hardware */
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/* video hardware */
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
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screen.set_refresh_hz(50);
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screen.set_refresh_hz(50);
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@ -463,7 +461,7 @@ void special_state::specimx(machine_config &config)
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m_ppi->in_pb_callback().set(FUNC(special_state::specimx_8255_portb_r));
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m_ppi->in_pb_callback().set(FUNC(special_state::specimx_8255_portb_r));
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m_ppi->out_pb_callback().set(FUNC(special_state::specialist_8255_portb_w));
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m_ppi->out_pb_callback().set(FUNC(special_state::specialist_8255_portb_w));
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m_ppi->in_pc_callback().set(FUNC(special_state::specialist_8255_portc_r));
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m_ppi->in_pc_callback().set(FUNC(special_state::specialist_8255_portc_r));
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m_ppi->out_pc_callback().set(FUNC(special_state::specialist_8255_portc_w));
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m_ppi->out_pc_callback().set(FUNC(special_state::specialistmx_8255_portc_w));
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FD1793(config, m_fdc, 8_MHz_XTAL / 8);
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FD1793(config, m_fdc, 8_MHz_XTAL / 8);
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m_fdc->drq_wr_callback().set(FUNC(special_state::fdc_drq));
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m_fdc->drq_wr_callback().set(FUNC(special_state::fdc_drq));
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@ -514,7 +512,7 @@ void special_state::erik(machine_config &config)
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m_ppi->in_pb_callback().set(FUNC(special_state::specialist_8255_portb_r));
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m_ppi->in_pb_callback().set(FUNC(special_state::specialist_8255_portb_r));
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m_ppi->out_pb_callback().set(FUNC(special_state::specialist_8255_portb_w));
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m_ppi->out_pb_callback().set(FUNC(special_state::specialist_8255_portb_w));
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m_ppi->in_pc_callback().set(FUNC(special_state::specialist_8255_portc_r));
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m_ppi->in_pc_callback().set(FUNC(special_state::specialist_8255_portc_r));
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m_ppi->out_pc_callback().set(FUNC(special_state::specialist_8255_portc_w));
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m_ppi->out_pc_callback().set(FUNC(special_state::specialistmx_8255_portc_w));
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FD1793(config, m_fdc, 8_MHz_XTAL / 8);
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FD1793(config, m_fdc, 8_MHz_XTAL / 8);
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m_fdc->drq_wr_callback().set(FUNC(special_state::fdc_drq));
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m_fdc->drq_wr_callback().set(FUNC(special_state::fdc_drq));
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@ -66,7 +66,6 @@ protected:
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private:
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private:
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enum
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enum
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{
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{
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TIMER_RESET,
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TIMER_PIT8253_GATES
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TIMER_PIT8253_GATES
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};
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};
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@ -89,8 +88,8 @@ private:
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void specialist_8255_porta_w(uint8_t data);
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void specialist_8255_porta_w(uint8_t data);
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void specialist_8255_portb_w(uint8_t data);
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void specialist_8255_portb_w(uint8_t data);
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void specialist_8255_portc_w(uint8_t data);
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void specialist_8255_portc_w(uint8_t data);
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void specialistmx_8255_portc_w(uint8_t data);
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DECLARE_MACHINE_RESET(special);
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DECLARE_MACHINE_RESET(erik);
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DECLARE_MACHINE_RESET(erik);
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void erik_palette(palette_device &palette) const;
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void erik_palette(palette_device &palette) const;
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DECLARE_MACHINE_START(specimx);
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DECLARE_MACHINE_START(specimx);
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@ -20,7 +20,7 @@ void special_state::init_special()
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{
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{
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/* set initialy ROM to be visible on first bank */
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/* set initialy ROM to be visible on first bank */
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uint8_t *RAM = m_region_maincpu->base();
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uint8_t *RAM = m_region_maincpu->base();
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memset(RAM,0x0000,0x3000); // make first page empty by default
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memset(RAM,0x0000,0x4000); // make first page empty by default
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m_bank1->configure_entries(1, 2, RAM, 0x0000);
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m_bank1->configure_entries(1, 2, RAM, 0x0000);
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m_bank1->configure_entries(0, 2, RAM, 0xc000);
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m_bank1->configure_entries(0, 2, RAM, 0xc000);
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}
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}
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@ -109,15 +109,23 @@ void special_state::specialist_8255_portc_w(uint8_t data)
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m_cassette->output(BIT(data, 7) ? 1 : -1);
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m_cassette->output(BIT(data, 7) ? 1 : -1);
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m_dac->write(BIT(data, 5)); //beeper
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m_dac->write(BIT(data, 5)); //beeper
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m_bank1->set_entry(BIT(data, 4));
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}
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void special_state::specialistmx_8255_portc_w(uint8_t data)
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{
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m_specialist_8255_portc = data;
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m_cassette->output(BIT(data, 7) ? 1 : -1);
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m_dac->write(BIT(data, 5)); //beeper
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}
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}
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void special_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
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void special_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
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{
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{
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switch (id)
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switch (id)
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{
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{
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case TIMER_RESET:
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m_bank1->set_entry(0);
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break;
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case TIMER_PIT8253_GATES:
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case TIMER_PIT8253_GATES:
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m_pit->write_gate0(0);
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m_pit->write_gate0(0);
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m_pit->write_gate1(0);
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m_pit->write_gate1(0);
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@ -129,13 +137,6 @@ void special_state::device_timer(emu_timer &timer, device_timer_id id, int param
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}
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}
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MACHINE_RESET_MEMBER(special_state,special)
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{
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timer_set(attotime::from_usec(10), TIMER_RESET);
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m_bank1->set_entry(1);
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}
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/*
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/*
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Specialist MX
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Specialist MX
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*/
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*/
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