bus/nes: Simplifications using bit utility functions. (#9444)
* bus/nes: Simplifications using bit utility functions. * Corrected UNL-KOF97 board's address decoding. * Cleaned up Gouder board further and added missing mirroring bit. Fixes BG graphics.
This commit is contained in:
0kmg
GitHub
parent
d31fe10f92
commit
00dedfabc9
@ -155,7 +155,7 @@ void nes_action53_device::write_l(offs_t offset, u8 data)
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LOG_MMC(("action 53 write_l, offset: %04x, data: %02x\n", offset, data));
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offset += 0x100;
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if (offset >= 0x1000)
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m_sel = BIT(data, 0) | (BIT(data, 7) << 1);
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m_sel = bitswap<2>(data, 7, 0);
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}
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@ -237,7 +237,7 @@ void nes_batmap_srrx_device::write_h(offs_t offset, u8 data)
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set_irq_line(CLEAR_LINE);
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break;
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case 0x4000:
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m_dpcm_addr = (m_dpcm_addr << 1 | data >> 7);
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m_dpcm_addr = m_dpcm_addr << 1 | data >> 7;
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break;
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case 0x5000:
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m_dpcm_ctrl = data;
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@ -967,7 +967,7 @@ void nes_btl_cj_device::write_h(offs_t offset, u8 data)
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}
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else
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{
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offset = (offset >> 13) & 0x03;
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offset = BIT(offset, 13, 2);
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if (offset != 3)
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prg8_x(offset, data & 0x0f);
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}
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@ -1335,7 +1335,7 @@ void nes_n32_4in1_device::write_h(offs_t offset, u8 data)
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prg8_ef(3);
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}
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chr8((data >> 1) & 0x03, CHRROM);
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chr8(BIT(data, 1, 2), CHRROM);
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set_nt_mirroring(BIT(data, 2) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
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}
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}
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@ -1482,7 +1482,7 @@ void nes_l001_device::write_h(offs_t offset, u8 data)
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{
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case 0x0000:
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case 0x2000:
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chr1_x((offset >> 11) & 0x07, data, CHRROM);
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chr1_x(BIT(offset, 11, 3), data, CHRROM);
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break;
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case 0x0400:
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m_irq_count = (m_irq_count & 0xff00) | data;
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@ -1492,11 +1492,11 @@ void nes_l001_device::write_h(offs_t offset, u8 data)
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set_irq_line(CLEAR_LINE);
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break;
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case 0x4000:
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set_nt_page((offset >> 11) & 0x03, CIRAM, data & 1, 1);
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set_nt_page(BIT(offset, 11, 2), CIRAM, data & 1, 1);
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break;
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case 0x6000:
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if (offset < 0x7800)
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prg8_x((offset >> 11) & 0x03, data & 0x1f);
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prg8_x(BIT(offset, 11, 2), data & 0x1f);
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break;
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}
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}
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@ -1613,7 +1613,7 @@ void nes_palthena_device::write_m(offs_t offset, u8 data)
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u8 nes_palthena_device::read_h(offs_t offset)
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{
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// LOG_MMC(("palthena read_h, offset: %04x\n", offset));
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u8 page = (offset >> 8);
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u8 page = offset >> 8;
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if ((page >= 0x40 && page < 0x52) || page == 0x5f)
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return m_prgram[offset & 0x1fff];
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else if (page == 0x02)
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@ -1625,7 +1625,7 @@ u8 nes_palthena_device::read_h(offs_t offset)
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void nes_palthena_device::write_h(offs_t offset, u8 data)
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{
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LOG_MMC(("palthena write_h, offset: %04x, data: %02x\n", offset, data));
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u8 page = (offset >> 8);
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u8 page = offset >> 8;
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if ((page >= 0x40 && page < 0x52) || page == 0x5f)
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m_prgram[offset & 0x1fff] = data;
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else if (page == 0x02)
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@ -2048,7 +2048,7 @@ void nes_ac08_device::write_h(offs_t offset, uint8_t data)
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LOG_MMC(("AC-08 write_h, offset: %04x, data: %02x\n", offset, data));
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if (offset == 1)
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m_latch = (data >> 1) & 0x0f;
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m_latch = BIT(data, 1, 4);
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else
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m_latch = data & 0x0f; // apparently there also is a Castlevania FDS conversion using same board with different banking lines
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}
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@ -2148,7 +2148,7 @@ void nes_yung08_device::write_45(offs_t offset, u8 data)
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switch (offset & 0x51ff)
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{
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case 0x4022:
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prg8_cd(data & 1 ? 3 : 4 + ((data & 0x07) >> 1));
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prg8_cd(data & 1 ? 3 : 4 + BIT(data, 1, 2));
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break;
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case 0x4122:
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m_irq_latch = data & 0x35;
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@ -180,7 +180,7 @@ void nes_bf9096_device::write_h(offs_t offset, uint8_t data)
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if (offset < 0x4000)
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{
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m_bank_base = ((data >> 3) & 3) << 2;
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m_bank_base = (data & 0x18) >> 1;
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prg16_89ab(m_bank_base | m_latch);
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prg16_cdef(m_bank_base | 3);
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}
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@ -156,7 +156,7 @@ void nes_74x139x74_device::write_m(offs_t offset, uint8_t data)
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{
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LOG_MMC(("74x139x74 write_m, offset: %04x, data: %02x\n", offset, data));
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chr8(((data & 0x02) >> 1) | ((data & 0x01) << 1), CHRROM);
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chr8(bitswap<2>(data, 0, 1), CHRROM);
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}
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/*-------------------------------------------------
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@ -174,7 +174,7 @@ void nes_lrog017_device::write_h(offs_t offset, uint8_t data)
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data = account_bus_conflict(offset, data);
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prg32(data);
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chr2_0((data >> 4), CHRROM);
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chr2_0(data >> 4, CHRROM);
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}
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/*-------------------------------------------------
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@ -280,8 +280,8 @@ void nes_jf13_device::write_m(offs_t offset, uint8_t data)
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if (offset < 0x1000)
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{
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prg32((data >> 4) & 0x03);
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chr8(((data >> 4) & 0x04) | (data & 0x03), CHRROM);
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prg32(BIT(data, 4, 2));
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chr8(bitswap<3>(data, 6, 1, 0), CHRROM);
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}
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else
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{
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@ -681,12 +681,15 @@ void nes_ks7017_device::write_l(offs_t offset, uint8_t data)
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LOG_MMC(("ks7017 write_l, offset: %04x, data: %02x\n", offset, data));
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offset += 0x100;
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if (offset >= 0xa00 && offset < 0xb00)
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m_latch = ((offset >> 2) & 0x03) | ((offset >> 4) & 0x04);
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if (offset >= 0x1100 && offset < 0x1200)
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prg16_89ab(m_latch);
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switch (offset & 0x1f00)
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{
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case 0x0a00:
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m_latch = bitswap<3>(offset, 6, 3, 2);
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break;
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case 0x1100:
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prg16_89ab(m_latch);
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break;
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}
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}
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void nes_ks7017_device::write_ex(offs_t offset, uint8_t data)
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@ -746,7 +749,7 @@ void nes_ks7021a_device::write_h(offs_t offset, u8 data)
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switch (offset & 0x7000)
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{
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case 0x0000:
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prg16_89ab((data >> 1) & 0x07);
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prg16_89ab(BIT(data, 1, 3));
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break;
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case 0x1000:
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set_nt_mirroring(BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
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@ -778,7 +781,7 @@ void nes_ks7021a_device::write_h(offs_t offset, u8 data)
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u8 nes_ks7010_device::read_m(offs_t offset)
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{
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// LOG_MMC(("ks7010 read_m, offset: %04x, data: %02x\n", offset, data));
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return m_prg[m_latch * 0x2000 + offset];
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return m_prg[(m_latch * 0x2000 + offset) & (m_prg_size - 1)];
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}
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u8 nes_ks7010_device::read_h(offs_t offset)
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@ -786,7 +789,7 @@ u8 nes_ks7010_device::read_h(offs_t offset)
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// LOG_MMC(("ks7010 read_h, offset: %04x, data: %02x\n", offset, data));
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if ((offset >= 0x4ab6 && offset <= 0x4ad6) || offset == 0x6be2 || offset == 0x6be3 || offset == 0x6e32 || offset == 0x7ffc) // HACK! FIXME
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{
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m_latch = (offset >> 2) & 0x0f;
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m_latch = BIT(offset, 2, 4);
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chr8(m_latch, CHRROM);
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}
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@ -932,20 +935,20 @@ void nes_ks7030_device::write_h(offs_t offset, u8 data)
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uint8_t nes_ks7031_device::read_m(offs_t offset)
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{
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// LOG_MMC(("ks7031 read_m, offset: %04x\n", offset));
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return m_prg[(m_reg[(offset >> 11) & 3] * 0x0800) + (offset & 0x7ff)];
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return m_prg[(m_reg[BIT(offset, 11, 2)] * 0x0800) + (offset & 0x7ff)];
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}
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uint8_t nes_ks7031_device::read_h(offs_t offset)
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{
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// here the first 32K are accessed, but in 16x2K blocks loaded in reverse order
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int accessed_2k = (offset >> 11) & 0x0f;
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int accessed_2k = BIT(offset, 11, 4);
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return m_prg[((0x0f - accessed_2k) * 0x0800) + (offset & 0x7ff)];
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}
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void nes_ks7031_device::write_h(offs_t offset, uint8_t data)
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{
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LOG_MMC(("ks7031 write_h, offset: %04x, data: %02x\n", offset, data));
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m_reg[(offset >> 11) & 3] = data & 0x3f;
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m_reg[BIT(offset, 11, 2)] = data & 0x3f;
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}
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/*-------------------------------------------------
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@ -1045,14 +1048,14 @@ void nes_ks7037_device::write_h(offs_t offset, uint8_t data)
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u8 nes_ks7057_device::read_m(offs_t offset)
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{
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// LOG_MMC(("ks7057 read_m, offset: %04x\n", offset));
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return m_prg[0x800 * m_reg[((offset >> 11) & 0x03) + 4] + (offset & 0x7ff)];
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return m_prg[0x800 * m_reg[BIT(offset, 11, 2) + 4] + (offset & 0x7ff)];
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}
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u8 nes_ks7057_device::read_h(offs_t offset)
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{
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// LOG_MMC(("ks7057 read_h, offset: %04x\n", offset));
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if (offset < 0x2000)
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return m_prg[0x800 * m_reg[(offset >> 11) & 0x03] + (offset & 0x7ff)];
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return m_prg[0x800 * m_reg[BIT(offset, 11, 2)] + (offset & 0x7ff)];
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return hi_access_rom(offset);
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}
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@ -1065,7 +1068,7 @@ void nes_ks7057_device::write_h(offs_t offset, u8 data)
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set_nt_mirroring(BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
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else if (offset >= 0x3000 && offset < 0x6004)
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{
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u8 reg = (((offset >> 11) & 0x0e) | BIT(offset, 1)) - 6;
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u8 reg = bitswap<4>(offset, 14, 13, 12, 1) - 6;
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if (BIT(offset, 0))
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m_reg[reg] = (m_reg[reg] & 0x0f) | ((data & 0x03) << 4);
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else
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@ -120,7 +120,7 @@ void nes_sxrom_device::set_prg(int prg_base, int prg_mask)
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{
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u8 bank = prg_base | (m_reg[3] & prg_mask);
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switch ((m_reg[0] >> 2) & 3)
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switch (BIT(m_reg[0], 2, 2))
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{
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case 0:
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case 1:
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@ -235,7 +235,6 @@ void nes_sxrom_device::write_h(offs_t offset, uint8_t data)
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if (data & 0x80)
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{
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m_count = 0;
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m_latch = 0;
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// Set reg at 0x8000 to size 16k and lower half swap - needed for Robocop 3, Dynowars
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m_reg[0] |= 0x0c;
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@ -243,25 +242,21 @@ void nes_sxrom_device::write_h(offs_t offset, uint8_t data)
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return;
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}
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if (m_count < 5)
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{
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if (m_count == 0) m_latch = 0;
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m_latch >>= 1;
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m_latch |= (data & 0x01) ? 0x10 : 0x00;
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m_count++;
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}
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m_latch >>= 1;
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m_latch |= (data & 1) << 4;
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m_count = (m_count + 1) % 5;
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if (m_count == 5)
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if (!m_count)
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{
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m_reg[(offset & 0x6000) >> 13] = m_latch;
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update_regs((offset & 0x6000) >> 13);
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m_count = 0;
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int reg = BIT(offset, 13, 2);
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m_reg[reg] = m_latch;
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update_regs(reg);
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}
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}
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void nes_sxrom_device::write_m(offs_t offset, uint8_t data)
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{
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uint8_t bank = (m_reg[1] >> 2) & 3;
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uint8_t bank = BIT(m_reg[1], 2, 2);
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LOG_MMC(("sxrom write_m, offset: %04x, data: %02x\n", offset, data));
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if (!BIT(m_reg[3], 4) || m_mmc1_type == mmc1_type::MMC1A) // WRAM enabled
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@ -275,7 +270,7 @@ void nes_sxrom_device::write_m(offs_t offset, uint8_t data)
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uint8_t nes_sxrom_device::read_m(offs_t offset)
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{
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uint8_t bank = (m_reg[1] >> 2) & 3;
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uint8_t bank = BIT(m_reg[1], 2, 2);
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LOG_MMC(("sxrom read_m, offset: %04x\n", offset));
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if (!BIT(m_reg[3], 4) || m_mmc1_type == mmc1_type::MMC1A) // WRAM enabled
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@ -183,7 +183,7 @@ void nes_txc_22110_device::pcb_reset()
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void nes_ninjaryu_device::write_h(offs_t offset, u8 data)
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{
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LOG_MMC(("unl_ninjaryu write_h, offset: %04x, data: %02x\n", offset, data));
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u8 reg = (offset >> 13) & 0x03;
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u8 reg = BIT(offset, 13, 2);
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m_reg[reg] = data;
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update_regs(reg);
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}
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@ -399,7 +399,7 @@ u8 nes_srpg5in1_device::read_m(offs_t offset)
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void nes_txc_22110_device::update_banks() // used by menu and Space Shadow
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{
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u8 outer = (m_mode & 0x02) << 1;
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prg16_89ab(outer | (m_latch0 & 0x30) >> 4);
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prg16_89ab(outer | BIT(m_latch0, 4, 2));
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prg16_cdef(outer | 3);
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chr8(m_latch0 & 0x0f, CHRROM);
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}
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@ -1119,15 +1119,15 @@ void nes_smd133_device::pcb_reset()
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iNES: mapper 250
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In MESS: Supported.
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In MAME: Supported.
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-------------------------------------------------*/
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void nes_nitra_device::write_h(offs_t offset, uint8_t data)
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void nes_nitra_device::write_h(offs_t offset, u8 data)
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{
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LOG_MMC(("nitra write_h, offset: %04x, data: %02x\n", offset, data));
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txrom_write((offset & 0x6000) | ((offset & 0x400) >> 10), offset & 0xff);
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txrom_write((offset & 0x6000) | BIT(offset, 10), offset);
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}
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/*-------------------------------------------------
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@ -1180,12 +1180,11 @@ void nes_bmw8544_device::write_m(offs_t offset, u8 data)
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-------------------------------------------------*/
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void nes_fs6_device::write_h(offs_t offset, uint8_t data)
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void nes_fs6_device::write_h(offs_t offset, u8 data)
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{
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LOG_MMC(("fs6 write_h, offset: %04x, data: %02x\n", offset, data));
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offset = (BIT(offset, 0) << 1) | BIT(offset, 1) | (offset & ~0x03);
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txrom_write(offset, data);
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txrom_write(bitswap<2>(offset, 0, 1) | (offset & ~0x03), data);
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}
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/*-------------------------------------------------
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@ -1199,15 +1198,15 @@ void nes_fs6_device::write_h(offs_t offset, uint8_t data)
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iNES: mapper 196
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In MESS: Supported.
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In MAME: Supported.
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-------------------------------------------------*/
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void nes_sbros11_device::write_h(offs_t offset, uint8_t data)
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void nes_sbros11_device::write_h(offs_t offset, u8 data)
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{
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LOG_MMC(("smb11 write_h, offset: %04x, data: %02x\n", offset, data));
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txrom_write((offset & 0x6000) | ((offset & 0x04) >> 2), data);
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txrom_write((offset & 0x6000) | BIT(offset, 2), data);
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}
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/*-------------------------------------------------
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@ -1219,30 +1218,30 @@ void nes_sbros11_device::write_h(offs_t offset, uint8_t data)
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This is very similar to mapper 196, but with additional
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data bit swap.
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In MESS: Supported.
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In MAME: Supported.
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-------------------------------------------------*/
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void nes_malisb_device::prg_cb(int start, int bank)
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{
|
||||
bank = (bank & 3) | ((bank & 8) >> 1) | ((bank & 4) << 1);
|
||||
bank = bitswap<4>(bank, 2, 3, 1, 0);
|
||||
prg8_x(start, bank);
|
||||
}
|
||||
|
||||
void nes_malisb_device::chr_cb(int start, int bank, int source)
|
||||
{
|
||||
bank = (bank & 0xdd) | ((bank & 0x20) >> 4) | ((bank & 2) << 4);
|
||||
bank = bitswap<8>(bank, 7, 6, 1, 4, 3, 2, 5, 0);
|
||||
chr1_x(start, bank, source);
|
||||
}
|
||||
|
||||
void nes_malisb_device::write_h(offs_t offset, uint8_t data)
|
||||
void nes_malisb_device::write_h(offs_t offset, u8 data)
|
||||
{
|
||||
LOG_MMC(("malisb write_h, offset: %04x, data: %02x\n", offset, data));
|
||||
|
||||
if (offset > 0x4000)
|
||||
txrom_write((offset & 0xfffe) | ((offset & 0x04) >> 2) | ((offset & 0x08) >> 3), data);
|
||||
txrom_write((offset & 0xfffe) | BIT(offset, 2) | BIT(offset, 3), data);
|
||||
else
|
||||
txrom_write((offset & 0xfffe) | ((offset & 0x08) >> 3), data);
|
||||
txrom_write((offset & 0xfffe) | BIT(offset, 3), data);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
@ -1797,35 +1796,23 @@ void nes_txc_tw_device::prg_cb(int start, int bank)
|
||||
|
||||
Board UNL-KOF97
|
||||
|
||||
Games: King of Fighters 97 (Rex Soft)
|
||||
Games: King of Fighters 97 (Rex Soft), Boogerman II
|
||||
|
||||
MMC3 clone
|
||||
|
||||
In MESS: Not working
|
||||
In MAME: Supported.
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
inline uint8_t kof97_unscramble( uint8_t data )
|
||||
{
|
||||
return ((data >> 1) & 0x01) | ((data >> 4) & 0x02) | ((data << 2) & 0x04) | ((data >> 0) & 0xd8) | ((data << 3) & 0x20);
|
||||
}
|
||||
|
||||
void nes_kof97_device::write_h(offs_t offset, uint8_t data)
|
||||
void nes_kof97_device::write_h(offs_t offset, u8 data)
|
||||
{
|
||||
LOG_MMC(("kof97 write_h, offset: %04x, data: %02x\n", offset, data));
|
||||
|
||||
// Addresses 0x9000, 0xa000, 0xd000 & 0xf000 behaves differently than MMC3
|
||||
if (offset == 0x1000)
|
||||
txrom_write(0x0001, kof97_unscramble(data));
|
||||
else if (offset == 0x2000)
|
||||
txrom_write(0x0000, kof97_unscramble(data));
|
||||
else if (offset == 0x5000)
|
||||
txrom_write(0x4001, kof97_unscramble(data));
|
||||
else if (offset == 0x7000)
|
||||
txrom_write(0x6001, kof97_unscramble(data));
|
||||
// Other addresses behaves like MMC3, up to unscrambling data
|
||||
else
|
||||
txrom_write(offset, kof97_unscramble(data));
|
||||
// unscramble address and data
|
||||
offset = (offset & 0x6000) | BIT(offset, 12);
|
||||
data = bitswap<8>(data, 7, 6, 2, 4, 3, 0, 5, 1);
|
||||
|
||||
txrom_write(offset, data);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
@ -1866,7 +1853,7 @@ void nes_kof96_device::write_l(offs_t offset, u8 data)
|
||||
set_prg(m_prg_base, m_prg_mask);
|
||||
else
|
||||
{
|
||||
u8 bank = (data >> 1) & 0x0f;
|
||||
u8 bank = BIT(data, 1, 4);
|
||||
u8 mode = BIT(data, 5);
|
||||
prg16_89ab(bank & ~mode);
|
||||
prg16_cdef(bank | mode);
|
||||
@ -1972,13 +1959,13 @@ void nes_cocoma_device::write_h(offs_t offset, u8 data)
|
||||
|
||||
iNES: mapper 208
|
||||
|
||||
In MESS: Preliminary Support.
|
||||
In MAME: Preliminary Support.
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
void nes_gouder_device::write_l(offs_t offset, uint8_t data)
|
||||
void nes_gouder_device::write_l(offs_t offset, u8 data)
|
||||
{
|
||||
static const uint8_t conv_table[256] =
|
||||
static constexpr u8 conv_table[256] =
|
||||
{
|
||||
0x59,0x59,0x59,0x59,0x59,0x59,0x59,0x59,0x59,0x49,0x19,0x09,0x59,0x49,0x19,0x09,
|
||||
0x59,0x59,0x59,0x59,0x59,0x59,0x59,0x59,0x51,0x41,0x11,0x01,0x51,0x41,0x11,0x01,
|
||||
@ -2000,22 +1987,31 @@ void nes_gouder_device::write_l(offs_t offset, uint8_t data)
|
||||
|
||||
LOG_MMC(("gouder write_l, offset: %04x, data: %02x\n", offset, data));
|
||||
|
||||
if (!(offset < 0x1700))
|
||||
m_reg[offset & 0x03] = data ^ conv_table[m_reg[4]];
|
||||
else if (!(offset < 0xf00))
|
||||
m_reg[4] = data;
|
||||
else if (!(offset < 0x700))
|
||||
prg32(((data >> 3) & 0x02) | (data & 0x01));
|
||||
offset += 0x100;
|
||||
switch (offset & 0x1800)
|
||||
{
|
||||
case 0x0800:
|
||||
prg32(bitswap<2>(data, 4, 0));
|
||||
set_nt_mirroring(BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
|
||||
break;
|
||||
case 0x1000:
|
||||
m_reg[4] = data;
|
||||
break;
|
||||
case 0x1800:
|
||||
m_reg[offset & 0x03] = data ^ conv_table[m_reg[4]];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t nes_gouder_device::read_l(offs_t offset)
|
||||
u8 nes_gouder_device::read_l(offs_t offset)
|
||||
{
|
||||
LOG_MMC(("gouder read_l, offset: %04x\n", offset));
|
||||
|
||||
if (!(offset < 0x1700))
|
||||
offset += 0x100;
|
||||
if (offset >= 0x1800)
|
||||
return m_reg[offset & 0x03];
|
||||
|
||||
return 0x00;
|
||||
return get_open_bus();
|
||||
}
|
||||
|
||||
// writes to 0x8000-0xffff are like MMC3 but no PRG bankswitch (beacuse it is handled by low writes)
|
||||
@ -2066,7 +2062,7 @@ void nes_sa9602b_device::write_h(offs_t offset, uint8_t data)
|
||||
break;
|
||||
case 0x0001:
|
||||
if ((m_reg & 7) < 6)
|
||||
m_prg_chip = (data & 0xc0) >> 6;
|
||||
m_prg_chip = BIT(data, 6, 2);
|
||||
set_prg(0, m_prg_mask);
|
||||
break;
|
||||
}
|
||||
@ -2151,7 +2147,7 @@ void nes_a9746_device::update_banks(uint8_t value)
|
||||
case 0x08: case 0x0a: case 0x0c: case 0x0e:
|
||||
case 0x10: case 0x12: case 0x14: case 0x16:
|
||||
case 0x18: case 0x1a: case 0x1c: case 0x1e:
|
||||
m_reg[2] = (value << 4);
|
||||
m_reg[2] = value << 4;
|
||||
break;
|
||||
case 0x09: chr1_0(m_reg[2] | (value >> 1), m_chr_source); break;
|
||||
case 0x0b: chr1_1(m_reg[2] | (value >> 1) | 1, m_chr_source); break;
|
||||
@ -2509,7 +2505,7 @@ void nes_bmc_5in1_device::write_m(offs_t offset, u8 data)
|
||||
if ((m_wram_protect & 0xc0) == 0x80)
|
||||
{
|
||||
if (!(offset & 0x03))
|
||||
prg32((data >> 1) & 0x03);
|
||||
prg32(BIT(data, 1, 2));
|
||||
}
|
||||
}
|
||||
|
||||
@ -2814,7 +2810,7 @@ void nes_bmc_hik4_device::write_m(offs_t offset, u8 data)
|
||||
set_prg(m_prg_base, m_prg_mask);
|
||||
}
|
||||
else // Master Fighter III only
|
||||
prg32((data & 0x30) >> 4);
|
||||
prg32(BIT(data, 4, 2));
|
||||
|
||||
m_chr_base = (data & 0xc0) << 1;
|
||||
set_chr(m_chr_source, m_chr_base, m_chr_mask);
|
||||
@ -3399,7 +3395,7 @@ void nes_bmc_810305c_device::write_h(offs_t offset, u8 data)
|
||||
|
||||
if (BIT(offset, 7)) // outer register
|
||||
{
|
||||
m_outer = (offset >> 13) & 0x03;
|
||||
m_outer = BIT(offset, 13, 2);
|
||||
|
||||
m_prg_base = m_outer << 5;
|
||||
m_prg_mask = 0x1f >> (m_outer == 2);
|
||||
|
||||
@ -1327,7 +1327,7 @@ void nes_caltron6in1_device::write_h(offs_t offset, u8 data)
|
||||
void nes_caltron9in1_device::write_h(offs_t offset, u8 data)
|
||||
{
|
||||
LOG_MMC(("caltron9in1 write_h, offset: %04x, data: %02x\n", offset, data));
|
||||
int nibble = (offset >> 12) & 0x07;
|
||||
int nibble = BIT(offset, 12, 3);
|
||||
m_latch[std::min(nibble, 2)] = offset & 0x7f;
|
||||
|
||||
if (BIT(m_latch[1], 1))
|
||||
@ -2205,7 +2205,7 @@ u8 nes_bmc_tf2740_device::read_m(offs_t offset)
|
||||
void nes_bmc_tj03_device::write_h(offs_t offset, u8 data)
|
||||
{
|
||||
LOG_MMC(("bmc_tj03 write_h, offset: %04x, data: %02x\n", offset, data));
|
||||
u8 bank = (offset >> 8) & 0x03;
|
||||
u8 bank = BIT(offset, 8, 2);
|
||||
prg32(bank);
|
||||
chr8(bank, CHRROM);
|
||||
set_nt_mirroring(BIT(offset, 9) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
|
||||
@ -2316,7 +2316,7 @@ void nes_bmc_g146_device::write_h(offs_t offset, u8 data)
|
||||
void nes_bmc_2751_device::write_h(offs_t offset, u8 data)
|
||||
{
|
||||
LOG_MMC(("bmc_2751 write_h, offset: %04x, data: %02x\n", offset, data));
|
||||
u8 bank = (offset >> 4) & 0x07;
|
||||
u8 bank = BIT(offset, 4, 3);
|
||||
u8 mode = BIT(offset, 7);
|
||||
prg16_89ab(bank & ~mode);
|
||||
prg16_cdef(bank | mode);
|
||||
@ -2345,7 +2345,7 @@ void nes_bmc_8157_device::write_h(offs_t offset, u8 data)
|
||||
{
|
||||
LOG_MMC(("bmc_8157 write_h, offset: %04x, data: %02x\n", offset, data));
|
||||
|
||||
u8 bank = (offset >> 2) & 0x1f;
|
||||
u8 bank = BIT(offset, 2, 5);
|
||||
prg16_89ab(bank);
|
||||
if (BIT(offset, 9))
|
||||
bank |= 0x07;
|
||||
|
||||
@ -448,7 +448,7 @@ uint8_t nes_namcot340_device::n340_loread(offs_t offset)
|
||||
set_irq_line(CLEAR_LINE); // FIXME: unreachable
|
||||
[[fallthrough]];
|
||||
case 0x1800:
|
||||
return (m_irq_count >> 8) & 0xff;
|
||||
return m_irq_count >> 8;
|
||||
set_irq_line(CLEAR_LINE); // FIXME: unreachable
|
||||
[[fallthrough]];
|
||||
default:
|
||||
@ -656,7 +656,6 @@ void nes_namcot163_device::set_mirror(uint8_t page, uint8_t data)
|
||||
|
||||
void nes_namcot163_device::write_h(offs_t offset, uint8_t data)
|
||||
{
|
||||
int page;
|
||||
LOG_MMC(("namcot163 write_h, offset: %04x, data: %02x\n", offset, data));
|
||||
|
||||
switch (offset & 0x7800)
|
||||
@ -666,14 +665,13 @@ void nes_namcot163_device::write_h(offs_t offset, uint8_t data)
|
||||
case 0x2000: case 0x2800:
|
||||
case 0x3000: case 0x3800:
|
||||
m_chr_bank = data;
|
||||
chr1_x(offset / 0x800, m_chr_bank, CHRROM);
|
||||
chr1_x(offset >> 11, m_chr_bank, CHRROM);
|
||||
break;
|
||||
case 0x4000:
|
||||
case 0x4800:
|
||||
case 0x5000:
|
||||
case 0x5800:
|
||||
page = (offset & 0x1800) >> 11;
|
||||
set_mirror(page, data);
|
||||
set_mirror(BIT(offset, 11, 2), data);
|
||||
break;
|
||||
case 0x6000:
|
||||
m_namco163snd->disable_w((data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
|
||||
|
||||
@ -493,7 +493,7 @@ void device_nes_cart_interface::reset_cpu()
|
||||
// the memory banks)
|
||||
uint8_t device_nes_cart_interface::hi_access_rom(uint32_t offset)
|
||||
{
|
||||
int bank = (offset & 0x6000) >> 13;
|
||||
int bank = BIT(offset, 13, 2);
|
||||
return m_prg[m_prg_bank[bank] * 0x2000 + (offset & 0x1fff)];
|
||||
}
|
||||
|
||||
@ -518,7 +518,7 @@ uint8_t device_nes_cart_interface::account_bus_conflict(uint32_t offset, uint8_t
|
||||
|
||||
void device_nes_cart_interface::chr_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
int bank = offset >> 10;
|
||||
int bank = BIT(offset, 10, 3);
|
||||
|
||||
if (m_chr_src[bank] == CHRRAM)
|
||||
m_chr_access[bank][offset & 0x3ff] = data;
|
||||
@ -526,14 +526,14 @@ void device_nes_cart_interface::chr_w(offs_t offset, uint8_t data)
|
||||
|
||||
uint8_t device_nes_cart_interface::chr_r(offs_t offset)
|
||||
{
|
||||
int bank = offset >> 10;
|
||||
int bank = BIT(offset, 10, 3);
|
||||
return m_chr_access[bank][offset & 0x3ff];
|
||||
}
|
||||
|
||||
|
||||
void device_nes_cart_interface::nt_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
int page = (offset & 0xc00) >> 10;
|
||||
int page = BIT(offset, 10, 2);
|
||||
|
||||
if (!m_nt_writable[page])
|
||||
return;
|
||||
@ -543,7 +543,7 @@ void device_nes_cart_interface::nt_w(offs_t offset, uint8_t data)
|
||||
|
||||
uint8_t device_nes_cart_interface::nt_r(offs_t offset)
|
||||
{
|
||||
int page = (offset & 0xc00) >> 10;
|
||||
int page = BIT(offset, 10, 2);
|
||||
return m_nt_access[page][offset & 0x3ff];
|
||||
}
|
||||
|
||||
|
||||
@ -207,6 +207,6 @@ void nes_ntdec_fh_device::write_m(offs_t offset, u8 data)
|
||||
void nes_ntdec_n715021_device::write_h(offs_t offset, u8 data)
|
||||
{
|
||||
LOG_MMC(("ntdec_n715021 write_h, offset: %04x, data: %02x\n", offset, data));
|
||||
prg16_89ab((offset >> 2) & 0x03);
|
||||
prg16_89ab(BIT(offset, 2, 2));
|
||||
chr8(offset & 0x03, CHRROM);
|
||||
}
|
||||
|
||||
@ -411,8 +411,6 @@ void nes_cnrom_device::write_h(offs_t offset, uint8_t data)
|
||||
|
||||
uint8_t nes_cnrom_device::chr_r(offs_t offset)
|
||||
{
|
||||
int bank = offset >> 10;
|
||||
|
||||
// a few CNROM boards contained copy protection schemes through
|
||||
// suitably configured diodes, so that subsequent CHR reads can
|
||||
// give actual VROM content or open bus values.
|
||||
@ -420,7 +418,7 @@ uint8_t nes_cnrom_device::chr_r(offs_t offset)
|
||||
if (m_chr_open_bus)
|
||||
return get_open_bus();
|
||||
|
||||
return m_chr_access[bank][offset & 0x3ff];
|
||||
return device_nes_cart_interface::chr_r(offset);
|
||||
}
|
||||
|
||||
|
||||
@ -466,7 +464,7 @@ void nes_gxrom_device::write_h(offs_t offset, uint8_t data)
|
||||
// this pcb is subject to bus conflict
|
||||
data = account_bus_conflict(offset, data);
|
||||
|
||||
prg32((data & 0xf0) >> 4);
|
||||
prg32(data >> 4);
|
||||
chr8(data & 0x0f, CHRROM);
|
||||
}
|
||||
|
||||
|
||||
@ -285,17 +285,17 @@ void nes_eh8813a_device::pcb_reset()
|
||||
|
||||
iNES: mapper 144
|
||||
|
||||
In MESS: Supported.
|
||||
In MAME: Supported.
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
void nes_agci_device::write_h(offs_t offset, uint8_t data)
|
||||
void nes_agci_device::write_h(offs_t offset, u8 data)
|
||||
{
|
||||
LOG_MMC(("agci write_h, offset: %04x, data: %02x\n", offset, data));
|
||||
|
||||
// this pcb is subject to bus conflict
|
||||
uint8_t temp = account_bus_conflict(offset, 0xff);
|
||||
data = (data & temp) | (temp & 1);
|
||||
// bit 0 is always determined by the ROM value at the offset due to a resistor on the board
|
||||
data = account_bus_conflict(offset, data | 1);
|
||||
|
||||
chr8(data >> 4, CHRROM);
|
||||
prg32(data);
|
||||
@ -479,70 +479,28 @@ void nes_magseries_device::write_h(offs_t offset, u8 data)
|
||||
|
||||
iNES: mapper 156
|
||||
|
||||
In MESS: Supported.
|
||||
In MAME: Supported.
|
||||
|
||||
Notes: Metal Force and Buzz & Waldog only use the first 4
|
||||
regs and no mirroring. Janggun ui Adeul uses all features
|
||||
|
||||
-------------------------------------------------*/
|
||||
|
||||
void nes_daou306_device::write_h(offs_t offset, uint8_t data)
|
||||
void nes_daou306_device::write_h(offs_t offset, u8 data)
|
||||
{
|
||||
LOG_MMC(("daou306 write_h, offset: %04x, data: %02x\n", offset, data));
|
||||
int reg = BIT(offset, 2) ? 8 : 0;
|
||||
|
||||
switch (offset)
|
||||
if (offset >= 0x4000 && offset < 0x4010)
|
||||
{
|
||||
case 0x4000:
|
||||
case 0x4004:
|
||||
m_reg[reg + 0] = data;
|
||||
chr1_0(m_reg[0] | (m_reg[8] << 8), CHRROM);
|
||||
break;
|
||||
case 0x4001:
|
||||
case 0x4005:
|
||||
m_reg[reg + 1] = data;
|
||||
chr1_1(m_reg[1] | (m_reg[9] << 8), CHRROM);
|
||||
break;
|
||||
case 0x4002:
|
||||
case 0x4006:
|
||||
m_reg[reg + 2] = data;
|
||||
chr1_2(m_reg[2] | (m_reg[10] << 8), CHRROM);
|
||||
break;
|
||||
case 0x4003:
|
||||
case 0x4007:
|
||||
m_reg[reg + 3] = data;
|
||||
chr1_3(m_reg[3] | (m_reg[11] << 8), CHRROM);
|
||||
break;
|
||||
case 0x4008:
|
||||
case 0x400c:
|
||||
m_reg[reg + 4] = data;
|
||||
chr1_4(m_reg[4] | (m_reg[12] << 8), CHRROM);
|
||||
break;
|
||||
case 0x4009:
|
||||
case 0x400d:
|
||||
m_reg[reg + 5] = data;
|
||||
chr1_5(m_reg[5] | (m_reg[13] << 8), CHRROM);
|
||||
break;
|
||||
case 0x400a:
|
||||
case 0x400e:
|
||||
m_reg[reg + 6] = data;
|
||||
chr1_6(m_reg[6] | (m_reg[14] << 8), CHRROM);
|
||||
break;
|
||||
case 0x400b:
|
||||
case 0x400f:
|
||||
m_reg[reg + 7] = data;
|
||||
chr1_7(m_reg[7] | (m_reg[15] << 8), CHRROM);
|
||||
break;
|
||||
case 0x4010:
|
||||
prg16_89ab(data);
|
||||
break;
|
||||
case 0x4014:
|
||||
if (data & 1)
|
||||
set_nt_mirroring(PPU_MIRROR_HORZ);
|
||||
else
|
||||
set_nt_mirroring(PPU_MIRROR_VERT);
|
||||
break;
|
||||
int reg = bitswap<4>(offset, 2, 3, 1, 0);
|
||||
m_reg[reg] = data;
|
||||
reg &= 0x07;
|
||||
chr1_x(reg, m_reg[reg] | (m_reg[reg | 8] << 8), CHRROM);
|
||||
}
|
||||
else if (offset == 0x4010)
|
||||
prg16_89ab(data);
|
||||
else if (offset == 0x4014)
|
||||
set_nt_mirroring(data & 1 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
@ -607,7 +565,7 @@ void nes_edu2k_device::write_h(offs_t offset, uint8_t data)
|
||||
LOG_MMC(("edu2k write_h, offset: %04x, data: %02x\n", offset, data));
|
||||
|
||||
prg32(data & 0x1f);
|
||||
m_latch = (data & 0xc0) >> 6;
|
||||
m_latch = BIT(data, 6, 2);
|
||||
}
|
||||
|
||||
void nes_edu2k_device::write_m(offs_t offset, uint8_t data)
|
||||
|
||||
@ -467,7 +467,7 @@ void nes_sachen_tcu01_device::write_l(offs_t offset, uint8_t data)
|
||||
|
||||
if ((offset & 0x103) == 0x002)
|
||||
{
|
||||
prg32(((data >> 6) & 0x02) | ((data >> 2) & 0x01));
|
||||
prg32(bitswap<2>(data, 7, 2));
|
||||
chr8(data >> 3, CHRROM);
|
||||
}
|
||||
}
|
||||
|
||||
@ -132,7 +132,7 @@ void nes_cufrom_device::write_h(offs_t offset, u8 data)
|
||||
{
|
||||
LOG_MMC(("cufrom write_h, offset: %04x, data: %02x\n", offset, data));
|
||||
|
||||
prg16_89ab((data >> 2) & 0x07);
|
||||
prg16_89ab(BIT(data, 2, 3));
|
||||
chr8(data & 0x03, CHRRAM);
|
||||
}
|
||||
|
||||
@ -186,7 +186,7 @@ void nes_unrom512_device::write_h(offs_t offset, u8 data)
|
||||
if (m_pcb_ctrl_mirror)
|
||||
set_nt_mirroring(BIT(data, 7) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
|
||||
prg16_89ab(data & 0x1f);
|
||||
chr8((data >> 5) & 0x03, CHRRAM);
|
||||
chr8(BIT(data, 5, 2), CHRRAM);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
|
||||
@ -148,7 +148,7 @@ void nes_somari_device::mmc1_w(offs_t offset, u8 data)
|
||||
m_mmc1_count = (m_mmc1_count + 1) % 5;
|
||||
if (!m_mmc1_count)
|
||||
{
|
||||
m_mmc1_reg[(offset & 0x6000) >> 13] = m_mmc1_latch;
|
||||
m_mmc1_reg[BIT(offset, 13, 2)] = m_mmc1_latch;
|
||||
update_all_banks();
|
||||
}
|
||||
}
|
||||
@ -196,7 +196,7 @@ void nes_somari_device::update_prg()
|
||||
set_prg(m_prg_base, m_prg_mask);
|
||||
break;
|
||||
case SOMARI_MMC1_MODE:
|
||||
switch ((m_mmc1_reg[0] >> 2) & 3)
|
||||
switch (BIT(m_mmc1_reg[0], 2, 2))
|
||||
{
|
||||
case 0:
|
||||
case 1:
|
||||
@ -233,7 +233,7 @@ void nes_somari_device::update_chr()
|
||||
chr4_4(m_mmc1_reg[2] & 0x1f, CHRROM);
|
||||
}
|
||||
else
|
||||
chr8((m_mmc1_reg[1] & 0x1f) >> 1, CHRROM);
|
||||
chr8(BIT(m_mmc1_reg[1], 1, 4), CHRROM);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -298,19 +298,19 @@ void nes_x1_005_device::write_m(offs_t offset, uint8_t data)
|
||||
switch (offset)
|
||||
{
|
||||
case 0x1ef0:
|
||||
chr2_0((data & 0x7f) >> 1, CHRROM);
|
||||
chr2_0(BIT(data, 1, 6), CHRROM);
|
||||
if (m_x1_005_alt_mirroring)
|
||||
{
|
||||
set_nt_page(0, CIRAM, (data & 0x80) ? 1 : 0, 1);
|
||||
set_nt_page(1, CIRAM, (data & 0x80) ? 1 : 0, 1);
|
||||
set_nt_page(0, CIRAM, BIT(data, 7), 1);
|
||||
set_nt_page(1, CIRAM, BIT(data, 7), 1);
|
||||
}
|
||||
break;
|
||||
case 0x1ef1:
|
||||
chr2_2((data & 0x7f) >> 1, CHRROM);
|
||||
chr2_2(BIT(data, 1, 6), CHRROM);
|
||||
if (m_x1_005_alt_mirroring)
|
||||
{
|
||||
set_nt_page(2, CIRAM, (data & 0x80) ? 1 : 0, 1);
|
||||
set_nt_page(3, CIRAM, (data & 0x80) ? 1 : 0, 1);
|
||||
set_nt_page(2, CIRAM, BIT(data, 7), 1);
|
||||
set_nt_page(3, CIRAM, BIT(data, 7), 1);
|
||||
}
|
||||
break;
|
||||
case 0x1ef2:
|
||||
|
||||
@ -185,7 +185,7 @@ void nes_txc_dumarc_device::write_h(offs_t offset, uint8_t data)
|
||||
LOG_MMC(("TXC Du Ma Racing write_h, offset: %04x, data: %02x\n", offset, data));
|
||||
|
||||
prg32(m_reg[2] >> 2);
|
||||
chr8((((data ^ m_reg[2]) >> 3) & 0x02) | (((data ^ m_reg[2]) >> 5) & 0x01), CHRROM);
|
||||
chr8(bitswap<2>(data ^ m_reg[2], 4, 5), CHRROM);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
|
||||
@ -400,7 +400,7 @@ void nes_cityfight_device::write_h(offs_t offset, u8 data)
|
||||
case 0x0800:
|
||||
break; // PRG banking at $8000 ignored
|
||||
case 0x1000:
|
||||
prg32((data >> 2) & 0x03);
|
||||
prg32(BIT(data, 2, 2));
|
||||
if (!(offset & 3)) // $9000 is also VRC4 mirroring
|
||||
nes_konami_vrc4_device::write_h(offset, data);
|
||||
break;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user