(MESS) Added the following video card BIOSes: [rfka01, Barry Rodewald]

s3_764:   S3 9503-62 (not working)
            Elsa Winner 1000/T2D
  s3virge:  S3 ViRGE BIOS v1.00-10
  mach64:   ATi mach64V1 113-34404-104
This commit is contained in:
mahlemiut 2014-09-07 03:56:59 +00:00
parent ace12ba6c4
commit 00f7c4d642
3 changed files with 28 additions and 6 deletions

View File

@ -159,7 +159,7 @@ UINT8 s3virge_vga_device::s3_crtc_reg_read(UINT8 index)
res = s3.crt_reg_lock;
break;
case 0x36: // Configuration register 1
res = s3.strapping & 0x000000ff; // PCI (not really), Fast Page Mode DRAM
res = s3.strapping & 0x000000ff;
if(vga.svga_intf.vram_size == 0x200000)
res |= 0x80;
else if(vga.svga_intf.vram_size == 0x400000)
@ -168,7 +168,7 @@ UINT8 s3virge_vga_device::s3_crtc_reg_read(UINT8 index)
res |= 0x80; // shouldn't get here...
break;
case 0x37: // Configuration register 2
res = (s3.strapping & 0x0000ff00) >> 8; // enable chipset, 64k BIOS size, internal DCLK/MCLK
res = (s3.strapping & 0x0000ff00) >> 8;
break;
case 0x38:
res = s3.reg_lock1;
@ -235,7 +235,7 @@ UINT8 s3virge_vga_device::s3_crtc_reg_read(UINT8 index)
res = s3.ext_misc_ctrl_2;
break;
case 0x68: // Configuration register 3
res = (s3.strapping & 0x00ff0000) >> 16; // no /CAS,/OE stretch time, 32-bit data bus size
res = (s3.strapping & 0x00ff0000) >> 16;
break;
case 0x69:
res = vga.crtc.start_addr_latch >> 16;
@ -244,7 +244,7 @@ UINT8 s3virge_vga_device::s3_crtc_reg_read(UINT8 index)
res = svga.bank_r & 0x7f;
break;
case 0x6f: // Configuration register 4
res = (s3.strapping & 0xff000000) >> 24; // LPB(?) mode, Serial port I/O at port 0xe8, Serial port I/O disabled (MMIO only), no WE delay
res = (s3.strapping & 0xff000000) >> 24;
break;
default:
res = vga.crtc.data[index];

View File

@ -9,8 +9,19 @@
ROM_START( s3_764 )
ROM_REGION(0x8000,"s3_764", 0)
ROM_LOAD("s3_764.bin", 0x00000, 0x8000, CRC(4f10aac7) SHA1(c77b3f11cc15679121314823588887dd547cd715) )
ROM_DEFAULT_BIOS("9fxv330")
ROM_SYSTEM_BIOS( 0, "9fxv330", "PCI Number Nine 9FX Vision 330 2.03.10 (S3 Trio64)" )
ROMX_LOAD("s3_764.bin", 0x00000, 0x8000, CRC(4f10aac7) SHA1(c77b3f11cc15679121314823588887dd547cd715), ROM_BIOS(1) )
ROM_IGNORE( 0x8000 )
// The following are from Trio64V2/DX based cards
ROM_SYSTEM_BIOS( 1, "s3_9503", "PCI S3 9503-62 (S3 Trio64V2/DX)" )
ROMX_LOAD("pci_9503-62_s3.bin", 0x00000, 0x8000, CRC(0e9d79d8) SHA1(274b5b98cc998f2783567000cdb12b14308bc290), ROM_BIOS(2) )
ROM_SYSTEM_BIOS( 2, "winner1k", "PCI Elsa Winner 1000/T2D 6.01.00 (S3 Trio64V2/DX)" )
ROMX_LOAD("pci_elsa_winner_1000-t2d_6.01.00.bin", 0x00000, 0x8000, CRC(1c9532b8) SHA1(d27d60b9a3566aa42a01ad497046af16eaa2ed87), ROM_BIOS(3) )
ROM_END
//**************************************************************************
@ -115,7 +126,13 @@ void isa16_svga_s3_device::device_reset()
ROM_START( s3virge )
ROM_REGION(0x8000,"s3virge", 0)
ROM_LOAD("s3virge.bin", 0x00000, 0x8000, CRC(a7983a85) SHA1(e885371816d3237f7badd57ccd602cd863c9c9f8) )
ROM_DEFAULT_BIOS("virge")
ROM_SYSTEM_BIOS( 0, "virge", "PCI S3 ViRGE v1.00-10" )
ROMX_LOAD("pci_m-v_virge-4s3.bin", 0x00000, 0x8000, CRC(d0a0f1de) SHA1(b7b41081974762a199610219bdeab149b7c7143d), ROM_BIOS(1) )
ROM_SYSTEM_BIOS( 1, "virgeo", "PCI S3 ViRGE v1.00-05" )
ROMX_LOAD("s3virge.bin", 0x00000, 0x8000, CRC(a7983a85) SHA1(e885371816d3237f7badd57ccd602cd863c9c9f8), ROM_BIOS(2) )
ROM_IGNORE( 0x8000 )
ROM_END

View File

@ -52,6 +52,11 @@ ROM_START( mach64 )
ROM_SYSTEM_BIOS( 3, "pci", "PCI BIOS 113-25420-100" )
ROMX_LOAD("pci_mach64__113-25420-100-1995.27c256.u1.bin", 0x00000, 0x8000, CRC(762596e8) SHA1(9544b073ac182ec2990e18f54afbb96d52db744a), ROM_BIOS(4) )
ROM_SYSTEM_BIOS( 4, "pci_v1", "PCI mach64 V1 BIOS 113-34404-104" )
ROMX_LOAD("pci_mach64_v1_113-34404-104_1996.bin", 0x00000, 0x8000, CRC(c6a39c3f) SHA1(0f4cf9221179c675dafafde638bc00244b6feb63), ROM_BIOS(5) )
ROM_IGNORE(0x8000)
ROM_END
//**************************************************************************