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NVRAM hook-up

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This commit is contained in:
Angelo Salese 2013-01-10 01:50:29 +00:00
parent 8b84c071d6
commit 011f54f075
3 changed files with 35 additions and 16 deletions
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24
src/mame/drivers/3do.c
View File

@ -98,6 +98,7 @@ Part list of Goldstar 3DO Interactive Multiplayer
#include "cpu/arm7/arm7.h"
#define X2_CLOCK_PAL 59000000
#define X2_CLOCK_NTSC 49090000
#define X601_CLOCK XTAL_16_9344MHz
@ -108,7 +109,7 @@ static ADDRESS_MAP_START( 3do_mem, AS_PROGRAM, 32, _3do_state )
AM_RANGE(0x00200000, 0x003FFFFF) AM_RAM AM_SHARE("vram") /* VRAM */
AM_RANGE(0x03000000, 0x030FFFFF) AM_ROMBANK("bank2") /* BIOS */
AM_RANGE(0x03100000, 0x0313FFFF) AM_RAM /* Brooktree? */
AM_RANGE(0x03140000, 0x0315FFFF) AM_READWRITE(_3do_nvarea_r, _3do_nvarea_w) /* NVRAM */
AM_RANGE(0x03140000, 0x0315FFFF) AM_READWRITE8(_3do_nvarea_r, _3do_nvarea_w, 0x000000ff) /* NVRAM */
AM_RANGE(0x03180000, 0x031BFFFF) AM_READWRITE(_3do_slow2_r, _3do_slow2_w) /* Slow bus - additional expansion */
AM_RANGE(0x03200000, 0x0320FFFF) AM_READWRITE(_3do_svf_r, _3do_svf_w) /* special vram access1 */
AM_RANGE(0x03300000, 0x033FFFFF) AM_READWRITE(_3do_madam_r, _3do_madam_w) /* address decoder */
@ -151,12 +152,33 @@ struct cdrom_interface _3do_cdrom =
NULL
};
static NVRAM_HANDLER( _3do )
{
_3do_state *state = machine.driver_data<_3do_state>();
UINT8 *nvram = state->m_nvram;
if (read_or_write)
file->write(nvram,0x8000);
else
{
if (file)
file->read(nvram,0x8000);
else
{
/* fill in the default values */
memset(nvram,0xff,0x8000);
}
}
}
static MACHINE_CONFIG_START( 3do, _3do_state )
/* Basic machine hardware */
MCFG_CPU_ADD( "maincpu", ARM7_BE, XTAL_50MHz/4 )
MCFG_CPU_PROGRAM_MAP( 3do_mem)
MCFG_NVRAM_HANDLER(_3do)
MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_x16", _3do_state, timer_x16_cb, attotime::from_hz(12000)) // TODO: timing
MCFG_VIDEO_START_OVERRIDE(_3do_state, _3do )

5
src/mame/includes/3do.h
View File

@ -142,9 +142,10 @@ public:
MADAM m_madam;
CLIO m_clio;
SVF m_svf;
UINT8 m_nvram[0x8000];
// UINT8 m_video_bits[512];
DECLARE_READ32_MEMBER(_3do_nvarea_r);
DECLARE_WRITE32_MEMBER(_3do_nvarea_w);
DECLARE_READ8_MEMBER(_3do_nvarea_r);
DECLARE_WRITE8_MEMBER(_3do_nvarea_w);
DECLARE_READ32_MEMBER(_3do_slow2_r);
DECLARE_WRITE32_MEMBER(_3do_slow2_w);
DECLARE_READ32_MEMBER(_3do_svf_r);

22
src/mame/machine/3do.c
View File

@ -133,7 +133,7 @@ TIMER_DEVICE_CALLBACK_MEMBER( _3do_state::timer_x16_cb )
{
m_clio.timer_count[i]--;
if(m_clio.timer_count[i] == 0) // timer hit
if(m_clio.timer_count[i] == 0xffffffff) // timer hit
{
if(i & 1) // odd timer irq fires
m_3do_request_fiq(8 << (7-(i >> 1)),0);
@ -141,20 +141,14 @@ TIMER_DEVICE_CALLBACK_MEMBER( _3do_state::timer_x16_cb )
if(timer_flag & 2)
m_clio.timer_count[i] = m_clio.timer_backup[i];
else
m_clio.timer_ctrl &= (~1 << i*4);
m_clio.timer_ctrl &= ~(1 << i*4);
}
}
}
}
READ32_MEMBER(_3do_state::_3do_nvarea_r){
logerror( "%08X: NVRAM read offset = %08X\n", machine().device("maincpu")->safe_pc(), offset );
return 0;
}
WRITE32_MEMBER(_3do_state::_3do_nvarea_w){
logerror( "%08X: NVRAM write offset = %08X, data = %08X, mask = %08X\n", machine().device("maincpu")->safe_pc(), offset, data, mem_mask );
}
READ8_MEMBER(_3do_state::_3do_nvarea_r) { return m_nvram[offset]; }
WRITE8_MEMBER(_3do_state::_3do_nvarea_w) { m_nvram[offset] = data; }
@ -642,7 +636,8 @@ void _3do_madam_init( running_machine &machine )
READ32_MEMBER(_3do_state::_3do_clio_r)
{
if (!space.debugger_access())
logerror( "%08X: CLIO read offset = %08X\n", machine().device("maincpu")->safe_pc(), offset * 4 );
if(offset != 0x40/4 && offset != 0x44/4 && offset != 0x48/4 && offset != 0x4c/4)
logerror( "%08X: CLIO read offset = %08X\n", machine().device("maincpu")->safe_pc(), offset * 4 );
switch( offset )
{
@ -746,7 +741,8 @@ READ32_MEMBER(_3do_state::_3do_clio_r)
WRITE32_MEMBER(_3do_state::_3do_clio_w)
{
logerror( "%08X: CLIO write offset = %08X, data = %08X, mask = %08X\n", machine().device("maincpu")->safe_pc(), offset*4, data, mem_mask );
if(offset != 0x40/4 && offset != 0x44/4 && offset != 0x48/4 && offset != 0x4c/4)
logerror( "%08X: CLIO write offset = %08X, data = %08X, mask = %08X\n", machine().device("maincpu")->safe_pc(), offset*4, data, mem_mask );
switch( offset )
{
@ -844,7 +840,7 @@ WRITE32_MEMBER(_3do_state::_3do_clio_w)
m_clio.adbctl = data;
break;
/* only lower 16-bits are uploaded */
/* only lower 16-bits can be written */
case 0x0100/4: case 0x0108/4: case 0x0110/4: case 0x0118/4:
case 0x0120/4: case 0x0128/4: case 0x0130/4: case 0x0138/4:
case 0x0140/4: case 0x0148/4: case 0x0150/4: case 0x0158/4: