mirror of
https://github.com/holub/mame
synced 2025-05-25 23:35:26 +03:00
Added driver_data struct and save states to blockout.c and bigevglf.c
This commit is contained in:
parent
d20689a4f8
commit
01afdeded1
1
.gitattributes
vendored
1
.gitattributes
vendored
@ -2338,6 +2338,7 @@ src/mame/includes/bionicc.h svneol=native#text/plain
|
||||
src/mame/includes/blktiger.h svneol=native#text/plain
|
||||
src/mame/includes/blmbycar.h svneol=native#text/plain
|
||||
src/mame/includes/blockade.h svneol=native#text/plain
|
||||
src/mame/includes/blockout.h svneol=native#text/plain
|
||||
src/mame/includes/blstroid.h svneol=native#text/plain
|
||||
src/mame/includes/blueprnt.h svneol=native#text/plain
|
||||
src/mame/includes/bogeyman.h svneol=native#text/plain
|
||||
|
@ -63,120 +63,130 @@ J1100072A
|
||||
#include "cpu/m6805/m6805.h"
|
||||
#include "includes/bigevglf.h"
|
||||
|
||||
static UINT8 port_select; /* for muxed controls */
|
||||
|
||||
static UINT32 beg_bank=0;
|
||||
|
||||
static int sound_nmi_enable=0,pending_nmi=0;
|
||||
static UINT8 for_sound = 0;
|
||||
static UINT8 from_sound = 0;
|
||||
static UINT8 sound_state = 0;
|
||||
|
||||
static WRITE8_HANDLER( beg_banking_w )
|
||||
{
|
||||
beg_bank = data;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
state->beg_bank = data;
|
||||
|
||||
/* d0-d3 connect to A11-A14 of the ROMs (via ls273 latch)
|
||||
d4-d7 select one of ROMs (via ls273(above) and then ls154)
|
||||
*/
|
||||
memory_set_bankptr(space->machine, 1, memory_region(space->machine, "maincpu") + 0x10000 + 0x800*(beg_bank&0xff)); /* empty sockets for IC37-IC44 ROMS */
|
||||
memory_set_bank(space->machine, 1, state->beg_bank & 0xff); /* empty sockets for IC37-IC44 ROMS */
|
||||
}
|
||||
|
||||
static TIMER_CALLBACK( from_sound_latch_callback )
|
||||
{
|
||||
from_sound = param&0xff;
|
||||
sound_state |= 2;
|
||||
bigevglf_state *state = (bigevglf_state *)machine->driver_data;
|
||||
state->from_sound = param & 0xff;
|
||||
state->sound_state |= 2;
|
||||
}
|
||||
static WRITE8_HANDLER(beg_fromsound_w) /* write to D800 sets bit 1 in status */
|
||||
static WRITE8_HANDLER( beg_fromsound_w ) /* write to D800 sets bit 1 in status */
|
||||
{
|
||||
timer_call_after_resynch(space->machine, NULL, (cpu_get_pc(space->cpu)<<16)|data, from_sound_latch_callback);
|
||||
timer_call_after_resynch(space->machine, NULL, (cpu_get_pc(space->cpu) << 16) | data, from_sound_latch_callback);
|
||||
}
|
||||
|
||||
static READ8_HANDLER(beg_fromsound_r)
|
||||
static READ8_HANDLER( beg_fromsound_r )
|
||||
{
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
/* set a timer to force synchronization after the read */
|
||||
timer_call_after_resynch(space->machine, NULL, 0, NULL);
|
||||
return from_sound;
|
||||
return state->from_sound;
|
||||
}
|
||||
|
||||
static READ8_HANDLER(beg_soundstate_r)
|
||||
static READ8_HANDLER( beg_soundstate_r )
|
||||
{
|
||||
UINT8 ret = sound_state;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
UINT8 ret = state->sound_state;
|
||||
/* set a timer to force synchronization after the read */
|
||||
timer_call_after_resynch(space->machine, NULL, 0, NULL);
|
||||
sound_state &= ~2; /* read from port 21 clears bit 1 in status */
|
||||
state->sound_state &= ~2; /* read from port 21 clears bit 1 in status */
|
||||
return ret;
|
||||
}
|
||||
|
||||
static READ8_HANDLER(soundstate_r)
|
||||
static READ8_HANDLER( soundstate_r )
|
||||
{
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
/* set a timer to force synchronization after the read */
|
||||
timer_call_after_resynch(space->machine, NULL, 0, NULL);
|
||||
return sound_state;
|
||||
return state->sound_state;
|
||||
}
|
||||
|
||||
static TIMER_CALLBACK( nmi_callback )
|
||||
{
|
||||
if (sound_nmi_enable) cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
|
||||
else pending_nmi = 1;
|
||||
sound_state &= ~1;
|
||||
bigevglf_state *state = (bigevglf_state *)machine->driver_data;
|
||||
|
||||
if (state->sound_nmi_enable)
|
||||
cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
|
||||
else
|
||||
state->pending_nmi = 1;
|
||||
state->sound_state &= ~1;
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( sound_command_w ) /* write to port 20 clears bit 0 in status */
|
||||
{
|
||||
for_sound = data;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
state->for_sound = data;
|
||||
timer_call_after_resynch(space->machine, NULL, data, nmi_callback);
|
||||
}
|
||||
|
||||
static READ8_HANDLER( sound_command_r ) /* read from D800 sets bit 0 in status */
|
||||
{
|
||||
sound_state |= 1;
|
||||
return for_sound;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
state->sound_state |= 1;
|
||||
return state->for_sound;
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( nmi_disable_w )
|
||||
{
|
||||
sound_nmi_enable = 0;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
state->sound_nmi_enable = 0;
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( nmi_enable_w )
|
||||
{
|
||||
sound_nmi_enable = 1;
|
||||
if (pending_nmi)
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
state->sound_nmi_enable = 1;
|
||||
if (state->pending_nmi)
|
||||
{
|
||||
cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
|
||||
pending_nmi = 0;
|
||||
state->pending_nmi = 0;
|
||||
}
|
||||
}
|
||||
|
||||
static UINT8 beg13_ls74[2];
|
||||
|
||||
static TIMER_CALLBACK( deferred_ls74_w )
|
||||
{
|
||||
int offs = (param>>8) & 255;
|
||||
bigevglf_state *state = (bigevglf_state *)machine->driver_data;
|
||||
int offs = (param >> 8) & 255;
|
||||
int data = param & 255;
|
||||
beg13_ls74[offs] = data;
|
||||
state->beg13_ls74[offs] = data;
|
||||
}
|
||||
|
||||
/* do this on a timer to let the CPUs synchronize */
|
||||
static WRITE8_HANDLER (beg13A_clr_w)
|
||||
static WRITE8_HANDLER( beg13_a_clr_w )
|
||||
{
|
||||
timer_call_after_resynch(space->machine, NULL, (0<<8) | 0, deferred_ls74_w);
|
||||
timer_call_after_resynch(space->machine, NULL, (0 << 8) | 0, deferred_ls74_w);
|
||||
}
|
||||
static WRITE8_HANDLER (beg13B_clr_w)
|
||||
|
||||
static WRITE8_HANDLER( beg13_b_clr_w )
|
||||
{
|
||||
timer_call_after_resynch(space->machine, NULL, (1<<8) | 0, deferred_ls74_w);
|
||||
timer_call_after_resynch(space->machine, NULL, (1 << 8) | 0, deferred_ls74_w);
|
||||
}
|
||||
static WRITE8_HANDLER (beg13A_set_w)
|
||||
|
||||
static WRITE8_HANDLER( beg13_a_set_w )
|
||||
{
|
||||
timer_call_after_resynch(space->machine, NULL, (0<<8) | 1, deferred_ls74_w);
|
||||
timer_call_after_resynch(space->machine, NULL, (0 << 8) | 1, deferred_ls74_w);
|
||||
}
|
||||
static WRITE8_HANDLER (beg13B_set_w)
|
||||
|
||||
static WRITE8_HANDLER( beg13_b_set_w )
|
||||
{
|
||||
timer_call_after_resynch(space->machine, NULL, (1<<8) | 1, deferred_ls74_w);
|
||||
timer_call_after_resynch(space->machine, NULL, (1 << 8) | 1, deferred_ls74_w);
|
||||
}
|
||||
|
||||
static READ8_HANDLER( beg_status_r )
|
||||
{
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
|
||||
/* d0 = Q of 74ls74 IC13(partA)
|
||||
d1 = Q of 74ls74 IC13(partB)
|
||||
d2 =
|
||||
@ -188,27 +198,30 @@ static READ8_HANDLER( beg_status_r )
|
||||
*/
|
||||
/* set a timer to force synchronization after the read */
|
||||
timer_call_after_resynch(space->machine, NULL, 0, NULL);
|
||||
return (beg13_ls74[0]<<0) | (beg13_ls74[1]<<1);
|
||||
return (state->beg13_ls74[0] << 0) | (state->beg13_ls74[1] << 1);
|
||||
}
|
||||
|
||||
|
||||
static READ8_HANDLER( beg_trackball_x_r )
|
||||
{
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
static const char *const portx_name[2] = { "P1X", "P2X" };
|
||||
|
||||
return input_port_read(space->machine, portx_name[port_select]);
|
||||
return input_port_read(space->machine, portx_name[state->port_select]);
|
||||
}
|
||||
|
||||
static READ8_HANDLER( beg_trackball_y_r )
|
||||
{
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
static const char *const porty_name[2] = { "P1Y", "P2Y" };
|
||||
|
||||
return input_port_read(space->machine, porty_name[port_select]);
|
||||
return input_port_read(space->machine, porty_name[state->port_select]);
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( beg_port08_w )
|
||||
{
|
||||
port_select = (data & 0x04) >> 2;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
state->port_select = (data & 0x04) >> 2;
|
||||
}
|
||||
|
||||
|
||||
@ -293,15 +306,16 @@ INPUT_PORTS_END
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Main CPU */
|
||||
|
||||
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0xbfff) AM_ROM
|
||||
AM_RANGE(0xc000, 0xcfff) AM_RAM
|
||||
AM_RANGE(0xd000, 0xd7ff) AM_ROMBANK(1)
|
||||
AM_RANGE(0xd800, 0xdbff) AM_RAM AM_SHARE(1) /* only half of the RAM is accessible, line a10 of IC73 (6116) is GNDed */
|
||||
AM_RANGE(0xe000, 0xe7ff) AM_WRITE(bigevglf_palette_w) AM_BASE(&paletteram)
|
||||
AM_RANGE(0xe800, 0xefff) AM_WRITEONLY AM_BASE(&bigevglf_spriteram1) /* sprite 'templates' */
|
||||
AM_RANGE(0xe000, 0xe7ff) AM_WRITE(bigevglf_palette_w) AM_BASE_MEMBER(bigevglf_state, paletteram)
|
||||
AM_RANGE(0xe800, 0xefff) AM_WRITEONLY AM_BASE_MEMBER(bigevglf_state, spriteram1) /* sprite 'templates' */
|
||||
AM_RANGE(0xf000, 0xf0ff) AM_READWRITE(bigevglf_vidram_r, bigevglf_vidram_w) /* 41464 (64kB * 8 chips), addressed using ports 1 and 5 */
|
||||
AM_RANGE(0xf840, 0xf8ff) AM_RAM AM_BASE(&bigevglf_spriteram2) /* spriteram (x,y,offset in spriteram1,palette) */
|
||||
AM_RANGE(0xf840, 0xf8ff) AM_RAM AM_BASE_MEMBER(bigevglf_state, spriteram2) /* spriteram (x,y,offset in spriteram1,palette) */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( bigevglf_portmap, ADDRESS_SPACE_IO, 8 )
|
||||
@ -309,8 +323,8 @@ static ADDRESS_MAP_START( bigevglf_portmap, ADDRESS_SPACE_IO, 8 )
|
||||
AM_RANGE(0x00, 0x00) AM_WRITENOP /* video ram enable ???*/
|
||||
AM_RANGE(0x01, 0x01) AM_WRITE(bigevglf_gfxcontrol_w) /* plane select */
|
||||
AM_RANGE(0x02, 0x02) AM_WRITE(beg_banking_w)
|
||||
AM_RANGE(0x03, 0x03) AM_WRITE(beg13A_set_w)
|
||||
AM_RANGE(0x04, 0x04) AM_WRITE(beg13B_clr_w)
|
||||
AM_RANGE(0x03, 0x03) AM_WRITE(beg13_a_set_w)
|
||||
AM_RANGE(0x04, 0x04) AM_WRITE(beg13_b_clr_w)
|
||||
AM_RANGE(0x05, 0x05) AM_WRITE(bigevglf_vidram_addr_w) /* video banking (256 banks) for f000-f0ff area */
|
||||
AM_RANGE(0x06, 0x06) AM_READ(beg_status_r)
|
||||
ADDRESS_MAP_END
|
||||
@ -328,15 +342,15 @@ ADDRESS_MAP_END
|
||||
|
||||
static READ8_HANDLER( sub_cpu_mcu_coin_port_r )
|
||||
{
|
||||
static int bit5=0;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
/*
|
||||
bit 0 and bit 1 = coin inputs
|
||||
bit 3 and bit 4 = MCU status
|
||||
bit 5 = must toggle, vblank ?
|
||||
|
||||
*/
|
||||
bit5 ^= 0x20;
|
||||
return bigevglf_mcu_status_r(space,0) | (input_port_read(space->machine, "PORT04") & 3) | bit5; /* bit 0 and bit 1 - coin inputs */
|
||||
state->mcu_coin_bit5 ^= 0x20;
|
||||
return bigevglf_mcu_status_r(space, 0) | (input_port_read(space->machine, "PORT04") & 3) | state->mcu_coin_bit5; /* bit 0 and bit 1 - coin inputs */
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( bigevglf_sub_portmap, ADDRESS_SPACE_IO, 8 )
|
||||
@ -353,8 +367,8 @@ static ADDRESS_MAP_START( bigevglf_sub_portmap, ADDRESS_SPACE_IO, 8 )
|
||||
AM_RANGE(0x0b, 0x0b) AM_READ(bigevglf_mcu_r)
|
||||
AM_RANGE(0x0c, 0x0c) AM_WRITE(bigevglf_mcu_w)
|
||||
AM_RANGE(0x0e, 0x0e) AM_WRITENOP /* 0-enable MCU, 1-keep reset line ASSERTED; D0 goes to the input of ls74 and the /Q of this ls74 goes to reset line on 68705 */
|
||||
AM_RANGE(0x10, 0x17) AM_WRITE(beg13A_clr_w)
|
||||
AM_RANGE(0x18, 0x1f) AM_WRITE(beg13B_set_w)
|
||||
AM_RANGE(0x10, 0x17) AM_WRITE(beg13_a_clr_w)
|
||||
AM_RANGE(0x18, 0x1f) AM_WRITE(beg13_b_set_w)
|
||||
AM_RANGE(0x20, 0x20) AM_READWRITE(beg_fromsound_r, sound_command_w)
|
||||
AM_RANGE(0x21, 0x21) AM_READ(beg_soundstate_r)
|
||||
ADDRESS_MAP_END
|
||||
@ -385,12 +399,12 @@ ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( m68705_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x7ff)
|
||||
AM_RANGE(0x0000, 0x0000) AM_READWRITE(bigevglf_68705_portA_r, bigevglf_68705_portA_w)
|
||||
AM_RANGE(0x0001, 0x0001) AM_READWRITE(bigevglf_68705_portB_r, bigevglf_68705_portB_w)
|
||||
AM_RANGE(0x0002, 0x0002) AM_READWRITE(bigevglf_68705_portC_r, bigevglf_68705_portC_w)
|
||||
AM_RANGE(0x0004, 0x0004) AM_WRITE(bigevglf_68705_ddrA_w)
|
||||
AM_RANGE(0x0005, 0x0005) AM_WRITE(bigevglf_68705_ddrB_w)
|
||||
AM_RANGE(0x0006, 0x0006) AM_WRITE(bigevglf_68705_ddrC_w)
|
||||
AM_RANGE(0x0000, 0x0000) AM_READWRITE(bigevglf_68705_port_a_r, bigevglf_68705_port_a_w)
|
||||
AM_RANGE(0x0001, 0x0001) AM_READWRITE(bigevglf_68705_port_b_r, bigevglf_68705_port_b_w)
|
||||
AM_RANGE(0x0002, 0x0002) AM_READWRITE(bigevglf_68705_port_c_r, bigevglf_68705_port_c_w)
|
||||
AM_RANGE(0x0004, 0x0004) AM_WRITE(bigevglf_68705_ddr_a_w)
|
||||
AM_RANGE(0x0005, 0x0005) AM_WRITE(bigevglf_68705_ddr_b_w)
|
||||
AM_RANGE(0x0006, 0x0006) AM_WRITE(bigevglf_68705_ddr_c_w)
|
||||
AM_RANGE(0x0010, 0x007f) AM_RAM
|
||||
AM_RANGE(0x0080, 0x07ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
@ -411,20 +425,86 @@ static GFXDECODE_START( bigevglf )
|
||||
GFXDECODE_ENTRY( "gfx1", 0, gfxlayout, 0x20*16, 16 )
|
||||
GFXDECODE_END
|
||||
|
||||
static MACHINE_RESET( bigevglf )
|
||||
{
|
||||
beg13_ls74[0] = 0;
|
||||
beg13_ls74[1] = 0;
|
||||
}
|
||||
|
||||
|
||||
static const msm5232_interface msm5232_config =
|
||||
{
|
||||
{ 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6 } /* 0.65 (???) uF capacitors */
|
||||
};
|
||||
|
||||
static MACHINE_START( bigevglf )
|
||||
{
|
||||
bigevglf_state *state = (bigevglf_state *)machine->driver_data;
|
||||
|
||||
state_save_register_global(machine, state->vidram_bank);
|
||||
state_save_register_global(machine, state->plane_selected);
|
||||
state_save_register_global(machine, state->plane_visible);
|
||||
|
||||
state_save_register_global_array(machine, state->beg13_ls74);
|
||||
state_save_register_global(machine, state->beg_bank);
|
||||
state_save_register_global(machine, state->port_select);
|
||||
|
||||
state_save_register_global(machine, state->sound_nmi_enable);
|
||||
state_save_register_global(machine, state->pending_nmi);
|
||||
state_save_register_global(machine, state->for_sound);
|
||||
state_save_register_global(machine, state->from_sound);
|
||||
state_save_register_global(machine, state->sound_state);
|
||||
|
||||
state_save_register_global(machine, state->main_sent);
|
||||
state_save_register_global(machine, state->mcu_sent);
|
||||
state_save_register_global(machine, state->mcu_coin_bit5);
|
||||
|
||||
state_save_register_global(machine, state->port_a_in);
|
||||
state_save_register_global(machine, state->port_a_out);
|
||||
state_save_register_global(machine, state->ddr_a);
|
||||
state_save_register_global(machine, state->port_b_in);
|
||||
state_save_register_global(machine, state->port_b_out);
|
||||
state_save_register_global(machine, state->ddr_b);
|
||||
state_save_register_global(machine, state->port_c_in);
|
||||
state_save_register_global(machine, state->port_c_out);
|
||||
state_save_register_global(machine, state->ddr_c);
|
||||
state_save_register_global(machine, state->from_mcu);
|
||||
}
|
||||
|
||||
static MACHINE_RESET( bigevglf )
|
||||
{
|
||||
bigevglf_state *state = (bigevglf_state *)machine->driver_data;
|
||||
|
||||
state->vidram_bank = 0;
|
||||
state->plane_selected = 0;
|
||||
state->plane_visible = 0;
|
||||
|
||||
state->beg13_ls74[0] = 0;
|
||||
state->beg13_ls74[1] = 0;
|
||||
state->beg_bank = 0;
|
||||
state->port_select = 0;
|
||||
|
||||
state->sound_nmi_enable = 0;
|
||||
state->pending_nmi = 0;
|
||||
state->for_sound = 0;
|
||||
state->from_sound = 0;
|
||||
state->sound_state = 0;
|
||||
|
||||
state->main_sent = 0;
|
||||
state->mcu_sent = 0;
|
||||
state->mcu_coin_bit5 = 0;
|
||||
|
||||
state->port_a_in = 0;
|
||||
state->port_a_out = 0;
|
||||
state->ddr_a = 0;
|
||||
state->port_b_in = 0;
|
||||
state->port_b_out = 0;
|
||||
state->ddr_b = 0;
|
||||
state->port_c_in = 0;
|
||||
state->port_c_out = 0;
|
||||
state->ddr_c = 0;
|
||||
state->from_mcu = 0;
|
||||
}
|
||||
|
||||
|
||||
static MACHINE_DRIVER_START( bigevglf )
|
||||
|
||||
/* driver data */
|
||||
MDRV_DRIVER_DATA(bigevglf_state)
|
||||
|
||||
/* basic machine hardware */
|
||||
MDRV_CPU_ADD("maincpu", Z80,10000000/2) /* 5 MHz ? */
|
||||
MDRV_CPU_PROGRAM_MAP(main_map)
|
||||
@ -447,7 +527,9 @@ static MACHINE_DRIVER_START( bigevglf )
|
||||
|
||||
MDRV_QUANTUM_TIME(HZ(600)) /* 10 CPU slices per frame - interleaving is forced on the fly */
|
||||
|
||||
MDRV_MACHINE_START(bigevglf)
|
||||
MDRV_MACHINE_RESET(bigevglf)
|
||||
|
||||
/* video hardware */
|
||||
MDRV_SCREEN_ADD("screen", RASTER)
|
||||
MDRV_SCREEN_REFRESH_RATE(60)
|
||||
@ -549,5 +631,11 @@ ROM_START( bigevglfj )
|
||||
ROM_LOAD( "a67-15", 0x18000, 0x8000, CRC(1d261428) SHA1(0f3e6d83a8a462436fa414de4e1e4306db869d3e))
|
||||
ROM_END
|
||||
|
||||
GAME( 1986, bigevglf, 0, bigevglf, bigevglf, 0, ROT270, "Taito America Corporation", "Big Event Golf (US)", GAME_NO_COCKTAIL)
|
||||
GAME( 1986, bigevglfj,bigevglf, bigevglf, bigevglj, 0, ROT270, "Taito Corporation", "Big Event Golf (Japan)", GAME_NO_COCKTAIL)
|
||||
static DRIVER_INIT( bigevglf )
|
||||
{
|
||||
UINT8 *ROM = memory_region(machine, "maincpu");
|
||||
memory_configure_bank(machine, 1, 0, 0xff, &ROM[0x10000], 0x800);
|
||||
}
|
||||
|
||||
GAME( 1986, bigevglf, 0, bigevglf, bigevglf, bigevglf, ROT270, "Taito America Corporation", "Big Event Golf (US)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1986, bigevglfj, bigevglf, bigevglf, bigevglj, bigevglf, ROT270, "Taito Corporation", "Big Event Golf (Japan)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
|
||||
|
@ -1,11 +1,66 @@
|
||||
/***************************************************************************
|
||||
|
||||
Block Out
|
||||
Block Out
|
||||
|
||||
driver by Nicola Salmoria
|
||||
driver by Nicola Salmoria
|
||||
|
||||
DIP locations verified for:
|
||||
- blockout (manual)
|
||||
DIP locations verified for:
|
||||
- blockout (manual)
|
||||
|
||||
****************************************************************************
|
||||
|
||||
Agress PCB Info
|
||||
Palco System Corp., 1991
|
||||
|
||||
This game runs on an original unmodified Technos 'Block Out' PCB.
|
||||
All of the Technos identifications are hidden under 'Palco' or 'Agress' stickers.
|
||||
|
||||
PCB Layout (Applies to both Agress and Block Out)
|
||||
----------
|
||||
|
||||
PS-05307 (sticker)
|
||||
TA-0029-P1-02 (printed on Block Out PCB under the sticker)
|
||||
|
||||
|--------------------------------------------------------|
|
||||
| M51516 YM2151 3.579545MHz|
|
||||
| YM3012 6116 |
|
||||
| MB3615 1.056MHz PALCO3.73 20MHz |
|
||||
| M6295 |
|
||||
| MB3615 82S129PR.25 28MHz |
|
||||
| PALCO4.78 |
|
||||
| Z80 |-------| |
|
||||
| |TECHNOS| |
|
||||
|J 2018 6264 |TJ-001 | |
|
||||
|A |(QFP80)| |
|
||||
|M 2018 |-------| |
|
||||
|M |
|
||||
|A 6264 |
|
||||
| MB81461-12 |
|
||||
| MB81461-12 |
|
||||
| MB81461-12 |
|
||||
| MB81461-12 |
|
||||
| MB81461-12 |
|
||||
| DSW1(8) MB81461-12 |
|
||||
| MB81461-12 |
|
||||
| DSW2(8) MB81461-12 |
|
||||
| PALCO2.91 |
|
||||
| PALCO1.81 68000 |
|
||||
|--------------------------------------------------------|
|
||||
|
||||
Notes:
|
||||
68000 clock : 10.000MHz
|
||||
Z80 clock : 3.579545MHz
|
||||
M6295 clock : 1.056MHz, sample rate = 1056000 / 132
|
||||
YM2151 clock: 3.579545MHz
|
||||
VSync : 58Hz
|
||||
|
||||
PROM is used for video timing etc, without it, no graphics are displayed,
|
||||
only 'Insert Coin' and the manufacturer text/year on the title screen.
|
||||
|
||||
palco1.81 \ Main program 27C010
|
||||
palco2.91 / "
|
||||
palco3.73 OKI samples 27C256
|
||||
palco4.78 Z80 program 27C010
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
@ -15,16 +70,7 @@ DIP locations verified for:
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "sound/2151intf.h"
|
||||
#include "sound/okim6295.h"
|
||||
|
||||
|
||||
extern UINT16 *blockout_videoram;
|
||||
extern UINT16 *blockout_frontvideoram;
|
||||
|
||||
WRITE16_HANDLER( blockout_videoram_w );
|
||||
WRITE16_HANDLER( blockout_paletteram_w );
|
||||
WRITE16_HANDLER( blockout_frontcolor_w );
|
||||
VIDEO_START( blockout );
|
||||
VIDEO_UPDATE( blockout );
|
||||
#include "blockout.h"
|
||||
|
||||
|
||||
static INTERRUPT_GEN( blockout_interrupt )
|
||||
@ -45,6 +91,12 @@ static WRITE16_HANDLER( blockout_sound_command_w )
|
||||
}
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Address maps
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x100001) AM_READ_PORT("P1")
|
||||
@ -54,13 +106,13 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x100008, 0x100009) AM_READ_PORT("DSW2")
|
||||
AM_RANGE(0x100014, 0x100015) AM_WRITE(blockout_sound_command_w)
|
||||
AM_RANGE(0x100016, 0x100017) AM_WRITENOP /* don't know, maybe reset sound CPU */
|
||||
AM_RANGE(0x180000, 0x1bffff) AM_RAM_WRITE(blockout_videoram_w) AM_BASE(&blockout_videoram)
|
||||
AM_RANGE(0x180000, 0x1bffff) AM_RAM_WRITE(blockout_videoram_w) AM_BASE_MEMBER(blockout_state, videoram)
|
||||
AM_RANGE(0x1d4000, 0x1dffff) AM_RAM /* work RAM */
|
||||
AM_RANGE(0x1f4000, 0x1fffff) AM_RAM /* work RAM */
|
||||
AM_RANGE(0x200000, 0x207fff) AM_RAM AM_BASE(&blockout_frontvideoram)
|
||||
AM_RANGE(0x200000, 0x207fff) AM_RAM AM_BASE_MEMBER(blockout_state, frontvideoram)
|
||||
AM_RANGE(0x208000, 0x21ffff) AM_RAM /* ??? */
|
||||
AM_RANGE(0x280002, 0x280003) AM_WRITE(blockout_frontcolor_w)
|
||||
AM_RANGE(0x280200, 0x2805ff) AM_RAM_WRITE(blockout_paletteram_w) AM_BASE(&paletteram16)
|
||||
AM_RANGE(0x280200, 0x2805ff) AM_RAM_WRITE(blockout_paletteram_w) AM_BASE_MEMBER(blockout_state, paletteram16)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( audio_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
@ -72,6 +124,12 @@ static ADDRESS_MAP_START( audio_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Input ports
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static INPUT_PORTS_START( blockout )
|
||||
PORT_START("P1")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
|
||||
@ -167,6 +225,13 @@ static INPUT_PORTS_START( agress )
|
||||
PORT_DIPSETTING( 0x00, "2" )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Sound interface
|
||||
*
|
||||
*************************************/
|
||||
|
||||
/* handler called by the 2151 emulator when the internal timers cause an IRQ */
|
||||
static void blockout_irq_handler(const device_config *device, int irq)
|
||||
{
|
||||
@ -179,8 +244,24 @@ static const ym2151_interface ym2151_config =
|
||||
};
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Machine driver
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static MACHINE_RESET( blockout )
|
||||
{
|
||||
blockout_state *state = (blockout_state *)machine->driver_data;
|
||||
|
||||
state->color = 0;
|
||||
}
|
||||
|
||||
static MACHINE_DRIVER_START( blockout )
|
||||
|
||||
/* driver data */
|
||||
MDRV_DRIVER_DATA(blockout_state)
|
||||
|
||||
/* basic machine hardware */
|
||||
MDRV_CPU_ADD("maincpu", M68000, 10000000) /* MRH - 8.76 makes gfx/adpcm samples sync better -- but 10 is correct speed*/
|
||||
MDRV_CPU_PROGRAM_MAP(main_map)
|
||||
@ -189,6 +270,8 @@ static MACHINE_DRIVER_START( blockout )
|
||||
MDRV_CPU_ADD("audiocpu", Z80, 3579545) /* 3.579545 MHz */
|
||||
MDRV_CPU_PROGRAM_MAP(audio_map)
|
||||
|
||||
MDRV_MACHINE_RESET(blockout)
|
||||
|
||||
/* video hardware */
|
||||
MDRV_SCREEN_ADD("screen", RASTER)
|
||||
MDRV_SCREEN_REFRESH_RATE(58)
|
||||
@ -218,11 +301,11 @@ MACHINE_DRIVER_END
|
||||
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
|
||||
Game driver(s)
|
||||
|
||||
***************************************************************************/
|
||||
/*************************************
|
||||
*
|
||||
* ROM definition(s)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
ROM_START( blockout )
|
||||
ROM_REGION( 0x40000, "maincpu", 0 ) /* 2*128k for 68000 code */
|
||||
@ -269,61 +352,6 @@ ROM_START( blockoutj )
|
||||
ROM_LOAD( "mb7114h.25", 0x0000, 0x0100, CRC(b25bbda7) SHA1(840f1470886bd0019db3cd29e3d1d80205a65f48) ) /* unknown */
|
||||
ROM_END
|
||||
|
||||
/*
|
||||
|
||||
Agress
|
||||
Palco System Corp., 1991
|
||||
|
||||
This game runs on an original unmodified Technos 'Block Out' PCB.
|
||||
All of the Technos identifications are hidden under 'Palco' or 'Agress' stickers.
|
||||
|
||||
PCB Layout (Applies to both Agress and Block Out)
|
||||
----------
|
||||
|
||||
PS-05307 (sticker)
|
||||
TA-0029-P1-02 (printed on Block Out PCB under the sticker)
|
||||
|--------------------------------------------------------|
|
||||
| M51516 YM2151 3.579545MHz|
|
||||
| YM3012 6116 |
|
||||
| MB3615 1.056MHz PALCO3.73 20MHz |
|
||||
| M6295 |
|
||||
| MB3615 82S129PR.25 28MHz |
|
||||
| PALCO4.78 |
|
||||
| Z80 |-------| |
|
||||
| |TECHNOS| |
|
||||
|J 2018 6264 |TJ-001 | |
|
||||
|A |(QFP80)| |
|
||||
|M 2018 |-------| |
|
||||
|M |
|
||||
|A 6264 |
|
||||
| MB81461-12 |
|
||||
| MB81461-12 |
|
||||
| MB81461-12 |
|
||||
| MB81461-12 |
|
||||
| MB81461-12 |
|
||||
| DSW1(8) MB81461-12 |
|
||||
| MB81461-12 |
|
||||
| DSW2(8) MB81461-12 |
|
||||
| PALCO2.91 |
|
||||
| PALCO1.81 68000 |
|
||||
|--------------------------------------------------------|
|
||||
Notes:
|
||||
68000 clock : 10.000MHz
|
||||
Z80 clock : 3.579545MHz
|
||||
M6295 clock : 1.056MHz, sample rate = 1056000 / 132
|
||||
YM2151 clock: 3.579545MHz
|
||||
VSync : 58Hz
|
||||
|
||||
PROM is used for video timing etc, without it, no graphics are displayed,
|
||||
only 'Insert Coin' and the manufacturer text/year on the title screen.
|
||||
|
||||
palco1.81 \ Main program 27C010
|
||||
palco2.91 / "
|
||||
palco3.73 OKI samples 27C256
|
||||
palco4.78 Z80 program 27C010
|
||||
|
||||
*/
|
||||
|
||||
ROM_START( agress )
|
||||
ROM_REGION( 0x40000, "maincpu", 0 ) /* 2*128k for 68000 code */
|
||||
ROM_LOAD16_BYTE( "palco1.81", 0x00000, 0x20000, CRC(3acc917a) SHA1(14960588673458d862daf14a8d7474af6c95c2ad) )
|
||||
@ -356,8 +384,14 @@ ROM_START( agressb )
|
||||
ROM_END
|
||||
|
||||
|
||||
GAME( 1989, blockout, 0, blockout, blockout, 0, ROT0, "Technos Japan + California Dreams", "Block Out (set 1)", 0 )
|
||||
GAME( 1989, blockout2,blockout, blockout, blockout, 0, ROT0, "Technos Japan + California Dreams", "Block Out (set 2)", 0 )
|
||||
GAME( 1989, blockoutj,blockout, blockout, blckoutj, 0, ROT0, "Technos Japan + California Dreams", "Block Out (Japan)", 0 )
|
||||
GAME( 1991, agress, 0, blockout, agress, 0, ROT0, "Palco", "Agress", 0 )
|
||||
GAME( 2003, agressb, agress, blockout, agress, 0, ROT0, "Palco", "Agress (English bootleg)", 0 )
|
||||
/*************************************
|
||||
*
|
||||
* Game driver(s)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
GAME( 1989, blockout, 0, blockout, blockout, 0, ROT0, "Technos Japan + California Dreams", "Block Out (set 1)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1989, blockout2,blockout, blockout, blockout, 0, ROT0, "Technos Japan + California Dreams", "Block Out (set 2)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1989, blockoutj,blockout, blockout, blckoutj, 0, ROT0, "Technos Japan + California Dreams", "Block Out (Japan)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1991, agress, 0, blockout, agress, 0, ROT0, "Palco", "Agress", GAME_SUPPORTS_SAVE )
|
||||
GAME( 2003, agressb, agress, blockout, agress, 0, ROT0, "Palco", "Agress (English bootleg)", GAME_SUPPORTS_SAVE )
|
||||
|
@ -1,14 +1,49 @@
|
||||
|
||||
typedef struct _bigevglf_state bigevglf_state;
|
||||
struct _bigevglf_state
|
||||
{
|
||||
/* memory pointers */
|
||||
UINT8 * paletteram;
|
||||
UINT8 * spriteram1;
|
||||
UINT8 * spriteram2;
|
||||
|
||||
/* video-related */
|
||||
bitmap_t *tmp_bitmap[4];
|
||||
UINT8 *vidram;
|
||||
UINT32 vidram_bank, plane_selected, plane_visible;
|
||||
|
||||
/* sound-related */
|
||||
int sound_nmi_enable, pending_nmi;
|
||||
UINT8 for_sound;
|
||||
UINT8 from_sound;
|
||||
UINT8 sound_state;
|
||||
|
||||
/* MCU related */
|
||||
UINT8 from_mcu;
|
||||
int mcu_sent, main_sent;
|
||||
UINT8 port_a_in, port_a_out, ddr_a;
|
||||
UINT8 port_b_in, port_b_out, ddr_b;
|
||||
UINT8 port_c_in, port_c_out, ddr_c;
|
||||
int mcu_coin_bit5;
|
||||
|
||||
/* misc */
|
||||
UINT32 beg_bank;
|
||||
UINT8 beg13_ls74[2];
|
||||
UINT8 port_select; /* for muxed controls */
|
||||
};
|
||||
|
||||
|
||||
/*----------- defined in machine/bigevglf.c -----------*/
|
||||
|
||||
READ8_HANDLER( bigevglf_68705_portA_r );
|
||||
WRITE8_HANDLER( bigevglf_68705_portA_w );
|
||||
READ8_HANDLER( bigevglf_68705_portB_r );
|
||||
WRITE8_HANDLER( bigevglf_68705_portB_w );
|
||||
READ8_HANDLER( bigevglf_68705_portC_r );
|
||||
WRITE8_HANDLER( bigevglf_68705_portC_w );
|
||||
WRITE8_HANDLER( bigevglf_68705_ddrA_w );
|
||||
WRITE8_HANDLER( bigevglf_68705_ddrB_w );
|
||||
WRITE8_HANDLER( bigevglf_68705_ddrC_w );
|
||||
READ8_HANDLER( bigevglf_68705_port_a_r );
|
||||
WRITE8_HANDLER( bigevglf_68705_port_a_w );
|
||||
READ8_HANDLER( bigevglf_68705_port_b_r );
|
||||
WRITE8_HANDLER( bigevglf_68705_port_b_w );
|
||||
READ8_HANDLER( bigevglf_68705_port_c_r );
|
||||
WRITE8_HANDLER( bigevglf_68705_port_c_w );
|
||||
WRITE8_HANDLER( bigevglf_68705_ddr_a_w );
|
||||
WRITE8_HANDLER( bigevglf_68705_ddr_b_w );
|
||||
WRITE8_HANDLER( bigevglf_68705_ddr_c_w );
|
||||
|
||||
WRITE8_HANDLER( bigevglf_mcu_w );
|
||||
READ8_HANDLER( bigevglf_mcu_r );
|
||||
@ -17,9 +52,6 @@ READ8_HANDLER( bigevglf_mcu_status_r );
|
||||
|
||||
/*----------- defined in video/bigevglf.c -----------*/
|
||||
|
||||
extern UINT8 *bigevglf_spriteram1;
|
||||
extern UINT8 *bigevglf_spriteram2;
|
||||
|
||||
VIDEO_START( bigevglf );
|
||||
VIDEO_UPDATE( bigevglf );
|
||||
|
||||
|
28
src/mame/includes/blockout.h
Normal file
28
src/mame/includes/blockout.h
Normal file
@ -0,0 +1,28 @@
|
||||
/***************************************************************************
|
||||
|
||||
Blockout
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
typedef struct _blockout_state blockout_state;
|
||||
struct _blockout_state
|
||||
{
|
||||
/* memory pointers */
|
||||
UINT16 * videoram;
|
||||
UINT16 * frontvideoram;
|
||||
UINT16 * paletteram16;
|
||||
|
||||
/* video-related */
|
||||
bitmap_t *tmpbitmap;
|
||||
UINT16 color;
|
||||
};
|
||||
|
||||
|
||||
/*----------- defined in video/blockout.c -----------*/
|
||||
|
||||
WRITE16_HANDLER( blockout_videoram_w );
|
||||
WRITE16_HANDLER( blockout_paletteram_w );
|
||||
WRITE16_HANDLER( blockout_frontcolor_w );
|
||||
|
||||
VIDEO_START( blockout );
|
||||
VIDEO_UPDATE( blockout );
|
@ -11,97 +11,107 @@
|
||||
#include "includes/bigevglf.h"
|
||||
|
||||
|
||||
static UINT8 from_mcu;
|
||||
static int mcu_sent = 0,main_sent = 0;
|
||||
|
||||
|
||||
static UINT8 portA_in,portA_out,ddrA;
|
||||
static UINT8 portB_in,portB_out,ddrB;
|
||||
static UINT8 portC_in,portC_out,ddrC;
|
||||
|
||||
READ8_HANDLER( bigevglf_68705_portA_r )
|
||||
READ8_HANDLER( bigevglf_68705_port_a_r )
|
||||
{
|
||||
return (portA_out & ddrA) | (portA_in & ~ddrA);
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
return (state->port_a_out & state->ddr_a) | (state->port_a_in & ~state->ddr_a);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( bigevglf_68705_portA_w )
|
||||
WRITE8_HANDLER( bigevglf_68705_port_a_w )
|
||||
{
|
||||
portA_out = data;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
state->port_a_out = data;
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( bigevglf_68705_ddrA_w )
|
||||
WRITE8_HANDLER( bigevglf_68705_ddr_a_w )
|
||||
{
|
||||
ddrA = data;
|
||||
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
state->ddr_a = data;
|
||||
}
|
||||
|
||||
READ8_HANDLER( bigevglf_68705_portB_r )
|
||||
READ8_HANDLER( bigevglf_68705_port_b_r )
|
||||
{
|
||||
return (portB_out & ddrB) | (portB_in & ~ddrB);
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
return (state->port_b_out & state->ddr_b) | (state->port_b_in & ~state->ddr_b);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( bigevglf_68705_portB_w )
|
||||
WRITE8_HANDLER( bigevglf_68705_port_b_w )
|
||||
{
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
|
||||
if ((ddrB & 0x02) && (~portB_out & 0x02) && (data & 0x02)) /* positive going transition of the clock */
|
||||
if ((state->ddr_b & 0x02) && (~state->port_b_out & 0x02) && (data & 0x02)) /* positive going transition of the clock */
|
||||
{
|
||||
cputag_set_input_line(space->machine, "mcu", 0, CLEAR_LINE);
|
||||
main_sent = 0;
|
||||
state->main_sent = 0;
|
||||
|
||||
}
|
||||
if ((ddrB & 0x04) && (~portB_out & 0x04) && (data & 0x04) ) /* positive going transition of the clock */
|
||||
if ((state->ddr_b & 0x04) && (~state->port_b_out & 0x04) && (data & 0x04) ) /* positive going transition of the clock */
|
||||
{
|
||||
from_mcu = portA_out;
|
||||
mcu_sent = 0;
|
||||
state->from_mcu = state->port_a_out;
|
||||
state->mcu_sent = 0;
|
||||
}
|
||||
|
||||
portB_out = data;
|
||||
state->port_b_out = data;
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( bigevglf_68705_ddrB_w )
|
||||
WRITE8_HANDLER( bigevglf_68705_ddr_b_w )
|
||||
{
|
||||
ddrB = data;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
state->ddr_b = data;
|
||||
}
|
||||
|
||||
READ8_HANDLER( bigevglf_68705_portC_r )
|
||||
READ8_HANDLER( bigevglf_68705_port_c_r )
|
||||
{
|
||||
portC_in = 0;
|
||||
if (main_sent) portC_in |= 0x01;
|
||||
if (mcu_sent) portC_in |= 0x02;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
|
||||
return (portC_out & ddrC) | (portC_in & ~ddrC);
|
||||
state->port_c_in = 0;
|
||||
if (state->main_sent)
|
||||
state->port_c_in |= 0x01;
|
||||
if (state->mcu_sent)
|
||||
state->port_c_in |= 0x02;
|
||||
|
||||
return (state->port_c_out & state->ddr_c) | (state->port_c_in & ~state->ddr_c);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( bigevglf_68705_portC_w )
|
||||
WRITE8_HANDLER( bigevglf_68705_port_c_w )
|
||||
{
|
||||
portC_out = data;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
state->port_c_out = data;
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( bigevglf_68705_ddrC_w )
|
||||
WRITE8_HANDLER( bigevglf_68705_ddr_c_w )
|
||||
{
|
||||
ddrC = data;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
state->ddr_c = data;
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( bigevglf_mcu_w )
|
||||
{
|
||||
portA_in = data;
|
||||
main_sent = 1;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
|
||||
state->port_a_in = data;
|
||||
state->main_sent = 1;
|
||||
cputag_set_input_line(space->machine, "mcu", 0, ASSERT_LINE);
|
||||
}
|
||||
|
||||
|
||||
READ8_HANDLER( bigevglf_mcu_r )
|
||||
{
|
||||
mcu_sent = 1;
|
||||
return from_mcu;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
|
||||
state->mcu_sent = 1;
|
||||
return state->from_mcu;
|
||||
}
|
||||
|
||||
READ8_HANDLER( bigevglf_mcu_status_r )
|
||||
{
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
int res = 0;
|
||||
|
||||
if (!main_sent) res |= 0x08;
|
||||
if (!mcu_sent) res |= 0x10;
|
||||
if (!state->main_sent)
|
||||
res |= 0x08;
|
||||
if (!state->mcu_sent)
|
||||
res |= 0x10;
|
||||
|
||||
return res;
|
||||
}
|
||||
|
@ -9,87 +9,93 @@
|
||||
#include "includes/bigevglf.h"
|
||||
|
||||
|
||||
UINT8 *bigevglf_spriteram1;
|
||||
UINT8 *bigevglf_spriteram2;
|
||||
|
||||
|
||||
static UINT32 vidram_bank = 0;
|
||||
static UINT32 plane_selected = 0;
|
||||
static UINT32 plane_visible = 0;
|
||||
static UINT8 *vidram;
|
||||
|
||||
|
||||
static bitmap_t *tmp_bitmap[4];
|
||||
|
||||
WRITE8_HANDLER(bigevglf_palette_w)
|
||||
{
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
int color;
|
||||
|
||||
paletteram[offset] = data;
|
||||
color = paletteram[offset&0x3ff] | (paletteram[0x400+(offset&0x3ff)] << 8);
|
||||
palette_set_color_rgb(space->machine, offset&0x3ff, pal4bit(color >> 4), pal4bit(color >> 0), pal4bit(color >> 8));
|
||||
state->paletteram[offset] = data;
|
||||
color = state->paletteram[offset & 0x3ff] | (state->paletteram[0x400 + (offset & 0x3ff)] << 8);
|
||||
palette_set_color_rgb(space->machine, offset & 0x3ff, pal4bit(color >> 4), pal4bit(color >> 0), pal4bit(color >> 8));
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( bigevglf_gfxcontrol_w )
|
||||
{
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
|
||||
/* bits used: 0,1,2,3
|
||||
0 and 2 select plane,
|
||||
1 and 3 select visible plane,
|
||||
*/
|
||||
plane_selected=((data & 4)>>1) | (data&1);
|
||||
plane_visible =((data & 8)>>2) | ((data&2)>>1);
|
||||
state->plane_selected = ((data & 4) >> 1) | (data & 1);
|
||||
state->plane_visible = ((data & 8) >> 2) | ((data & 2) >> 1);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( bigevglf_vidram_addr_w )
|
||||
{
|
||||
vidram_bank = (data & 0xff) * 0x100;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
state->vidram_bank = (data & 0xff) * 0x100;
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( bigevglf_vidram_w )
|
||||
{
|
||||
UINT32 x,y,o;
|
||||
o = vidram_bank + offset;
|
||||
vidram[ o+0x10000*plane_selected ] = data;
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
UINT32 x, y, o;
|
||||
o = state->vidram_bank + offset;
|
||||
state->vidram[o + 0x10000 * state->plane_selected] = data;
|
||||
y = o >>8;
|
||||
x = (o & 255);
|
||||
*BITMAP_ADDR16(tmp_bitmap[plane_selected], y, x) = data;
|
||||
*BITMAP_ADDR16(state->tmp_bitmap[state->plane_selected], y, x) = data;
|
||||
}
|
||||
|
||||
READ8_HANDLER( bigevglf_vidram_r )
|
||||
{
|
||||
return vidram[ 0x10000 * plane_selected + vidram_bank + offset];
|
||||
bigevglf_state *state = (bigevglf_state *)space->machine->driver_data;
|
||||
return state->vidram[0x10000 * state->plane_selected + state->vidram_bank + offset];
|
||||
}
|
||||
|
||||
VIDEO_START( bigevglf )
|
||||
{
|
||||
tmp_bitmap[0] = video_screen_auto_bitmap_alloc(machine->primary_screen);
|
||||
tmp_bitmap[1] = video_screen_auto_bitmap_alloc(machine->primary_screen);
|
||||
tmp_bitmap[2] = video_screen_auto_bitmap_alloc(machine->primary_screen);
|
||||
tmp_bitmap[3] = video_screen_auto_bitmap_alloc(machine->primary_screen);
|
||||
vidram = auto_alloc_array(machine, UINT8, 0x100*0x100 * 4);
|
||||
bigevglf_state *state = (bigevglf_state *)machine->driver_data;
|
||||
|
||||
state->tmp_bitmap[0] = video_screen_auto_bitmap_alloc(machine->primary_screen);
|
||||
state->tmp_bitmap[1] = video_screen_auto_bitmap_alloc(machine->primary_screen);
|
||||
state->tmp_bitmap[2] = video_screen_auto_bitmap_alloc(machine->primary_screen);
|
||||
state->tmp_bitmap[3] = video_screen_auto_bitmap_alloc(machine->primary_screen);
|
||||
state_save_register_global_bitmap(machine, state->tmp_bitmap[0]);
|
||||
state_save_register_global_bitmap(machine, state->tmp_bitmap[1]);
|
||||
state_save_register_global_bitmap(machine, state->tmp_bitmap[2]);
|
||||
state_save_register_global_bitmap(machine, state->tmp_bitmap[3]);
|
||||
|
||||
state->vidram = auto_alloc_array(machine, UINT8, 0x100 * 0x100 * 4);
|
||||
|
||||
state_save_register_global_pointer(machine, state->vidram, 0x100 * 0x100 * 4);
|
||||
}
|
||||
|
||||
static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)
|
||||
static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
|
||||
{
|
||||
int i,j;
|
||||
for (i = 0xc0-4; i >= 0; i-=4)
|
||||
bigevglf_state *state = (bigevglf_state *)machine->driver_data;
|
||||
int i, j;
|
||||
for (i = 0xc0-4; i >= 0; i-= 4)
|
||||
{
|
||||
int code,sx,sy;
|
||||
code = bigevglf_spriteram2[i+1];
|
||||
sx = bigevglf_spriteram2[i+3];
|
||||
sy = 200-bigevglf_spriteram2[i];
|
||||
for(j=0;j<16;j++)
|
||||
drawgfx_transpen(bitmap,cliprect,machine->gfx[0],
|
||||
bigevglf_spriteram1[(code<<4)+j]+((bigevglf_spriteram1[0x400+(code<<4)+j]&0xf)<<8),
|
||||
bigevglf_spriteram2[i+2] & 0xf,
|
||||
int code, sx, sy;
|
||||
code = state->spriteram2[i + 1];
|
||||
sx = state->spriteram2[i + 3];
|
||||
sy = 200 - state->spriteram2[i];
|
||||
for (j = 0; j < 16; j++)
|
||||
drawgfx_transpen(bitmap, cliprect, machine->gfx[0],
|
||||
state->spriteram1[(code << 4) + j] + ((state->spriteram1[0x400 + (code << 4) + j] & 0xf) << 8),
|
||||
state->spriteram2[i + 2] & 0xf,
|
||||
0,0,
|
||||
sx+((j&1)<<3),sy+((j>>1)<<3),0);
|
||||
sx + ((j & 1) << 3), sy + ((j >> 1) << 3), 0);
|
||||
}
|
||||
}
|
||||
|
||||
VIDEO_UPDATE( bigevglf )
|
||||
{
|
||||
copybitmap(bitmap,tmp_bitmap[ plane_visible ],0,0,0,0,cliprect);
|
||||
draw_sprites(screen->machine,bitmap,cliprect);
|
||||
bigevglf_state *state = (bigevglf_state *)screen->machine->driver_data;
|
||||
|
||||
copybitmap(bitmap, state->tmp_bitmap[state->plane_visible], 0, 0, 0, 0, cliprect);
|
||||
draw_sprites(screen->machine, bitmap, cliprect);
|
||||
return 0;
|
||||
}
|
||||
|
@ -1,16 +1,17 @@
|
||||
/***************************************************************************
|
||||
|
||||
Block Out
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#include "driver.h"
|
||||
#include "blockout.h"
|
||||
|
||||
|
||||
|
||||
UINT16 *blockout_videoram;
|
||||
UINT16 *blockout_frontvideoram;
|
||||
|
||||
|
||||
|
||||
static void setcolor(running_machine *machine,int color,int rgb)
|
||||
static void setcolor( running_machine *machine, int color, int rgb )
|
||||
{
|
||||
int bit0,bit1,bit2,bit3;
|
||||
int r,g,b;
|
||||
int bit0, bit1, bit2, bit3;
|
||||
int r, g, b;
|
||||
|
||||
|
||||
/* red component */
|
||||
@ -34,21 +35,23 @@ static void setcolor(running_machine *machine,int color,int rgb)
|
||||
bit3 = (rgb >> 11) & 0x01;
|
||||
b = 0x0e * bit0 + 0x1f * bit1 + 0x43 * bit2 + 0x8f * bit3;
|
||||
|
||||
palette_set_color(machine,color,MAKE_RGB(r,g,b));
|
||||
palette_set_color(machine, color, MAKE_RGB(r,g,b));
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( blockout_paletteram_w )
|
||||
{
|
||||
COMBINE_DATA(&paletteram16[offset]);
|
||||
setcolor(space->machine,offset,paletteram16[offset]);
|
||||
blockout_state *state = (blockout_state *)space->machine->driver_data;
|
||||
|
||||
COMBINE_DATA(&state->paletteram16[offset]);
|
||||
setcolor(space->machine, offset, state->paletteram16[offset]);
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( blockout_frontcolor_w )
|
||||
{
|
||||
static UINT16 color;
|
||||
blockout_state *state = (blockout_state *)space->machine->driver_data;
|
||||
|
||||
COMBINE_DATA(&color);
|
||||
setcolor(space->machine,512,color);
|
||||
COMBINE_DATA(&state->color);
|
||||
setcolor(space->machine, 512, state->color);
|
||||
}
|
||||
|
||||
|
||||
@ -60,72 +63,82 @@ WRITE16_HANDLER( blockout_frontcolor_w )
|
||||
***************************************************************************/
|
||||
VIDEO_START( blockout )
|
||||
{
|
||||
blockout_state *state = (blockout_state *)machine->driver_data;
|
||||
|
||||
/* Allocate temporary bitmaps */
|
||||
tmpbitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
|
||||
state->tmpbitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
|
||||
state_save_register_global_bitmap(machine, state->tmpbitmap);
|
||||
|
||||
state_save_register_global(machine, state->color);
|
||||
}
|
||||
|
||||
|
||||
|
||||
static void update_pixels(const device_config *screen, int x, int y)
|
||||
static void update_pixels( running_machine *machine, int x, int y )
|
||||
{
|
||||
UINT16 front,back;
|
||||
blockout_state *state = (blockout_state *)machine->driver_data;
|
||||
UINT16 front, back;
|
||||
int color;
|
||||
const rectangle *visarea = video_screen_get_visible_area(screen);
|
||||
const rectangle *visarea = video_screen_get_visible_area(machine->primary_screen);
|
||||
|
||||
if (x < visarea->min_x || x > visarea->max_x || y < visarea->min_y || y > visarea->max_y)
|
||||
return;
|
||||
|
||||
front = blockout_videoram[y*256+x/2];
|
||||
back = blockout_videoram[0x10000 + y*256+x/2];
|
||||
front = state->videoram[y * 256 + x / 2];
|
||||
back = state->videoram[0x10000 + y * 256 + x / 2];
|
||||
|
||||
if (front>>8) color = front>>8;
|
||||
else color = (back>>8) + 256;
|
||||
*BITMAP_ADDR16(tmpbitmap, y, x) = color;
|
||||
if (front >> 8)
|
||||
color = front >> 8;
|
||||
else
|
||||
color = (back >> 8) + 256;
|
||||
|
||||
if (front&0xff) color = front&0xff;
|
||||
else color = (back&0xff) + 256;
|
||||
*BITMAP_ADDR16(tmpbitmap, y, x+1) = color;
|
||||
*BITMAP_ADDR16(state->tmpbitmap, y, x) = color;
|
||||
|
||||
if (front & 0xff)
|
||||
color = front & 0xff;
|
||||
else
|
||||
color = (back & 0xff) + 256;
|
||||
|
||||
*BITMAP_ADDR16(state->tmpbitmap, y, x + 1) = color;
|
||||
}
|
||||
|
||||
|
||||
|
||||
WRITE16_HANDLER( blockout_videoram_w )
|
||||
{
|
||||
COMBINE_DATA(&blockout_videoram[offset]);
|
||||
blockout_state *state = (blockout_state *)space->machine->driver_data;
|
||||
|
||||
update_pixels(space->machine->primary_screen, (offset % 256)*2, (offset / 256) % 256);
|
||||
COMBINE_DATA(&state->videoram[offset]);
|
||||
update_pixels(space->machine, (offset % 256) * 2, (offset / 256) % 256);
|
||||
}
|
||||
|
||||
|
||||
|
||||
VIDEO_UPDATE( blockout )
|
||||
{
|
||||
copybitmap(bitmap,tmpbitmap,0,0,0,0,cliprect);
|
||||
|
||||
{
|
||||
int x,y;
|
||||
|
||||
blockout_state *state = (blockout_state *)screen->machine->driver_data;
|
||||
int x, y;
|
||||
pen_t color = 512;
|
||||
|
||||
for (y = 0;y < 256;y++)
|
||||
copybitmap(bitmap, state->tmpbitmap, 0, 0, 0, 0, cliprect);
|
||||
|
||||
for (y = 0; y < 256; y++)
|
||||
{
|
||||
for (x = 0;x < 320;x+=8)
|
||||
for (x = 0; x < 320; x += 8)
|
||||
{
|
||||
int d = blockout_frontvideoram[y*64+(x/8)];
|
||||
int d = state->frontvideoram[y * 64 + (x / 8)];
|
||||
|
||||
if (d)
|
||||
{
|
||||
if (d&0x80) *BITMAP_ADDR16(bitmap, y, x+0) = color;
|
||||
if (d&0x40) *BITMAP_ADDR16(bitmap, y, x+1) = color;
|
||||
if (d&0x20) *BITMAP_ADDR16(bitmap, y, x+2) = color;
|
||||
if (d&0x10) *BITMAP_ADDR16(bitmap, y, x+3) = color;
|
||||
if (d&0x08) *BITMAP_ADDR16(bitmap, y, x+4) = color;
|
||||
if (d&0x04) *BITMAP_ADDR16(bitmap, y, x+5) = color;
|
||||
if (d&0x02) *BITMAP_ADDR16(bitmap, y, x+6) = color;
|
||||
if (d&0x01) *BITMAP_ADDR16(bitmap, y, x+7) = color;
|
||||
}
|
||||
if (d & 0x80) *BITMAP_ADDR16(bitmap, y, x + 0) = color;
|
||||
if (d & 0x40) *BITMAP_ADDR16(bitmap, y, x + 1) = color;
|
||||
if (d & 0x20) *BITMAP_ADDR16(bitmap, y, x + 2) = color;
|
||||
if (d & 0x10) *BITMAP_ADDR16(bitmap, y, x + 3) = color;
|
||||
if (d & 0x08) *BITMAP_ADDR16(bitmap, y, x + 4) = color;
|
||||
if (d & 0x04) *BITMAP_ADDR16(bitmap, y, x + 5) = color;
|
||||
if (d & 0x02) *BITMAP_ADDR16(bitmap, y, x + 6) = color;
|
||||
if (d & 0x01) *BITMAP_ADDR16(bitmap, y, x + 7) = color;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user