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https://github.com/holub/mame
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trident: added programmable clock, previous clock select was for TGUI9440CXi and TVGA cards, still lacks a divisor for higher refresh rates, but up to 70Hz modes should be correct now.
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ea926721e5
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0210f1ea04
@ -311,11 +311,29 @@ UINT16 trident_vga_device::offset()
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return off;
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return off;
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}
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}
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int trident_vga_device::calculate_clock()
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{
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// Bits 0-6: M
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// Bits 7-11: N
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// Bit 12: K
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// Later formula extends each variable by one extra bit (Providia 9685 and later)
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double freq;
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UINT8 m,n,k;
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m = tri.vid_clock & 0x007f;
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n = (tri.vid_clock & 0x0f80) >> 7;
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k = (tri.vid_clock & 0x1000) >> 12;
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freq = ((double)(m+8) / (double)((n+2)*(pow(2.0,k)))) * 14.31818f; // there is a 14.31818MHz clock on the board
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return freq * 1000000;
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}
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void trident_vga_device::trident_define_video_mode()
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void trident_vga_device::trident_define_video_mode()
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{
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{
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int divisor = 1;
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int divisor = 1;
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int xtal;
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int xtal;
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/* // clock select for TGUI9440CXi and earlier
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switch(tri.clock)
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switch(tri.clock)
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{
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{
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case 0:
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case 0:
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@ -344,8 +362,19 @@ void trident_vga_device::trident_define_video_mode()
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case 1: xtal = xtal / 2; break;
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case 1: xtal = xtal / 2; break;
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case 2: xtal = xtal / 4; break;
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case 2: xtal = xtal / 4; break;
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case 3: xtal = xtal / 1.5; break;
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case 3: xtal = xtal / 1.5; break;
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}*/
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// TGUI9440AGi/9660/9680/9682 programmable clock
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switch(tri.clock)
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{
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case 0:
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default: xtal = XTAL_25_1748MHz; break;
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case 1: xtal = XTAL_28_63636MHz; break;
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case 2: xtal = calculate_clock(); break; // how to divide the clock? Needed for higher refresh rates (75Hz+)
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}
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}
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svga.rgb8_en = svga.rgb15_en = svga.rgb16_en = svga.rgb32_en = 0;
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svga.rgb8_en = svga.rgb15_en = svga.rgb16_en = svga.rgb32_en = 0;
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switch((tri.pixel_depth & 0x0c) >> 2)
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switch((tri.pixel_depth & 0x0c) >> 2)
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{
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{
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@ -900,28 +929,28 @@ WRITE8_MEMBER(trident_vga_device::port_43c6_w)
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switch(offset)
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switch(offset)
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{
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{
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case 2:
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case 2:
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if(tri.sr0e_new & 0x02 && tri.sr0e_new & 0x40)
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if(!(tri.sr0e_new & 0x02) && (tri.sr0e_new & 0x80))
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{
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{
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tri.mem_clock = (tri.mem_clock & 0xff00) | (data);
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tri.mem_clock = (tri.mem_clock & 0xff00) | (data);
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if(LOG) logerror("Trident: Memory clock write %04x\n",tri.mem_clock);
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if(LOG) logerror("Trident: Memory clock write %04x\n",tri.mem_clock);
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}
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}
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break;
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break;
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case 3:
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case 3:
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if(tri.sr0e_new & 0x02 && tri.sr0e_new & 0x40)
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if(!(tri.sr0e_new & 0x02) && (tri.sr0e_new & 0x80))
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{
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{
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tri.mem_clock = (tri.mem_clock & 0x00ff) | (data << 8);
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tri.mem_clock = (tri.mem_clock & 0x00ff) | (data << 8);
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if(LOG) logerror("Trident: Memory clock write %04x\n",tri.mem_clock);
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if(LOG) logerror("Trident: Memory clock write %04x\n",tri.mem_clock);
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}
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}
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break;
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break;
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case 4:
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case 4:
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if(tri.sr0e_new & 0x02 && tri.sr0e_new & 0x40)
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if(!(tri.sr0e_new & 0x02) && (tri.sr0e_new & 0x80))
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{
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{
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tri.vid_clock = (tri.vid_clock & 0xff00) | (data);
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tri.vid_clock = (tri.vid_clock & 0xff00) | (data);
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if(LOG) logerror("Trident: Video clock write %04x\n",tri.vid_clock);
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if(LOG) logerror("Trident: Video clock write %04x\n",tri.vid_clock);
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}
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}
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break;
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break;
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case 5:
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case 5:
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if(tri.sr0e_new & 0x02 && tri.sr0e_new & 0x40)
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if(!(tri.sr0e_new & 0x02) && (tri.sr0e_new & 0x80))
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{
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{
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tri.vid_clock = (tri.vid_clock & 0x00ff) | (data << 8);
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tri.vid_clock = (tri.vid_clock & 0x00ff) | (data << 8);
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if(LOG) logerror("Trident: Video clock write %04x\n",tri.vid_clock);
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if(LOG) logerror("Trident: Video clock write %04x\n",tri.vid_clock);
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@ -68,7 +68,6 @@ protected:
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UINT32 linear_address;
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UINT32 linear_address;
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bool linear_active;
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bool linear_active;
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bool mmio_active;
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bool mmio_active;
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// TGUI9440 only?
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UINT16 mem_clock; // I/O 0x43c6
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UINT16 mem_clock; // I/O 0x43c6
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UINT16 vid_clock; // I/O 0x43c8
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UINT16 vid_clock; // I/O 0x43c8
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UINT16 cursor_x;
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UINT16 cursor_x;
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@ -118,6 +117,8 @@ private:
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UINT8 trident_gc_reg_read(UINT8 index);
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UINT8 trident_gc_reg_read(UINT8 index);
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void trident_gc_reg_write(UINT8 index, UINT8 data);
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void trident_gc_reg_write(UINT8 index, UINT8 data);
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int calculate_clock();
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void accel_command();
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void accel_command();
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void accel_bitblt();
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void accel_bitblt();
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void accel_line();
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void accel_line();
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