wrong cast, reg a/b are 8bit

This commit is contained in:
Michaël Banaan Ananas 2012-07-15 22:45:21 +00:00
parent 50db079d21
commit 021333717a

View File

@ -2542,7 +2542,7 @@ static void HC11OP(rola)(hc11_state *cpustate)
UINT16 r = ((REG_A & 0x7f) << 1) | (cpustate->ccr & CC_C ? 1 : 0);
CLEAR_NZVC(cpustate);
cpustate->ccr |= (c & 0x80) ? CC_C : 0;
REG_A = (UINT16)(r);
REG_A = (UINT8)(r);
SET_N8(REG_A);
SET_Z8(REG_A);
@ -2562,7 +2562,7 @@ static void HC11OP(rolb)(hc11_state *cpustate)
UINT16 r = ((REG_B & 0x7f) << 1) | (cpustate->ccr & CC_C ? 1 : 0);
CLEAR_NZVC(cpustate);
cpustate->ccr |= (c & 0x80) ? CC_C : 0;
REG_B = (UINT16)(r);
REG_B = (UINT8)(r);
SET_N8(REG_B);
SET_Z8(REG_B);
@ -2649,7 +2649,7 @@ static void HC11OP(rora)(hc11_state *cpustate)
UINT16 r = ((REG_A & 0x7f) >> 1) | (cpustate->ccr & CC_C ? 0x80 : 0);
CLEAR_NZVC(cpustate);
cpustate->ccr |= (c & 1) ? CC_C : 0;
REG_A = (UINT16)(r);
REG_A = (UINT8)(r);
SET_N8(REG_A);
SET_Z8(REG_A);
@ -2669,7 +2669,7 @@ static void HC11OP(rorb)(hc11_state *cpustate)
UINT16 r = ((REG_B & 0x7f) >> 1) | (cpustate->ccr & CC_C ? 0x80 : 0);
CLEAR_NZVC(cpustate);
cpustate->ccr |= (c & 1) ? CC_C : 0;
REG_B = (UINT16)(r);
REG_B = (UINT8)(r);
SET_N8(REG_B);
SET_Z8(REG_B);