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mac128: Fix the keyboard [O. Galibert, AJR]

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via6522: Don't retrigger the shift register timer on a second sr access

This is a slightly hacky change.  The 68k starts the shift register in
internal clock mode just long enough that cb2 is set to zero, then
stops it and restarts it in external clocking mode.

The retrigger-corrected via code wants to change cb2 40 cycles in the
future (8 edges of the 10 clocks/cycle E clock).  The instruction that
stops the shift register starts ~38 cycles in the future but does the
actual write 50 cycles in.  But the instructions not being
interruptible, the write happens before the timer timeout is called.

There are two problems there: the lack of interruptibility for the
68k, which is a hard problem that is worked on but is still going to
take some time, and the fact that the via is supposed to change cb2
(data) at +35 (well, +34, but lets not get in the intricacies of the E
clock) and cb1 (clock) at +40.  But changing the serial output
behaviour of the via is a very ugly "here be dragons" case.  Which
will have ot be done, but still.

The quick hack is the make the via change data and clock at +35.  Fast
enough that the 68000 didn't start the instruction yet, not different
enough that other systems would break.  100% proper fix will be later.
This commit is contained in:
Olivier Galibert 2021-03-21 20:05:28 +01:00
parent 44af84da34
commit 025183d82c
2 changed files with 21 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
src/devices/machine/6522via.cpp
View File

@ -776,13 +776,19 @@ u8 via6522_device::read(offs_t offset)
LOGSHIFT(" - ACR: %02x ", m_acr);
if (SI_O2_CONTROL(m_acr) || SO_O2_CONTROL(m_acr))
{
m_shift_timer->adjust(clocks_to_attotime(8) / 2); // 8 edges to start shifter from a read
LOGSHIFT(" - read SR starts O2 timer ");
if (m_shift_timer->expire().is_never())
{
m_shift_timer->adjust(clocks_to_attotime(7) / 2); // 8 edges to start shifter from a read -- use 7 for a mac128 issue to be fixed later
LOGSHIFT(" - read SR starts O2 timer ");
}
}
else if (SI_T2_CONTROL(m_acr) || SO_T2_CONTROL(m_acr))
{
m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2) / 2);
LOGSHIFT(" - read SR starts T2 timer ");
if (m_shift_timer->expire().is_never())
{
m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2) / 2);
LOGSHIFT(" - read SR starts T2 timer ");
}
}
else if (!SO_T2_RATE(m_acr))
{
@ -972,13 +978,19 @@ void via6522_device::write(offs_t offset, u8 data)
LOGSHIFT(" - ACR is: %02x ", m_acr);
if (SO_O2_CONTROL(m_acr) || SI_O2_CONTROL(m_acr))
{
m_shift_timer->adjust(clocks_to_attotime(8) / 2); // 8 edges to start shifter from a write
LOGSHIFT(" - write SR starts O2 timer");
if (m_shift_timer->expire().is_never())
{
m_shift_timer->adjust(clocks_to_attotime(8) / 2); // 8 edges to start shifter from a write
LOGSHIFT(" - write SR starts O2 timer");
}
}
else if (SO_T2_RATE(m_acr) || SO_T2_CONTROL(m_acr) || SI_T2_CONTROL(m_acr))
{
m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2) / 2);
LOGSHIFT(" - write starts T2 timer");
if (m_shift_timer->expire().is_never())
{
m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2) / 2);
LOGSHIFT(" - write starts T2 timer");
}
}
else
{

2
src/mame/drivers/mac128.cpp
View File

@ -698,7 +698,7 @@ void mac128_state::via_sync()
uint64_t vpa_cycle = cur_cycle+2;
uint64_t via_start_cycle = (vpa_cycle + 9) / 10;
uint64_t end_cycle = via_start_cycle * 10 + 4;
m_maincpu->adjust_icount(cur_cycle - end_cycle);
m_maincpu->adjust_icount(cur_cycle - end_cycle - 4); // 4 cycles already counted by the core
}
uint16_t mac128_state::mac_via_r(offs_t offset)