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https://github.com/holub/mame
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interpro: graphics improvements (#3263)
* interpro: graphics improvements * basic bitblt and line drawing is working well enough for now * de-static'd MCFG stuff * some keyboard notes tweaked * interpro: oops (nw)
This commit is contained in:
Patrick Mackinlay
ajrhacker
parent
3d66208ff1
commit
0257b7cc4c
@ -11,8 +11,8 @@
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* function keys in groups of 9, 36 and 12 from left to right.
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*
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* The following describes the key labels and positions according to the
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* standard US English keyboard layout. It's unknown what other variations
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* existed at this point.
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* standard US English keyboard layout. At least a German keyboard variant is
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* known to have existed.
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*
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* Upper bank keys indicated here with asterisks are printed in white, as are
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* all the A*, B* and C* keys; all the others are printed in brown.
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@ -68,23 +68,30 @@
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*
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* From Host Purpose Expected Response
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* --------- ------- -----------------
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* <esc> D Diagnostic 0xff <status>, where status bits are set to
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* 0x1b 0x42 <xx> probably controls several functions:
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*
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* 0x01 sound bell?
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* 0x04 keyclick on
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* 0x08 membrane click on
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* 0x20 bell tone loud/soft/none? (seems only loud/none)
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*
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* 0x1b 0x44 reset/diag 0xff <status>, where status bits are set to
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* indicate diagnostic failure source: 0x8=EPROM
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* checksum, 0x10=RAM error, 0x20=ROM checksum
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*
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* <esc> B ( Bell On None
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*
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* <esc> B ) Bell Off None
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*
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* <esc> B <byte> Unknown None
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* 0x1b 0x55 activate scan code keyup/down mode?
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*
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* The keyboard has a keyboard click function, and the LED indicators described
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* earlier, meaning that there are additional commands to enable and disable
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* these functions.
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*
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* The keyboard transmits ASCII codes corresponding to the keycap labels for
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* keys which map to the ASCII character set. Modifiers are applied by the
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* keyboard itself, and do not generate make/break codes of their own.
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* The keyboard has at least two operating modes: a simple ASCII mode which is
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* active after reset, and a scancode mode generating make/break codes with
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* full support for all the qualifiers and other non-ASCII keys.
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*
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* In ASCII mode, the keyboard transmits ASCII codes corresponding to the key
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* labels for keys which map to the ASCII character set. Modifiers are applied
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* by the keyboard itself, and do not generate make/break codes of their own.
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*
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* The following non-ASCII sequences are recognised in the system software,
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* and likely correspond to specific keyboard keys or buttons:
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@ -101,6 +108,7 @@
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* - auto-repeat
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* - key click and LED commands
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* - alternative layouts
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* - scancode make/break mode
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*
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*/
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#include "emu.h"
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@ -389,39 +397,43 @@ void hle_device_base::received_byte(u8 byte)
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switch (m_rx_state)
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{
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case RX_ESC:
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case RX_COMMAND:
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switch (byte)
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{
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case 'B': // bell
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m_rx_state = RX_BELL;
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case 0x42: // configure flags
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m_rx_state = RX_FLAGS;
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break;
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case 'D': // diagnostic
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case 0x44: // reset/diagnostic
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transmit_byte(0xff);
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transmit_byte(0x00);
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m_rx_state = RX_IDLE;
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break;
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case 0x55:
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break;
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}
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break;
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case RX_BELL:
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case RX_FLAGS:
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// FIXME: this logic is wrong (should decode the various fields), but
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// generates bell sounds at the right time for now
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switch (byte)
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{
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case '(':
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case 0x28:
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LOG("bell on\n");
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m_beeper_state |= u8(BEEPER_BELL);
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m_beeper->set_state(m_beeper_state ? 1 : 0);
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break;
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case ')':
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case 0x29:
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LOG("bell off\n");
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m_beeper_state &= ~u8(BEEPER_BELL);
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m_beeper->set_state(m_beeper_state ? 1 : 0);
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break;
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default:
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// FIXME: boot code sends 0x8, unknown meaning
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break;
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}
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m_rx_state = RX_IDLE;
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@ -429,7 +441,7 @@ void hle_device_base::received_byte(u8 byte)
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case RX_IDLE:
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if (byte == 0x1b)
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m_rx_state = RX_ESC;
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m_rx_state = RX_COMMAND;
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break;
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}
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}
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@ -66,8 +66,8 @@ private:
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enum : u8 {
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RX_IDLE,
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RX_ESC,
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RX_BELL
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RX_COMMAND,
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RX_FLAGS
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};
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enum : u8 {
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File diff suppressed because it is too large
Load Diff
@ -7,96 +7,354 @@
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#include "sr.h"
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#include "video/bt459.h"
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#include "video/dp8510.h"
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class gt_device_base : public sr_card_device_base
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{
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protected:
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gt_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
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virtual void map(address_map &map) override;
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public:
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static const u32 GT_PIXCLOCK = 80'000'000; // just a guess
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static const int GT_XPIXELS = 1184;
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static const int GT_YPIXELS = 884;
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static const int GT_BUFFER_SIZE = 0x100000; // 1 megabyte
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static const int GT_VRAM_SIZE = 0x200000; // 1 megabyte double buffered
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static const u32 GT_BUFFER_MASK = (GT_BUFFER_SIZE - 1);
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// FIXME: enable delays to pass diagnostic tests
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static const bool GT_DIAG = false;
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enum control_mask
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{
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CONTROL_SCREEN = 0x1000, // possibly selects screen 0 or 1?
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CONTROL_BUSY = 0x8000
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GFX_VERT_BLNK = 0x00000001,
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GFX_HILITE_SEL = 0x00000004,
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GFX_SOFT_BLNK = 0x00000008,
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GFX_DRAW_FIRST = 0x00000010, // draw first point
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GFX_BLIT_DIR = 0x00000020, // bitblt addresses decrement
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GFX_RMW_MD = 0x00000040, // enable rmw mode
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GFX_DATA_SEL = 0x00000080, // enable plane data as source
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GFX_ANTI_MD = 0x00000100, // enable antialias mode
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GFX_ADD_MD = 0x00000200, // enable antialias additive mode
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GFX_MASK_ENA = 0x00000400, // enable pixel write mask
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GFX_MASK_SEL = 0x00000800, // select mask ram
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GFX_SCR1_SEL = 0x00001000, // select screen 1
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GFX_BSGA_RST = 0x00002000,
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GFX_BLIT_BUSY = 0x00004000,
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GFX_GRPHCS_BUSY = 0x00008000,
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GFX_VFIFO_EMPTY = 0x00010000,
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GFX_SCREEN0_DISP_BUF1 = 0x00020000, // select buffer 1 (screen 0)
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GFX_SCREEN1_DISP_BUF1 = 0x00040000, // select buffer 1 (screen 1)
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GFX_STEREO_EN = 0x00080000,
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GFX_INTERLACE = 0x00100000,
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GFX_STEREO_POLRITY_NORMAL = 0x00200000,
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GFX_STEREO_GLASSES_EN = 0x00400000,
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GFX_FIELD_1 = 0x00800000,
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//GFX_MASK_READ = 0x01000000, // enable pixel read mask?
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GFX_MONSENSE_MASK = 0x0e000000,
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GFX_MONSENSE_60HZ = 0x0e000000
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};
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DECLARE_READ32_MEMBER(control_r) { return m_control; };
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DECLARE_WRITE32_MEMBER(control_w);
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DECLARE_READ8_MEMBER(contrast_dac_r) { return m_contrast_dac; }
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DECLARE_WRITE8_MEMBER(contrast_dac_w) { m_contrast_dac = data; }
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DECLARE_READ32_MEMBER(blit_src_address_r) { return m_blit_src_address; }
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DECLARE_WRITE32_MEMBER(blit_src_address_w) { COMBINE_DATA(&m_blit_src_address); }
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DECLARE_READ32_MEMBER(blit_dst_address_r) { return m_blit_dst_address; }
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DECLARE_WRITE32_MEMBER(blit_dst_address_w) { COMBINE_DATA(&m_blit_dst_address); }
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DECLARE_READ16_MEMBER(blit_width_r) { return m_blit_width; }
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DECLARE_WRITE16_MEMBER(blit_width_w);
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enum blit_control_mask
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{
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BLIT0_CONTROL_FS = 0x000000f0,
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BLIT1_CONTROL_FS = 0x0000000f,
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BLIT0_CONTROL_SN = 0x0000f000,
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BLIT1_CONTROL_SN = 0x00000f00,
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BLIT0_CONTROL_LM = 0x00f00000,
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BLIT1_CONTROL_LM = 0x000f0000,
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BLIT0_CONTROL_RM = 0xf0000000,
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BLIT1_CONTROL_RM = 0x0f000000
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};
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virtual DECLARE_WRITE32_MEMBER(blit_control_w) = 0;
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DECLARE_READ8_MEMBER(plane_enable_r) { return m_plane_enable; }
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DECLARE_WRITE8_MEMBER(plane_enable_w);
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DECLARE_READ8_MEMBER(plane_data_r) { return m_plane_data; }
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DECLARE_WRITE8_MEMBER(plane_data_w);
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DECLARE_READ16_MEMBER(bsga_width_r) { return m_bsga_width; }
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DECLARE_WRITE16_MEMBER(bsga_width_w) { COMBINE_DATA(&m_bsga_width); }
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DECLARE_READ16_MEMBER(bsga_tmp_r) { return m_bsga_tmp; }
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DECLARE_WRITE16_MEMBER(bsga_tmp_w) { COMBINE_DATA(&m_bsga_tmp); }
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DECLARE_READ16_MEMBER(bsga_xmin_r) { return m_bsga_xmin; }
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DECLARE_WRITE16_MEMBER(bsga_xmin_w) { COMBINE_DATA(&m_bsga_xmin); }
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DECLARE_READ16_MEMBER(bsga_ymin_r) { return m_bsga_ymin; }
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DECLARE_WRITE16_MEMBER(bsga_ymin_w) { COMBINE_DATA(&m_bsga_ymin); }
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DECLARE_READ16_MEMBER(bsga_acc0_r) { return (m_bsga_width - m_bsga_xin1); }
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DECLARE_READ16_MEMBER(bsga_acc1_r) { return -(m_bsga_width - m_bsga_xin1); }
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DECLARE_READ16_MEMBER(bsga_xmax_r) { return m_bsga_xmax; }
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DECLARE_WRITE16_MEMBER(bsga_xmax_w) { COMBINE_DATA(&m_bsga_xmax); }
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DECLARE_READ16_MEMBER(bsga_ymax_r) { return m_bsga_ymax; }
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DECLARE_WRITE16_MEMBER(bsga_ymax_w) { COMBINE_DATA(&m_bsga_ymax); }
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DECLARE_READ16_MEMBER(bsga_src0_r) { return m_bsga_xin1; }
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DECLARE_READ16_MEMBER(bsga_src1_r) { return m_bsga_xin1; }
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DECLARE_WRITE16_MEMBER(bsga_xin1_w) { COMBINE_DATA(&m_bsga_xin1); m_bsga_xin = m_bsga_xin1; m_bsga_tmp = m_bsga_xin1; }
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DECLARE_WRITE16_MEMBER(bsga_yin1_w) { COMBINE_DATA(&m_bsga_yin1); m_bsga_yin = m_bsga_yin1; }
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DECLARE_WRITE32_MEMBER(bsga_xin1yin1_w);
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enum bsga_status_mask
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{
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STATUS_CLIP0_YMAX = 0x1000, // y1 > max y
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STATUS_CLIP0_YMIN = 0x0800, // y1 < min y
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STATUS_CLIP0_XMAX = 0x0400, // x1 > max x
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STATUS_CLIP0_XMIN = 0x0200, // x1 < min x
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STATUS_CLIP1_YMAX = 0x0100, // y2 > max y
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STATUS_CLIP1_YMIN = 0x0080, // y2 < min y
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STATUS_CLIP1_XMAX = 0x0040, // x2 > max x
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STATUS_CLIP1_XMIN = 0x0020, // x2 < min x
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STATUS_FLOAT_OFLOW = 0x0010,
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STATUS_CLIP_BOTH = 0x0008, // set if both inputs fall outside clipping region
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STATUS_CLIP_ANY = 0x0004, // set if any input falls outside clipping region
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STATUS_CLIP0_MASK = 0x1e00, // x1,y1 clip result
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STATUS_CLIP1_MASK = 0x01e0, // x2,y2 clip result
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STATUS_CLIP_MASK = 0x1fe0 // both clip results
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};
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DECLARE_READ16_MEMBER(bsga_status_r);
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DECLARE_WRITE32_MEMBER(bsga_xin2yin2_w);
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DECLARE_WRITE16_MEMBER(bsga_xin2_w) { COMBINE_DATA(&m_bsga_xin2); m_bsga_xin = m_bsga_xin2; }
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DECLARE_WRITE16_MEMBER(bsga_yin2_w);
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// FIXME: perhaps tmp is a counter of xin/yin and can be used to return correct value?
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DECLARE_READ16_MEMBER(bsga_xin_r) { return m_bsga_xin; }
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DECLARE_READ16_MEMBER(bsga_yin_r) { return m_bsga_yin; }
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DECLARE_READ32_MEMBER(ri_initial_distance_r) { return m_ri_initial_distance; }
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DECLARE_WRITE32_MEMBER(ri_initial_distance_w) { COMBINE_DATA(&m_ri_initial_distance); }
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DECLARE_READ32_MEMBER(ri_distance_both_r) { return m_ri_distance_both; }
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DECLARE_WRITE32_MEMBER(ri_distance_both_w) { COMBINE_DATA(&m_ri_distance_both); }
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DECLARE_READ32_MEMBER(ri_distance_major_r) { return m_ri_distance_major; }
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DECLARE_WRITE32_MEMBER(ri_distance_major_w) { COMBINE_DATA(&m_ri_distance_major); }
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DECLARE_READ32_MEMBER(ri_initial_address_r) { return m_ri_initial_address; }
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DECLARE_WRITE32_MEMBER(ri_initial_address_w) { COMBINE_DATA(&m_ri_initial_address); }
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DECLARE_READ32_MEMBER(ri_address_both_r) { return m_ri_address_both; }
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DECLARE_WRITE32_MEMBER(ri_address_both_w) { COMBINE_DATA(&m_ri_address_both); }
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DECLARE_READ32_MEMBER(ri_address_major_r) { return m_ri_address_major; }
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DECLARE_WRITE32_MEMBER(ri_address_major_w) { COMBINE_DATA(&m_ri_address_major); }
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DECLARE_READ32_MEMBER(ri_initial_error_r) { return m_ri_initial_error; }
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DECLARE_WRITE32_MEMBER(ri_initial_error_w) { COMBINE_DATA(&m_ri_initial_error); }
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DECLARE_READ32_MEMBER(ri_error_both_r) { return m_ri_error_both; }
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DECLARE_WRITE32_MEMBER(ri_error_both_w) { COMBINE_DATA(&m_ri_error_both); }
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DECLARE_READ32_MEMBER(ri_error_major_r) { return m_ri_error_major; }
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DECLARE_WRITE32_MEMBER(ri_error_major_w) { COMBINE_DATA(&m_ri_error_major); }
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DECLARE_READ32_MEMBER(ri_stop_count_r) { return m_ri_stop_count; }
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DECLARE_WRITE32_MEMBER(ri_stop_count_w) { COMBINE_DATA(&m_ri_stop_count); }
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DECLARE_READ32_MEMBER(ri_control_r) { return m_ri_control; }
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DECLARE_WRITE32_MEMBER(ri_control_w) { COMBINE_DATA(&m_ri_control); }
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DECLARE_READ32_MEMBER(ri_xfer_r) { return m_ri_xfer; }
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DECLARE_WRITE32_MEMBER(ri_xfer_w);
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DECLARE_WRITE32_MEMBER(bsga_float_w);
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protected:
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virtual void device_start() override;
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typedef struct
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{
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required_device<bt459_device> ramdac;
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std::unique_ptr<u8[]> vram;
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required_device<dp8510_device> bpu;
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bool primary;
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} gt_screen_t;
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std::unique_ptr<u8[]> buffer;
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std::unique_ptr<u8[]> mask;
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}
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gt_screen_t;
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virtual DECLARE_READ16_MEMBER(control_r) = 0;
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virtual DECLARE_WRITE16_MEMBER(control_w) = 0;
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virtual DECLARE_READ32_MEMBER(vram_r) = 0;
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virtual DECLARE_WRITE32_MEMBER(vram_w) = 0;
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virtual const int get_screen_count() const = 0;
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virtual gt_screen_t &get_screen(const int number) = 0;
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virtual const gt_screen_t &active_screen() const = 0;
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u32 buffer_read(const gt_screen_t &screen, const offs_t offset) const;
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void buffer_write(const gt_screen_t &screen, const offs_t offset, const u32 data, const u32 mask);
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TIMER_CALLBACK_MEMBER(vblank);
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TIMER_CALLBACK_MEMBER(blit);
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TIMER_CALLBACK_MEMBER(line);
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TIMER_CALLBACK_MEMBER(done);
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void bsga_clip_status(s16 xin, s16 yin);
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bool kuzmin_clip(s16 sx1, s16 sy1, s16 sx2, s16 sy2, s16 wx1, s16 wy1, s16 wx2, s16 wy2);
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void bresenham_line(s16 major, s16 minor, s16 major_step, s16 minor_step, int steps, s16 error, s16 error_major, s16 error_minor, bool shallow);
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void write_vram(const gt_screen_t &screen, const offs_t offset, const u8 data);
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u8 m_contrast_dac;
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u32 m_control;
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u32 m_blit_src_address;
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u32 m_blit_dst_address;
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u16 m_blit_width;
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u8 m_plane_enable;
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u8 m_plane_data;
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u16 m_bsga_width;
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u16 m_bsga_tmp;
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u16 m_bsga_xmin; // clipping boundary minimum x (left)
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u16 m_bsga_ymin; // clipping boundary minimum y (top)
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u16 m_bsga_xmax; // clipping boundary maximum x (right)
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u16 m_bsga_ymax; // clipping boundary maximum y (bottom)
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u16 m_bsga_status;
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u16 m_bsga_xin1;
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u16 m_bsga_yin1;
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u16 m_bsga_xin2;
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u16 m_bsga_yin2;
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u16 m_bsga_xin; // most recently written xin1/xin2
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u16 m_bsga_yin; // most recently written yin1/yin2
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u32 m_ri_initial_distance;
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u32 m_ri_distance_both;
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u32 m_ri_distance_major;
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u32 m_ri_initial_address;
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u32 m_ri_address_both;
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u32 m_ri_address_major;
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u32 m_ri_initial_error;
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u32 m_ri_error_both;
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u32 m_ri_error_major;
|
||||
u32 m_ri_stop_count;
|
||||
u32 m_ri_control;
|
||||
u32 m_ri_xfer;
|
||||
|
||||
emu_timer *m_vblank_timer;
|
||||
emu_timer *m_blit_timer;
|
||||
emu_timer *m_line_timer;
|
||||
emu_timer *m_done_timer;
|
||||
};
|
||||
|
||||
class mpcb963_device : public gt_device_base
|
||||
class single_gt_device_base : public gt_device_base
|
||||
{
|
||||
public:
|
||||
mpcb963_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
static const int GT_SCREEN_COUNT = 1;
|
||||
|
||||
protected:
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
virtual void device_start() override;
|
||||
single_gt_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual void map(address_map &map) override;
|
||||
|
||||
virtual DECLARE_READ16_MEMBER(control_r) override { return m_control; }
|
||||
virtual DECLARE_WRITE16_MEMBER(control_w) override;
|
||||
virtual DECLARE_READ32_MEMBER(vram_r) override;
|
||||
virtual DECLARE_WRITE32_MEMBER(vram_w) override;
|
||||
virtual DECLARE_WRITE32_MEMBER(blit_control_w) override;
|
||||
|
||||
DECLARE_READ32_MEMBER(buffer_r) { return buffer_read(m_screen[0], offset); }
|
||||
DECLARE_WRITE32_MEMBER(buffer_w) { buffer_write(m_screen[0], offset, data, mem_mask); }
|
||||
|
||||
virtual const int get_screen_count() const override { return GT_SCREEN_COUNT; }
|
||||
virtual gt_screen_t &get_screen(const int number) override { return m_screen[number]; }
|
||||
virtual const gt_screen_t &active_screen() const override { return m_screen[0]; }
|
||||
|
||||
u32 screen_update0(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
|
||||
private:
|
||||
u16 m_control;
|
||||
static const int GT_SCREEN_COUNT = 1;
|
||||
|
||||
gt_screen_t m_screen[GT_SCREEN_COUNT];
|
||||
};
|
||||
|
||||
class mpcba79_device : public gt_device_base
|
||||
class dual_gt_device_base : public gt_device_base
|
||||
{
|
||||
public:
|
||||
mpcba79_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
static const int GT_SCREEN_COUNT = 2;
|
||||
|
||||
protected:
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
virtual void device_start() override;
|
||||
dual_gt_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
virtual void map(address_map &map) override;
|
||||
|
||||
virtual DECLARE_WRITE32_MEMBER(blit_control_w) override;
|
||||
|
||||
DECLARE_READ32_MEMBER(buffer_r) { return buffer_read(m_screen[(offset & 0x80000) ? 1 : 0], offset); }
|
||||
DECLARE_WRITE32_MEMBER(buffer_w) { buffer_write(m_screen[(offset & 0x80000) ? 1 : 0], offset, data, mem_mask); }
|
||||
|
||||
virtual const int get_screen_count() const override { return GT_SCREEN_COUNT; }
|
||||
virtual gt_screen_t &get_screen(const int number) override { return m_screen[number]; }
|
||||
virtual const gt_screen_t &active_screen() const override { return m_screen[(m_control & GFX_SCR1_SEL) ? 1 : 0]; }
|
||||
|
||||
u32 screen_update0(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
u32 screen_update1(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
|
||||
virtual void map(address_map &map) override;
|
||||
|
||||
virtual DECLARE_READ16_MEMBER(control_r) override { return m_control; }
|
||||
virtual DECLARE_WRITE16_MEMBER(control_w) override;
|
||||
virtual DECLARE_READ32_MEMBER(vram_r) override;
|
||||
virtual DECLARE_WRITE32_MEMBER(vram_w) override;
|
||||
|
||||
private:
|
||||
u16 m_control;
|
||||
static const int GT_SCREEN_COUNT = 2;
|
||||
|
||||
gt_screen_t m_screen[GT_SCREEN_COUNT];
|
||||
};
|
||||
|
||||
class mpcb963_device : public single_gt_device_base
|
||||
{
|
||||
public:
|
||||
mpcb963_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
protected:
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
};
|
||||
|
||||
class mpcba79_device : public dual_gt_device_base
|
||||
{
|
||||
public:
|
||||
mpcba79_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
protected:
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
};
|
||||
|
||||
|
||||
class mpcb070_device : public single_gt_device_base
|
||||
{
|
||||
public:
|
||||
mpcb070_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
protected:
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
};
|
||||
|
||||
class mpcb071_device : public dual_gt_device_base
|
||||
{
|
||||
public:
|
||||
mpcb071_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
protected:
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
};
|
||||
|
||||
class mpcb081_device : public single_gt_device_base
|
||||
{
|
||||
public:
|
||||
mpcb081_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
protected:
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
};
|
||||
|
||||
// device type definition
|
||||
DECLARE_DEVICE_TYPE(MPCB963, mpcb963_device)
|
||||
DECLARE_DEVICE_TYPE(MPCBA79, mpcba79_device)
|
||||
DECLARE_DEVICE_TYPE(MPCB070, mpcb070_device)
|
||||
DECLARE_DEVICE_TYPE(MPCB071, mpcb071_device)
|
||||
DECLARE_DEVICE_TYPE(MPCB081, mpcb081_device)
|
||||
|
||||
#endif // MAME_BUS_INTERPRO_SR_GT_H
|
||||
|
||||
@ -2,8 +2,7 @@
|
||||
// copyright-holders:Patrick Mackinlay
|
||||
|
||||
/*
|
||||
* An initial very primitive emulation of the SR bus for the Intergraph
|
||||
* InterPro.
|
||||
* Shared Resource (SR) Bus emulation for Intergraph InterPro systems.
|
||||
*
|
||||
* The bus is referred to by several different names at different places
|
||||
* in the system code, such as SR, SR bus, SRX, SRX/C bus, CBUS and some
|
||||
@ -270,12 +269,10 @@ sr_slot_device::sr_slot_device(const machine_config &mconfig, const char *tag, d
|
||||
{
|
||||
}
|
||||
|
||||
void sr_slot_device::static_set_sr_slot(device_t &device, const char *tag, const char *slot_tag)
|
||||
void sr_slot_device::set_sr_slot(const char *tag, const char *slot_tag)
|
||||
{
|
||||
sr_slot_device &sr_card = dynamic_cast<sr_slot_device &>(device);
|
||||
|
||||
sr_card.m_sr_tag = tag;
|
||||
sr_card.m_sr_slot_tag = slot_tag;
|
||||
m_sr_tag = tag;
|
||||
m_sr_slot_tag = slot_tag;
|
||||
}
|
||||
|
||||
void sr_slot_device::device_start()
|
||||
@ -297,13 +294,11 @@ sr_device::sr_device(const machine_config &mconfig, const char *tag, device_t *o
|
||||
{
|
||||
}
|
||||
|
||||
void sr_device::static_set_memory(device_t &device, const char *const tag, const int data_spacenum, const int io_spacenum)
|
||||
void sr_device::set_memory(const char *const tag, const int main_spacenum, const int io_spacenum)
|
||||
{
|
||||
sr_device &sr = dynamic_cast<sr_device &>(device);
|
||||
|
||||
sr.m_memory_tag = tag;
|
||||
sr.m_data_spacenum = data_spacenum;
|
||||
sr.m_io_spacenum = io_spacenum;
|
||||
m_memory_tag = tag;
|
||||
m_main_spacenum = main_spacenum;
|
||||
m_io_spacenum = io_spacenum;
|
||||
}
|
||||
|
||||
void sr_device::device_start()
|
||||
@ -313,7 +308,7 @@ void sr_device::device_start()
|
||||
// get the memory spaces
|
||||
device_memory_interface *memory;
|
||||
siblingdevice(m_memory_tag)->interface(memory);
|
||||
m_data_space = &memory->space(m_data_spacenum);
|
||||
m_main_space = &memory->space(m_main_spacenum);
|
||||
m_io_space = &memory->space(m_io_spacenum);
|
||||
|
||||
// resolve callbacks
|
||||
@ -360,6 +355,12 @@ void device_sr_card_interface::set_sr_device()
|
||||
m_sr->install_card(*this, &device_sr_card_interface::map);
|
||||
}
|
||||
|
||||
void device_sr_card_interface::irq(int state)
|
||||
{
|
||||
// FIXME: hard-wire to irq0 for now
|
||||
m_sr->irq0_w(state);
|
||||
}
|
||||
|
||||
sr_card_device_base::sr_card_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const char *idprom_region)
|
||||
: device_t(mconfig, type, tag, owner, clock)
|
||||
, device_sr_card_interface(mconfig, *this)
|
||||
|
||||
@ -18,13 +18,14 @@
|
||||
#define MCFG_SR_SLOT_ADD(_srtag, _tag, _slot_intf, _def_slot, _fixed) \
|
||||
MCFG_DEVICE_ADD(_tag, SR_SLOT, 0) \
|
||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, _fixed) \
|
||||
sr_slot_device::static_set_sr_slot(*device, _srtag, _tag);
|
||||
downcast<sr_slot_device &>(*device).set_sr_slot(_srtag, _tag);
|
||||
|
||||
#define MCFG_SR_SLOT_REMOVE(_tag) \
|
||||
MCFG_DEVICE_REMOVE(_tag)
|
||||
|
||||
#define MCFG_SR_MEMORY(_tag, _data_spacenum, _io_spacenum) \
|
||||
sr_device::static_set_memory(*device, _tag, _data_spacenum, _io_spacenum);
|
||||
#define MCFG_SR_MEMORY(_tag, _main_spacenum, _io_spacenum) \
|
||||
downcast<sr_device &>(*device).set_memory(_tag, _main_spacenum, _io_spacenum);
|
||||
|
||||
|
||||
class sr_slot_device : public device_t, public device_slot_interface
|
||||
{
|
||||
@ -33,7 +34,7 @@ public:
|
||||
sr_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
|
||||
// inline configuration
|
||||
static void static_set_sr_slot(device_t &device, const char *tag, const char *slot_tag);
|
||||
void set_sr_slot(const char *tag, const char *slot_tag);
|
||||
|
||||
protected:
|
||||
sr_slot_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
|
||||
@ -59,7 +60,7 @@ public:
|
||||
template <class Object> static devcb_base &set_out_irq1_callback(device_t &device, Object &&cb) { return downcast<sr_device &>(device).m_out_irq1_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_out_irq2_callback(device_t &device, Object &&cb) { return downcast<sr_device &>(device).m_out_irq2_cb.set_callback(std::forward<Object>(cb)); }
|
||||
|
||||
static void static_set_memory(device_t &device, const char *const tag, const int data_spacenum, const int io_spacenum);
|
||||
void set_memory(const char *const tag, const int main_spacenum, const int io_spacenum);
|
||||
|
||||
static const u32 SR_BASE = 0x87000000;
|
||||
static const u32 SR_SIZE = 0x08000000;
|
||||
@ -80,7 +81,7 @@ public:
|
||||
offs_t end = start + (SR_SIZE - 1);
|
||||
|
||||
// install the device address map
|
||||
m_data_space->install_device(start, end, device, map);
|
||||
m_main_space->install_device(start, end, device, map);
|
||||
m_io_space->install_device(start, end, device, map);
|
||||
|
||||
m_slot_count++;
|
||||
@ -94,7 +95,7 @@ protected:
|
||||
virtual void device_reset() override;
|
||||
|
||||
// internal state
|
||||
address_space *m_data_space;
|
||||
address_space *m_main_space;
|
||||
address_space *m_io_space;
|
||||
|
||||
devcb_write_line m_out_irq0_cb;
|
||||
@ -106,7 +107,7 @@ private:
|
||||
int m_slot_count;
|
||||
|
||||
const char *m_memory_tag;
|
||||
int m_data_spacenum;
|
||||
int m_main_spacenum;
|
||||
int m_io_spacenum;
|
||||
};
|
||||
|
||||
@ -117,6 +118,7 @@ public:
|
||||
virtual ~device_sr_card_interface();
|
||||
|
||||
void set_sr_device();
|
||||
void irq(int status);
|
||||
|
||||
// inline configuration
|
||||
static void static_set_sr_tag(device_t &device, const char *tag, const char *slot_tag);
|
||||
|
||||
@ -21,4 +21,7 @@
|
||||
SLOT_INTERFACE_START(sr_cards)
|
||||
SLOT_INTERFACE("mpcb963", MPCB963)
|
||||
SLOT_INTERFACE("mpcba79", MPCBA79)
|
||||
SLOT_INTERFACE("mpcb070", MPCB070)
|
||||
SLOT_INTERFACE("mpcb071", MPCB071)
|
||||
SLOT_INTERFACE("mpcb081", MPCB081)
|
||||
SLOT_INTERFACE_END
|
||||
|
||||
Loading…
Reference in New Issue
Block a user