mirror of
https://github.com/holub/mame
synced 2025-04-09 18:17:44 +03:00
srcclean and manual cleanup.
This commit is contained in:
Vas Crabb
parent
7eb725763e
commit
029341aeb2
@ -122,5 +122,5 @@ see gameking.xml for information about cartridge types
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</dataarea>
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</part>
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</software>
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</softwarelist>
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@ -12,7 +12,7 @@ license:CC0-1.0
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<notes>The floppies can boot on both CISC and RISC systems due to some bootloader magic, but the MO image is only for the first wave of RISC NEWS machines (NWS-3000 series)</notes>
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<sharedfeat name="compatibility" value="RISC" />
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<!--
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The installation floppy and MO disk work, but the format disk hangs after printing a few messages on RISC systems.
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The installation floppy and MO disk work, but the format disk hangs after printing a few messages on RISC systems.
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Therefore, use of this kit requires use of a pre-formatted hard disk image for now.
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The disk image loads on the CISC NEWS driver, so it is most likely an emulation issue, not a disk image issue.
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-->
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@ -1304,7 +1304,7 @@ void f2mc16_device::execute_run()
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m_pc = read_16(uVecAddr);
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m_pcb = read_8(uVecAddr + 2);
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bFoundVec = true;
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// printf("RETI vector chain to %02x%04x\n", m_pcb, m_pc);
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//printf("RETI vector chain to %02x%04x\n", m_pcb, m_pc);
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break;
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}
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}
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0
src/devices/cpu/m68000/m68000musashi.cpp
Executable file → Normal file
0
src/devices/cpu/m68000/m68000musashi.cpp
Executable file → Normal file
0
src/devices/cpu/m68000/m68000musashi.h
Executable file → Normal file
0
src/devices/cpu/m68000/m68000musashi.h
Executable file → Normal file
@ -1,258 +1,258 @@
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// license:BSD-3-Clause
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// copyright-holders: Grull Osgo
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/************************************************************************
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Microchip PIC16X8x Emulator
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Based on MAME's PIC16C5x cpu_device dissasm developed by Tony La Porta.
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A Address to jump to.
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B Bit address within an 8-bit file register.
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D Destination select (0 = store result in W (accumulator))
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(1 = store result in file register)
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F Register file address.
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K Literal field, constant data.
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Includes Flags ID's on SFR registers where possible.
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************************************************************************/
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#include "emu.h"
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#include "16x8xdsm.h"
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#include <cctype>
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#include <stdexcept>
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const u8 pic16x8x_disassembler::sfr_bank0[16] = { 0, 0, 0, 1, 0, 2, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0};
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const char *const pic16x8x_disassembler::sfregs[12] =
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{
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"INDF", "TMR0", "PCL", "STATUS", "FSR", "PORTA", "PORTB", "Reg$07", "EEDATA", "EEADDR", "PCLATH", "INTCON"
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};
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const char *const pic16x8x_disassembler::dest[2] = { "W", "Reg" };
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const char *const pic16x8x_disassembler::reg_flags[9][8] =
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{
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{"0", "1", "2", "3", "4", "5", "6", "7"}, // no flags
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{"C", "DC", "Z", "PD", "TO", "RP0", "RP1", "IRP"}, // status
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{"RA0", "RA1", "RA2", "RA3", "RA4/T0CKI", "5", "6", "7"}, // portA
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{"RB0/INT", "RB1", "RB2", "RB3", "RB4", "RB5", "RB6", "RB7"}, // portB
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{"RBIF", "INTF", "T0IF", "RBIE", "INTE", "T0IE", "EEIE", "GIE"}, // intcon
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{"PS0", "PS1", "PS2", "PSA", "T0SE", "T0CS", "INTEDG", "RBPU"}, // option
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{"RA0", "RA1", "RA2", "RA3", "RA4", "5", "6", "7"}, // trisa
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{"RB0", "RB1", "RB2", "RB3", "RB4", "RB5", "RB6", "RB7"}, // trisb
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{"RD", "WR", "WREN", "WRERR", "EEIF", "5", "6", "7"} // eecon
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};
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const char *const pic16x8x_disassembler::PIC16X8xFormats[] =
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{
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"00000000000000", "nop",
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"00000000001000", "return",
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"00000000001001", "retfie",
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"00000000100000", "nop",
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"00000001000000", "nop",
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"00000001100000", "nop",
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"00000001100011", "sleep",
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"00000001100100", "clrwdt",
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"0000001fffffff", "movwf %F",
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"00000100000000", "clrw",
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"0000011fffffff", "clrf %F",
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"000010dfffffff", "subwf %F,%D",
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"000011dfffffff", "decf %F,%D",
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"000100dfffffff", "iorwf %F,%D",
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"000101dfffffff", "andwf %F,%D",
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"000110dfffffff", "xorwf %F,%D",
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"000111dfffffff", "addwf %F,%D",
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"001000dfffffff", "movf %F,%D",
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"001001dfffffff", "comf %F,%D",
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"001010dfffffff", "incf %F,%D",
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"001011dfffffff", "decfsz %F,%D",
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"001100dfffffff", "rrf %F,%D",
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"001101dfffffff", "rlf %F,%D",
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"001110dfffffff", "swapf %F,%D",
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"001111dfffffff", "incfsz %F,%D",
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"0100bbbfffffff", "bcf %F,%B",
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"0101bbbfffffff", "bsf %F,%B",
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"0110bbbfffffff", "btfsc %F,%B",
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"0111bbbfffffff", "btfss %F,%B",
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"110100kkkkkkkk", "retlw %K",
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"110101kkkkkkkk", "retlw %K",
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"110110kkkkkkkk", "retlw %K",
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"110111kkkkkkkk", "retlw %K",
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"100aaaaaaaaaaa", "call %A",
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"101aaaaaaaaaaa", "goto %A",
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"110000kkkkkkkk", "movlw %K",
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"110001kkkkkkkk", "movlw %K",
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"110010kkkkkkkk", "movlw %K",
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"110011kkkkkkkk", "movlw %K",
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"111000kkkkkkkk", "iorlw %K",
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"111001kkkkkkkk", "andlw %K",
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"111010kkkkkkkk", "xorlw %K",
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"111100kkkkkkkk", "sublw %K",
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"111101kkkkkkkk", "sublw %K",
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"111110kkkkkkkk", "addlw %K",
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"111111kkkkkkkk", "addlw %K",
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nullptr
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};
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pic16x8x_disassembler::pic16x8x_disassembler()
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{
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const char *p;
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const char *const *ops;
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u16 mask, bits;
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int bit;
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ops = PIC16X8xFormats;
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while (*ops)
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{
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p = *ops;
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mask = 0; bits = 0; bit = 13;
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while (*p && bit >= 0)
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{
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switch (*p++)
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{
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case '1': mask |= 1<<bit; bits |= 1<<bit; bit--; break;
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case '0': mask |= 1<<bit; bit--; break;
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case ' ': break;
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case 'a':
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case 'b':
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case 'd':
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case 'f':
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case 'k':
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bit--;
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break;
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default:
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throw std::logic_error(util::string_format("Invalid instruction encoding '%s %s'\n", ops[0],ops[1]));
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}
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}
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if (bit != -1)
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{
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throw std::logic_error(util::string_format("not enough bits in encoding '%s %s' %d\n", ops[0],ops[1],bit));
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}
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while (isspace((u8)*p)) p++;
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Op.emplace_back(mask, bits, *p, ops[0], ops[1]);
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ops += 2;
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}
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}
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offs_t pic16x8x_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms)
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{
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int a, b, d, f, k; // these can all be filled in by parsing an instruction
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int i;
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int op;
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int cnt = 1;
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int code;
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int bit;
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const char *cp; // character pointer in OpFormats
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u32 flags = 0;
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bool bit_option = false;
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op = -1; // no matching opcode
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code = opcodes.r16(pc);
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for (i = 0; i < int(Op.size()); i++)
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{
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if ((code & Op[i].mask) == Op[i].bits)
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{
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if (op != -1)
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{
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osd_printf_debug("Error: opcode %04Xh matches %d (%s) and %d (%s)\n",
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code,i,Op[i].fmt,op,Op[op].fmt);
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}
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op = i;
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}
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}
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if (op == -1)
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{
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util::stream_format(stream, "???? dw %04Xh",code);
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return cnt | SUPPORTED;
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}
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// shift out operands
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cp = Op[op].parse;
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a = b = d = f = k = 0;
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bit = 13;
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while (bit >= 0)
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{
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osd_printf_debug("{%c/%d}",*cp,bit);
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switch (*cp)
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{
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case 'a': a <<=1; a |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
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case 'b': b <<=1; b |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
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case 'd': d <<=1; d |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
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case 'f': f <<=1; f |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
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case 'k': k <<=1; k |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
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case ' ': break;
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case '1': case '0': bit--; break;
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case '\0': throw std::logic_error(util::string_format("premature end of parse string, opcode %x, bit = %d\n",code,bit));
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}
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cp++;
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}
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// now traverse format string
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cp = Op[op].fmt;
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if (!strncmp(cp, "call", 4))
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flags = STEP_OVER;
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else if (!strncmp(cp, "ret", 3))
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flags = STEP_OUT;
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else if (!strncmp(cp, "btfs", 4) || !strncmp(cp + 2, "cfsz", 4))
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flags = STEP_COND;
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// bit oriented instructions
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switch (f)
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{
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case 0x03:
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case 0x05:
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case 0x06:
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case 0x0b:
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case 0x81:
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case 0x85:
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case 0x86:
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bit_option = true;
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break;
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default:
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bit_option = false;
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break;
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}
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while (*cp)
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{
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if (*cp == '%')
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{
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cp++;
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switch (*cp++)
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{
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case 'A': util::stream_format(stream, "$%03X", a); break;
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case 'D': util::stream_format(stream, "%s", dest[d]); break;
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case 'F': (f < 0xc) ? util::stream_format(stream, "%s", sfregs[f]) : util::stream_format(stream, "byte_DATA_$%02X", f); break;
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case 'B':
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{
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if (bit_option)
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util::stream_format(stream, "%s", reg_flags[sfr_bank0[f & 0x0f]][b]);
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else
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util::stream_format(stream, "%d", b);
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}
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break;
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case 'K': util::stream_format(stream, "%02xh", k); break;
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default:
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throw std::logic_error(util::string_format("illegal escape character in format '%s'\n",Op[op].fmt));
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}
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}
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else
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{
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stream << *cp++;
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}
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}
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return cnt | flags | SUPPORTED;
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}
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u32 pic16x8x_disassembler::opcode_alignment() const
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{
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return 1;
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}
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// license:BSD-3-Clause
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// copyright-holders: Grull Osgo
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/************************************************************************
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||||
Microchip PIC16X8x Emulator
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||||
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||||
Based on MAME's PIC16C5x cpu_device dissasm developed by Tony La Porta.
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|
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A Address to jump to.
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B Bit address within an 8-bit file register.
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D Destination select (0 = store result in W (accumulator))
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(1 = store result in file register)
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F Register file address.
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K Literal field, constant data.
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Includes Flags ID's on SFR registers where possible.
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************************************************************************/
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#include "emu.h"
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#include "16x8xdsm.h"
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#include <cctype>
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#include <stdexcept>
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const u8 pic16x8x_disassembler::sfr_bank0[16] = { 0, 0, 0, 1, 0, 2, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0};
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const char *const pic16x8x_disassembler::sfregs[12] =
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{
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"INDF", "TMR0", "PCL", "STATUS", "FSR", "PORTA", "PORTB", "Reg$07", "EEDATA", "EEADDR", "PCLATH", "INTCON"
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};
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const char *const pic16x8x_disassembler::dest[2] = { "W", "Reg" };
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const char *const pic16x8x_disassembler::reg_flags[9][8] =
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{
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{"0", "1", "2", "3", "4", "5", "6", "7"}, // no flags
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{"C", "DC", "Z", "PD", "TO", "RP0", "RP1", "IRP"}, // status
|
||||
{"RA0", "RA1", "RA2", "RA3", "RA4/T0CKI", "5", "6", "7"}, // portA
|
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{"RB0/INT", "RB1", "RB2", "RB3", "RB4", "RB5", "RB6", "RB7"}, // portB
|
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{"RBIF", "INTF", "T0IF", "RBIE", "INTE", "T0IE", "EEIE", "GIE"}, // intcon
|
||||
{"PS0", "PS1", "PS2", "PSA", "T0SE", "T0CS", "INTEDG", "RBPU"}, // option
|
||||
{"RA0", "RA1", "RA2", "RA3", "RA4", "5", "6", "7"}, // trisa
|
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{"RB0", "RB1", "RB2", "RB3", "RB4", "RB5", "RB6", "RB7"}, // trisb
|
||||
{"RD", "WR", "WREN", "WRERR", "EEIF", "5", "6", "7"} // eecon
|
||||
};
|
||||
|
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const char *const pic16x8x_disassembler::PIC16X8xFormats[] =
|
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{
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"00000000000000", "nop",
|
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"00000000001000", "return",
|
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"00000000001001", "retfie",
|
||||
"00000000100000", "nop",
|
||||
"00000001000000", "nop",
|
||||
"00000001100000", "nop",
|
||||
"00000001100011", "sleep",
|
||||
"00000001100100", "clrwdt",
|
||||
"0000001fffffff", "movwf %F",
|
||||
"00000100000000", "clrw",
|
||||
"0000011fffffff", "clrf %F",
|
||||
"000010dfffffff", "subwf %F,%D",
|
||||
"000011dfffffff", "decf %F,%D",
|
||||
"000100dfffffff", "iorwf %F,%D",
|
||||
"000101dfffffff", "andwf %F,%D",
|
||||
"000110dfffffff", "xorwf %F,%D",
|
||||
"000111dfffffff", "addwf %F,%D",
|
||||
"001000dfffffff", "movf %F,%D",
|
||||
"001001dfffffff", "comf %F,%D",
|
||||
"001010dfffffff", "incf %F,%D",
|
||||
"001011dfffffff", "decfsz %F,%D",
|
||||
"001100dfffffff", "rrf %F,%D",
|
||||
"001101dfffffff", "rlf %F,%D",
|
||||
"001110dfffffff", "swapf %F,%D",
|
||||
"001111dfffffff", "incfsz %F,%D",
|
||||
"0100bbbfffffff", "bcf %F,%B",
|
||||
"0101bbbfffffff", "bsf %F,%B",
|
||||
"0110bbbfffffff", "btfsc %F,%B",
|
||||
"0111bbbfffffff", "btfss %F,%B",
|
||||
"110100kkkkkkkk", "retlw %K",
|
||||
"110101kkkkkkkk", "retlw %K",
|
||||
"110110kkkkkkkk", "retlw %K",
|
||||
"110111kkkkkkkk", "retlw %K",
|
||||
"100aaaaaaaaaaa", "call %A",
|
||||
"101aaaaaaaaaaa", "goto %A",
|
||||
"110000kkkkkkkk", "movlw %K",
|
||||
"110001kkkkkkkk", "movlw %K",
|
||||
"110010kkkkkkkk", "movlw %K",
|
||||
"110011kkkkkkkk", "movlw %K",
|
||||
"111000kkkkkkkk", "iorlw %K",
|
||||
"111001kkkkkkkk", "andlw %K",
|
||||
"111010kkkkkkkk", "xorlw %K",
|
||||
"111100kkkkkkkk", "sublw %K",
|
||||
"111101kkkkkkkk", "sublw %K",
|
||||
"111110kkkkkkkk", "addlw %K",
|
||||
"111111kkkkkkkk", "addlw %K",
|
||||
nullptr
|
||||
};
|
||||
|
||||
pic16x8x_disassembler::pic16x8x_disassembler()
|
||||
{
|
||||
const char *p;
|
||||
const char *const *ops;
|
||||
u16 mask, bits;
|
||||
int bit;
|
||||
|
||||
ops = PIC16X8xFormats;
|
||||
while (*ops)
|
||||
{
|
||||
p = *ops;
|
||||
mask = 0; bits = 0; bit = 13;
|
||||
while (*p && bit >= 0)
|
||||
{
|
||||
switch (*p++)
|
||||
{
|
||||
case '1': mask |= 1<<bit; bits |= 1<<bit; bit--; break;
|
||||
case '0': mask |= 1<<bit; bit--; break;
|
||||
case ' ': break;
|
||||
case 'a':
|
||||
case 'b':
|
||||
case 'd':
|
||||
case 'f':
|
||||
case 'k':
|
||||
bit--;
|
||||
break;
|
||||
default:
|
||||
throw std::logic_error(util::string_format("Invalid instruction encoding '%s %s'\n", ops[0],ops[1]));
|
||||
}
|
||||
}
|
||||
if (bit != -1)
|
||||
{
|
||||
throw std::logic_error(util::string_format("not enough bits in encoding '%s %s' %d\n", ops[0],ops[1],bit));
|
||||
}
|
||||
while (isspace((u8)*p)) p++;
|
||||
Op.emplace_back(mask, bits, *p, ops[0], ops[1]);
|
||||
|
||||
ops += 2;
|
||||
}
|
||||
}
|
||||
|
||||
offs_t pic16x8x_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms)
|
||||
{
|
||||
int a, b, d, f, k; // these can all be filled in by parsing an instruction
|
||||
int i;
|
||||
int op;
|
||||
int cnt = 1;
|
||||
int code;
|
||||
int bit;
|
||||
const char *cp; // character pointer in OpFormats
|
||||
u32 flags = 0;
|
||||
bool bit_option = false;
|
||||
|
||||
op = -1; // no matching opcode
|
||||
code = opcodes.r16(pc);
|
||||
for (i = 0; i < int(Op.size()); i++)
|
||||
{
|
||||
if ((code & Op[i].mask) == Op[i].bits)
|
||||
{
|
||||
if (op != -1)
|
||||
{
|
||||
osd_printf_debug("Error: opcode %04Xh matches %d (%s) and %d (%s)\n",
|
||||
code,i,Op[i].fmt,op,Op[op].fmt);
|
||||
}
|
||||
op = i;
|
||||
}
|
||||
}
|
||||
|
||||
if (op == -1)
|
||||
{
|
||||
util::stream_format(stream, "???? dw %04Xh",code);
|
||||
return cnt | SUPPORTED;
|
||||
}
|
||||
|
||||
// shift out operands
|
||||
cp = Op[op].parse;
|
||||
a = b = d = f = k = 0;
|
||||
bit = 13;
|
||||
|
||||
while (bit >= 0)
|
||||
{
|
||||
osd_printf_debug("{%c/%d}",*cp,bit);
|
||||
switch (*cp)
|
||||
{
|
||||
case 'a': a <<=1; a |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
|
||||
case 'b': b <<=1; b |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
|
||||
case 'd': d <<=1; d |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
|
||||
case 'f': f <<=1; f |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
|
||||
case 'k': k <<=1; k |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
|
||||
case ' ': break;
|
||||
case '1': case '0': bit--; break;
|
||||
case '\0': throw std::logic_error(util::string_format("premature end of parse string, opcode %x, bit = %d\n",code,bit));
|
||||
}
|
||||
cp++;
|
||||
}
|
||||
|
||||
|
||||
// now traverse format string
|
||||
cp = Op[op].fmt;
|
||||
if (!strncmp(cp, "call", 4))
|
||||
flags = STEP_OVER;
|
||||
else if (!strncmp(cp, "ret", 3))
|
||||
flags = STEP_OUT;
|
||||
else if (!strncmp(cp, "btfs", 4) || !strncmp(cp + 2, "cfsz", 4))
|
||||
flags = STEP_COND;
|
||||
|
||||
// bit oriented instructions
|
||||
switch (f)
|
||||
{
|
||||
case 0x03:
|
||||
case 0x05:
|
||||
case 0x06:
|
||||
case 0x0b:
|
||||
case 0x81:
|
||||
case 0x85:
|
||||
case 0x86:
|
||||
bit_option = true;
|
||||
break;
|
||||
default:
|
||||
bit_option = false;
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
while (*cp)
|
||||
{
|
||||
if (*cp == '%')
|
||||
{
|
||||
cp++;
|
||||
switch (*cp++)
|
||||
{
|
||||
case 'A': util::stream_format(stream, "$%03X", a); break;
|
||||
case 'D': util::stream_format(stream, "%s", dest[d]); break;
|
||||
case 'F': (f < 0xc) ? util::stream_format(stream, "%s", sfregs[f]) : util::stream_format(stream, "byte_DATA_$%02X", f); break;
|
||||
case 'B':
|
||||
{
|
||||
if (bit_option)
|
||||
util::stream_format(stream, "%s", reg_flags[sfr_bank0[f & 0x0f]][b]);
|
||||
else
|
||||
util::stream_format(stream, "%d", b);
|
||||
}
|
||||
break;
|
||||
case 'K': util::stream_format(stream, "%02xh", k); break;
|
||||
default:
|
||||
throw std::logic_error(util::string_format("illegal escape character in format '%s'\n",Op[op].fmt));
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
stream << *cp++;
|
||||
}
|
||||
}
|
||||
|
||||
return cnt | flags | SUPPORTED;
|
||||
}
|
||||
|
||||
u32 pic16x8x_disassembler::opcode_alignment() const
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -1,46 +1,46 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders: Grull Osgo
|
||||
/*
|
||||
|
||||
Microchip PIC16X8x Emulator
|
||||
|
||||
Based on MAME's PIC16C5x cpu_device dissasm developed by Tony La Porta.
|
||||
|
||||
|
||||
*/
|
||||
|
||||
#ifndef MAME_CPU_PIC16X8X_16X8XDSM_H
|
||||
#define MAME_CPU_PIC16X8X_16X8XDSM_H
|
||||
|
||||
#pragma once
|
||||
|
||||
class pic16x8x_disassembler : public util::disasm_interface
|
||||
{
|
||||
public:
|
||||
pic16x8x_disassembler();
|
||||
virtual ~pic16x8x_disassembler() = default;
|
||||
|
||||
virtual u32 opcode_alignment() const override;
|
||||
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override;
|
||||
|
||||
private:
|
||||
struct PIC16X8xOpcode {
|
||||
u16 mask; // instruction mask
|
||||
u16 bits; // constant bits
|
||||
u16 extcode; // value that gets extension code
|
||||
const char *parse; // how to parse bits
|
||||
const char *fmt; // instruction format
|
||||
|
||||
PIC16X8xOpcode(u16 m, u16 b, u16 e, const char *p, const char *f) : mask(m), bits(b), extcode(e), parse(p), fmt(f) {}
|
||||
};
|
||||
|
||||
static const u8 sfr_bank0[16];
|
||||
static const char *const sfregs[12];
|
||||
static const char *const dest[2];
|
||||
static const char *const reg_flags[9][8];
|
||||
static const char *const PIC16X8xFormats[];
|
||||
|
||||
std::vector<PIC16X8xOpcode> Op;
|
||||
};
|
||||
|
||||
#endif
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders: Grull Osgo
|
||||
/*
|
||||
|
||||
Microchip PIC16X8x Emulator
|
||||
|
||||
Based on MAME's PIC16C5x cpu_device dissasm developed by Tony La Porta.
|
||||
|
||||
|
||||
*/
|
||||
|
||||
#ifndef MAME_CPU_PIC16X8X_16X8XDSM_H
|
||||
#define MAME_CPU_PIC16X8X_16X8XDSM_H
|
||||
|
||||
#pragma once
|
||||
|
||||
class pic16x8x_disassembler : public util::disasm_interface
|
||||
{
|
||||
public:
|
||||
pic16x8x_disassembler();
|
||||
virtual ~pic16x8x_disassembler() = default;
|
||||
|
||||
virtual u32 opcode_alignment() const override;
|
||||
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override;
|
||||
|
||||
private:
|
||||
struct PIC16X8xOpcode {
|
||||
u16 mask; // instruction mask
|
||||
u16 bits; // constant bits
|
||||
u16 extcode; // value that gets extension code
|
||||
const char *parse; // how to parse bits
|
||||
const char *fmt; // instruction format
|
||||
|
||||
PIC16X8xOpcode(u16 m, u16 b, u16 e, const char *p, const char *f) : mask(m), bits(b), extcode(e), parse(p), fmt(f) {}
|
||||
};
|
||||
|
||||
static const u8 sfr_bank0[16];
|
||||
static const char *const sfregs[12];
|
||||
static const char *const dest[2];
|
||||
static const char *const reg_flags[9][8];
|
||||
static const char *const PIC16X8xFormats[];
|
||||
|
||||
std::vector<PIC16X8xOpcode> Op;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,319 +1,319 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Grull Osgo
|
||||
/************************************************************************
|
||||
|
||||
Microchip PIC16x8x Emulator
|
||||
|
||||
Based on MAME's PIC16C5x/62x cpu devices developed by Tony La Porta
|
||||
and improvements to SFR's accesss made by ajrhacker.
|
||||
|
||||
|
||||
************************************************************************/
|
||||
|
||||
#ifndef MAME_CPU_PIC16X8X_PIC16X8X_H
|
||||
#define MAME_CPU_PIC16X8X_PIC16X8X_H
|
||||
|
||||
#pragma once
|
||||
|
||||
// input lines
|
||||
enum
|
||||
{
|
||||
PIC16x8x_T0CKI = 0,
|
||||
PIC16x8x_RB0INT
|
||||
};
|
||||
|
||||
DECLARE_DEVICE_TYPE(PIC16CR83, pic16cr83_device)
|
||||
DECLARE_DEVICE_TYPE(PIC16CR84, pic16cr84_device)
|
||||
DECLARE_DEVICE_TYPE(PIC16F83, pic16f83_device)
|
||||
DECLARE_DEVICE_TYPE(PIC16F84, pic16f84_device)
|
||||
DECLARE_DEVICE_TYPE(PIC16F84A, pic16f84a_device)
|
||||
|
||||
class pic16x8x_device : public cpu_device, public device_nvram_interface
|
||||
{
|
||||
|
||||
// i/o ports
|
||||
enum
|
||||
{
|
||||
PORTA = 0,
|
||||
PORTB
|
||||
};
|
||||
|
||||
public:
|
||||
// port a, 5 bits, 2-way
|
||||
auto read_a() { return m_read_port[PORTA].bind(); }
|
||||
auto write_a() { return m_write_port[PORTA].bind(); }
|
||||
|
||||
// port b, 8 bits, 2-way
|
||||
auto read_b() { return m_read_port[PORTB].bind(); }
|
||||
auto write_b() { return m_write_port[PORTB].bind(); }
|
||||
|
||||
/****************************************************************************
|
||||
* Function to configure the CONFIG register. This is actually hard-wired
|
||||
* during ROM programming, so should be called in the driver INIT, with
|
||||
* the value if known (available in HEX dumps of the ROM).
|
||||
****************************************************************************/
|
||||
void set_config(u16 data);
|
||||
|
||||
void core_regs(address_map &map, u8 mirror = 0);
|
||||
|
||||
void ram_6(address_map &map);
|
||||
void rom_9(address_map &map);
|
||||
void ram_7(address_map &map);
|
||||
void rom_10(address_map &map);
|
||||
|
||||
protected:
|
||||
// construction/destruction
|
||||
pic16x8x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int program_width, address_map_constructor program_map, address_map_constructor data_map);
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
// device_execute_interface overrides
|
||||
/**************************************************************************
|
||||
* Internal Clock divisor
|
||||
*
|
||||
* External Clock is divided internally by 4 for the instruction cycle
|
||||
* times. (Each instruction cycle passes through 4 machine states). This
|
||||
* is handled by the cpu execution engine.
|
||||
**************************************************************************/
|
||||
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
|
||||
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); }
|
||||
virtual u32 execute_min_cycles() const noexcept override { return 1; }
|
||||
virtual u32 execute_max_cycles() const noexcept override { return 2; }
|
||||
virtual u32 execute_input_lines() const noexcept override { return 1; }
|
||||
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == PIC16x8x_T0CKI; }
|
||||
virtual void execute_run() override;
|
||||
virtual void execute_set_input(int line, int state) override;
|
||||
|
||||
// device_memory_interface overrides
|
||||
virtual space_config_vector memory_space_config() const override;
|
||||
|
||||
// device_nvram_interface implementation
|
||||
virtual bool nvram_read(util::read_stream &file) override;
|
||||
virtual bool nvram_write(util::write_stream &file) override;
|
||||
virtual void nvram_default() override;
|
||||
|
||||
// device_state_interface overrides
|
||||
virtual void state_import(const device_state_entry &entry) override;
|
||||
virtual void state_export(const device_state_entry &entry) override;
|
||||
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
|
||||
|
||||
// device_disasm_interface overrides
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
u8 m_eeprom_data[0x40];
|
||||
u16 m_buff[0x40];
|
||||
|
||||
optional_memory_region m_region;
|
||||
|
||||
// address spaces
|
||||
address_space_config m_program_config;
|
||||
address_space_config m_data_config;
|
||||
|
||||
int m_program_width;
|
||||
|
||||
private:
|
||||
|
||||
memory_access<13, 1, -1, ENDIANNESS_LITTLE>::cache m_program;
|
||||
memory_access< 8, 0, 0, ENDIANNESS_LITTLE>::specific m_data;
|
||||
|
||||
/******************** CPU Internal Registers *******************/
|
||||
u16 m_PCL;
|
||||
u16 m_PREVPC;
|
||||
u8 m_W;
|
||||
u8 m_OPTION;
|
||||
u16 m_CONFIG;
|
||||
u8 m_ALU;
|
||||
u16 m_WDT;
|
||||
u8 m_TMR0;
|
||||
u8 m_STATUS;
|
||||
u8 m_FSR;
|
||||
u8 m_EEDATA;
|
||||
u8 m_EEADR;
|
||||
u8 m_PCLATH;
|
||||
u8 m_INTCON;
|
||||
u8 m_EECON1;
|
||||
u8 m_EECON2;
|
||||
u8 m_port_data[2];
|
||||
u8 m_port_tris[2];
|
||||
u16 m_STACK[8];
|
||||
u16 m_prescaler; // Note: this is really an 8-bit register
|
||||
PAIR16 m_opcode;
|
||||
int m_icount;
|
||||
int m_delay_timer;
|
||||
int m_rtcc;
|
||||
u8 m_count_cycles;
|
||||
u8 m_data_mask;
|
||||
u16 m_program_mask;
|
||||
u8 m_status_mask;
|
||||
u8 m_inst_cycles;
|
||||
u8 m_stack_pointer;
|
||||
u8 m_old_RB0;
|
||||
u8 m_portb_chdetect_temp;
|
||||
bool m_irq_in_progress;
|
||||
|
||||
const u8 m_internal_eeprom_size = 0x40;
|
||||
|
||||
// i/o handlers
|
||||
devcb_read8::array<2> m_read_port;
|
||||
devcb_write8::array<2> m_write_port;
|
||||
|
||||
// For debugger
|
||||
int m_debugger_temp;
|
||||
|
||||
// opcode table entry
|
||||
typedef void (pic16x8x_device::*pic16x8x_ophandler)();
|
||||
struct pic16x8x_opcode
|
||||
{
|
||||
u8 cycles;
|
||||
pic16x8x_ophandler function;
|
||||
};
|
||||
|
||||
static const pic16x8x_opcode s_opcode_main[128];
|
||||
static const pic16x8x_opcode s_opcode_00x[128];
|
||||
|
||||
void check_irqs();
|
||||
|
||||
// EEPROM data access
|
||||
u8 m_eeread(offs_t offs);
|
||||
void m_eewrite(offs_t offs, u8 data);
|
||||
|
||||
//void update_internalram_ptr();
|
||||
void calc_zero_flag();
|
||||
void calc_add_flags(u8 augend);
|
||||
void calc_sub_flags(u8 minuend);
|
||||
u16 pop_stack();
|
||||
void push_stack(u16 data);
|
||||
void set_pc(u16 addr);
|
||||
u8 get_regfile(u8 addr);
|
||||
void store_regfile(u8 addr, u8 data);
|
||||
void store_result(u8 addr, u8 data);
|
||||
u8 tmr0_r();
|
||||
void tmr0_w(u8 data);
|
||||
u8 pcl_r();
|
||||
void pcl_w(u8 data);
|
||||
u8 status_r();
|
||||
void status_w(u8 data);
|
||||
u8 fsr_r();
|
||||
void fsr_w(u8 data);
|
||||
u8 porta_r();
|
||||
void porta_w(u8 data);
|
||||
u8 portb_r();
|
||||
void portb_w(u8 data);
|
||||
u8 eedata_r();
|
||||
void eedata_w(u8 data);
|
||||
u8 eeadr_r();
|
||||
void eeadr_w(u8 data);
|
||||
u8 pclath_r();
|
||||
void pclath_w(u8 data);
|
||||
u8 intcon_r();
|
||||
void intcon_w(u8 data);
|
||||
u8 trisa_r();
|
||||
void trisa_w(u8 data);
|
||||
u8 trisb_r();
|
||||
void trisb_w(u8 data);
|
||||
u8 eecon1_r();
|
||||
void eecon1_w(u8 data);
|
||||
u8 eecon2_r();
|
||||
void eecon2_w(u8 data);
|
||||
u8 option_r();
|
||||
void option_w(u8 data);
|
||||
void reset_regs();
|
||||
void watchdog_reset();
|
||||
void update_watchdog(int counts);
|
||||
void update_timer(int counts);
|
||||
|
||||
void illegal();
|
||||
void addlw(); // new for 16x8x
|
||||
void addwf();
|
||||
void andwf();
|
||||
void andlw();
|
||||
void bcf();
|
||||
void bsf();
|
||||
void btfss();
|
||||
void btfsc();
|
||||
void call();
|
||||
void clrw();
|
||||
void clrf();
|
||||
void clrwdt();
|
||||
void comf();
|
||||
void decf();
|
||||
void decfsz();
|
||||
void goto_op();
|
||||
void incf();
|
||||
void incfsz();
|
||||
void iorlw();
|
||||
void iorwf();
|
||||
void movf();
|
||||
void movlw();
|
||||
void movwf();
|
||||
void nop();
|
||||
void retfie(); // new for 16x8x
|
||||
void retlw();
|
||||
void retrn(); // new for 16x8x - can´t use return as mnemonic - Others PIC's uses "returns", should I use it?
|
||||
void rlf();
|
||||
void rrf();
|
||||
void sleepic();
|
||||
void sublw(); // new for 16x8x
|
||||
void subwf();
|
||||
void swapf();
|
||||
void xorlw();
|
||||
void xorwf();
|
||||
};
|
||||
|
||||
|
||||
class pic16x83_device : public pic16x8x_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pic16x83_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); //, int program_width);
|
||||
};
|
||||
|
||||
class pic16x84_device : public pic16x8x_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pic16x84_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); //, int program_width);
|
||||
};
|
||||
|
||||
class pic16cr83_device : public pic16x83_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pic16cr83_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
};
|
||||
|
||||
|
||||
class pic16cr84_device : public pic16x84_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pic16cr84_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
};
|
||||
|
||||
|
||||
class pic16f83_device : public pic16x83_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pic16f83_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
};
|
||||
|
||||
|
||||
class pic16f84_device : public pic16x84_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pic16f84_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
};
|
||||
|
||||
|
||||
class pic16f84a_device : public pic16x84_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pic16f84a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
};
|
||||
|
||||
#endif // MAME_CPU_PIC16X8X_PIC16X8X_H
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Grull Osgo
|
||||
/************************************************************************
|
||||
|
||||
Microchip PIC16x8x Emulator
|
||||
|
||||
Based on MAME's PIC16C5x/62x cpu devices developed by Tony La Porta
|
||||
and improvements to SFR's accesss made by ajrhacker.
|
||||
|
||||
|
||||
************************************************************************/
|
||||
|
||||
#ifndef MAME_CPU_PIC16X8X_PIC16X8X_H
|
||||
#define MAME_CPU_PIC16X8X_PIC16X8X_H
|
||||
|
||||
#pragma once
|
||||
|
||||
// input lines
|
||||
enum
|
||||
{
|
||||
PIC16x8x_T0CKI = 0,
|
||||
PIC16x8x_RB0INT
|
||||
};
|
||||
|
||||
DECLARE_DEVICE_TYPE(PIC16CR83, pic16cr83_device)
|
||||
DECLARE_DEVICE_TYPE(PIC16CR84, pic16cr84_device)
|
||||
DECLARE_DEVICE_TYPE(PIC16F83, pic16f83_device)
|
||||
DECLARE_DEVICE_TYPE(PIC16F84, pic16f84_device)
|
||||
DECLARE_DEVICE_TYPE(PIC16F84A, pic16f84a_device)
|
||||
|
||||
class pic16x8x_device : public cpu_device, public device_nvram_interface
|
||||
{
|
||||
|
||||
// i/o ports
|
||||
enum
|
||||
{
|
||||
PORTA = 0,
|
||||
PORTB
|
||||
};
|
||||
|
||||
public:
|
||||
// port a, 5 bits, 2-way
|
||||
auto read_a() { return m_read_port[PORTA].bind(); }
|
||||
auto write_a() { return m_write_port[PORTA].bind(); }
|
||||
|
||||
// port b, 8 bits, 2-way
|
||||
auto read_b() { return m_read_port[PORTB].bind(); }
|
||||
auto write_b() { return m_write_port[PORTB].bind(); }
|
||||
|
||||
/****************************************************************************
|
||||
* Function to configure the CONFIG register. This is actually hard-wired
|
||||
* during ROM programming, so should be called in the driver INIT, with
|
||||
* the value if known (available in HEX dumps of the ROM).
|
||||
****************************************************************************/
|
||||
void set_config(u16 data);
|
||||
|
||||
void core_regs(address_map &map, u8 mirror = 0);
|
||||
|
||||
void ram_6(address_map &map);
|
||||
void rom_9(address_map &map);
|
||||
void ram_7(address_map &map);
|
||||
void rom_10(address_map &map);
|
||||
|
||||
protected:
|
||||
// construction/destruction
|
||||
pic16x8x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int program_width, address_map_constructor program_map, address_map_constructor data_map);
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
// device_execute_interface overrides
|
||||
/**************************************************************************
|
||||
* Internal Clock divisor
|
||||
*
|
||||
* External Clock is divided internally by 4 for the instruction cycle
|
||||
* times. (Each instruction cycle passes through 4 machine states). This
|
||||
* is handled by the cpu execution engine.
|
||||
**************************************************************************/
|
||||
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
|
||||
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); }
|
||||
virtual u32 execute_min_cycles() const noexcept override { return 1; }
|
||||
virtual u32 execute_max_cycles() const noexcept override { return 2; }
|
||||
virtual u32 execute_input_lines() const noexcept override { return 1; }
|
||||
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == PIC16x8x_T0CKI; }
|
||||
virtual void execute_run() override;
|
||||
virtual void execute_set_input(int line, int state) override;
|
||||
|
||||
// device_memory_interface overrides
|
||||
virtual space_config_vector memory_space_config() const override;
|
||||
|
||||
// device_nvram_interface implementation
|
||||
virtual bool nvram_read(util::read_stream &file) override;
|
||||
virtual bool nvram_write(util::write_stream &file) override;
|
||||
virtual void nvram_default() override;
|
||||
|
||||
// device_state_interface overrides
|
||||
virtual void state_import(const device_state_entry &entry) override;
|
||||
virtual void state_export(const device_state_entry &entry) override;
|
||||
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
|
||||
|
||||
// device_disasm_interface overrides
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
u8 m_eeprom_data[0x40];
|
||||
u16 m_buff[0x40];
|
||||
|
||||
optional_memory_region m_region;
|
||||
|
||||
// address spaces
|
||||
address_space_config m_program_config;
|
||||
address_space_config m_data_config;
|
||||
|
||||
int m_program_width;
|
||||
|
||||
private:
|
||||
|
||||
memory_access<13, 1, -1, ENDIANNESS_LITTLE>::cache m_program;
|
||||
memory_access< 8, 0, 0, ENDIANNESS_LITTLE>::specific m_data;
|
||||
|
||||
/******************** CPU Internal Registers *******************/
|
||||
u16 m_PCL;
|
||||
u16 m_PREVPC;
|
||||
u8 m_W;
|
||||
u8 m_OPTION;
|
||||
u16 m_CONFIG;
|
||||
u8 m_ALU;
|
||||
u16 m_WDT;
|
||||
u8 m_TMR0;
|
||||
u8 m_STATUS;
|
||||
u8 m_FSR;
|
||||
u8 m_EEDATA;
|
||||
u8 m_EEADR;
|
||||
u8 m_PCLATH;
|
||||
u8 m_INTCON;
|
||||
u8 m_EECON1;
|
||||
u8 m_EECON2;
|
||||
u8 m_port_data[2];
|
||||
u8 m_port_tris[2];
|
||||
u16 m_STACK[8];
|
||||
u16 m_prescaler; // Note: this is really an 8-bit register
|
||||
PAIR16 m_opcode;
|
||||
int m_icount;
|
||||
int m_delay_timer;
|
||||
int m_rtcc;
|
||||
u8 m_count_cycles;
|
||||
u8 m_data_mask;
|
||||
u16 m_program_mask;
|
||||
u8 m_status_mask;
|
||||
u8 m_inst_cycles;
|
||||
u8 m_stack_pointer;
|
||||
u8 m_old_RB0;
|
||||
u8 m_portb_chdetect_temp;
|
||||
bool m_irq_in_progress;
|
||||
|
||||
const u8 m_internal_eeprom_size = 0x40;
|
||||
|
||||
// i/o handlers
|
||||
devcb_read8::array<2> m_read_port;
|
||||
devcb_write8::array<2> m_write_port;
|
||||
|
||||
// For debugger
|
||||
int m_debugger_temp;
|
||||
|
||||
// opcode table entry
|
||||
typedef void (pic16x8x_device::*pic16x8x_ophandler)();
|
||||
struct pic16x8x_opcode
|
||||
{
|
||||
u8 cycles;
|
||||
pic16x8x_ophandler function;
|
||||
};
|
||||
|
||||
static const pic16x8x_opcode s_opcode_main[128];
|
||||
static const pic16x8x_opcode s_opcode_00x[128];
|
||||
|
||||
void check_irqs();
|
||||
|
||||
// EEPROM data access
|
||||
u8 m_eeread(offs_t offs);
|
||||
void m_eewrite(offs_t offs, u8 data);
|
||||
|
||||
//void update_internalram_ptr();
|
||||
void calc_zero_flag();
|
||||
void calc_add_flags(u8 augend);
|
||||
void calc_sub_flags(u8 minuend);
|
||||
u16 pop_stack();
|
||||
void push_stack(u16 data);
|
||||
void set_pc(u16 addr);
|
||||
u8 get_regfile(u8 addr);
|
||||
void store_regfile(u8 addr, u8 data);
|
||||
void store_result(u8 addr, u8 data);
|
||||
u8 tmr0_r();
|
||||
void tmr0_w(u8 data);
|
||||
u8 pcl_r();
|
||||
void pcl_w(u8 data);
|
||||
u8 status_r();
|
||||
void status_w(u8 data);
|
||||
u8 fsr_r();
|
||||
void fsr_w(u8 data);
|
||||
u8 porta_r();
|
||||
void porta_w(u8 data);
|
||||
u8 portb_r();
|
||||
void portb_w(u8 data);
|
||||
u8 eedata_r();
|
||||
void eedata_w(u8 data);
|
||||
u8 eeadr_r();
|
||||
void eeadr_w(u8 data);
|
||||
u8 pclath_r();
|
||||
void pclath_w(u8 data);
|
||||
u8 intcon_r();
|
||||
void intcon_w(u8 data);
|
||||
u8 trisa_r();
|
||||
void trisa_w(u8 data);
|
||||
u8 trisb_r();
|
||||
void trisb_w(u8 data);
|
||||
u8 eecon1_r();
|
||||
void eecon1_w(u8 data);
|
||||
u8 eecon2_r();
|
||||
void eecon2_w(u8 data);
|
||||
u8 option_r();
|
||||
void option_w(u8 data);
|
||||
void reset_regs();
|
||||
void watchdog_reset();
|
||||
void update_watchdog(int counts);
|
||||
void update_timer(int counts);
|
||||
|
||||
void illegal();
|
||||
void addlw(); // new for 16x8x
|
||||
void addwf();
|
||||
void andwf();
|
||||
void andlw();
|
||||
void bcf();
|
||||
void bsf();
|
||||
void btfss();
|
||||
void btfsc();
|
||||
void call();
|
||||
void clrw();
|
||||
void clrf();
|
||||
void clrwdt();
|
||||
void comf();
|
||||
void decf();
|
||||
void decfsz();
|
||||
void goto_op();
|
||||
void incf();
|
||||
void incfsz();
|
||||
void iorlw();
|
||||
void iorwf();
|
||||
void movf();
|
||||
void movlw();
|
||||
void movwf();
|
||||
void nop();
|
||||
void retfie(); // new for 16x8x
|
||||
void retlw();
|
||||
void retrn(); // new for 16x8x - can´t use return as mnemonic - Others PIC's uses "returns", should I use it?
|
||||
void rlf();
|
||||
void rrf();
|
||||
void sleepic();
|
||||
void sublw(); // new for 16x8x
|
||||
void subwf();
|
||||
void swapf();
|
||||
void xorlw();
|
||||
void xorwf();
|
||||
};
|
||||
|
||||
|
||||
class pic16x83_device : public pic16x8x_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pic16x83_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); //, int program_width);
|
||||
};
|
||||
|
||||
class pic16x84_device : public pic16x8x_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pic16x84_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); //, int program_width);
|
||||
};
|
||||
|
||||
class pic16cr83_device : public pic16x83_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pic16cr83_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
};
|
||||
|
||||
|
||||
class pic16cr84_device : public pic16x84_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pic16cr84_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
};
|
||||
|
||||
|
||||
class pic16f83_device : public pic16x83_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pic16f83_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
};
|
||||
|
||||
|
||||
class pic16f84_device : public pic16x84_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pic16f84_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
};
|
||||
|
||||
|
||||
class pic16f84a_device : public pic16x84_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pic16f84a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
};
|
||||
|
||||
#endif // MAME_CPU_PIC16X8X_PIC16X8X_H
|
||||
|
||||
@ -23,7 +23,7 @@ static const char *const s_mnemonic[] =
|
||||
"rrc" ,"rrca","rrd" ,"rst" ,"sbc" ,"scf" ,"set" ,"sla" ,
|
||||
"sll" ,"sra" ,"srl" ,"sub" ,"xor "
|
||||
// z80n
|
||||
,"swap","mirr","test",
|
||||
,"swap","mirr","test",
|
||||
"bsla","bsra","bsrl","bsrf","brlc","mul" ,"otib","nreg",
|
||||
"pxdn","pxad","stae","ldix","ldws","lddx","lirx","lprx",
|
||||
"ldrx"
|
||||
@ -41,7 +41,7 @@ const u32 z80_disassembler::s_flags[] =
|
||||
0 ,0 ,0 ,STEP_OVER,0 ,0 ,0 ,0 ,
|
||||
0 ,0 ,0 ,0 ,0
|
||||
// z80n
|
||||
,0 ,0 ,0 ,
|
||||
,0 ,0 ,0 ,
|
||||
0 ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,
|
||||
0 ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,
|
||||
0
|
||||
|
||||
@ -41,7 +41,7 @@ protected:
|
||||
zRRC ,zRRCA ,zRRD ,zRST ,zSBC ,zSCF ,zSET ,zSLA ,
|
||||
zSLL ,zSRA ,zSRL ,zSUB ,zXOR
|
||||
// z80n
|
||||
,zSWAP ,zMIRR ,zTEST ,
|
||||
,zSWAP ,zMIRR ,zTEST ,
|
||||
zBSLA ,zBSRA ,zBSRL ,zBSRF ,zBRLC ,zMUL ,zOTIB ,zNREG ,
|
||||
zPXDN ,zPXAD ,zSTAE ,zLDIX ,zLDWS ,zLDDX ,zLIRX ,zLPRX ,
|
||||
zLDRX
|
||||
|
||||
@ -555,8 +555,8 @@ TIMER_DEVICE_CALLBACK_MEMBER(equites_state::scanline_cb)
|
||||
{
|
||||
int scanline = param;
|
||||
|
||||
// all games but bullfgtr have both valid
|
||||
// bullfgtr definitely expects to vblank from 2, reversing will make it to run at half speed.
|
||||
// all games but bullfgtr have both valid
|
||||
// bullfgtr definitely expects to vblank from 2, reversing will make it to run at half speed.
|
||||
if(scanline == 232) // vblank-in irq
|
||||
m_maincpu->set_input_line(2, HOLD_LINE);
|
||||
|
||||
|
||||
@ -400,12 +400,12 @@ TIMER_DEVICE_CALLBACK_MEMBER(splendor_state::scanline_cb)
|
||||
{
|
||||
int scanline = param;
|
||||
|
||||
// vblank-in irq
|
||||
// vblank-in irq
|
||||
if(scanline == 224)
|
||||
m_maincpu->set_input_line(2, HOLD_LINE);
|
||||
|
||||
// vblank-out irq or sprite DMA end, applies bg scroll writes
|
||||
// and checks debug flag (if available) for screen freeze.
|
||||
// vblank-out irq or sprite DMA end, applies bg scroll writes
|
||||
// and checks debug flag (if available) for screen freeze.
|
||||
if(scanline == 32)
|
||||
m_maincpu->set_input_line(1, HOLD_LINE);
|
||||
}
|
||||
|
||||
@ -29,7 +29,7 @@
|
||||
the 53C96's transfer count is zero. The earlier ROM has the same logic as
|
||||
previous (and later!) 53C96 machines and works fine.
|
||||
|
||||
Video in chips
|
||||
Video in chips
|
||||
|
||||
|
||||
****************************************************************************/
|
||||
|
||||
@ -171,7 +171,7 @@ uint32_t caswin_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap
|
||||
m_tilemap->set_scroll_rows(32);
|
||||
|
||||
// TODO: still some cutoffs / object change flashing
|
||||
// goofy rowscroll, expects to wraparound over its own canvas ...
|
||||
// goofy rowscroll, expects to wraparound over its own canvas ...
|
||||
for (int i = 0; i < 32; i ++)
|
||||
{
|
||||
const u16 scroll_data = m_vram[i];
|
||||
|
||||
@ -37,7 +37,7 @@ A04 --|16 17|-- A03
|
||||
--------
|
||||
|
||||
*/
|
||||
|
||||
|
||||
namespace {
|
||||
|
||||
class challenge_gear_state : public driver_device
|
||||
|
||||
@ -442,7 +442,7 @@ void popobear_state::main_map(address_map &map)
|
||||
map(0x280000, 0x2fffff).ram().share("spriteram"); // unknown boundaries
|
||||
map(0x300000, 0x3fffff).ram().w(FUNC(popobear_state::vram_w)).share("vram"); // tile definitions + tilemaps
|
||||
|
||||
// TODO: is the 48xxxx block entirely from AIA90423?
|
||||
// TODO: is the 48xxxx block entirely from AIA90423?
|
||||
map(0x480000, 0x48001f).ram().share("vregs");
|
||||
map(0x480031, 0x480031).w(FUNC(popobear_state::irq_ack_w));
|
||||
map(0x480034, 0x480035).nopr(); // uses bset/bclr to write, which causes a read (ignored)
|
||||
|
||||
@ -916,8 +916,8 @@ uint8_t expro02_state::comad_okim6295_r()
|
||||
|
||||
void expro02_state::expro02(machine_config &config)
|
||||
{
|
||||
static constexpr XTAL CPU_CLOCK = XTAL(12'000'000);
|
||||
static constexpr XTAL VDP_CLOCK = XTAL(16'000'000);
|
||||
static constexpr XTAL CPU_CLOCK = XTAL(12'000'000);
|
||||
static constexpr XTAL VDP_CLOCK = XTAL(16'000'000);
|
||||
|
||||
/* basic machine hardware */
|
||||
M68000(config, m_maincpu, CPU_CLOCK);
|
||||
@ -926,7 +926,7 @@ void expro02_state::expro02(machine_config &config)
|
||||
|
||||
/* video hardware */
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_raw(VDP_CLOCK / 3, 341, 0, 256, 262, 0, 224); // ~60 Hz
|
||||
m_screen->set_raw(VDP_CLOCK / 3, 341, 0, 256, 262, 0, 224); // ~60 Hz
|
||||
m_screen->set_screen_update(FUNC(expro02_state::screen_update));
|
||||
m_screen->set_palette(m_palette);
|
||||
|
||||
@ -971,7 +971,7 @@ void expro02_state::comad(machine_config &config)
|
||||
m_view2->set_invert_flip(1);
|
||||
m_view2->set_offset(-256, -216, 256, 224);
|
||||
|
||||
// FIXME: can't be 0 seconds
|
||||
// FIXME: can't be 0 seconds
|
||||
subdevice<watchdog_timer_device>("watchdog")->set_time(attotime::from_seconds(0));
|
||||
}
|
||||
|
||||
|
||||
@ -1103,7 +1103,7 @@ void hotslots_state::magicle(machine_config &config)
|
||||
{
|
||||
hotslots_base(config);
|
||||
|
||||
pic16f84_device &pic(PIC16F84(config, "pic16f84", 4000000));
|
||||
pic16f84_device &pic(PIC16F84(config, "pic16f84", 4000000));
|
||||
pic.set_config(0x3ffa); // No protect - No Watchdog - HS Clock
|
||||
pic.read_b().set(FUNC(hotslots_state::pic_portb_r));
|
||||
pic.write_b().set(FUNC(hotslots_state::pic_portb_w));
|
||||
@ -1657,7 +1657,7 @@ ROM_START( quingo )
|
||||
|
||||
ROM_REGION( 0x0200, "sereeprom", 0 ) // Serial EPROM
|
||||
ROM_LOAD16_WORD_SWAP("quingo_24c04a.bin", 0x0000, 0x0200, BAD_DUMP CRC(d5e82b49) SHA1(7dbdf7d539cbd59a3ac546b6f50861c4958abb3a) ) // all AA & 55
|
||||
|
||||
|
||||
ROM_REGION16_LE( 0x4280, "pic16f84", 0 ) // borrowed from magicle to avoid I2C bus error
|
||||
ROM_LOAD("magicle_5.03_pic16f84_code.bin", 0x0000, 0x0800, BAD_DUMP CRC(22965864) SHA1(c421a9e9fac7c9c5dc01adda620dc8f5f16d94ba) )
|
||||
ROM_END
|
||||
@ -1747,7 +1747,7 @@ ROM_START( bigdeal0 )
|
||||
|
||||
ROM_REGION( 0x0200, "sereeprom", 0 ) // Serial EPROM
|
||||
ROM_LOAD16_WORD_SWAP("big_deal_24c04a.bin", 0x0000, 0x0200, BAD_DUMP CRC(d5e82b49) SHA1(7dbdf7d539cbd59a3ac546b6f50861c4958abb3a) ) // all AA & 55
|
||||
|
||||
|
||||
ROM_REGION16_LE( 0x4280, "pic16f84", 0 ) // borrowed from magicle to avoid I2C bus error
|
||||
ROM_LOAD("magicle_5.03_pic16f84_code.bin", 0x0000, 0x0800, BAD_DUMP CRC(22965864) SHA1(c421a9e9fac7c9c5dc01adda620dc8f5f16d94ba) )
|
||||
ROM_END
|
||||
@ -1837,7 +1837,7 @@ ROM_START( belslots )
|
||||
|
||||
ROM_REGION( 0x0200, "sereeprom", 0 ) // Serial EPROM
|
||||
ROM_LOAD16_WORD_SWAP("bel_slots_exp_24c04a.bin", 0x0000, 0x0200, BAD_DUMP CRC(d5e82b49) SHA1(7dbdf7d539cbd59a3ac546b6f50861c4958abb3a) ) // all AA & 55
|
||||
|
||||
|
||||
ROM_REGION16_LE( 0x4280, "pic16f84", 0 ) // borrowed from magicle to avoid I2C bus error
|
||||
ROM_LOAD("magicle_5.03_pic16f84_code.bin", 0x0000, 0x0800, BAD_DUMP CRC(22965864) SHA1(c421a9e9fac7c9c5dc01adda620dc8f5f16d94ba) )
|
||||
ROM_END
|
||||
|
||||
@ -814,7 +814,7 @@ void pc8801_state::palram_w(offs_t offset, uint8_t data)
|
||||
// p8suite Analog RGB test cross bars (reportedly works in 24 kHz / 80 column only)
|
||||
// NB: it uses a bunch of non-waitstate related opcodes to cycle time it right,
|
||||
// implying a stress-test for Z80 opcode cycles.
|
||||
m_screen->update_partial(m_screen->vpos());
|
||||
m_screen->update_partial(m_screen->vpos());
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -229,9 +229,9 @@ void mm2_state::mm2(machine_config &config)
|
||||
m_pit->set_clk<1>(16_MHz_XTAL/8);
|
||||
m_pit->set_clk<2>(16_MHz_XTAL/8);
|
||||
m_pit->out_handler<0>().set(m_pic, FUNC(pic8259_device::ir0_w));
|
||||
//m_pit->out_handler<1>().set()); MPSC ch B line clock
|
||||
//m_pit->out_handler<1>().set()); MPSC ch B line clock
|
||||
//m_pit->out_handler<2>().set()); Beep control
|
||||
|
||||
|
||||
I8274(config, m_mpsc, 16_MHz_XTAL/4);
|
||||
m_mpsc->out_int_callback().set(m_pic, FUNC(pic8259_device::ir1_w));
|
||||
|
||||
|
||||
@ -24,10 +24,10 @@
|
||||
The decryption can logically be split in two parts. The first part consists
|
||||
of a series of conditional XORs and bitswaps, controlled by the decryption
|
||||
key, which will be described in the next paragraph. The second part does a
|
||||
replacement of several values with FFFF. This last step is done to prevent
|
||||
usage of any PC-relative opcode, which would easily allow an intruder to dump
|
||||
decrypted values from program space. The FFFF replacement may affect either
|
||||
~300 values or ~5000, depending on the decryption key.
|
||||
replacement of several values with FFFF. This last step is done to prevent
|
||||
usage of any PC-relative opcode, which would easily allow an intruder to dump
|
||||
decrypted values from program space. The FFFF replacement may affect either
|
||||
~300 values or ~5000, depending on the decryption key.
|
||||
|
||||
The main part of the decryption can itself be subdivided in five consecutive
|
||||
steps. The first one is executed only if bit 15 of the encrypted value is 1;
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Andrei I. Holub
|
||||
/**********************************************************************
|
||||
Chloe 280SE
|
||||
Chloe 280SE
|
||||
**********************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
@ -725,7 +725,7 @@ INPUT_PORTS_START(chloe)
|
||||
PORT_BIT(0xe820, IP_ACTIVE_LOW, IPT_UNUSED)
|
||||
|
||||
PORT_START("IO_LINE5") /* 0xDFFE */
|
||||
PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("p P \"") PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') PORT_CHAR('"')
|
||||
PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("p P \"") PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') PORT_CHAR('"')
|
||||
PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("o O ;") PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') PORT_CHAR(';')
|
||||
PORT_CODE(KEYCODE_COLON)
|
||||
PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("i I Ins") PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
|
||||
|
||||
@ -7,7 +7,7 @@
|
||||
Issue 2B (Kickstarter 1), Issue 2D, Issue 2E, Issue 2H,
|
||||
Issue 4 (Kickstarter 2)
|
||||
Current implementation is based on Issue 4. Only limited difference
|
||||
tracked through PORT_CONFIG
|
||||
tracked through PORT_CONFIG
|
||||
|
||||
TODO:
|
||||
* improve zxnDMA
|
||||
@ -270,7 +270,7 @@ private:
|
||||
bool port_eff7_io_en() const { return BIT(internal_port_enable(), 26); }
|
||||
bool port_ctc_io_en() const { return BIT(internal_port_enable(), 27); }
|
||||
|
||||
u8 port_7ffd_bank() const { return (((nr_8f_mapping_mode_pentagon() || nr_8f_mapping_mode_profi()) ? 0 : BIT(m_port_dffd_data, 3)) << 6) | ((!nr_8f_mapping_mode_pentagon() ? BIT(m_port_dffd_data, 2) : (nr_8f_mapping_mode_pentagon_1024_en() && BIT(m_port_7ffd_data, 5))) << 5) | ((nr_8f_mapping_mode_pentagon() ? BIT(m_port_7ffd_data, 6, 2) : (m_port_dffd_data & 3)) << 3) | (m_port_7ffd_data & 7); }
|
||||
u8 port_7ffd_bank() const { return (((nr_8f_mapping_mode_pentagon() || nr_8f_mapping_mode_profi()) ? 0 : BIT(m_port_dffd_data, 3)) << 6) | ((!nr_8f_mapping_mode_pentagon() ? BIT(m_port_dffd_data, 2) : (nr_8f_mapping_mode_pentagon_1024_en() && BIT(m_port_7ffd_data, 5))) << 5) | ((nr_8f_mapping_mode_pentagon() ? BIT(m_port_7ffd_data, 6, 2) : (m_port_dffd_data & 3)) << 3) | (m_port_7ffd_data & 7); }
|
||||
bool port_7ffd_shadow() const { return BIT(m_port_7ffd_data, 3); }
|
||||
bool port_7ffd_locked() const { return (nr_8f_mapping_mode_pentagon_1024_en() || (nr_8f_mapping_mode_profi() && BIT(m_port_dffd_data, 4))) ? 0 : BIT(m_port_7ffd_data, 5); }
|
||||
bool port_1ffd_special() const { return BIT(m_port_1ffd_data, 0); }
|
||||
@ -2695,22 +2695,22 @@ void specnext_state::map_io(address_map &map)
|
||||
map(0x000b, 0x000b).mirror(0xff00).lrw8(NAME([this]() { return dma_r(1); }), NAME([this](u8 data) { dma_w(1, data); }));
|
||||
map(0x006b, 0x006b).mirror(0xff00).lrw8(NAME([this]() { return dma_r(0); }), NAME([this](u8 data) { dma_w(0, data); }));
|
||||
|
||||
map(0x0bdf, 0x0bdf).mirror(0xf000).lr8(NAME([this]() -> u8 { return m_io_mouse[0]->read(); })); // #fbdf
|
||||
map(0x0fdf, 0x0fdf).mirror(0xf000).lr8(NAME([this]() -> u8 { return ~m_io_mouse[1]->read(); })); // #ffdf
|
||||
map(0x0adf, 0x0adf).mirror(0xf000).lr8(NAME([this]() -> u8 { return 0x80 | (m_io_mouse[2]->read() & 0x07); })); // #fadf
|
||||
map(0x0bdf, 0x0bdf).mirror(0xf000).lr8(NAME([this]() -> u8 { return m_io_mouse[0]->read(); })); // #fbdf
|
||||
map(0x0fdf, 0x0fdf).mirror(0xf000).lr8(NAME([this]() -> u8 { return ~m_io_mouse[1]->read(); })); // #ffdf
|
||||
map(0x0adf, 0x0adf).mirror(0xf000).lr8(NAME([this]() -> u8 { return 0x80 | (m_io_mouse[2]->read() & 0x07); })); // #fadf
|
||||
|
||||
// TODO resolve conflicts mf+joy+DAC: 1f, 3f
|
||||
//map(0x001f, 0x001f).mirror(0xff00).lr8(NAME([]() -> u8 { return 0x00; /* Joy1,2*/ })).lw8(NAME([this](u8 data) {
|
||||
// if (m_nr_08_dac_en)
|
||||
// m_dac[0]->data_w(data);
|
||||
// if (m_nr_08_dac_en)
|
||||
// m_dac[0]->data_w(data);
|
||||
//}));
|
||||
map(0x00f1, 0x00f1).mirror(0xff00).lw8(NAME([this](u8 data) {
|
||||
if (m_nr_08_dac_en)
|
||||
m_dac[0]->data_w(data);
|
||||
}));
|
||||
//map(0x003f, 0x003f).mirror(0xff00).lw8(NAME([this](u8 data) {
|
||||
// if (m_nr_08_dac_en)
|
||||
// m_dac[0]->data_w(data);
|
||||
// if (m_nr_08_dac_en)
|
||||
// m_dac[0]->data_w(data);
|
||||
//}));
|
||||
map(0x000f, 0x000f).mirror(0xff00).lw8(NAME([this](u8 data) {
|
||||
if (m_nr_08_dac_en)
|
||||
@ -3186,15 +3186,15 @@ void specnext_state::machine_reset()
|
||||
m_port_dffd_data = 0;
|
||||
m_port_eff7_data = 0;
|
||||
/* TODO don't use inherited
|
||||
port_fe_reg = 0x00;
|
||||
port_ff_reg = 0x00;
|
||||
port_7ffd_reg = 0x00;
|
||||
port_dffd_reg = 0x00;
|
||||
port_dffd_reg_6 = 0;
|
||||
port_1ffd_reg = 0x00;
|
||||
port_1ffd_special_old = 0;
|
||||
port_eff7_reg_2 = 0;
|
||||
port_eff7_reg_3 = 0;
|
||||
port_fe_reg = 0x00;
|
||||
port_ff_reg = 0x00;
|
||||
port_7ffd_reg = 0x00;
|
||||
port_dffd_reg = 0x00;
|
||||
port_dffd_reg_6 = 0;
|
||||
port_1ffd_reg = 0x00;
|
||||
port_1ffd_special_old = 0;
|
||||
port_eff7_reg_2 = 0;
|
||||
port_eff7_reg_3 = 0;
|
||||
*/
|
||||
m_nr_02_generate_mf_nmi = 0;
|
||||
m_nr_02_generate_divmmc_nmi = 0;
|
||||
|
||||
@ -273,7 +273,7 @@ void wheelfir_state::do_blit()
|
||||
|
||||
float scale_u_step;
|
||||
float scale_v_step;
|
||||
|
||||
|
||||
// calculate u zoom (horizontal source scale)
|
||||
const int d1u = ((m_blitter_data[0x0a] & 0x1f00) >> 8) |
|
||||
((m_blitter_data[0x08] & 0x0100) >> 3);
|
||||
@ -301,7 +301,7 @@ void wheelfir_state::do_blit()
|
||||
|
||||
scale_u_step = 100.f / scale_u;
|
||||
scale_v_step = 100.f / scale_v;
|
||||
|
||||
|
||||
|
||||
// do the draw
|
||||
int y = dst_y0;
|
||||
@ -833,6 +833,19 @@ void wheelfir_state::kongball(machine_config& config)
|
||||
}
|
||||
|
||||
|
||||
void wheelfir_state::init_pwball()
|
||||
{
|
||||
m_force_extra_irq1 = true;
|
||||
//m_disable_raster_irq = true;
|
||||
}
|
||||
|
||||
void wheelfir_state::init_kongball()
|
||||
{
|
||||
m_force_extra_irq1 = true;
|
||||
m_disable_raster_irq = true; // the raster interrupt points outside of code
|
||||
}
|
||||
|
||||
|
||||
ROM_START( wheelfir )
|
||||
ROM_REGION( 0x100000, "maincpu", 0 ) // 68000 Code
|
||||
ROM_LOAD16_BYTE( "tch1.u19", 0x00001, 0x80000, CRC(33bbbc67) SHA1(c2ecc0ab522ee442076ea7b9536aee6e1fad0540) )
|
||||
@ -959,18 +972,6 @@ ROM_END
|
||||
|
||||
} // anonymous namespace
|
||||
|
||||
void wheelfir_state::init_pwball()
|
||||
{
|
||||
m_force_extra_irq1 = true;
|
||||
// m_disable_raster_irq = true;
|
||||
}
|
||||
|
||||
void wheelfir_state::init_kongball()
|
||||
{
|
||||
m_force_extra_irq1 = true;
|
||||
m_disable_raster_irq = true; // the raster interrupt points outside of code
|
||||
}
|
||||
|
||||
GAME( 199?, wheelfir, 0, wheelfir, wheelfir, wheelfir_state, empty_init, ROT0, "TCH", "Wheels & Fire", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS )
|
||||
GAME( 199?, pwball, 0, wheelfir, pwball, wheelfir_state, init_pwball, ROT0, "TCH", "Power Ball (prototype)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // mostly complete
|
||||
|
||||
|
||||
@ -87,10 +87,10 @@ public:
|
||||
|
||||
protected:
|
||||
// constants
|
||||
static XTAL constexpr CLOCK_X1 = 4_MHz_XTAL,
|
||||
CLOCK_X2 = 12_MHz_XTAL;
|
||||
static u16 constexpr HTOTAL = 384, HBSTART = 256, HBEND = 0,
|
||||
VTOTAL = 264, VBSTART = 240, VBEND = 16;
|
||||
static inline constexpr XTAL CLOCK_X1 = 4_MHz_XTAL;
|
||||
static inline constexpr XTAL CLOCK_X2 = 12_MHz_XTAL;
|
||||
static inline constexpr u16 HTOTAL = 384, HBSTART = 256, HBEND = 0;
|
||||
static inline constexpr u16 VTOTAL = 264, VBSTART = 240, VBEND = 16;
|
||||
|
||||
// initialization
|
||||
virtual void machine_start() override;
|
||||
@ -313,7 +313,7 @@ TILE_GET_INFO_MEMBER(bombjack_state::get_bg_tile_info)
|
||||
|
||||
set_bg_tile_info(attr, code, color, flipx, flipy);
|
||||
tileinfo.set(1, code, color, (flipx ? TILE_FLIPX : 0) |
|
||||
(flipy ? TILE_FLIPY : 0));
|
||||
(flipy ? TILE_FLIPY : 0));
|
||||
}
|
||||
|
||||
void bombjack_state::set_fg_tile_info(u8 const attr, u16 &code, u8 &color, bool &flipx, bool &flipy)
|
||||
@ -340,14 +340,14 @@ TILE_GET_INFO_MEMBER(bombjack_state::get_fg_tile_info)
|
||||
|
||||
set_fg_tile_info(attr, code, color, flipx, flipy);
|
||||
tileinfo.set(0, code, color, (flipx ? TILE_FLIPX : 0) |
|
||||
(flipy ? TILE_FLIPY : 0));
|
||||
(flipy ? TILE_FLIPY : 0));
|
||||
}
|
||||
|
||||
bool bombjack_state::large_sprite(int const index, u8 const attr)
|
||||
{
|
||||
bool const reverse = m_spritectrl[0] > m_spritectrl[1];
|
||||
return (index > m_spritectrl[reverse ? 1 : 0]) &&
|
||||
(index <= m_spritectrl[reverse ? 0 : 1]);
|
||||
(index <= m_spritectrl[reverse ? 0 : 1]);
|
||||
}
|
||||
|
||||
bool calorie_state::large_sprite(int const index, u8 const attr)
|
||||
@ -852,7 +852,7 @@ ROM_START( bombjack2 )
|
||||
|
||||
ROM_REGION( 0x2000, "bgmaps", 0 ) // schematics specify 2764, final board has a smaller ROM in place
|
||||
ROM_LOAD( "02_p04t.bin", 0x0000, 0x1000, CRC(398d4a02) SHA1(ac18a8219f99ba9178b96c9564de3978e39c59fd) )
|
||||
ROM_RELOAD( 0x1000, 0x1000)
|
||||
ROM_RELOAD( 0x1000, 0x1000)
|
||||
ROM_END
|
||||
|
||||
ROM_START( bombjackt )
|
||||
|
||||
@ -682,7 +682,7 @@ INPUT_PORTS_END
|
||||
|
||||
|
||||
static GFXDECODE_START( gfx_gaiden )
|
||||
GFXDECODE_ENTRY( "txtiles", 0, gfx_8x8x4_packed_msb, 0x100, 16 ) // tiles 8x8
|
||||
GFXDECODE_ENTRY( "txtiles", 0, gfx_8x8x4_packed_msb, 0x100, 16 ) // tiles 8x8
|
||||
GFXDECODE_ENTRY( "bgtiles", 0, gfx_8x8x4_row_2x2_group_packed_msb, 0x000, 0x100 ) // tiles 16x16
|
||||
GFXDECODE_ENTRY( "fgtiles", 0, gfx_8x8x4_row_2x2_group_packed_msb, 0x000, 0x100 ) // tiles 16x16 (only colors 0x00-0x0f and 0x80-0x8f are used)
|
||||
GFXDECODE_END
|
||||
@ -714,7 +714,7 @@ static const gfx_layout mastninj_spritelayout =
|
||||
};
|
||||
|
||||
static GFXDECODE_START( gfx_mastninj )
|
||||
GFXDECODE_ENTRY( "txtiles", 0, gfx_8x8x4_packed_msb, 0x000, 16 ) // tiles 8x8
|
||||
GFXDECODE_ENTRY( "txtiles", 0, gfx_8x8x4_packed_msb, 0x000, 16 ) // tiles 8x8
|
||||
GFXDECODE_ENTRY( "bgtiles", 0, mastninj_tile2layout, 0x300, 16 ) // tiles 16x16
|
||||
GFXDECODE_ENTRY( "fgtiles", 0, mastninj_tile2layout, 0x200, 16 ) // tiles 16x16
|
||||
GFXDECODE_ENTRY( "sprites", 0, mastninj_spritelayout, 0x100, 16 ) // sprites 16x16
|
||||
@ -743,7 +743,7 @@ static const gfx_layout drgnbowl_spritelayout =
|
||||
};
|
||||
|
||||
static GFXDECODE_START( gfx_drgnbowl )
|
||||
GFXDECODE_ENTRY( "txtiles", 0, gfx_8x8x4_packed_msb, 0, 16 ) // tiles 8x8
|
||||
GFXDECODE_ENTRY( "txtiles", 0, gfx_8x8x4_packed_msb, 0, 16 ) // tiles 8x8
|
||||
GFXDECODE_ENTRY( "bgtiles", 0x00000, drgnbowl_tile2layout, 0x300, 16 ) // tiles 16x16
|
||||
GFXDECODE_ENTRY( "bgtiles", 0x20000, drgnbowl_tile2layout, 0x200, 16 ) // tiles 16x16
|
||||
GFXDECODE_ENTRY( "sprites", 0, drgnbowl_spritelayout, 0x100, 16 ) // sprites 16x16
|
||||
@ -1058,7 +1058,7 @@ ROM_START( shadoww )
|
||||
ROM_LOAD16_BYTE( "shadowa_2.4s", 0x00001, 0x20000, CRC(f3f08921) SHA1(df6bb7302714e0eab12cbd0a7f2a4ca751a600e1) )
|
||||
|
||||
ROM_REGION( 0x10000, "audiocpu", 0 )
|
||||
ROM_LOAD( "gaiden_3.4b", 0x0000, 0x10000, CRC(75fd3e6a) SHA1(3333e84ed4983caa133e60a8e8895fa897ab4949) ) // Audio CPU is a Z80
|
||||
ROM_LOAD( "gaiden_3.4b", 0x0000, 0x10000, CRC(75fd3e6a) SHA1(3333e84ed4983caa133e60a8e8895fa897ab4949) ) // Audio CPU is a Z80
|
||||
|
||||
ROM_REGION( 0x010000, "txtiles", 0 )
|
||||
ROM_LOAD( "gaiden_5.7a", 0x000000, 0x10000, CRC(8d4035f7) SHA1(3473456cdd24e312e3073586d7e8f24eb71bbea1) ) // 8x8 tiles
|
||||
@ -1095,7 +1095,7 @@ ROM_START( shadowwa )
|
||||
ROM_LOAD16_BYTE( "shadoww_2.4s", 0x00001, 0x20000, CRC(9b9d6b18) SHA1(75068611fb1de61120be8bf840f61d90c0dc86ca) )
|
||||
|
||||
ROM_REGION( 0x10000, "audiocpu", 0 )
|
||||
ROM_LOAD( "gaiden_3.4b", 0x0000, 0x10000, CRC(75fd3e6a) SHA1(3333e84ed4983caa133e60a8e8895fa897ab4949) ) // Audio CPU is a Z80
|
||||
ROM_LOAD( "gaiden_3.4b", 0x0000, 0x10000, CRC(75fd3e6a) SHA1(3333e84ed4983caa133e60a8e8895fa897ab4949) ) // Audio CPU is a Z80
|
||||
|
||||
ROM_REGION( 0x010000, "txtiles", 0 )
|
||||
ROM_LOAD( "gaiden_5.7a", 0x000000, 0x10000, CRC(8d4035f7) SHA1(3473456cdd24e312e3073586d7e8f24eb71bbea1) ) // 8x8 tiles
|
||||
@ -1132,7 +1132,7 @@ ROM_START( gaiden )
|
||||
ROM_LOAD16_BYTE( "gaiden_2.4s", 0x00001, 0x20000, CRC(454f7314) SHA1(231296423870f00ea2e545faf0fbb37577430a4f) )
|
||||
|
||||
ROM_REGION( 0x10000, "audiocpu", 0 )
|
||||
ROM_LOAD( "gaiden_3.4b", 0x0000, 0x10000, CRC(75fd3e6a) SHA1(3333e84ed4983caa133e60a8e8895fa897ab4949) ) // Audio CPU is a Z80
|
||||
ROM_LOAD( "gaiden_3.4b", 0x0000, 0x10000, CRC(75fd3e6a) SHA1(3333e84ed4983caa133e60a8e8895fa897ab4949) ) // Audio CPU is a Z80
|
||||
|
||||
ROM_REGION( 0x010000, "txtiles", 0 )
|
||||
ROM_LOAD( "gaiden_5.7a", 0x000000, 0x10000, CRC(8d4035f7) SHA1(3473456cdd24e312e3073586d7e8f24eb71bbea1) ) // 8x8 tiles
|
||||
@ -1169,7 +1169,7 @@ ROM_START( ryukendn )
|
||||
ROM_LOAD16_BYTE( "ryukendn_2.4s", 0x00001, 0x20000, CRC(9e99f522) SHA1(b2277d8934b5e6e2f556aee5092f5d1050774a34) )
|
||||
|
||||
ROM_REGION( 0x10000, "audiocpu", 0 )
|
||||
ROM_LOAD( "3.4b", 0x0000, 0x10000, CRC(6b686b69) SHA1(f0fa553acb3945f8dbbf466073c8bae35a0375ef) ) // Audio CPU is a Z80
|
||||
ROM_LOAD( "3.4b", 0x0000, 0x10000, CRC(6b686b69) SHA1(f0fa553acb3945f8dbbf466073c8bae35a0375ef) ) // Audio CPU is a Z80
|
||||
|
||||
ROM_REGION( 0x010000, "txtiles", 0 )
|
||||
ROM_LOAD( "hn27512p.7a", 0x000000, 0x10000, CRC(765e7baa) SHA1(4d0a50f091b284739b6d9a8ceb4f81999da445fc) ) // 8x8 tiles
|
||||
@ -1216,7 +1216,7 @@ ROM_START( ryukendna )
|
||||
ROM_LOAD16_BYTE( "2.4s", 0x00001, 0x20000, CRC(a93a8256) SHA1(6bf6c189f82cb9341d3427a822de83cbaed27bc0) )
|
||||
|
||||
ROM_REGION( 0x10000, "audiocpu", 0 )
|
||||
ROM_LOAD( "3.4b", 0x0000, 0x10000, CRC(6b686b69) SHA1(f0fa553acb3945f8dbbf466073c8bae35a0375ef) ) // Audio CPU is a Z80
|
||||
ROM_LOAD( "3.4b", 0x0000, 0x10000, CRC(6b686b69) SHA1(f0fa553acb3945f8dbbf466073c8bae35a0375ef) ) // Audio CPU is a Z80
|
||||
|
||||
ROM_REGION( 0x010000, "txtiles", 0 )
|
||||
ROM_LOAD( "hn27512p.7a", 0x000000, 0x10000, CRC(765e7baa) SHA1(4d0a50f091b284739b6d9a8ceb4f81999da445fc) ) // 8x8 tiles
|
||||
|
||||
Loading…
Reference in New Issue
Block a user