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more of the same. nw.

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This commit is contained in:
Fabio Priuli 2013-03-22 07:55:40 +00:00
parent 8d6c701b6e
commit 02abb6625d
4 changed files with 49 additions and 77 deletions
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13
src/mame/includes/megadriv.h
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@ -93,12 +93,14 @@ public:
m_maincpu(*this,"maincpu"),
m_z80snd(*this,"genesis_snd_z80"),
m_vdp(*this,"gen_vdp"),
m_32x(*this,"sega32x"),
m_segacd(*this,"segacd"),
m_megadrive_ram(*this,"megadrive_ram")
{ }
optional_device<cpu_device> m_maincpu;
optional_device<cpu_device> m_z80snd;
required_device<sega_genesis_vdp_device> m_vdp;
optional_device<sega_32x_device> m_32x;
optional_device<sega_segacd_device> m_segacd;
optional_shared_ptr<UINT16> m_megadrive_ram;
@ -393,17 +395,6 @@ public:
};
extern cpu_device *_32x_master_cpu;
extern cpu_device *_32x_slave_cpu;
// called from out main scanline timers...
class segacd_state : public _32x_state // use _32x_state as base to make easier the combo 32X + SCD
{
public:

66
src/mame/machine/mega32x.c
View File

@ -199,11 +199,6 @@ GFX check (these don't explicitly fails):
#include "includes/megadriv.h"
/* the main Megadrive emulation needs to know this */
cpu_device *_32x_master_cpu;
cpu_device *_32x_slave_cpu;
/* need to make fifo callback part of device */
static UINT16 fifo_block_a[4];
static UINT16 fifo_block_b[4];
@ -221,6 +216,8 @@ const device_type SEGA_32X_PAL = &device_creator<sega_32x_pal_device>;
sega_32x_device::sega_32x_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock, device_type type)
: device_t(mconfig, type, "sega_32x_device", tag, owner, clock),
m_master_cpu(*this, "32x_master_sh2"),
m_slave_cpu(*this, "32x_slave_sh2"),
m_lch_pwm(*this, "lch_pwm"),
m_rch_pwm(*this, "rch_pwm")
{
@ -567,8 +564,8 @@ WRITE16_MEMBER( sega_32x_device::_32x_dreq_common_w )
current_fifo_block = fifo_block_b;
current_fifo_readblock = fifo_block_a;
// incase we have a stalled DMA in progress, let the SH2 know there is data available
sh2_notify_dma_data_available(space.machine().device(_32X_MASTER_TAG));
sh2_notify_dma_data_available(space.machine().device(_32X_SLAVE_TAG));
sh2_notify_dma_data_available(m_master_cpu);
sh2_notify_dma_data_available(m_slave_cpu);
}
current_fifo_write_pos = 0;
@ -582,8 +579,8 @@ WRITE16_MEMBER( sega_32x_device::_32x_dreq_common_w )
current_fifo_block = fifo_block_a;
current_fifo_readblock = fifo_block_b;
// incase we have a stalled DMA in progress, let the SH2 know there is data available
sh2_notify_dma_data_available(space.machine().device(_32X_MASTER_TAG));
sh2_notify_dma_data_available(space.machine().device(_32X_SLAVE_TAG));
sh2_notify_dma_data_available(m_master_cpu);
sh2_notify_dma_data_available(m_slave_cpu);
}
@ -662,8 +659,8 @@ WRITE16_MEMBER( sega_32x_device::_32x_68k_a15100_w )
if (data & 0x02)
{
_32x_master_cpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
_32x_slave_cpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
m_master_cpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
m_slave_cpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
}
if (data & 0x01)
@ -723,13 +720,13 @@ WRITE16_MEMBER( sega_32x_device::_32x_68k_a15102_w )
if (data&0x1)
{
if (m_sh2_master_cmdint_enable) _32x_master_cpu->set_input_line(SH2_CINT_IRQ_LEVEL,ASSERT_LINE);
if (m_sh2_master_cmdint_enable) m_master_cpu->set_input_line(SH2_CINT_IRQ_LEVEL,ASSERT_LINE);
else printf("master cmdint when masked!\n");
}
if (data&0x2)
{
if (m_sh2_slave_cmdint_enable) _32x_slave_cpu->set_input_line(SH2_CINT_IRQ_LEVEL,ASSERT_LINE);
if (m_sh2_slave_cmdint_enable) m_slave_cpu->set_input_line(SH2_CINT_IRQ_LEVEL,ASSERT_LINE);
else printf("slave cmdint when masked!\n");
}
}
@ -855,8 +852,8 @@ void sega_32x_device::handle_pwm_callback(void)
if(m_pwm_timer_tick == m_pwm_tm_reg)
{
m_pwm_timer_tick = 0;
if(sh2_master_pwmint_enable) { _32x_master_cpu->set_input_line(SH2_PINT_IRQ_LEVEL,ASSERT_LINE); }
if(sh2_slave_pwmint_enable) { _32x_slave_cpu->set_input_line(SH2_PINT_IRQ_LEVEL,ASSERT_LINE); }
if(sh2_master_pwmint_enable) { m_master_cpu->set_input_line(SH2_PINT_IRQ_LEVEL,ASSERT_LINE); }
if(sh2_slave_pwmint_enable) { m_slave_cpu->set_input_line(SH2_PINT_IRQ_LEVEL,ASSERT_LINE); }
}
m_32x_pwm_timer->adjust(attotime::from_hz((PWM_CLOCK) / (m_pwm_cycle - 1)));
@ -1314,8 +1311,8 @@ WRITE16_MEMBER( sega_32x_device::_32x_sh2_common_4006_w )
// VRES (md reset button interrupt) clear
/**********************************************************************************************/
WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_4014_w ){ _32x_master_cpu->set_input_line(SH2_VRES_IRQ_LEVEL,CLEAR_LINE);}
WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_4014_w ) { _32x_slave_cpu->set_input_line(SH2_VRES_IRQ_LEVEL,CLEAR_LINE);}
WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_4014_w ){ m_master_cpu->set_input_line(SH2_VRES_IRQ_LEVEL,CLEAR_LINE);}
WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_4014_w ) { m_slave_cpu->set_input_line(SH2_VRES_IRQ_LEVEL,CLEAR_LINE);}
/**********************************************************************************************/
// SH2 side 4016
@ -1330,8 +1327,8 @@ WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_4016_w ) { m_sh2_slave_vint_pend
// HINT (horizontal interrupt) clear
/**********************************************************************************************/
WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_4018_w ){ _32x_master_cpu->set_input_line(SH2_HINT_IRQ_LEVEL,CLEAR_LINE);}
WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_4018_w ) { _32x_slave_cpu->set_input_line(SH2_HINT_IRQ_LEVEL,CLEAR_LINE);}
WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_4018_w ){ m_master_cpu->set_input_line(SH2_HINT_IRQ_LEVEL,CLEAR_LINE);}
WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_4018_w ) { m_slave_cpu->set_input_line(SH2_HINT_IRQ_LEVEL,CLEAR_LINE);}
/**********************************************************************************************/
// SH2 side 401A
@ -1339,16 +1336,16 @@ WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_4018_w ) { _32x_slave_cpu->set_i
// Note: flag cleared here is a guess, according to After Burner behaviour
/**********************************************************************************************/
WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_401a_w ){ m_32x_68k_a15102_reg &= ~1; _32x_master_cpu->set_input_line(SH2_CINT_IRQ_LEVEL,CLEAR_LINE);}
WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_401a_w ) { m_32x_68k_a15102_reg &= ~2; _32x_slave_cpu->set_input_line(SH2_CINT_IRQ_LEVEL,CLEAR_LINE);}
WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_401a_w ){ m_32x_68k_a15102_reg &= ~1; m_master_cpu->set_input_line(SH2_CINT_IRQ_LEVEL,CLEAR_LINE);}
WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_401a_w ) { m_32x_68k_a15102_reg &= ~2; m_slave_cpu->set_input_line(SH2_CINT_IRQ_LEVEL,CLEAR_LINE);}
/**********************************************************************************************/
// SH2 side 401C
// PINT (PWM timer interrupt) clear
/**********************************************************************************************/
WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_401c_w ){ _32x_master_cpu->set_input_line(SH2_PINT_IRQ_LEVEL,CLEAR_LINE);}
WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_401c_w ) { _32x_slave_cpu->set_input_line(SH2_PINT_IRQ_LEVEL,CLEAR_LINE);}
WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_401c_w ){ m_master_cpu->set_input_line(SH2_PINT_IRQ_LEVEL,CLEAR_LINE);}
WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_401c_w ) { m_slave_cpu->set_input_line(SH2_PINT_IRQ_LEVEL,CLEAR_LINE);}
/**********************************************************************************************/
// SH2 side 401E
@ -1558,11 +1555,11 @@ ADDRESS_MAP_END
void sega_32x_device::_32x_check_irqs(running_machine& machine)
{
if (m_sh2_master_vint_enable && m_sh2_master_vint_pending) _32x_master_cpu->set_input_line(SH2_VINT_IRQ_LEVEL,ASSERT_LINE);
else _32x_master_cpu->set_input_line(SH2_VINT_IRQ_LEVEL,CLEAR_LINE);
if (m_sh2_master_vint_enable && m_sh2_master_vint_pending) m_master_cpu->set_input_line(SH2_VINT_IRQ_LEVEL,ASSERT_LINE);
else m_master_cpu->set_input_line(SH2_VINT_IRQ_LEVEL,CLEAR_LINE);
if (m_sh2_slave_vint_enable && m_sh2_slave_vint_pending) _32x_slave_cpu->set_input_line(SH2_VINT_IRQ_LEVEL,ASSERT_LINE);
else _32x_slave_cpu->set_input_line(SH2_VINT_IRQ_LEVEL,CLEAR_LINE);
if (m_sh2_slave_vint_enable && m_sh2_slave_vint_pending) m_slave_cpu->set_input_line(SH2_VINT_IRQ_LEVEL,ASSERT_LINE);
else m_slave_cpu->set_input_line(SH2_VINT_IRQ_LEVEL,CLEAR_LINE);
}
void sega_32x_device::_32x_scanline_cb0(running_machine& machine)
@ -1583,8 +1580,8 @@ void sega_32x_device::_32x_scanline_cb1()
if(genesis_scanline_counter < 224 || m_sh2_hint_in_vbl)
{
if(m_sh2_master_hint_enable) { _32x_master_cpu->set_input_line(SH2_HINT_IRQ_LEVEL,ASSERT_LINE); }
if(m_sh2_slave_hint_enable) { _32x_slave_cpu->set_input_line(SH2_HINT_IRQ_LEVEL,ASSERT_LINE); }
if(m_sh2_master_hint_enable) { m_master_cpu->set_input_line(SH2_HINT_IRQ_LEVEL,ASSERT_LINE); }
if(m_sh2_slave_hint_enable) { m_slave_cpu->set_input_line(SH2_HINT_IRQ_LEVEL,ASSERT_LINE); }
}
}
}
@ -1907,8 +1904,8 @@ void sega_32x_device::device_reset()
// checking if these help brutal, they don't.
sh2drc_set_options(machine().device(_32X_MASTER_TAG), SH2DRC_COMPATIBLE_OPTIONS);
sh2drc_set_options(machine().device(_32X_SLAVE_TAG), SH2DRC_COMPATIBLE_OPTIONS);
sh2drc_set_options(m_master_cpu, SH2DRC_COMPATIBLE_OPTIONS);
sh2drc_set_options(m_slave_cpu, SH2DRC_COMPATIBLE_OPTIONS);
// install these now, otherwise we'll get the following (incorrect) warnings on startup..
@ -1921,3 +1918,10 @@ void sega_32x_device::device_reset()
membank("masterbios")->set_entry(0);
membank("slavebios")->set_entry(0);
}
// if the system has a 32x, the extra CPUs are paused at start
void sega_32x_device::pause_cpu()
{
m_master_cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
m_slave_cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
}

8
src/mame/machine/mega32x.h
View File

@ -22,18 +22,18 @@
#include "sound/dac.h"
#define _32X_MASTER_TAG (":sega32x:32x_master_sh2")
#define _32X_SLAVE_TAG (":sega32x:32x_slave_sh2")
class sega_32x_device : public device_t
{
public:
sega_32x_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock, device_type type);
required_device<cpu_device> m_master_cpu;
required_device<cpu_device> m_slave_cpu;
required_device<dac_device> m_lch_pwm;
required_device<dac_device> m_rch_pwm;
void pause_cpu();
DECLARE_READ32_MEMBER( _32x_sh2_master_4000_common_4002_r );
DECLARE_READ32_MEMBER( _32x_sh2_slave_4000_common_4002_r );
DECLARE_READ32_MEMBER( _32x_sh2_common_4004_common_4006_r );

39
src/mame/machine/megadriv.c
View File

@ -923,7 +923,7 @@ MACHINE_RESET( megadriv )
/* default state of z80 = reset, with bus */
mame_printf_debug("Resetting Megadrive / Genesis\n");
if (machine.device("genesis_snd_z80") != NULL)
if (state->m_z80snd)
{
state->m_genz80.z80_is_reset = 1;
state->m_genz80.z80_has_bus = 1;
@ -951,20 +951,9 @@ MACHINE_RESET( megadriv )
megadriv_reset_vdp(machine);
/* if any of these extra CPUs exist, pause them until we actually turn them on */
if (_32x_master_cpu != NULL)
{
_32x_master_cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
}
if (_32x_slave_cpu != NULL)
{
_32x_slave_cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
}
// if the system has a 32x, pause the extra CPUs until they are actually turned on
if (state->m_32x)
state->m_32x->pause_cpu();
}
void megadriv_stop_scanline_timer(running_machine &machine)
@ -1223,34 +1212,22 @@ void md_base_state::megadriv_init_common()
membank("bank1")->set_base(m_genz80.z80_prgram);
}
/* Look to see if this system has the 32x Master SH2 */
_32x_master_cpu = machine().device<cpu_device>(_32X_MASTER_TAG);
if (_32x_master_cpu != NULL)
{
printf("32x MASTER SH2 cpu found '%s'\n", _32x_master_cpu->tag() );
}
/* Look to see if this system has the 32x Slave SH2 */
_32x_slave_cpu = machine().device<cpu_device>(_32X_SLAVE_TAG);
if (_32x_slave_cpu != NULL)
{
printf("32x SLAVE SH2 cpu found '%s'\n", _32x_slave_cpu->tag() );
}
machine().device("maincpu")->execute().set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(md_base_state::genesis_int_callback),this));
megadriv_backupram = NULL;
megadriv_backupram_length = 0;
vdp_get_word_from_68k_mem = vdp_get_word_from_68k_mem_default;
if (machine().device("sega32x"))
printf("32X found 'sega32x'\n");
if (machine().device("svp"))
{
printf("SVP (cpu) found '%s'\n", machine().device("svp")->tag());
printf("SVP (cpu) found 'svp'\n");
vdp_get_word_from_68k_mem = vdp_get_word_from_68k_mem_delayed;
}
if (machine().device("segacd"))
{
printf("SegaCD found '%s'\n", machine().device("segacd")->tag());
printf("SegaCD found 'segacd'\n");
vdp_get_word_from_68k_mem = vdp_get_word_from_68k_mem_delayed;
}