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More memory map merges.

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Also cleaned up shared ram handling in tnzs.
This commit is contained in:
Aaron Giles 2009-03-30 14:44:37 +00:00
parent f336a88493
commit 02e0dbde1f
5 changed files with 91 additions and 180 deletions
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108
src/mame/drivers/tnzs.c
View File

@ -751,85 +751,59 @@ static WRITE8_DEVICE_HANDLER( kabukiz_sample_w )
dac_data_w(device, data);
}
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1) /* ROM + RAM */
AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
AM_RANGE(0xe000, 0xefff) AM_READ(tnzs_sharedram_r) /* WORK RAM (shared by the 2 z80's) */
AM_RANGE(0xf000, 0xf1ff) AM_READ(SMH_RAM) /* VDC RAM */
AM_RANGE(0xf600, 0xf600) AM_READNOP /* ? */
AM_RANGE(0xf800, 0xfbff) AM_READ(SMH_RAM) /* not in extrmatn and arknoid2 (PROMs instead) */
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_BANK1) /* ROM + RAM */
AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM) AM_BASE(&tnzs_objram)
AM_RANGE(0xe000, 0xefff) AM_WRITE(tnzs_sharedram_w) AM_BASE(&tnzs_sharedram)
AM_RANGE(0xf000, 0xf1ff) AM_WRITE(SMH_RAM) AM_BASE(&tnzs_vdcram)
AM_RANGE(0xf200, 0xf2ff) AM_WRITE(SMH_RAM) AM_BASE(&tnzs_scrollram) /* scrolling info */
AM_RANGE(0xf300, 0xf303) AM_MIRROR(0xfc) AM_WRITE(SMH_RAM) AM_BASE(&tnzs_objctrl) /* control registers (0x80 mirror used by Arkanoid 2) */
AM_RANGE(0xf400, 0xf400) AM_WRITE(SMH_RAM) AM_BASE(&tnzs_bg_flag) /* enable / disable background transparency */
AM_RANGE(0xf600, 0xf600) AM_WRITE(tnzs_bankswitch_w)
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_RAMBANK(1) /* ROM + RAM */
AM_RANGE(0xc000, 0xdfff) AM_RAM AM_BASE(&tnzs_objram)
AM_RANGE(0xe000, 0xefff) AM_RAM AM_SHARE(1)
AM_RANGE(0xf000, 0xf1ff) AM_RAM AM_BASE(&tnzs_vdcram)
AM_RANGE(0xf200, 0xf2ff) AM_WRITEONLY AM_BASE(&tnzs_scrollram) /* scrolling info */
AM_RANGE(0xf300, 0xf303) AM_MIRROR(0xfc) AM_WRITEONLY AM_BASE(&tnzs_objctrl) /* control registers (0x80 mirror used by Arkanoid 2) */
AM_RANGE(0xf400, 0xf400) AM_WRITEONLY AM_BASE(&tnzs_bg_flag) /* enable / disable background transparency */
AM_RANGE(0xf600, 0xf600) AM_READNOP AM_WRITE(tnzs_bankswitch_w)
/* arknoid2, extrmatn, plumppop and drtoppel have PROMs instead of RAM */
/* drtoppel writes here anyway! (maybe leftover from tests during development) */
/* so the handler is patched out in init_drtopple() */
AM_RANGE(0xf800, 0xfbff) AM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
AM_RANGE(0xf800, 0xfbff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
ADDRESS_MAP_END
static ADDRESS_MAP_START( cpu0_type2, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_RAMBANK(1) /* ROM + RAM */
AM_RANGE(0xc000, 0xdfff) AM_RAM AM_BASE(&tnzs_objram)
AM_RANGE(0xe000, 0xefff) AM_READWRITE(tnzs_sharedram_r, tnzs_sharedram_w) AM_BASE(&tnzs_sharedram) /* WORK RAM (shared by the 2 z80's) */
AM_RANGE(0xe000, 0xefff) AM_RAM AM_SHARE(1)
AM_RANGE(0xf000, 0xf1ff) AM_RAM AM_BASE(&tnzs_vdcram)
AM_RANGE(0xf200, 0xf2ff) AM_WRITE(SMH_RAM) AM_BASE(&tnzs_scrollram) /* scrolling info */
AM_RANGE(0xf300, 0xf303) AM_MIRROR(0xfc) AM_WRITE(SMH_RAM) AM_BASE(&tnzs_objctrl) /* control registers (0x80 mirror used by Arkanoid 2) */
AM_RANGE(0xf400, 0xf400) AM_WRITE(SMH_RAM) AM_BASE(&tnzs_bg_flag) /* enable / disable background transparency */
AM_RANGE(0xf200, 0xf2ff) AM_WRITEONLY AM_BASE(&tnzs_scrollram) /* scrolling info */
AM_RANGE(0xf300, 0xf303) AM_MIRROR(0xfc) AM_WRITEONLY AM_BASE(&tnzs_objctrl) /* control registers (0x80 mirror used by Arkanoid 2) */
AM_RANGE(0xf400, 0xf400) AM_WRITEONLY AM_BASE(&tnzs_bg_flag) /* enable / disable background transparency */
AM_RANGE(0xf600, 0xf600) AM_WRITE(tnzs_bankswitch_w)
/* kabukiz still writes here but it's not used (it's paletteram in type1 map) */
AM_RANGE(0xf800, 0xfbff) AM_WRITENOP
ADDRESS_MAP_END
static ADDRESS_MAP_START( sub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK2)
AM_RANGE(0xb000, 0xb001) AM_DEVREAD("ym", ym2203_r)
AM_RANGE(0xc000, 0xc001) AM_READ(tnzs_mcu_r) /* plain input ports in insectx (memory handler */
/* changed in insectx_init() ) */
AM_RANGE(0xd000, 0xdfff) AM_READ(SMH_RAM)
AM_RANGE(0xe000, 0xefff) AM_READ(tnzs_sharedram_r)
static ADDRESS_MAP_START( sub_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(2)
AM_RANGE(0xa000, 0xa000) AM_WRITE(tnzs_bankswitch1_w)
AM_RANGE(0xb000, 0xb001) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w)
AM_RANGE(0xc000, 0xc001) AM_READWRITE(tnzs_mcu_r, tnzs_mcu_w) /* not present in insectx */
AM_RANGE(0xd000, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xefff) AM_RAM AM_SHARE(1)
AM_RANGE(0xf000, 0xf003) AM_READ(arknoid2_sh_f000_r) /* paddles in arkanoid2/plumppop. The ports are */
/* read but not used by the other games, and are not read at */
/* all by insectx. */
ADDRESS_MAP_END
static ADDRESS_MAP_START( sub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x9fff) AM_WRITE(SMH_ROM)
static ADDRESS_MAP_START( kageki_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(2)
AM_RANGE(0xa000, 0xa000) AM_WRITE(tnzs_bankswitch1_w)
AM_RANGE(0xb000, 0xb001) AM_DEVWRITE("ym", ym2203_w)
AM_RANGE(0xc000, 0xc001) AM_WRITE(tnzs_mcu_w) /* not present in insectx */
AM_RANGE(0xd000, 0xdfff) AM_WRITE(SMH_RAM)
AM_RANGE(0xe000, 0xefff) AM_WRITE(tnzs_sharedram_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( kageki_sub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK2)
AM_RANGE(0xb000, 0xb001) AM_DEVREAD("ym", ym2203_r)
AM_RANGE(0xb000, 0xb001) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w)
AM_RANGE(0xc000, 0xc000) AM_READ_PORT("IN0")
AM_RANGE(0xc001, 0xc001) AM_READ_PORT("IN1")
AM_RANGE(0xc002, 0xc002) AM_READ_PORT("IN2")
AM_RANGE(0xd000, 0xdfff) AM_READ(SMH_RAM)
AM_RANGE(0xe000, 0xefff) AM_READ(tnzs_sharedram_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( kageki_sub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x9fff) AM_WRITE(SMH_ROM)
AM_RANGE(0xa000, 0xa000) AM_WRITE(tnzs_bankswitch1_w)
AM_RANGE(0xb000, 0xb001) AM_DEVWRITE("ym", ym2203_w)
AM_RANGE(0xd000, 0xdfff) AM_WRITE(SMH_RAM)
AM_RANGE(0xe000, 0xefff) AM_WRITE(tnzs_sharedram_w)
AM_RANGE(0xd000, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xefff) AM_RAM AM_SHARE(1)
ADDRESS_MAP_END
/* the later board is different, it has a third CPU (and of course no mcu) */
@ -851,7 +825,7 @@ static ADDRESS_MAP_START( tnzsb_cpu1_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc001, 0xc001) AM_READ_PORT("IN1")
AM_RANGE(0xc002, 0xc002) AM_READ_PORT("IN2")
AM_RANGE(0xd000, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xefff) AM_READWRITE(tnzs_sharedram_r, tnzs_sharedram_w)
AM_RANGE(0xe000, 0xefff) AM_RAM AM_SHARE(1)
AM_RANGE(0xf000, 0xf003) AM_READ(SMH_RAM)
AM_RANGE(0xf000, 0xf3ff) AM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
ADDRESS_MAP_END
@ -867,7 +841,7 @@ static ADDRESS_MAP_START( kabukiz_cpu1_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc001, 0xc001) AM_READ_PORT("IN1")
AM_RANGE(0xc002, 0xc002) AM_READ_PORT("IN2")
AM_RANGE(0xd000, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xefff) AM_READWRITE(tnzs_sharedram_r, tnzs_sharedram_w)
AM_RANGE(0xe000, 0xefff) AM_RAM AM_SHARE(1)
AM_RANGE(0xf800, 0xfbff) AM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
ADDRESS_MAP_END
@ -1635,11 +1609,11 @@ static MACHINE_DRIVER_START( arknoid2 )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", Z80, XTAL_12MHz/2) /* verified on pcb */
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
MDRV_CPU_PROGRAM_MAP(main_map,0)
MDRV_CPU_VBLANK_INT("screen", arknoid2_interrupt)
MDRV_CPU_ADD("sub", Z80, XTAL_12MHz/2) /* verified on pcb */
MDRV_CPU_PROGRAM_MAP(sub_readmem,sub_writemem)
MDRV_CPU_PROGRAM_MAP(sub_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_QUANTUM_PERFECT_CPU("maincpu")
@ -1674,11 +1648,11 @@ static MACHINE_DRIVER_START( drtoppel )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", Z80,XTAL_12MHz/2) /* 6.0 MHz ??? - Main board Crystal is 12MHz */
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
MDRV_CPU_PROGRAM_MAP(main_map,0)
MDRV_CPU_VBLANK_INT("screen", arknoid2_interrupt)
MDRV_CPU_ADD("sub", Z80,XTAL_12MHz/2) /* 6.0 MHz ??? - Main board Crystal is 12MHz */
MDRV_CPU_PROGRAM_MAP(sub_readmem,sub_writemem)
MDRV_CPU_PROGRAM_MAP(sub_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_QUANTUM_PERFECT_CPU("maincpu")
@ -1713,11 +1687,11 @@ static MACHINE_DRIVER_START( tnzs )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", Z80,XTAL_12MHz/2) /* 6.0 MHz ??? - Main board Crystal is 12MHz */
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
MDRV_CPU_PROGRAM_MAP(main_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_CPU_ADD("sub", Z80,XTAL_12MHz/2) /* 6.0 MHz ??? - Main board Crystal is 12MHz */
MDRV_CPU_PROGRAM_MAP(sub_readmem,sub_writemem)
MDRV_CPU_PROGRAM_MAP(sub_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_CPU_ADD("mcu", I8742 ,12000000/2) /* 400KHz ??? - Main board Crystal is 12MHz */
@ -1754,11 +1728,11 @@ static MACHINE_DRIVER_START( insectx )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", Z80, XTAL_12MHz/2) /* verified on pcb */
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
MDRV_CPU_PROGRAM_MAP(main_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_CPU_ADD("sub", Z80, XTAL_12MHz/2) /* verified on pcb */
MDRV_CPU_PROGRAM_MAP(sub_readmem,sub_writemem)
MDRV_CPU_PROGRAM_MAP(sub_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_QUANTUM_PERFECT_CPU("maincpu")
@ -1792,11 +1766,11 @@ static MACHINE_DRIVER_START( kageki )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", Z80, XTAL_12MHz/2) /* verified on pcb */
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
MDRV_CPU_PROGRAM_MAP(main_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_CPU_ADD("sub", Z80, XTAL_12MHz/2) /* verified on pcb */
MDRV_CPU_PROGRAM_MAP(kageki_sub_readmem,kageki_sub_writemem)
MDRV_CPU_PROGRAM_MAP(kageki_sub_map,0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_QUANTUM_PERFECT_CPU("maincpu")

58
src/mame/drivers/topshoot.c
View File

@ -191,49 +191,27 @@ static INPUT_PORTS_START( topshoot ) /* Top Shooter Input Ports */
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
INPUT_PORTS_END
static ADDRESS_MAP_START( topshoot_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM) /* Cartridge Program Rom */
// AM_RANGE(0x200000, 0x20007f) AM_READ(SMH_RAM)
// AM_RANGE(0x200040, 0x200041) AM_READ_PORT("IN0") // ??
// AM_RANGE(0x200050, 0x200051) AM_READ_PORT("IN0") // ??
AM_RANGE(0x202000, 0x2023ff) AM_READ(SMH_RAM)
static ADDRESS_MAP_START( topshoot_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_ROM /* Cartridge Program Rom */
// AM_RANGE(0x200000, 0x20007f) AM_RAM
AM_RANGE(0x200000, 0x2023ff) AM_RAM // tested
AM_RANGE(0x400004, 0x400005) AM_READ_PORT("IN0") // ??
AM_RANGE(0xa10000, 0xa1001f) AM_READ_PORT("IN0")
AM_RANGE(0xa11100, 0xa11101) AM_READ_PORT("IN0") // ??
AM_RANGE(0xa00000, 0xa0ffff) AM_READ(genesis_68k_to_z80_r)
AM_RANGE(0xc00000, 0xc0001f) AM_READ(genesis_vdp_r) /* VDP Access */
AM_RANGE(0xe00000, 0xe1ffff) AM_READ(SMH_BANK3)
AM_RANGE(0xfe0000, 0xfeffff) AM_READ(SMH_BANK4)
AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM) /* Main Ram */
ADDRESS_MAP_END
static ADDRESS_MAP_START( topshoot_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM) /* Cartridge Program Rom */
// AM_RANGE(0x200000, 0x20007f) AM_WRITE(SMH_RAM)
AM_RANGE(0x200000, 0x2023ff) AM_WRITE(SMH_RAM) // tested
AM_RANGE(0xa10000, 0xa1001f) AM_WRITE(genesis_io_w) AM_BASE(&genesis_io_ram) /* Genesis Input */
AM_RANGE(0xa11000, 0xa11203) AM_WRITE(genesis_ctrl_w)
AM_RANGE(0xa00000, 0xa0ffff) AM_WRITE(genesis_68k_to_z80_w)
AM_RANGE(0xc00000, 0xc0001f) AM_WRITE(genesis_vdp_w) /* VDP Access */
AM_RANGE(0xfe0000, 0xfeffff) AM_WRITE(SMH_BANK4)
AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM) AM_BASE(&genesis_68k_ram)/* Main Ram */
AM_RANGE(0xa10000, 0xa1001f) AM_READ_PORT("IN0")
AM_RANGE(0xa11100, 0xa11101) AM_READ_PORT("IN0") // ??
AM_RANGE(0xa00000, 0xa0ffff) AM_READWRITE(genesis_68k_to_z80_r, genesis_68k_to_z80_w)
AM_RANGE(0xc00000, 0xc0001f) AM_READWRITE(genesis_vdp_r, genesis_vdp_w) /* VDP Access */
AM_RANGE(0xe00000, 0xe1ffff) AM_ROMBANK(3)
AM_RANGE(0xfe0000, 0xfeffff) AM_RAMBANK(4)
AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_BASE(&genesis_68k_ram)/* Main Ram */
ADDRESS_MAP_END
static ADDRESS_MAP_START( genesis_z80_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_BANK1)
AM_RANGE(0x2000, 0x3fff) AM_READ(SMH_BANK2) /* mirror */
AM_RANGE(0x4000, 0x7fff) AM_READ(genesis_z80_r)
AM_RANGE(0x8000, 0xffff) AM_READ(genesis_z80_bank_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( genesis_z80_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_BANK1) AM_BASE(&genesis_z80_ram)
AM_RANGE(0x2000, 0x3fff) AM_WRITE(SMH_BANK2) /* mirror */
AM_RANGE(0x4000, 0x7fff) AM_WRITE(genesis_z80_w)
// AM_RANGE(0x8000, 0xffff) AM_WRITE(genesis_z80_bank_w)
static ADDRESS_MAP_START( genesis_z80_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_RAMBANK(1) AM_BASE(&genesis_z80_ram)
AM_RANGE(0x2000, 0x3fff) AM_RAMBANK(2) /* mirror */
AM_RANGE(0x4000, 0x7fff) AM_READWRITE(genesis_z80_r, genesis_z80_w)
AM_RANGE(0x8000, 0xffff) AM_READ(genesis_z80_bank_r) //AM_WRITE(genesis_z80_bank_w)
ADDRESS_MAP_END
@ -243,7 +221,7 @@ static MACHINE_DRIVER_START( genesis_base )
MDRV_CPU_VBLANK_INT("screen", genesis_vblank_interrupt)
MDRV_CPU_ADD("soundcpu", Z80, MASTER_CLOCK / 15)
MDRV_CPU_PROGRAM_MAP(genesis_z80_readmem, genesis_z80_writemem)
MDRV_CPU_PROGRAM_MAP(genesis_z80_map, 0)
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) /* from vdp at scanline 0xe0 */
MDRV_QUANTUM_TIME(HZ(6000))
@ -278,7 +256,7 @@ static MACHINE_DRIVER_START( topshoot )
/* basic machine hardware */
MDRV_IMPORT_FROM( genesis_base )
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_PROGRAM_MAP(topshoot_readmem,topshoot_writemem)
MDRV_CPU_PROGRAM_MAP(topshoot_map,0)
/* video hardware */
MDRV_VIDEO_START(genesis)

84
src/mame/drivers/topspeed.c
View File

@ -451,75 +451,45 @@ static WRITE8_DEVICE_HANDLER( topspeed_msm5205_stop_w )
***********************************************************/
static ADDRESS_MAP_START( topspeed_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
AM_RANGE(0x400000, 0x40ffff) AM_READ(sharedram_r) // all shared ??
AM_RANGE(0x500000, 0x503fff) AM_READ(SMH_RAM)
AM_RANGE(0x7e0000, 0x7e0001) AM_READNOP
AM_RANGE(0x7e0002, 0x7e0003) AM_READ8(taitosound_comm_r, 0x00ff)
AM_RANGE(0x800000, 0x8003ff) AM_READ(SMH_RAM) /* raster line color control */
AM_RANGE(0x800400, 0x80ffff) AM_READ(SMH_RAM) /* unknown or unused */
AM_RANGE(0xa00000, 0xa0ffff) AM_READ(PC080SN_word_0_r) /* tilemaps */
AM_RANGE(0xb00000, 0xb0ffff) AM_READ(PC080SN_word_1_r) /* tilemaps */
AM_RANGE(0xd00000, 0xd00fff) AM_READ(SMH_RAM) /* sprite ram */
AM_RANGE(0xe00000, 0xe0ffff) AM_READ(SMH_RAM) /* sprite map */
ADDRESS_MAP_END
static ADDRESS_MAP_START( topspeed_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x400000, 0x40ffff) AM_WRITE(sharedram_w) AM_BASE(&sharedram) AM_SIZE(&sharedram_size)
AM_RANGE(0x500000, 0x503fff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
static ADDRESS_MAP_START( topspeed_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0x400000, 0x40ffff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE(&sharedram) AM_SIZE(&sharedram_size)
AM_RANGE(0x500000, 0x503fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x600002, 0x600003) AM_WRITE(cpua_ctrl_w)
AM_RANGE(0x7e0000, 0x7e0001) AM_WRITE8(taitosound_port_w, 0x00ff)
AM_RANGE(0x7e0002, 0x7e0003) AM_WRITE8(taitosound_comm_w, 0x00ff)
AM_RANGE(0x800000, 0x8003ff) AM_WRITE(SMH_RAM) AM_BASE(&topspeed_raster_ctrl)
AM_RANGE(0x800400, 0x80ffff) AM_WRITE(SMH_RAM)
AM_RANGE(0xa00000, 0xa0ffff) AM_WRITE(PC080SN_word_0_w)
AM_RANGE(0x7e0000, 0x7e0001) AM_READNOP AM_WRITE8(taitosound_port_w, 0x00ff)
AM_RANGE(0x7e0002, 0x7e0003) AM_READWRITE8(taitosound_comm_r, taitosound_comm_w, 0x00ff)
AM_RANGE(0x800000, 0x8003ff) AM_RAM AM_BASE(&topspeed_raster_ctrl)
AM_RANGE(0x800400, 0x80ffff) AM_RAM
AM_RANGE(0xa00000, 0xa0ffff) AM_READWRITE(PC080SN_word_0_r, PC080SN_word_0_w)
AM_RANGE(0xa20000, 0xa20003) AM_WRITE(PC080SN_yscroll_word_0_w)
AM_RANGE(0xa40000, 0xa40003) AM_WRITE(PC080SN_xscroll_word_0_w)
AM_RANGE(0xa50000, 0xa50003) AM_WRITE(PC080SN_ctrl_word_0_w)
AM_RANGE(0xb00000, 0xb0ffff) AM_WRITE(PC080SN_word_1_w)
AM_RANGE(0xb00000, 0xb0ffff) AM_READWRITE(PC080SN_word_1_r, PC080SN_word_1_w)
AM_RANGE(0xb20000, 0xb20003) AM_WRITE(PC080SN_yscroll_word_1_w)
AM_RANGE(0xb40000, 0xb40003) AM_WRITE(PC080SN_xscroll_word_1_w)
AM_RANGE(0xb50000, 0xb50003) AM_WRITE(PC080SN_ctrl_word_1_w)
AM_RANGE(0xd00000, 0xd00fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0xe00000, 0xe0ffff) AM_WRITE(SMH_RAM) AM_BASE(&topspeed_spritemap)
AM_RANGE(0xd00000, 0xd00fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0xe00000, 0xe0ffff) AM_RAM AM_BASE(&topspeed_spritemap)
ADDRESS_MAP_END
static ADDRESS_MAP_START( topspeed_cpub_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x01ffff) AM_READ(SMH_ROM)
AM_RANGE(0x400000, 0x40ffff) AM_READ(sharedram_r)
AM_RANGE(0x880000, 0x880001) AM_READ(topspeed_input_bypass_r)
AM_RANGE(0x880002, 0x880003) AM_READ(TC0220IOC_halfword_port_r)
AM_RANGE(0x900000, 0x9003ff) AM_READ(topspeed_motor_r) /* motor CPU */
ADDRESS_MAP_END
static ADDRESS_MAP_START( topspeed_cpub_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x01ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x400000, 0X40ffff) AM_WRITE(sharedram_w) AM_BASE(&sharedram)
AM_RANGE(0x880000, 0x880001) AM_WRITE(TC0220IOC_halfword_portreg_w)
AM_RANGE(0x880002, 0x880003) AM_WRITE(TC0220IOC_halfword_port_w)
AM_RANGE(0x900000, 0x9003ff) AM_WRITE(topspeed_motor_w) /* motor CPU */
static ADDRESS_MAP_START( topspeed_cpub_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x01ffff) AM_ROM
AM_RANGE(0x400000, 0X40ffff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE(&sharedram)
AM_RANGE(0x880000, 0x880001) AM_READWRITE(topspeed_input_bypass_r, TC0220IOC_halfword_portreg_w)
AM_RANGE(0x880002, 0x880003) AM_READWRITE(TC0220IOC_halfword_port_r, TC0220IOC_halfword_port_w)
AM_RANGE(0x900000, 0x9003ff) AM_READWRITE(topspeed_motor_r, topspeed_motor_w) /* motor CPU */
ADDRESS_MAP_END
/***************************************************************************/
static ADDRESS_MAP_START( z80_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK10)
AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_RAM)
AM_RANGE(0x9000, 0x9001) AM_DEVREAD("ym", ym2151_r)
AM_RANGE(0xa001, 0xa001) AM_READ(taitosound_slave_comm_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( z80_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x8fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x9000, 0x9001) AM_DEVWRITE("ym", ym2151_w)
static ADDRESS_MAP_START( z80_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(10)
AM_RANGE(0x8000, 0x8fff) AM_RAM
AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
AM_RANGE(0xa000, 0xa000) AM_WRITE(taitosound_slave_port_w)
AM_RANGE(0xa001, 0xa001) AM_WRITE(taitosound_slave_comm_w)
AM_RANGE(0xa001, 0xa001) AM_READWRITE(taitosound_slave_comm_r, taitosound_slave_comm_w)
AM_RANGE(0xb000, 0xb000) AM_DEVWRITE("msm", topspeed_msm5205_address_w)
// AM_RANGE(0xb400, 0xb400) // msm5205 start? doesn't seem to work right
AM_RANGE(0xb800, 0xb800) AM_DEVWRITE("msm", topspeed_msm5205_stop_w)
@ -705,14 +675,14 @@ static MACHINE_DRIVER_START( topspeed )
/* basic machine hardware */
MDRV_CPU_ADD("maincpu", M68000, 12000000) /* 12 MHz ??? */
MDRV_CPU_PROGRAM_MAP(topspeed_readmem,topspeed_writemem)
MDRV_CPU_PROGRAM_MAP(topspeed_map,0)
MDRV_CPU_VBLANK_INT("screen", topspeed_interrupt)
MDRV_CPU_ADD("audiocpu", Z80,16000000/4) /* 4 MHz ??? */
MDRV_CPU_PROGRAM_MAP(z80_readmem,z80_writemem)
MDRV_CPU_PROGRAM_MAP(z80_map,0)
MDRV_CPU_ADD("sub", M68000, 12000000) /* 12 MHz ??? */
MDRV_CPU_PROGRAM_MAP(topspeed_cpub_readmem,topspeed_cpub_writemem)
MDRV_CPU_PROGRAM_MAP(topspeed_cpub_map,0)
MDRV_CPU_VBLANK_INT("screen", topspeed_cpub_interrupt)
MDRV_MACHINE_START(topspeed)

3
src/mame/includes/tnzs.h
View File

@ -1,6 +1,6 @@
/*----------- defined in drivers/tnzs.c -----------*/
extern UINT8 *tnzs_objram, *tnzs_sharedram;
extern UINT8 *tnzs_objram;
extern UINT8 *tnzs_vdcram, *tnzs_scrollram, *tnzs_objctrl, *tnzs_bg_flag;
@ -26,7 +26,6 @@ READ8_HANDLER( tnzs_mcu_r );
WRITE8_HANDLER( tnzs_mcu_w );
INTERRUPT_GEN( arknoid2_interrupt );
MACHINE_RESET( tnzs );
READ8_HANDLER( tnzs_sharedram_r );
WRITE8_HANDLER( tnzs_sharedram_w );
WRITE8_HANDLER( tnzs_bankswitch_w );
WRITE8_HANDLER( tnzs_bankswitch1_w );

18
src/mame/machine/tnzs.c
View File

@ -487,6 +487,7 @@ interleave.
*********************************/
/*
static TIMER_CALLBACK( kludge_callback )
{
tnzs_sharedram[0x0f10] = param;
@ -496,7 +497,7 @@ static WRITE8_HANDLER( tnzs_sync_kludge_w )
{
timer_call_after_resynch(space->machine, NULL, data,kludge_callback);
}
*/
@ -532,7 +533,7 @@ DRIVER_INIT( tnzs )
{
mcu_type = MCU_TNZS;
/* we need to install a kludge to avoid problems with a bug in the original code */
memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w);
// memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w);
}
DRIVER_INIT( tnzsb )
@ -540,7 +541,7 @@ DRIVER_INIT( tnzsb )
mcu_type = MCU_NONE_TNZSB;
/* we need to install a kludge to avoid problems with a bug in the original code */
memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w);
// memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w);
}
DRIVER_INIT( kabukiz )
@ -655,17 +656,6 @@ MACHINE_RESET( tnzs )
}
READ8_HANDLER( tnzs_sharedram_r )
{
return tnzs_sharedram[offset];
}
WRITE8_HANDLER( tnzs_sharedram_w )
{
tnzs_sharedram[offset] = data;
}
WRITE8_HANDLER( tnzs_bankswitch_w )
{